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Add .xdc file for Xilinx projects

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bsdevlin 2019-02-12 00:13:03 +08:00
parent 361ece0ee3
commit 7c0d5dab5b
1 changed files with 1 additions and 0 deletions
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ip_cores/blake2b/synth/blake2g_top.xdc Normal file
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create_clock -period 2.000 -name i_clk -waveform {0.000 1.000} [get_ports -filter { NAME =~ "*clk*" && DIRECTION == "IN" }]