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zcash-fpga
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Update cpp library to include ate pairing commands, increase FPGA 

version to 1.2
This commit is contained in:
bsdevlin 2019-08-21 17:23:45 +08:00
parent 406a5bae2a
commit 8a01070e8f
3 changed files with 12 additions and 7 deletions
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13
aws/cl_zcash/software/runtime/zcash_fpga.hpp
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@ -47,15 +47,15 @@ class zcash_fpga {
RESET_FPGA = 0x00000000, RESET_FPGA = 0x00000000,
FPGA_STATUS = 0x00000001, FPGA_STATUS = 0x00000001,
VERIFY_EQUIHASH = 0x00000100, VERIFY_EQUIHASH = 0x00000100,
VERIFY_SECP256K1_SIG = 0x00000101, VERIFY_SECP256K1_SIG = 0x00000200,
// Replies from the FPGA // Replies from the FPGA
RESET_FPGA_RPL = 0x80000000, RESET_FPGA_RPL = 0x80000000,
FPGA_STATUS_RPL = 0x80000001, FPGA_STATUS_RPL = 0x80000001,
FPGA_IGNORE_RPL = 0x80000002, FPGA_IGNORE_RPL = 0x80000002,
VERIFY_EQUIHASH_RPL = 0x80000100, VERIFY_EQUIHASH_RPL = 0x80000100,
VERIFY_SECP256K1_SIG_RPL = 0x80000101, VERIFY_SECP256K1_SIG_RPL = 0x80000200,
BLS12_381_INTERRUPT_RPL = 0x80000200 BLS12_381_INTERRUPT_RPL = 0x80000300
} command_t; } command_t;
typedef enum : uint8_t { typedef enum : uint8_t {
@ -78,6 +78,9 @@ class zcash_fpga {
typedef enum : uint8_t { typedef enum : uint8_t {
NOOP_WAIT = 0x0, NOOP_WAIT = 0x0,
COPY_REG = 0x1, COPY_REG = 0x1,
JUMP = 0x2,
JUMP_IF_EQ = 0x4,
JUMP_NONZERO_SUB= 0x5,
SEND_INTERRUPT = 0x6, SEND_INTERRUPT = 0x6,
SUB_ELEMENT = 0x10, SUB_ELEMENT = 0x10,
@ -87,7 +90,9 @@ class zcash_fpga {
POINT_MULT = 0x24, POINT_MULT = 0x24,
FP_FPOINT_MULT = 0x25, FP_FPOINT_MULT = 0x25,
FP2_FPOINT_MULT = 0x26 FP2_FPOINT_MULT = 0x26,
ATE_PAIRING = 0x28
} bls12_381_code_t; } bls12_381_code_t;
// Instruction format // Instruction format

2
zcash_fpga/src/rtl/top/zcash_fpga_pkg.sv
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@ -27,7 +27,7 @@ package zcash_fpga_pkg;
import bls12_381_pkg::point_type_t; import bls12_381_pkg::point_type_t;
parameter FPGA_VERSION = 32'h01_01_05; //v1.1.5 parameter FPGA_VERSION = 32'h01_02_00; //v1.1.5
// What features are enabled in this build // What features are enabled in this build
parameter bit ENB_VERIFY_SECP256K1_SIG = 1; parameter bit ENB_VERIFY_SECP256K1_SIG = 1;

4
zcash_fpga/src/tb/bls12_381_top_tb.sv
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@ -34,7 +34,7 @@ end
initial begin initial begin
clk = 0; clk = 0;
forever #CLK_PERIOD clk = ~clk; forever #(CLK_PERIOD/2) clk = ~clk;
end end
if_axi_stream #(.DAT_BYTS(8)) out_if(clk); if_axi_stream #(.DAT_BYTS(8)) out_if(clk);
@ -65,7 +65,7 @@ begin
bls12_381_interrupt_rpl_t interrupt_rpl; bls12_381_interrupt_rpl_t interrupt_rpl;
failed = 0; failed = 0;
in_k = 381'haaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa; in_k = 1 << 379;
exp_p = point_mult(in_k, g_point); exp_p = point_mult(in_k, g_point);
$display("Running test_fp_fpoint_mult..."); $display("Running test_fp_fpoint_mult...");