force synchronizer to use register

ip_cores/common/src/rtl/synchronizer .sv

@@ -16,7 +16,7 @@
   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <https://www.gnu.org/licenses/>.
  */
-
+
 module synchronizer  #(
   parameter DAT_BITS = 1,
   parameter NUM_CLKS = 2
@@ -28,7 +28,7 @@ module synchronizer  #(
   output logic [DAT_BITS-1:0] o_dat_b
 );
 
-logic [NUM_CLKS:0][DAT_BITS-1:0] dat;
+(* srl_style = "register" *) logic [NUM_CLKS:0][DAT_BITS-1:0] dat; // Don't want SRL as we apply timing constraints later
 
 always_ff @ (posedge i_clk_a) begin
   dat[0] <= i_dat_a;