more readme updates

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bsdevlin 2019-07-01 15:20:43 +08:00
parent c8fd33ac58
commit bb3630a21d
2 changed files with 2 additions and 1 deletions

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@ -28,6 +28,8 @@ These contain shared IP cores used by the projects in this repo. These include m
- AXI4-lite
- Block RAM
* Fifo implementations
* Hash map implementation
- Fully parameterized for bit widths and uses CRC as the hashing function
* Blocks for parsing/processing streams
* Karabutsa multiplier
- Fully parameterized for number of levels

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This is the design for verifing the Zcash blockchain on an FPGA