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EPROMEmu-1
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remove ignored files

This commit is contained in:
Brian Peek 2021-12-10 23:00:53 -07:00
parent 75935a8180
commit fdcc1eea92
8 changed files with 0 additions and 87576 deletions
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4
schematic/epromemu.csv
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@ -1,4 +0,0 @@
Reference, Quantity, Value, Footprint, Datasheet
J1 ,1,"EPROM Connector","Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical","~"
U1 ,1,"Teensy4.1","teensy:Teensy41",""
U2 U3 U4 U5 ,4,"TXS0108EPW","Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm","www.ti.com/lit/ds/symlink/txs0108e.pdf"
1 Reference Quantity Value Footprint Datasheet
2 J1 1 EPROM Connector Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical ~
3 U1 1 Teensy4.1 teensy:Teensy41
4 U2 U3 U4 U5 4 TXS0108EPW Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm www.ti.com/lit/ds/symlink/txs0108e.pdf

489
schematic/epromemu.dsn
View File

@ -1,489 +0,0 @@
(pcb C:\Projects\EPROMEmu\schematic\epromemu.dsn
(parser
(string_quote ")
(space_in_quoted_tokens on)
(host_cad "KiCad's Pcbnew")
(host_version "(5.1.12)-1")
)
(resolution um 10)
(unit um)
(structure
(layer F.Cu
(type signal)
(property
(index 0)
)
)
(layer B.Cu
(type signal)
(property
(index 1)
)
)
(boundary
(path pcb 0 184565 -92122.5 108785 -92122.5 108785 -47712.5 184565 -47712.5
184565 -92122.5)
)
(via "Via[0-1]_800:400_um")
(rule
(width 250)
(clearance 200.1)
(clearance 200.1 (type default_smd))
(clearance 50 (type smd_smd))
)
)
(placement
(component "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm"
(place U5 121920 -53340 front 90 (PN TXS0108EPW))
(place U4 151130 -53340 front 90 (PN TXS0108EPW))
(place U3 149860 -86360 front 270 (PN TXS0108EPW))
(place U2 121920 -86360 front 270 (PN TXS0108EPW))
)
(component teensy:Teensy41
(place U1 140610 -70640 front 0 (PN Teensy4.1))
)
(component Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical
(place J1 176530 -50800 front 0 (PN "EPROM Connector"))
)
)
(library
(image "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm"
(outline (path signal 120 0 -3385 2200 -3385))
(outline (path signal 120 0 -3385 -2200 -3385))
(outline (path signal 120 0 3385 2200 3385))
(outline (path signal 120 0 3385 -3600 3385))
(outline (path signal 100 -1200 3250 2200 3250))
(outline (path signal 100 2200 3250 2200 -3250))
(outline (path signal 100 2200 -3250 -2200 -3250))
(outline (path signal 100 -2200 -3250 -2200 2250))
(outline (path signal 100 -2200 2250 -1200 3250))
(outline (path signal 50 -3850 3500 -3850 -3500))
(outline (path signal 50 -3850 -3500 3850 -3500))
(outline (path signal 50 3850 -3500 3850 3500))
(outline (path signal 50 3850 3500 -3850 3500))
(pin RoundRect[T]Pad_1475x400_100.381_um 20 2862.5 2925)
(pin RoundRect[T]Pad_1475x400_100.381_um 19 2862.5 2275)
(pin RoundRect[T]Pad_1475x400_100.381_um 18 2862.5 1625)
(pin RoundRect[T]Pad_1475x400_100.381_um 17 2862.5 975)
(pin RoundRect[T]Pad_1475x400_100.381_um 16 2862.5 325)
(pin RoundRect[T]Pad_1475x400_100.381_um 15 2862.5 -325)
(pin RoundRect[T]Pad_1475x400_100.381_um 14 2862.5 -975)
(pin RoundRect[T]Pad_1475x400_100.381_um 13 2862.5 -1625)
(pin RoundRect[T]Pad_1475x400_100.381_um 12 2862.5 -2275)
(pin RoundRect[T]Pad_1475x400_100.381_um 11 2862.5 -2925)
(pin RoundRect[T]Pad_1475x400_100.381_um 10 -2862.5 -2925)
(pin RoundRect[T]Pad_1475x400_100.381_um 9 -2862.5 -2275)
(pin RoundRect[T]Pad_1475x400_100.381_um 8 -2862.5 -1625)
(pin RoundRect[T]Pad_1475x400_100.381_um 7 -2862.5 -975)
(pin RoundRect[T]Pad_1475x400_100.381_um 6 -2862.5 -325)
(pin RoundRect[T]Pad_1475x400_100.381_um 5 -2862.5 325)
(pin RoundRect[T]Pad_1475x400_100.381_um 4 -2862.5 975)
(pin RoundRect[T]Pad_1475x400_100.381_um 3 -2862.5 1625)
(pin RoundRect[T]Pad_1475x400_100.381_um 2 -2862.5 2275)
(pin RoundRect[T]Pad_1475x400_100.381_um 1 -2862.5 2925)
)
(image teensy:Teensy41
(outline (path signal 150 12963 0 12885.4 -365.26 12665.9 -667.363 12342.5 -854.073
11971.1 -893.106 11616 -777.713 11338.5 -527.846 11186.6 -186.71
11186.6 186.71 11338.5 527.846 11616 777.713 11971.1 893.106
12342.5 854.073 12665.9 667.363 12885.4 365.26 12963 0))
(outline (path signal 150 -7620 6350 -7620 -6350))
(outline (path signal 150 5080 6350 -7620 6350))
(outline (path signal 150 5080 -6350 5080 6350))
(outline (path signal 150 -7620 -6350 5080 -6350))
(outline (path signal 150 -17250 6351.6 -17250 6101.6))
(outline (path signal 150 -13250 6351.6 -17250 6351.6))
(outline (path signal 150 -13250 101.6 -13250 6351.6))
(outline (path signal 150 -17250 101.6 -13250 101.6))
(outline (path signal 150 -17250 6101.6 -17250 101.6))
(outline (path signal 150 -21640.8 -3299.2 -21640.8 -5839.2))
(outline (path signal 150 -24180.8 -3299.2 -21640.8 -3299.2))
(outline (path signal 150 -24180.8 -5839.2 -24180.8 -3299.2))
(outline (path signal 150 -11480.8 -5839.2 -24180.8 -5839.2))
(outline (path signal 150 -11480.8 -3299.2 -11480.8 -5839.2))
(outline (path signal 150 -24180.8 -3299.2 -11480.8 -3299.2))
(outline (path signal 150 10160 1270 13970 1270))
(outline (path signal 150 10160 -1270 10160 1270))
(outline (path signal 150 13970 -1270 10160 -1270))
(outline (path signal 150 13970 1270 13970 -1270))
(outline (path signal 150 29210 -5080 30480 -5080))
(outline (path signal 150 29210 5080 29210 -5080))
(outline (path signal 150 30480 5080 29210 5080))
(outline (path signal 150 17780 -6350 30480 -6350))
(outline (path signal 150 17780 6350 17780 -6350))
(outline (path signal 150 30480 6350 17780 6350))
(outline (path signal 150 -30480 -3810 -31750 -3810))
(outline (path signal 150 -31750 -3810 -31750 3810))
(outline (path signal 150 -31750 3810 -30480 3810))
(outline (path signal 150 -25400 -3810 -25400 3810))
(outline (path signal 150 -25400 3810 -30480 3810))
(outline (path signal 150 -25400 -3810 -30480 -3810))
(outline (path signal 150 -30480 8890 30480 8890))
(outline (path signal 150 30480 8890 30480 -8890))
(outline (path signal 150 30480 -8890 -30480 -8890))
(outline (path signal 150 -30480 -8890 -30480 8890))
(pin Round[A]Pad_1300_um 66 -28480 1270)
(pin Round[A]Pad_1300_um 67 -28480 -1270)
(pin Round[A]Pad_1600_um 54 16510 5080)
(pin Round[A]Pad_1600_um 53 16510 2540)
(pin Round[A]Pad_1600_um 52 16510 0)
(pin Round[A]Pad_1600_um 51 16510 -2540)
(pin Round[A]Pad_1600_um 50 16510 -5080)
(pin Round[A]Pad_1300_um 62 -16240 1181.6)
(pin Round[A]Pad_1300_um 63 -14240 1181.6)
(pin Round[A]Pad_1300_um 64 -14240 3181.6)
(pin Round[A]Pad_1300_um 61 -16240 3181.6)
(pin Round[A]Pad_1300_um 65 -14240 5181.6)
(pin Rect[A]Pad_1300x1300_um 60 -16240 5181.6)
(pin Round[A]Pad_1600_um 17 11430 -7620)
(pin Round[A]Pad_1600_um 18 13970 -7620)
(pin Round[A]Pad_1600_um 19 16510 -7620)
(pin Round[A]Pad_1600_um 20 19050 -7620)
(pin Round[A]Pad_1600_um 16 8890 -7620)
(pin Round[A]Pad_1600_um 15 6350 -7620)
(pin Round[A]Pad_1600_um 14 3810 -7620)
(pin Round[A]Pad_1600_um 21 21590 -7620)
(pin Round[A]Pad_1600_um 22 24130 -7620)
(pin Round[A]Pad_1600_um 23 26670 -7620)
(pin Round[A]Pad_1600_um 24 29210 -7620)
(pin Round[A]Pad_1600_um 25 29210 7620)
(pin Round[A]Pad_1600_um 26 26670 7620)
(pin Round[A]Pad_1600_um 27 24130 7620)
(pin Round[A]Pad_1600_um 28 21590 7620)
(pin Round[A]Pad_1600_um 29 19050 7620)
(pin Round[A]Pad_1600_um 30 16510 7620)
(pin Round[A]Pad_1600_um 31 13970 7620)
(pin Round[A]Pad_1600_um 32 11430 7620)
(pin Round[A]Pad_1600_um 33 8890 7620)
(pin Round[A]Pad_1600_um 34 6350 7620)
(pin Round[A]Pad_1600_um 13 1270 -7620)
(pin Round[A]Pad_1600_um 12 -1270 -7620)
(pin Round[A]Pad_1600_um 11 -3810 -7620)
(pin Round[A]Pad_1600_um 10 -6350 -7620)
(pin Round[A]Pad_1600_um 9 -8890 -7620)
(pin Round[A]Pad_1600_um 8 -11430 -7620)
(pin Round[A]Pad_1600_um 7 -13970 -7620)
(pin Round[A]Pad_1600_um 6 -16510 -7620)
(pin Round[A]Pad_1600_um 5 -19050 -7620)
(pin Round[A]Pad_1600_um 4 -21590 -7620)
(pin Round[A]Pad_1600_um 3 -24130 -7620)
(pin Round[A]Pad_1600_um 2 -26670 -7620)
(pin Rect[A]Pad_1600x1600_um 1 -29210 -7620)
(pin Round[A]Pad_1600_um 35 3810 7620)
(pin Round[A]Pad_1600_um 36 1270 7620)
(pin Round[A]Pad_1600_um 37 -1270 7620)
(pin Round[A]Pad_1600_um 38 -3810 7620)
(pin Round[A]Pad_1600_um 39 -6350 7620)
(pin Round[A]Pad_1600_um 40 -8890 7620)
(pin Round[A]Pad_1600_um 41 -11430 7620)
(pin Round[A]Pad_1600_um 42 -13970 7620)
(pin Round[A]Pad_1600_um 43 -16510 7620)
(pin Round[A]Pad_1600_um 44 -19050 7620)
(pin Round[A]Pad_1600_um 45 -21590 7620)
(pin Round[A]Pad_1600_um 46 -24130 7620)
(pin Round[A]Pad_1600_um 47 -26670 7620)
(pin Round[A]Pad_1600_um 48 -29210 7620)
(pin Rect[A]Pad_1600x1600_um 55 -22910.8 -4569.2)
(pin Round[A]Pad_1600_um 56 -20370.8 -4569.2)
(pin Round[A]Pad_1600_um 57 -17830.8 -4569.2)
(pin Round[A]Pad_1600_um 58 -15290.8 -4569.2)
(pin Round[A]Pad_1600_um 59 -12750.8 -4569.2)
(pin Round[A]Pad_1600_um 49 -26670 5080)
)
(image Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical
(outline (path signal 100 0 1270 3810 1270))
(outline (path signal 100 3810 1270 3810 -39370))
(outline (path signal 100 3810 -39370 -1270 -39370))
(outline (path signal 100 -1270 -39370 -1270 0))
(outline (path signal 100 -1270 0 0 1270))
(outline (path signal 120 -1330 -39430 3870 -39430))
(outline (path signal 120 -1330 -1270 -1330 -39430))
(outline (path signal 120 3870 1330 3870 -39430))
(outline (path signal 120 -1330 -1270 1270 -1270))
(outline (path signal 120 1270 -1270 1270 1330))
(outline (path signal 120 1270 1330 3870 1330))
(outline (path signal 120 -1330 0 -1330 1330))
(outline (path signal 120 -1330 1330 0 1330))
(outline (path signal 50 -1800 1800 -1800 -39900))
(outline (path signal 50 -1800 -39900 4350 -39900))
(outline (path signal 50 4350 -39900 4350 1800))
(outline (path signal 50 4350 1800 -1800 1800))
(pin Oval[A]Pad_1700x1700_um 32 2540 -38100)
(pin Oval[A]Pad_1700x1700_um 31 0 -38100)
(pin Oval[A]Pad_1700x1700_um 30 2540 -35560)
(pin Oval[A]Pad_1700x1700_um 29 0 -35560)
(pin Oval[A]Pad_1700x1700_um 28 2540 -33020)
(pin Oval[A]Pad_1700x1700_um 27 0 -33020)
(pin Oval[A]Pad_1700x1700_um 26 2540 -30480)
(pin Oval[A]Pad_1700x1700_um 25 0 -30480)
(pin Oval[A]Pad_1700x1700_um 24 2540 -27940)
(pin Oval[A]Pad_1700x1700_um 23 0 -27940)
(pin Oval[A]Pad_1700x1700_um 22 2540 -25400)
(pin Oval[A]Pad_1700x1700_um 21 0 -25400)
(pin Oval[A]Pad_1700x1700_um 20 2540 -22860)
(pin Oval[A]Pad_1700x1700_um 19 0 -22860)
(pin Oval[A]Pad_1700x1700_um 18 2540 -20320)
(pin Oval[A]Pad_1700x1700_um 17 0 -20320)
(pin Oval[A]Pad_1700x1700_um 16 2540 -17780)
(pin Oval[A]Pad_1700x1700_um 15 0 -17780)
(pin Oval[A]Pad_1700x1700_um 14 2540 -15240)
(pin Oval[A]Pad_1700x1700_um 13 0 -15240)
(pin Oval[A]Pad_1700x1700_um 12 2540 -12700)
(pin Oval[A]Pad_1700x1700_um 11 0 -12700)
(pin Oval[A]Pad_1700x1700_um 10 2540 -10160)
(pin Oval[A]Pad_1700x1700_um 9 0 -10160)
(pin Oval[A]Pad_1700x1700_um 8 2540 -7620)
(pin Oval[A]Pad_1700x1700_um 7 0 -7620)
(pin Oval[A]Pad_1700x1700_um 6 2540 -5080)
(pin Oval[A]Pad_1700x1700_um 5 0 -5080)
(pin Oval[A]Pad_1700x1700_um 4 2540 -2540)
(pin Oval[A]Pad_1700x1700_um 3 0 -2540)
(pin Oval[A]Pad_1700x1700_um 2 2540 0)
(pin Rect[A]Pad_1700x1700_um 1 0 0)
)
(padstack Round[A]Pad_1300_um
(shape (circle F.Cu 1300))
(shape (circle B.Cu 1300))
(attach off)
)
(padstack Round[A]Pad_1600_um
(shape (circle F.Cu 1600))
(shape (circle B.Cu 1600))
(attach off)
)
(padstack Oval[A]Pad_1700x1700_um
(shape (path F.Cu 1700 0 0 0 0))
(shape (path B.Cu 1700 0 0 0 0))
(attach off)
)
(padstack RoundRect[T]Pad_1475x400_100.381_um
(shape (polygon F.Cu 0 654.931 198.856 671.832 194.327 687.69 186.932 702.024 176.896
714.396 164.524 724.432 150.191 731.827 134.332 736.356 117.431
737.881 100 737.881 -100 736.356 -117.431 731.827 -134.332
724.432 -150.19 714.396 -164.524 702.024 -176.896 687.691 -186.932
671.832 -194.327 654.931 -198.856 637.5 -200.381 -637.5 -200.381
-654.931 -198.856 -671.832 -194.327 -687.69 -186.932 -702.024 -176.896
-714.396 -164.524 -724.432 -150.191 -731.827 -134.332 -736.356 -117.431
-737.881 -100 -737.881 100 -736.356 117.431 -731.827 134.332
-724.432 150.19 -714.396 164.524 -702.024 176.896 -687.691 186.932
-671.832 194.327 -654.931 198.856 -637.5 200.381 637.5 200.381
654.931 198.856))
(attach off)
)
(padstack Rect[A]Pad_1300x1300_um
(shape (rect F.Cu -650 -650 650 650))
(shape (rect B.Cu -650 -650 650 650))
(attach off)
)
(padstack Rect[A]Pad_1600x1600_um
(shape (rect F.Cu -800 -800 800 800))
(shape (rect B.Cu -800 -800 800 800))
(attach off)
)
(padstack Rect[A]Pad_1700x1700_um
(shape (rect F.Cu -850 -850 850 850))
(shape (rect B.Cu -850 -850 850 850))
(attach off)
)
(padstack "Via[0-1]_800:400_um"
(shape (circle F.Cu 800))
(shape (circle B.Cu 800))
(attach off)
)
)
(network
(net +5V
(pins U5-19 U4-19 U3-19 U2-19 J1-32)
)
(net A17_5V
(pins U3-13 J1-30)
)
(net A14_5V
(pins U4-13 J1-29)
)
(net A13_5V
(pins U5-17 J1-28)
)
(net A8_5V
(pins U5-13 J1-27)
)
(net A9_5V
(pins U5-12 J1-26)
)
(net A11_5V
(pins U5-20 J1-25)
)
(net GND
(pins U5-11 U4-11 U3-11 U2-11 U1-1 J1-24 J1-16)
)
(net A10_5V
(pins U5-18 J1-23)
)
(net D7_5V
(pins U2-13 J1-21)
)
(net D6_5V
(pins U3-14 J1-20)
)
(net D5_5V
(pins U2-14 J1-19)
)
(net D4_5V
(pins U2-12 J1-18)
)
(net D3_5V
(pins U4-17 J1-17)
)
(net D2_5V
(pins U2-16 J1-15)
)
(net D1_5V
(pins U2-17 J1-14)
)
(net D0_5V
(pins U2-15 J1-13)
)
(net A0_5V
(pins U2-18 J1-12)
)
(net A1_5V
(pins U2-20 J1-11)
)
(net A2_5V
(pins U5-15 J1-10)
)
(net A3_5V
(pins U5-14 J1-9)
)
(net A4_5V
(pins U4-18 J1-8)
)
(net A5_5V
(pins U4-20 J1-7)
)
(net A6_5V
(pins U4-15 J1-6)
)
(net A7_5V
(pins U4-16 J1-5)
)
(net A12_5V
(pins U5-16 J1-4)
)
(net A15_5V
(pins U4-14 J1-3)
)
(net A16_5V
(pins U3-12 J1-2)
)
(net A1_3V3
(pins U2-1 U1-17)
)
(net A16_3V3
(pins U3-9 U1-18)
)
(net A17_3V3
(pins U3-8 U1-19)
)
(net A0_3V3
(pins U2-3 U1-16)
)
(net +3V3
(pins U5-2 U4-2 U3-2 U2-2 U1-15)
)
(net D1_3V3
(pins U2-4 U1-14)
)
(net D6_3V3
(pins U3-7 U1-24)
)
(net A14_3V3
(pins U4-8 U1-30)
)
(net A15_3V3
(pins U4-7 U1-31)
)
(net A6_3V3
(pins U4-6 U1-32)
)
(net A7_3V3
(pins U4-5 U1-33)
)
(net D2_3V3
(pins U2-5 U1-13)
)
(net D0_3V3
(pins U2-6 U1-12)
)
(net D5_3V3
(pins U2-7 U1-11)
)
(net D7_3V3
(pins U2-8 U1-10)
)
(net D4_3V3
(pins U2-9 U1-8)
)
(net D3_3V3
(pins U4-4 U1-35)
)
(net A4_3V3
(pins U4-3 U1-36)
)
(net A5_3V3
(pins U4-1 U1-37)
)
(net A9_3V3
(pins U5-9 U1-38)
)
(net A8_3V3
(pins U5-8 U1-39)
)
(net A3_3V3
(pins U5-7 U1-40)
)
(net A2_3V3
(pins U5-6 U1-41)
)
(net A12_3V3
(pins U5-5 U1-42)
)
(net A13_3V3
(pins U5-4 U1-43)
)
(net A10_3V3
(pins U5-3 U1-44)
)
(net A11_3V3
(pins U5-1 U1-45)
)
(class kicad_default "" +3V3 +5V A0_3V3 A0_5V A10_3V3 A10_5V A11_3V3 A11_5V
A12_3V3 A12_5V A13_3V3 A13_5V A14_3V3 A14_5V A15_3V3 A15_5V A16_3V3
A16_5V A17_3V3 A17_5V A1_3V3 A1_5V A2_3V3 A2_5V A3_3V3 A3_5V A4_3V3
A4_5V A5_3V3 A5_5V A6_3V3 A6_5V A7_3V3 A7_5V A8_3V3 A8_5V A9_3V3 A9_5V
D0_3V3 D0_5V D1_3V3 D1_5V D2_3V3 D2_5V D3_3V3 D3_5V D4_3V3 D4_5V D5_3V3
D5_5V D6_3V3 D6_5V D7_3V3 D7_5V GND "Net-(J1-Pad1)" "Net-(J1-Pad22)"
"Net-(J1-Pad31)" "Net-(U1-Pad2)" "Net-(U1-Pad20)" "Net-(U1-Pad21)" "Net-(U1-Pad22)"
"Net-(U1-Pad23)" "Net-(U1-Pad25)" "Net-(U1-Pad26)" "Net-(U1-Pad27)"
"Net-(U1-Pad28)" "Net-(U1-Pad29)" "Net-(U1-Pad3)" "Net-(U1-Pad34)" "Net-(U1-Pad4)"
"Net-(U1-Pad46)" "Net-(U1-Pad47)" "Net-(U1-Pad48)" "Net-(U1-Pad49)"
"Net-(U1-Pad5)" "Net-(U1-Pad50)" "Net-(U1-Pad51)" "Net-(U1-Pad52)" "Net-(U1-Pad53)"
"Net-(U1-Pad54)" "Net-(U1-Pad55)" "Net-(U1-Pad56)" "Net-(U1-Pad57)"
"Net-(U1-Pad58)" "Net-(U1-Pad59)" "Net-(U1-Pad6)" "Net-(U1-Pad60)" "Net-(U1-Pad61)"
"Net-(U1-Pad62)" "Net-(U1-Pad63)" "Net-(U1-Pad64)" "Net-(U1-Pad65)"
"Net-(U1-Pad66)" "Net-(U1-Pad67)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)"
"Net-(U3-Pad1)" "Net-(U3-Pad10)" "Net-(U3-Pad15)" "Net-(U3-Pad16)" "Net-(U3-Pad17)"
"Net-(U3-Pad18)" "Net-(U3-Pad20)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)"
"Net-(U3-Pad6)" "Net-(U4-Pad10)" "Net-(U4-Pad12)" "Net-(U4-Pad9)" "Net-(U5-Pad10)"
(circuit
(use_via Via[0-1]_800:400_um)
)
(rule
(width 250)
(clearance 200.1)
)
)
)
(wiring
)
)

827
schematic/epromemu.kicad_pcb-bak
View File

@ -1,827 +0,0 @@
(kicad_pcb (version 20171130) (host pcbnew "(5.1.12)-1")
(general
(thickness 1.6)
(drawings 0)
(tracks 0)
(zones 0)
(modules 6)
(nets 56)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 +5V)
(net 2 A17_5V)
(net 3 A14_5V)
(net 4 A13_5V)
(net 5 A8_5V)
(net 6 A9_5V)
(net 7 A11_5V)
(net 8 GND)
(net 9 A10_5V)
(net 10 D7_5V)
(net 11 D6_5V)
(net 12 D5_5V)
(net 13 D4_5V)
(net 14 D3_5V)
(net 15 D2_5V)
(net 16 D1_5V)
(net 17 D0_5V)
(net 18 A0_5V)
(net 19 A1_5V)
(net 20 A2_5V)
(net 21 A3_5V)
(net 22 A4_5V)
(net 23 A5_5V)
(net 24 A6_5V)
(net 25 A7_5V)
(net 26 A12_5V)
(net 27 A15_5V)
(net 28 A16_5V)
(net 29 A1_3V3)
(net 30 A16_3V3)
(net 31 A17_3V3)
(net 32 A0_3V3)
(net 33 +3V3)
(net 34 D1_3V3)
(net 35 D6_3V3)
(net 36 A14_3V3)
(net 37 A15_3V3)
(net 38 A6_3V3)
(net 39 A7_3V3)
(net 40 D2_3V3)
(net 41 D0_3V3)
(net 42 D5_3V3)
(net 43 D7_3V3)
(net 44 D4_3V3)
(net 45 D3_3V3)
(net 46 A4_3V3)
(net 47 A5_3V3)
(net 48 A9_3V3)
(net 49 A8_3V3)
(net 50 A3_3V3)
(net 51 A2_3V3)
(net 52 A12_3V3)
(net 53 A13_3V3)
(net 54 A10_3V3)
(net 55 A11_3V3)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net +5V)
(add_net A0_3V3)
(add_net A0_5V)
(add_net A10_3V3)
(add_net A10_5V)
(add_net A11_3V3)
(add_net A11_5V)
(add_net A12_3V3)
(add_net A12_5V)
(add_net A13_3V3)
(add_net A13_5V)
(add_net A14_3V3)
(add_net A14_5V)
(add_net A15_3V3)
(add_net A15_5V)
(add_net A16_3V3)
(add_net A16_5V)
(add_net A17_3V3)
(add_net A17_5V)
(add_net A1_3V3)
(add_net A1_5V)
(add_net A2_3V3)
(add_net A2_5V)
(add_net A3_3V3)
(add_net A3_5V)
(add_net A4_3V3)
(add_net A4_5V)
(add_net A5_3V3)
(add_net A5_5V)
(add_net A6_3V3)
(add_net A6_5V)
(add_net A7_3V3)
(add_net A7_5V)
(add_net A8_3V3)
(add_net A8_5V)
(add_net A9_3V3)
(add_net A9_5V)
(add_net D0_3V3)
(add_net D0_5V)
(add_net D1_3V3)
(add_net D1_5V)
(add_net D2_3V3)
(add_net D2_5V)
(add_net D3_3V3)
(add_net D3_5V)
(add_net D4_3V3)
(add_net D4_5V)
(add_net D5_3V3)
(add_net D5_5V)
(add_net D6_3V3)
(add_net D6_5V)
(add_net D7_3V3)
(add_net D7_5V)
(add_net GND)
(add_net "Net-(J1-Pad1)")
(add_net "Net-(J1-Pad22)")
(add_net "Net-(J1-Pad31)")
(add_net "Net-(U1-Pad2)")
(add_net "Net-(U1-Pad20)")
(add_net "Net-(U1-Pad21)")
(add_net "Net-(U1-Pad22)")
(add_net "Net-(U1-Pad23)")
(add_net "Net-(U1-Pad25)")
(add_net "Net-(U1-Pad26)")
(add_net "Net-(U1-Pad27)")
(add_net "Net-(U1-Pad28)")
(add_net "Net-(U1-Pad29)")
(add_net "Net-(U1-Pad3)")
(add_net "Net-(U1-Pad34)")
(add_net "Net-(U1-Pad4)")
(add_net "Net-(U1-Pad46)")
(add_net "Net-(U1-Pad47)")
(add_net "Net-(U1-Pad48)")
(add_net "Net-(U1-Pad49)")
(add_net "Net-(U1-Pad5)")
(add_net "Net-(U1-Pad50)")
(add_net "Net-(U1-Pad51)")
(add_net "Net-(U1-Pad52)")
(add_net "Net-(U1-Pad53)")
(add_net "Net-(U1-Pad54)")
(add_net "Net-(U1-Pad55)")
(add_net "Net-(U1-Pad56)")
(add_net "Net-(U1-Pad57)")
(add_net "Net-(U1-Pad58)")
(add_net "Net-(U1-Pad59)")
(add_net "Net-(U1-Pad6)")
(add_net "Net-(U1-Pad60)")
(add_net "Net-(U1-Pad61)")
(add_net "Net-(U1-Pad62)")
(add_net "Net-(U1-Pad63)")
(add_net "Net-(U1-Pad64)")
(add_net "Net-(U1-Pad65)")
(add_net "Net-(U1-Pad66)")
(add_net "Net-(U1-Pad67)")
(add_net "Net-(U1-Pad7)")
(add_net "Net-(U1-Pad9)")
(add_net "Net-(U2-Pad10)")
(add_net "Net-(U3-Pad1)")
(add_net "Net-(U3-Pad10)")
(add_net "Net-(U3-Pad15)")
(add_net "Net-(U3-Pad16)")
(add_net "Net-(U3-Pad17)")
(add_net "Net-(U3-Pad18)")
(add_net "Net-(U3-Pad20)")
(add_net "Net-(U3-Pad3)")
(add_net "Net-(U3-Pad4)")
(add_net "Net-(U3-Pad5)")
(add_net "Net-(U3-Pad6)")
(add_net "Net-(U4-Pad10)")
(add_net "Net-(U4-Pad12)")
(add_net "Net-(U4-Pad9)")
(add_net "Net-(U5-Pad10)")
)
(module Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5E476F32) (tstamp 61B52005)
(at 121.92 53.34 90)
(descr "TSSOP, 20 Pin (JEDEC MO-153 Var AC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "TSSOP SO")
(path /61A56F94)
(attr smd)
(fp_text reference U5 (at 0 -4.2 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value TXS0108EPW (at 0 4.2 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 3.385) (end 2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 3.385) (end -2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end 2.2 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end -3.6 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start -1.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 3.25) (end -2.2 -2.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -2.25) (end -1.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start -3.85 -3.5) (end -3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.85 3.5) (end 3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 3.5) (end 3.85 -3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 -3.5) (end -3.85 -3.5) (layer F.CrtYd) (width 0.05))
(pad 20 smd roundrect (at 2.8625 -2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 A11_5V))
(pad 19 smd roundrect (at 2.8625 -2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 +5V))
(pad 18 smd roundrect (at 2.8625 -1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 9 A10_5V))
(pad 17 smd roundrect (at 2.8625 -0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 4 A13_5V))
(pad 16 smd roundrect (at 2.8625 -0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 26 A12_5V))
(pad 15 smd roundrect (at 2.8625 0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 20 A2_5V))
(pad 14 smd roundrect (at 2.8625 0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 21 A3_5V))
(pad 13 smd roundrect (at 2.8625 1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 5 A8_5V))
(pad 12 smd roundrect (at 2.8625 2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 6 A9_5V))
(pad 11 smd roundrect (at 2.8625 2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 GND))
(pad 10 smd roundrect (at -2.8625 2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 9 smd roundrect (at -2.8625 2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 48 A9_3V3))
(pad 8 smd roundrect (at -2.8625 1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 49 A8_3V3))
(pad 7 smd roundrect (at -2.8625 0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 50 A3_3V3))
(pad 6 smd roundrect (at -2.8625 0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 51 A2_3V3))
(pad 5 smd roundrect (at -2.8625 -0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 52 A12_3V3))
(pad 4 smd roundrect (at -2.8625 -0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 53 A13_3V3))
(pad 3 smd roundrect (at -2.8625 -1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 54 A10_3V3))
(pad 2 smd roundrect (at -2.8625 -2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 33 +3V3))
(pad 1 smd roundrect (at -2.8625 -2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 55 A11_3V3))
(model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5E476F32) (tstamp 61B51FDF)
(at 151.13 53.34 90)
(descr "TSSOP, 20 Pin (JEDEC MO-153 Var AC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "TSSOP SO")
(path /61A5865B)
(attr smd)
(fp_text reference U4 (at 0 -4.2 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value TXS0108EPW (at 0 4.2 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 3.385) (end 2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 3.385) (end -2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end 2.2 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end -3.6 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start -1.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 3.25) (end -2.2 -2.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -2.25) (end -1.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start -3.85 -3.5) (end -3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.85 3.5) (end 3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 3.5) (end 3.85 -3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 -3.5) (end -3.85 -3.5) (layer F.CrtYd) (width 0.05))
(pad 20 smd roundrect (at 2.8625 -2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 23 A5_5V))
(pad 19 smd roundrect (at 2.8625 -2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 +5V))
(pad 18 smd roundrect (at 2.8625 -1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 22 A4_5V))
(pad 17 smd roundrect (at 2.8625 -0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 14 D3_5V))
(pad 16 smd roundrect (at 2.8625 -0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 25 A7_5V))
(pad 15 smd roundrect (at 2.8625 0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 24 A6_5V))
(pad 14 smd roundrect (at 2.8625 0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 27 A15_5V))
(pad 13 smd roundrect (at 2.8625 1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 3 A14_5V))
(pad 12 smd roundrect (at 2.8625 2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 11 smd roundrect (at 2.8625 2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 GND))
(pad 10 smd roundrect (at -2.8625 2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 9 smd roundrect (at -2.8625 2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 8 smd roundrect (at -2.8625 1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 36 A14_3V3))
(pad 7 smd roundrect (at -2.8625 0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 37 A15_3V3))
(pad 6 smd roundrect (at -2.8625 0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 38 A6_3V3))
(pad 5 smd roundrect (at -2.8625 -0.325 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 39 A7_3V3))
(pad 4 smd roundrect (at -2.8625 -0.975 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 45 D3_3V3))
(pad 3 smd roundrect (at -2.8625 -1.625 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 46 A4_3V3))
(pad 2 smd roundrect (at -2.8625 -2.275 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 33 +3V3))
(pad 1 smd roundrect (at -2.8625 -2.925 90) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 47 A5_3V3))
(model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5E476F32) (tstamp 61B51FB9)
(at 149.86 86.36 270)
(descr "TSSOP, 20 Pin (JEDEC MO-153 Var AC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "TSSOP SO")
(path /61A55DAA)
(attr smd)
(fp_text reference U3 (at 0 -4.2 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value TXS0108EPW (at 0 4.2 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 3.385) (end 2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 3.385) (end -2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end 2.2 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end -3.6 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start -1.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 3.25) (end -2.2 -2.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -2.25) (end -1.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start -3.85 -3.5) (end -3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.85 3.5) (end 3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 3.5) (end 3.85 -3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 -3.5) (end -3.85 -3.5) (layer F.CrtYd) (width 0.05))
(pad 20 smd roundrect (at 2.8625 -2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 19 smd roundrect (at 2.8625 -2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 +5V))
(pad 18 smd roundrect (at 2.8625 -1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 17 smd roundrect (at 2.8625 -0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 16 smd roundrect (at 2.8625 -0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 15 smd roundrect (at 2.8625 0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 14 smd roundrect (at 2.8625 0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 11 D6_5V))
(pad 13 smd roundrect (at 2.8625 1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 A17_5V))
(pad 12 smd roundrect (at 2.8625 2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 28 A16_5V))
(pad 11 smd roundrect (at 2.8625 2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 GND))
(pad 10 smd roundrect (at -2.8625 2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 9 smd roundrect (at -2.8625 2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 30 A16_3V3))
(pad 8 smd roundrect (at -2.8625 1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 31 A17_3V3))
(pad 7 smd roundrect (at -2.8625 0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 35 D6_3V3))
(pad 6 smd roundrect (at -2.8625 0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 5 smd roundrect (at -2.8625 -0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 4 smd roundrect (at -2.8625 -0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 3 smd roundrect (at -2.8625 -1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 2 smd roundrect (at -2.8625 -2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 33 +3V3))
(pad 1 smd roundrect (at -2.8625 -2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5E476F32) (tstamp 61B51F93)
(at 121.92 86.36 270)
(descr "TSSOP, 20 Pin (JEDEC MO-153 Var AC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "TSSOP SO")
(path /61A54FCD)
(attr smd)
(fp_text reference U2 (at 0 -4.2 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value TXS0108EPW (at 0 4.2 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 3.385) (end 2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 3.385) (end -2.2 3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end 2.2 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -3.385) (end -3.6 -3.385) (layer F.SilkS) (width 0.12))
(fp_line (start -1.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 3.25) (end -2.2 -2.25) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -2.25) (end -1.2 -3.25) (layer F.Fab) (width 0.1))
(fp_line (start -3.85 -3.5) (end -3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.85 3.5) (end 3.85 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 3.5) (end 3.85 -3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.85 -3.5) (end -3.85 -3.5) (layer F.CrtYd) (width 0.05))
(pad 20 smd roundrect (at 2.8625 -2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 19 A1_5V))
(pad 19 smd roundrect (at 2.8625 -2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 +5V))
(pad 18 smd roundrect (at 2.8625 -1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 18 A0_5V))
(pad 17 smd roundrect (at 2.8625 -0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 16 D1_5V))
(pad 16 smd roundrect (at 2.8625 -0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 15 D2_5V))
(pad 15 smd roundrect (at 2.8625 0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 17 D0_5V))
(pad 14 smd roundrect (at 2.8625 0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 12 D5_5V))
(pad 13 smd roundrect (at 2.8625 1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 10 D7_5V))
(pad 12 smd roundrect (at 2.8625 2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 13 D4_5V))
(pad 11 smd roundrect (at 2.8625 2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 GND))
(pad 10 smd roundrect (at -2.8625 2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 9 smd roundrect (at -2.8625 2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 44 D4_3V3))
(pad 8 smd roundrect (at -2.8625 1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 43 D7_3V3))
(pad 7 smd roundrect (at -2.8625 0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 42 D5_3V3))
(pad 6 smd roundrect (at -2.8625 0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 41 D0_3V3))
(pad 5 smd roundrect (at -2.8625 -0.325 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 40 D2_3V3))
(pad 4 smd roundrect (at -2.8625 -0.975 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 34 D1_3V3))
(pad 3 smd roundrect (at -2.8625 -1.625 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 32 A0_3V3))
(pad 2 smd roundrect (at -2.8625 -2.275 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 33 +3V3))
(pad 1 smd roundrect (at -2.8625 -2.925 270) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 29 A1_3V3))
(model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module teensy:Teensy41 (layer F.Cu) (tedit 5FD6DEAD) (tstamp 61B51F6D)
(at 140.61 70.64)
(path /61A52DD6)
(fp_text reference U1 (at 0 -10.16) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Teensy4.1 (at 0 10.16) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "USB Host" (at -18.4658 2.4892) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user Ethernet (at -12.065 -3.2766 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user USB (at -26.67 0 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "Micro SD" (at 24.13 0) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user MIMXRT1062 (at -1.27 0 -90) (layer F.SilkS)
(effects (font (size 0.7 0.7) (thickness 0.15)))
)
(fp_text user DVJ6A (at -2.54 -0.18 -90) (layer F.SilkS)
(effects (font (size 0.7 0.7) (thickness 0.15)))
)
(fp_circle (center 12.065 0) (end 12.7 -0.635) (layer F.SilkS) (width 0.15))
(fp_line (start -7.62 -6.35) (end -7.62 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 5.08 -6.35) (end -7.62 -6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 5.08 6.35) (end 5.08 -6.35) (layer F.SilkS) (width 0.15))
(fp_line (start -7.62 6.35) (end 5.08 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start -17.25 -6.3516) (end -17.25 -6.1016) (layer F.SilkS) (width 0.15))
(fp_line (start -13.25 -6.3516) (end -17.25 -6.3516) (layer F.SilkS) (width 0.15))
(fp_line (start -13.25 -0.1016) (end -13.25 -6.3516) (layer F.SilkS) (width 0.15))
(fp_line (start -17.25 -0.1016) (end -13.25 -0.1016) (layer F.SilkS) (width 0.15))
(fp_line (start -17.25 -6.1016) (end -17.25 -0.1016) (layer F.SilkS) (width 0.15))
(fp_line (start -21.6408 3.2992) (end -21.6408 5.8392) (layer F.SilkS) (width 0.15))
(fp_line (start -24.1808 3.2992) (end -21.6408 3.2992) (layer F.SilkS) (width 0.15))
(fp_line (start -24.1808 5.8392) (end -24.1808 3.2992) (layer F.SilkS) (width 0.15))
(fp_line (start -11.4808 5.8392) (end -24.1808 5.8392) (layer F.SilkS) (width 0.15))
(fp_line (start -11.4808 3.2992) (end -11.4808 5.8392) (layer F.SilkS) (width 0.15))
(fp_line (start -24.1808 3.2992) (end -11.4808 3.2992) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 -1.27) (end 13.97 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 1.27) (end 10.16 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 13.97 1.27) (end 10.16 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 13.97 -1.27) (end 13.97 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 29.21 5.08) (end 30.48 5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 29.21 -5.08) (end 29.21 5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 -5.08) (end 29.21 -5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 17.78 6.35) (end 30.48 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 17.78 -6.35) (end 17.78 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 -6.35) (end 17.78 -6.35) (layer F.SilkS) (width 0.15))
(fp_line (start -30.48 3.81) (end -31.75 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -31.75 3.81) (end -31.75 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -31.75 -3.81) (end -30.48 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 3.81) (end -25.4 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 -3.81) (end -30.48 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 3.81) (end -30.48 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -30.48 -8.89) (end 30.48 -8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 -8.89) (end 30.48 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 8.89) (end -30.48 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -30.48 8.89) (end -30.48 -8.89) (layer F.SilkS) (width 0.15))
(fp_poly (pts (xy 2.435 0.455) (xy 2.181 0.709) (xy 1.927 0.328) (xy 2.181 0.074)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 2.054 -0.053) (xy 1.8 0.201) (xy 1.546 -0.18) (xy 1.8 -0.434)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 1.673 -0.561) (xy 1.419 -0.307) (xy 1.165 -0.688) (xy 1.419 -0.942)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 1.673 0.328) (xy 1.419 0.582) (xy 1.165 0.201) (xy 1.419 -0.053)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 1.292 -0.18) (xy 1.038 0.074) (xy 0.784 -0.307) (xy 1.038 -0.561)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 0.911 -0.688) (xy 0.657 -0.434) (xy 0.403 -0.815) (xy 0.657 -1.069)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 2.816 0.074) (xy 2.562 0.328) (xy 2.308 -0.053) (xy 2.562 -0.307)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 3.197 -0.307) (xy 2.943 -0.053) (xy 2.689 -0.434) (xy 2.943 -0.688)) (layer F.SilkS) (width 0.1))
(pad 66 thru_hole circle (at -28.48 -1.27) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 67 thru_hole circle (at -28.48 1.27) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 54 thru_hole circle (at 16.51 -5.08) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 53 thru_hole circle (at 16.51 -2.54) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 52 thru_hole circle (at 16.51 0) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 51 thru_hole circle (at 16.51 2.54) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 50 thru_hole circle (at 16.51 5.08) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 62 thru_hole circle (at -16.24 -1.1816) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 63 thru_hole circle (at -14.24 -1.1816) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 64 thru_hole circle (at -14.24 -3.1816) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 61 thru_hole circle (at -16.24 -3.1816) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 65 thru_hole circle (at -14.24 -5.1816) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 60 thru_hole rect (at -16.24 -5.1816) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask))
(pad 17 thru_hole circle (at 11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 29 A1_3V3))
(pad 18 thru_hole circle (at 13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 30 A16_3V3))
(pad 19 thru_hole circle (at 16.51 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 31 A17_3V3))
(pad 20 thru_hole circle (at 19.05 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 16 thru_hole circle (at 8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 32 A0_3V3))
(pad 15 thru_hole circle (at 6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 33 +3V3))
(pad 14 thru_hole circle (at 3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 34 D1_3V3))
(pad 21 thru_hole circle (at 21.59 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 22 thru_hole circle (at 24.13 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 23 thru_hole circle (at 26.67 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 24 thru_hole circle (at 29.21 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 35 D6_3V3))
(pad 25 thru_hole circle (at 29.21 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 26 thru_hole circle (at 26.67 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 27 thru_hole circle (at 24.13 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 28 thru_hole circle (at 21.59 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 29 thru_hole circle (at 19.05 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 30 thru_hole circle (at 16.51 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 36 A14_3V3))
(pad 31 thru_hole circle (at 13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 37 A15_3V3))
(pad 32 thru_hole circle (at 11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 38 A6_3V3))
(pad 33 thru_hole circle (at 8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 39 A7_3V3))
(pad 34 thru_hole circle (at 6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 13 thru_hole circle (at 1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 40 D2_3V3))
(pad 12 thru_hole circle (at -1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 41 D0_3V3))
(pad 11 thru_hole circle (at -3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 42 D5_3V3))
(pad 10 thru_hole circle (at -6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 43 D7_3V3))
(pad 9 thru_hole circle (at -8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at -11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 44 D4_3V3))
(pad 7 thru_hole circle (at -13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at -16.51 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at -19.05 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at -21.59 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at -24.13 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at -26.67 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at -29.21 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 8 GND))
(pad 35 thru_hole circle (at 3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 45 D3_3V3))
(pad 36 thru_hole circle (at 1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 46 A4_3V3))
(pad 37 thru_hole circle (at -1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 47 A5_3V3))
(pad 38 thru_hole circle (at -3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 48 A9_3V3))
(pad 39 thru_hole circle (at -6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 49 A8_3V3))
(pad 40 thru_hole circle (at -8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 50 A3_3V3))
(pad 41 thru_hole circle (at -11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 51 A2_3V3))
(pad 42 thru_hole circle (at -13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 52 A12_3V3))
(pad 43 thru_hole circle (at -16.51 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 53 A13_3V3))
(pad 44 thru_hole circle (at -19.05 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 54 A10_3V3))
(pad 45 thru_hole circle (at -21.59 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask)
(net 55 A11_3V3))
(pad 46 thru_hole circle (at -24.13 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 47 thru_hole circle (at -26.67 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 48 thru_hole circle (at -29.21 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 55 thru_hole rect (at -22.9108 4.5692) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 56 thru_hole circle (at -20.3708 4.5692) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 57 thru_hole circle (at -17.8308 4.5692) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 58 thru_hole circle (at -15.2908 4.5692) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 59 thru_hole circle (at -12.7508 4.5692) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 49 thru_hole circle (at -26.67 -5.08) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(model ${KICAD_USER_DIR}/teensy.pretty/Teensy_4.1_Assembly.STEP
(offset (xyz 0 0 0.762))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 61B51EF4)
(at 176.53 50.8)
(descr "Through hole straight pin header, 2x16, 2.54mm pitch, double rows")
(tags "Through hole pin header THT 2x16 2.54mm double row")
(path /61A9BE2D)
(fp_text reference J1 (at 1.27 -2.33) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "EPROM Connector" (at 1.27 40.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 1.27 19.05 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 -1.27) (end 3.81 39.37) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 39.37) (end -1.27 39.37) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 39.37) (end -1.27 0) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.33 39.43) (end 3.87 39.43) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 39.43) (layer F.SilkS) (width 0.12))
(fp_line (start 3.87 -1.33) (end 3.87 39.43) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 39.9) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 39.9) (end 4.35 39.9) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.35 39.9) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(pad 32 thru_hole oval (at 2.54 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 +5V))
(pad 31 thru_hole oval (at 0 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 30 thru_hole oval (at 2.54 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 A17_5V))
(pad 29 thru_hole oval (at 0 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 A14_5V))
(pad 28 thru_hole oval (at 2.54 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 A13_5V))
(pad 27 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 A8_5V))
(pad 26 thru_hole oval (at 2.54 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 6 A9_5V))
(pad 25 thru_hole oval (at 0 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 A11_5V))
(pad 24 thru_hole oval (at 2.54 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 GND))
(pad 23 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 A10_5V))
(pad 22 thru_hole oval (at 2.54 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 21 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 D7_5V))
(pad 20 thru_hole oval (at 2.54 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 11 D6_5V))
(pad 19 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 D5_5V))
(pad 18 thru_hole oval (at 2.54 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 13 D4_5V))
(pad 17 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 14 D3_5V))
(pad 16 thru_hole oval (at 2.54 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 GND))
(pad 15 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 15 D2_5V))
(pad 14 thru_hole oval (at 2.54 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 16 D1_5V))
(pad 13 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 17 D0_5V))
(pad 12 thru_hole oval (at 2.54 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 18 A0_5V))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 19 A1_5V))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 20 A2_5V))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 A3_5V))
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 A4_5V))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 23 A5_5V))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 A6_5V))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 A7_5V))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 A12_5V))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 A15_5V))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 A16_5V))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x16_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
)

598
schematic/epromemu.net
View File

@ -1,598 +0,0 @@
(export (version D)
(design
(source C:\Users\brian\Downloads\test\test\test.sch)
(date "12/8/2021 11:04:34 PM")
(tool "Eeschema (5.1.12)-1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title "EPROM Emulator")
(company)
(rev)
(date)
(source test.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref U5)
(value TXS0108EPW)
(footprint Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm)
(datasheet www.ti.com/lit/ds/symlink/txs0108e.pdf)
(libsource (lib Logic_LevelTranslator) (part TXS0108EPW) (description "Bidirectional level-shifting voltage translator, TSSOP-20"))
(sheetpath (names /) (tstamps /))
(tstamp 61A56F94))
(comp (ref U4)
(value TXS0108EPW)
(footprint Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm)
(datasheet www.ti.com/lit/ds/symlink/txs0108e.pdf)
(libsource (lib Logic_LevelTranslator) (part TXS0108EPW) (description "Bidirectional level-shifting voltage translator, TSSOP-20"))
(sheetpath (names /) (tstamps /))
(tstamp 61A5865B))
(comp (ref U1)
(value Teensy4.1)
(footprint teensy:Teensy41)
(libsource (lib teensy) (part Teensy4.1) (description ""))
(sheetpath (names /) (tstamps /))
(tstamp 61A52DD6))
(comp (ref U3)
(value TXS0108EPW)
(footprint Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm)
(datasheet www.ti.com/lit/ds/symlink/txs0108e.pdf)
(libsource (lib Logic_LevelTranslator) (part TXS0108EPW) (description "Bidirectional level-shifting voltage translator, TSSOP-20"))
(sheetpath (names /) (tstamps /))
(tstamp 61A55DAA))
(comp (ref J1)
(value "EPROM Connector")
(footprint Connector_PinSocket_2.54mm:PinSocket_2x16_P2.54mm_Horizontal)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x16_Counter_Clockwise) (description "Generic connector, double row, 02x16, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 61A9BE2D))
(comp (ref U2)
(value TXS0108EPW)
(footprint Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm)
(datasheet www.ti.com/lit/ds/symlink/txs0108e.pdf)
(libsource (lib Logic_LevelTranslator) (part TXS0108EPW) (description "Bidirectional level-shifting voltage translator, TSSOP-20"))
(sheetpath (names /) (tstamps /))
(tstamp 61A54FCD))
(comp (ref J2)
(value Conn_01x09_Male)
(footprint Connector_PinHeader_2.54mm:PinHeader_1x09_P2.54mm_Vertical)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x09_Male) (description "Generic connector, single row, 01x09, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 61B238D3)))
(libparts
(libpart (lib Connector) (part Conn_01x09_Male)
(description "Generic connector, single row, 01x09, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_1x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_01x09_Male))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))
(pin (num 9) (name Pin_9) (type passive))))
(libpart (lib Connector_Generic) (part Conn_02x16_Counter_Clockwise)
(description "Generic connector, double row, 02x16, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_2x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_02x16_Counter_Clockwise))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))
(pin (num 9) (name Pin_9) (type passive))
(pin (num 10) (name Pin_10) (type passive))
(pin (num 11) (name Pin_11) (type passive))
(pin (num 12) (name Pin_12) (type passive))
(pin (num 13) (name Pin_13) (type passive))
(pin (num 14) (name Pin_14) (type passive))
(pin (num 15) (name Pin_15) (type passive))
(pin (num 16) (name Pin_16) (type passive))
(pin (num 17) (name Pin_17) (type passive))
(pin (num 18) (name Pin_18) (type passive))
(pin (num 19) (name Pin_19) (type passive))
(pin (num 20) (name Pin_20) (type passive))
(pin (num 21) (name Pin_21) (type passive))
(pin (num 22) (name Pin_22) (type passive))
(pin (num 23) (name Pin_23) (type passive))
(pin (num 24) (name Pin_24) (type passive))
(pin (num 25) (name Pin_25) (type passive))
(pin (num 26) (name Pin_26) (type passive))
(pin (num 27) (name Pin_27) (type passive))
(pin (num 28) (name Pin_28) (type passive))
(pin (num 29) (name Pin_29) (type passive))
(pin (num 30) (name Pin_30) (type passive))
(pin (num 31) (name Pin_31) (type passive))
(pin (num 32) (name Pin_32) (type passive))))
(libpart (lib Logic_LevelTranslator) (part TXS0108EPW)
(description "Bidirectional level-shifting voltage translator, TSSOP-20")
(docs www.ti.com/lit/ds/symlink/txs0108e.pdf)
(footprints
(fp *SSOP*4.4x6.5mm*P0.65mm*))
(fields
(field (name Reference) U)
(field (name Value) TXS0108EPW)
(field (name Footprint) Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm))
(pins
(pin (num 1) (name A1) (type BiDi))
(pin (num 2) (name VCCA) (type power_in))
(pin (num 3) (name A2) (type BiDi))
(pin (num 4) (name A3) (type BiDi))
(pin (num 5) (name A4) (type BiDi))
(pin (num 6) (name A5) (type BiDi))
(pin (num 7) (name A6) (type BiDi))
(pin (num 8) (name A7) (type BiDi))
(pin (num 9) (name A8) (type BiDi))
(pin (num 10) (name OE) (type input))
(pin (num 11) (name GND) (type power_in))
(pin (num 12) (name B8) (type BiDi))
(pin (num 13) (name B7) (type BiDi))
(pin (num 14) (name B6) (type BiDi))
(pin (num 15) (name B5) (type BiDi))
(pin (num 16) (name B4) (type BiDi))
(pin (num 17) (name B3) (type BiDi))
(pin (num 18) (name B2) (type BiDi))
(pin (num 19) (name VCCB) (type power_in))
(pin (num 20) (name B1) (type BiDi))))
(libpart (lib teensy) (part Teensy4.1)
(fields
(field (name Reference) U)
(field (name Value) Teensy4.1))
(pins
(pin (num 1) (name GND) (type power_in))
(pin (num 2) (name 0_RX1_CRX2_CS1) (type BiDi))
(pin (num 3) (name 1_TX1_CTX2_MISO1) (type BiDi))
(pin (num 4) (name 2_OUT2) (type BiDi))
(pin (num 5) (name 3_LRCLK2) (type BiDi))
(pin (num 6) (name 4_BCLK2) (type BiDi))
(pin (num 7) (name 5_IN2) (type BiDi))
(pin (num 8) (name 6_OUT1D) (type BiDi))
(pin (num 9) (name 7_RX2_OUT1A) (type BiDi))
(pin (num 10) (name 8_TX2_IN1) (type BiDi))
(pin (num 11) (name 9_OUT1C) (type BiDi))
(pin (num 12) (name 10_CS_MQSR) (type BiDi))
(pin (num 13) (name 11_MOSI_CTX1) (type BiDi))
(pin (num 14) (name 12_MISO_MQSL) (type BiDi))
(pin (num 15) (name 3V3) (type power_in))
(pin (num 16) (name 24_A10_TX6_SCL2) (type BiDi))
(pin (num 17) (name 25_A11_RX6_SDA2) (type BiDi))
(pin (num 18) (name 26_A12_MOSI1) (type BiDi))
(pin (num 19) (name 27_A13_SCK1) (type BiDi))
(pin (num 20) (name 28_RX7) (type BiDi))
(pin (num 21) (name 29_TX7) (type BiDi))
(pin (num 22) (name 30_CRX3) (type BiDi))
(pin (num 23) (name 31_CTX3) (type BiDi))
(pin (num 24) (name 32_OUT1B) (type BiDi))
(pin (num 25) (name 33_MCLK2) (type BiDi))
(pin (num 26) (name 34_RX8) (type BiDi))
(pin (num 27) (name 35_TX8) (type BiDi))
(pin (num 28) (name 36_CS) (type BiDi))
(pin (num 29) (name 37_CS) (type BiDi))
(pin (num 30) (name 38_CS1_IN1) (type BiDi))
(pin (num 31) (name 39_MISO1_OUT1A) (type BiDi))
(pin (num 32) (name 40_A16) (type BiDi))
(pin (num 33) (name 41_A17) (type BiDi))
(pin (num 34) (name GND) (type power_in))
(pin (num 35) (name 13_SCK_LED) (type BiDi))
(pin (num 36) (name 14_A0_TX3_SPDIF_OUT) (type BiDi))
(pin (num 37) (name 15_A1_RX3_SPDIF_IN) (type BiDi))
(pin (num 38) (name 16_A2_RX4_SCL1) (type BiDi))
(pin (num 39) (name 17_A3_TX4_SDA1) (type BiDi))
(pin (num 40) (name 18_A4_SDA) (type BiDi))
(pin (num 41) (name 19_A5_SCL) (type BiDi))
(pin (num 42) (name 20_A6_TX5_LRCLK1) (type BiDi))
(pin (num 43) (name 21_A7_RX5_BCLK1) (type BiDi))
(pin (num 44) (name 22_A8_CTX1) (type BiDi))
(pin (num 45) (name 23_A9_CRX1_MCLK1) (type BiDi))
(pin (num 46) (name 3V3) (type output))
(pin (num 47) (name GND) (type output))
(pin (num 48) (name VIN) (type power_in))
(pin (num 49) (name VUSB) (type power_out))
(pin (num 50) (name VBAT) (type power_in))
(pin (num 51) (name 3V3) (type power_in))
(pin (num 52) (name GND) (type input))
(pin (num 53) (name PROGRAM) (type input))
(pin (num 54) (name ON_OFF) (type input))
(pin (num 55) (name 5V) (type power_out))
(pin (num 56) (name D-) (type BiDi))
(pin (num 57) (name D+) (type BiDi))
(pin (num 58) (name GND) (type power_in))
(pin (num 59) (name GND) (type power_in))
(pin (num 60) (name R+) (type BiDi))
(pin (num 61) (name LED) (type BiDi))
(pin (num 62) (name T-) (type BiDi))
(pin (num 63) (name T+) (type BiDi))
(pin (num 64) (name GND) (type power_in))
(pin (num 65) (name R-) (type BiDi))
(pin (num 66) (name D-) (type BiDi))
(pin (num 67) (name D+) (type BiDi)))))
(libraries
(library (logical Connector)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector.lib"))
(library (logical Connector_Generic)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector_Generic.lib"))
(library (logical Logic_LevelTranslator)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Logic_LevelTranslator.lib"))
(library (logical teensy)
(uri c:\kicad/teensy_library/teensy.lib)))
(nets
(net (code 1) (name "Net-(J1-Pad19)")
(node (ref J1) (pin 19)))
(net (code 2) (name "Net-(U1-Pad46)")
(node (ref U5) (pin 2))
(node (ref U1) (pin 46))
(node (ref U4) (pin 2)))
(net (code 3) (name "Net-(J1-Pad1)")
(node (ref J1) (pin 1)))
(net (code 4) (name "Net-(J1-Pad10)")
(node (ref J1) (pin 10)))
(net (code 5) (name "Net-(J1-Pad11)")
(node (ref J1) (pin 11)))
(net (code 6) (name "Net-(J1-Pad12)")
(node (ref J1) (pin 12)))
(net (code 7) (name "Net-(J1-Pad13)")
(node (ref J1) (pin 13)))
(net (code 8) (name "Net-(J1-Pad14)")
(node (ref J1) (pin 14)))
(net (code 9) (name "Net-(J1-Pad15)")
(node (ref J1) (pin 15)))
(net (code 10) (name "Net-(J1-Pad17)")
(node (ref J1) (pin 17)))
(net (code 11) (name "Net-(J1-Pad18)")
(node (ref J1) (pin 18)))
(net (code 12) (name "Net-(J1-Pad2)")
(node (ref J1) (pin 2)))
(net (code 13) (name "Net-(J1-Pad20)")
(node (ref J1) (pin 20)))
(net (code 14) (name "Net-(J1-Pad21)")
(node (ref J1) (pin 21)))
(net (code 15) (name "Net-(J1-Pad22)")
(node (ref J1) (pin 22)))
(net (code 16) (name "Net-(J1-Pad23)")
(node (ref J1) (pin 23)))
(net (code 17) (name "Net-(J1-Pad24)")
(node (ref J1) (pin 24)))
(net (code 18) (name "Net-(J1-Pad25)")
(node (ref J1) (pin 25)))
(net (code 19) (name "Net-(J1-Pad26)")
(node (ref J1) (pin 26)))
(net (code 20) (name "Net-(J1-Pad27)")
(node (ref J1) (pin 27)))
(net (code 21) (name "Net-(J1-Pad28)")
(node (ref J1) (pin 28)))
(net (code 22) (name "Net-(J1-Pad29)")
(node (ref J1) (pin 29)))
(net (code 23) (name "Net-(J1-Pad3)")
(node (ref J1) (pin 3)))
(net (code 24) (name "Net-(J1-Pad30)")
(node (ref J1) (pin 30)))
(net (code 25) (name "Net-(U3-Pad5)")
(node (ref U3) (pin 5)))
(net (code 26) (name "Net-(U3-Pad10)")
(node (ref U3) (pin 10)))
(net (code 27) (name "Net-(U3-Pad12)")
(node (ref U3) (pin 12)))
(net (code 28) (name "Net-(U3-Pad13)")
(node (ref U3) (pin 13)))
(net (code 29) (name "Net-(U3-Pad14)")
(node (ref U3) (pin 14)))
(net (code 30) (name "Net-(U3-Pad15)")
(node (ref U3) (pin 15)))
(net (code 31) (name "Net-(U3-Pad16)")
(node (ref U3) (pin 16)))
(net (code 32) (name "Net-(U3-Pad17)")
(node (ref U3) (pin 17)))
(net (code 33) (name "Net-(U3-Pad18)")
(node (ref U3) (pin 18)))
(net (code 34) (name "Net-(U3-Pad19)")
(node (ref U3) (pin 19)))
(net (code 35) (name "Net-(U1-Pad15)")
(node (ref U2) (pin 2))
(node (ref U3) (pin 2))
(node (ref U1) (pin 15)))
(net (code 36) (name "Net-(U3-Pad20)")
(node (ref U3) (pin 20)))
(net (code 37) (name "Net-(U3-Pad3)")
(node (ref U3) (pin 3)))
(net (code 38) (name "Net-(U3-Pad4)")
(node (ref U3) (pin 4)))
(net (code 39) (name "Net-(J1-Pad31)")
(node (ref J1) (pin 31)))
(net (code 40) (name "Net-(U3-Pad6)")
(node (ref U3) (pin 6)))
(net (code 41) (name "Net-(U3-Pad7)")
(node (ref U3) (pin 7)))
(net (code 42) (name "Net-(U3-Pad8)")
(node (ref U3) (pin 8)))
(net (code 43) (name "Net-(U3-Pad9)")
(node (ref U3) (pin 9)))
(net (code 44) (name GND)
(node (ref U5) (pin 11))
(node (ref U2) (pin 11))
(node (ref U3) (pin 11))
(node (ref U4) (pin 11))
(node (ref J1) (pin 16)))
(net (code 45) (name D2)
(node (ref U1) (pin 13))
(node (ref U2) (pin 5)))
(net (code 46) (name D5)
(node (ref U2) (pin 7))
(node (ref U1) (pin 11)))
(net (code 47) (name D1)
(node (ref U2) (pin 4))
(node (ref U1) (pin 14)))
(net (code 48) (name "Net-(J2-Pad2)")
(node (ref J2) (pin 2)))
(net (code 49) (name "Net-(J2-Pad3)")
(node (ref J2) (pin 3)))
(net (code 50) (name "Net-(J2-Pad4)")
(node (ref J2) (pin 4)))
(net (code 51) (name "Net-(J2-Pad5)")
(node (ref J2) (pin 5)))
(net (code 52) (name "Net-(J2-Pad6)")
(node (ref J2) (pin 6)))
(net (code 53) (name "Net-(J2-Pad7)")
(node (ref J2) (pin 7)))
(net (code 54) (name "Net-(J2-Pad8)")
(node (ref J2) (pin 8)))
(net (code 55) (name "Net-(J2-Pad9)")
(node (ref J2) (pin 9)))
(net (code 56) (name "Net-(J2-Pad1)")
(node (ref U5) (pin 20))
(node (ref J2) (pin 1)))
(net (code 57) (name "Net-(U2-Pad1)")
(node (ref U2) (pin 1)))
(net (code 58) (name "Net-(J1-Pad32)")
(node (ref J1) (pin 32)))
(net (code 59) (name "Net-(J1-Pad4)")
(node (ref J1) (pin 4)))
(net (code 60) (name "Net-(J1-Pad5)")
(node (ref J1) (pin 5)))
(net (code 61) (name "Net-(J1-Pad6)")
(node (ref J1) (pin 6)))
(net (code 62) (name "Net-(J1-Pad7)")
(node (ref J1) (pin 7)))
(net (code 63) (name "Net-(J1-Pad8)")
(node (ref J1) (pin 8)))
(net (code 64) (name "Net-(J1-Pad9)")
(node (ref J1) (pin 9)))
(net (code 65) (name "Net-(U3-Pad1)")
(node (ref U3) (pin 1)))
(net (code 66) (name "Net-(U2-Pad10)")
(node (ref U2) (pin 10)))
(net (code 67) (name "Net-(U2-Pad12)")
(node (ref U2) (pin 12)))
(net (code 68) (name "Net-(U2-Pad13)")
(node (ref U2) (pin 13)))
(net (code 69) (name "Net-(U2-Pad14)")
(node (ref U2) (pin 14)))
(net (code 70) (name "Net-(U2-Pad15)")
(node (ref U2) (pin 15)))
(net (code 71) (name "Net-(U2-Pad16)")
(node (ref U2) (pin 16)))
(net (code 72) (name "Net-(U2-Pad17)")
(node (ref U2) (pin 17)))
(net (code 73) (name "Net-(U2-Pad18)")
(node (ref U2) (pin 18)))
(net (code 74) (name "Net-(U2-Pad19)")
(node (ref U2) (pin 19)))
(net (code 75) (name "Net-(U2-Pad20)")
(node (ref U2) (pin 20)))
(net (code 76) (name "Net-(U2-Pad3)")
(node (ref U2) (pin 3)))
(net (code 77) (name "Net-(U4-Pad9)")
(node (ref U4) (pin 9)))
(net (code 78) (name "Net-(U4-Pad14)")
(node (ref U4) (pin 14)))
(net (code 79) (name "Net-(U4-Pad15)")
(node (ref U4) (pin 15)))
(net (code 80) (name "Net-(U4-Pad16)")
(node (ref U4) (pin 16)))
(net (code 81) (name "Net-(U4-Pad17)")
(node (ref U4) (pin 17)))
(net (code 82) (name "Net-(U4-Pad18)")
(node (ref U4) (pin 18)))
(net (code 83) (name "Net-(U4-Pad19)")
(node (ref U4) (pin 19)))
(net (code 84) (name "Net-(U4-Pad20)")
(node (ref U4) (pin 20)))
(net (code 85) (name "Net-(U4-Pad3)")
(node (ref U4) (pin 3)))
(net (code 86) (name "Net-(U4-Pad4)")
(node (ref U4) (pin 4)))
(net (code 87) (name "Net-(U4-Pad5)")
(node (ref U4) (pin 5)))
(net (code 88) (name "Net-(U4-Pad6)")
(node (ref U4) (pin 6)))
(net (code 89) (name "Net-(U4-Pad7)")
(node (ref U4) (pin 7)))
(net (code 90) (name "Net-(U4-Pad8)")
(node (ref U4) (pin 8)))
(net (code 91) (name "Net-(U4-Pad13)")
(node (ref U4) (pin 13)))
(net (code 92) (name D7)
(node (ref U1) (pin 10))
(node (ref U2) (pin 8)))
(net (code 93) (name D0)
(node (ref U2) (pin 6))
(node (ref U1) (pin 12)))
(net (code 94) (name "Net-(U1-Pad16)")
(node (ref U1) (pin 16)))
(net (code 95) (name "Net-(U1-Pad17)")
(node (ref U1) (pin 17)))
(net (code 96) (name "Net-(U1-Pad18)")
(node (ref U1) (pin 18)))
(net (code 97) (name "Net-(U1-Pad19)")
(node (ref U1) (pin 19)))
(net (code 98) (name "Net-(U5-Pad5)")
(node (ref U5) (pin 5)))
(net (code 99) (name "Net-(U5-Pad10)")
(node (ref U5) (pin 10)))
(net (code 100) (name "Net-(U5-Pad12)")
(node (ref U5) (pin 12)))
(net (code 101) (name "Net-(U5-Pad13)")
(node (ref U5) (pin 13)))
(net (code 102) (name "Net-(U5-Pad14)")
(node (ref U5) (pin 14)))
(net (code 103) (name "Net-(U5-Pad15)")
(node (ref U5) (pin 15)))
(net (code 104) (name "Net-(U5-Pad16)")
(node (ref U5) (pin 16)))
(net (code 105) (name "Net-(U5-Pad17)")
(node (ref U5) (pin 17)))
(net (code 106) (name "Net-(U5-Pad18)")
(node (ref U5) (pin 18)))
(net (code 107) (name "Net-(U5-Pad19)")
(node (ref U5) (pin 19)))
(net (code 108) (name "Net-(U5-Pad3)")
(node (ref U5) (pin 3)))
(net (code 109) (name "Net-(U5-Pad4)")
(node (ref U5) (pin 4)))
(net (code 110) (name "Net-(U1-Pad20)")
(node (ref U1) (pin 20)))
(net (code 111) (name "Net-(U5-Pad6)")
(node (ref U5) (pin 6)))
(net (code 112) (name "Net-(U5-Pad7)")
(node (ref U5) (pin 7)))
(net (code 113) (name "Net-(U5-Pad8)")
(node (ref U5) (pin 8)))
(net (code 114) (name "Net-(U5-Pad9)")
(node (ref U5) (pin 9)))
(net (code 115) (name "Net-(U4-Pad1)")
(node (ref U4) (pin 1)))
(net (code 116) (name "Net-(U4-Pad10)")
(node (ref U4) (pin 10)))
(net (code 117) (name "Net-(U4-Pad12)")
(node (ref U4) (pin 12)))
(net (code 118) (name "Net-(U1-Pad62)")
(node (ref U1) (pin 62)))
(net (code 119) (name "Net-(U1-Pad5)")
(node (ref U1) (pin 5)))
(net (code 120) (name "Net-(U1-Pad50)")
(node (ref U1) (pin 50)))
(net (code 121) (name "Net-(U1-Pad51)")
(node (ref U1) (pin 51)))
(net (code 122) (name "Net-(U1-Pad52)")
(node (ref U1) (pin 52)))
(net (code 123) (name "Net-(U1-Pad53)")
(node (ref U1) (pin 53)))
(net (code 124) (name "Net-(U1-Pad54)")
(node (ref U1) (pin 54)))
(net (code 125) (name "Net-(U1-Pad55)")
(node (ref U1) (pin 55)))
(net (code 126) (name "Net-(U1-Pad56)")
(node (ref U1) (pin 56)))
(net (code 127) (name "Net-(U1-Pad57)")
(node (ref U1) (pin 57)))
(net (code 128) (name "Net-(U1-Pad58)")
(node (ref U1) (pin 58)))
(net (code 129) (name "Net-(U1-Pad59)")
(node (ref U1) (pin 59)))
(net (code 130) (name "Net-(U1-Pad6)")
(node (ref U1) (pin 6)))
(net (code 131) (name "Net-(U1-Pad60)")
(node (ref U1) (pin 60)))
(net (code 132) (name "Net-(U1-Pad61)")
(node (ref U1) (pin 61)))
(net (code 133) (name "Net-(U1-Pad49)")
(node (ref U1) (pin 49)))
(net (code 134) (name "Net-(U1-Pad63)")
(node (ref U1) (pin 63)))
(net (code 135) (name "Net-(U1-Pad64)")
(node (ref U1) (pin 64)))
(net (code 136) (name "Net-(U1-Pad65)")
(node (ref U1) (pin 65)))
(net (code 137) (name "Net-(U1-Pad66)")
(node (ref U1) (pin 66)))
(net (code 138) (name "Net-(U1-Pad67)")
(node (ref U1) (pin 67)))
(net (code 139) (name "Net-(U1-Pad7)")
(node (ref U1) (pin 7)))
(net (code 140) (name D4)
(node (ref U2) (pin 9))
(node (ref U1) (pin 8)))
(net (code 141) (name "Net-(U1-Pad9)")
(node (ref U1) (pin 9)))
(net (code 142) (name "Net-(U1-Pad1)")
(node (ref U1) (pin 1)))
(net (code 143) (name "Net-(U1-Pad2)")
(node (ref U1) (pin 2)))
(net (code 144) (name "Net-(U1-Pad3)")
(node (ref U1) (pin 3)))
(net (code 145) (name "Net-(U1-Pad34)")
(node (ref U1) (pin 34)))
(net (code 146) (name "Net-(U1-Pad4)")
(node (ref U1) (pin 4)))
(net (code 147) (name "Net-(U1-Pad35)")
(node (ref U1) (pin 35)))
(net (code 148) (name "Net-(U1-Pad21)")
(node (ref U1) (pin 21)))
(net (code 149) (name "Net-(U1-Pad22)")
(node (ref U1) (pin 22)))
(net (code 150) (name "Net-(U1-Pad23)")
(node (ref U1) (pin 23)))
(net (code 151) (name "Net-(U1-Pad24)")
(node (ref U1) (pin 24)))
(net (code 152) (name "Net-(U1-Pad25)")
(node (ref U1) (pin 25)))
(net (code 153) (name "Net-(U1-Pad26)")
(node (ref U1) (pin 26)))
(net (code 154) (name "Net-(U1-Pad27)")
(node (ref U1) (pin 27)))
(net (code 155) (name "Net-(U1-Pad28)")
(node (ref U1) (pin 28)))
(net (code 156) (name "Net-(U1-Pad29)")
(node (ref U1) (pin 29)))
(net (code 157) (name "Net-(U1-Pad30)")
(node (ref U1) (pin 30)))
(net (code 158) (name "Net-(U1-Pad31)")
(node (ref U1) (pin 31)))
(net (code 159) (name "Net-(U1-Pad32)")
(node (ref U1) (pin 32)))
(net (code 160) (name "Net-(U1-Pad33)")
(node (ref U1) (pin 33)))
(net (code 161) (name "Net-(U5-Pad1)")
(node (ref U5) (pin 1)))
(net (code 162) (name "Net-(U1-Pad36)")
(node (ref U1) (pin 36)))
(net (code 163) (name "Net-(U1-Pad37)")
(node (ref U1) (pin 37)))
(net (code 164) (name "Net-(U1-Pad38)")
(node (ref U1) (pin 38)))
(net (code 165) (name "Net-(U1-Pad39)")
(node (ref U1) (pin 39)))
(net (code 166) (name "Net-(U1-Pad40)")
(node (ref U1) (pin 40)))
(net (code 167) (name "Net-(U1-Pad41)")
(node (ref U1) (pin 41)))
(net (code 168) (name "Net-(U1-Pad42)")
(node (ref U1) (pin 42)))
(net (code 169) (name "Net-(U1-Pad43)")
(node (ref U1) (pin 43)))
(net (code 170) (name "Net-(U1-Pad44)")
(node (ref U1) (pin 44)))
(net (code 171) (name "Net-(U1-Pad45)")
(node (ref U1) (pin 45)))
(net (code 172) (name "Net-(U1-Pad47)")
(node (ref U1) (pin 47)))
(net (code 173) (name "Net-(U1-Pad48)")
(node (ref U1) (pin 48)))))

624
schematic/epromemu.sch-bak
View File

@ -1,624 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr USLetter 11000 8500
encoding utf-8
Sheet 1 1
Title "EPROM Emulator"
Date "2021-12-09"
Rev "1.0"
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L power:GND #PWR0102
U 1 1 61A6C548
P 8300 2450
F 0 "#PWR0102" H 8300 2200 50 0001 C CNN
F 1 "GND" H 8305 2277 50 0000 C CNN
F 2 "" H 8300 2450 50 0001 C CNN
F 3 "" H 8300 2450 50 0001 C CNN
1 8300 2450
1 0 0 -1
$EndComp
Wire Wire Line
7750 2450 8300 2450
$Comp
L teensy:Teensy4.1 U1
U 1 1 61A52DD6
P 5350 3300
F 0 "U1" H 5350 5865 50 0000 C CNN
F 1 "Teensy4.1" H 5350 5774 50 0000 C CNN
F 2 "teensy:Teensy41" H 4950 3700 50 0001 C CNN
F 3 "" H 4950 3700 50 0001 C CNN
1 5350 3300
1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_02x16_Counter_Clockwise J1
U 1 1 61A9BE2D
P 5300 5750
F 0 "J1" H 5400 6600 50 0000 R CNN
F 1 "EPROM Connector" H 5650 6700 50 0000 R CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical" H 5300 5750 50 0001 C CNN
F 3 "~" H 5300 5750 50 0001 C CNN
1 5300 5750
1 0 0 1
$EndComp
Text GLabel 3300 1400 2 50 Input ~ 0
D4_3V3
Text GLabel 3300 1500 2 50 Input ~ 0
D7_3V3
Text GLabel 3300 1600 2 50 Input ~ 0
D5_3V3
Text GLabel 4250 1850 0 50 Input ~ 0
D4_3V3
Text GLabel 4250 2050 0 50 Input ~ 0
D7_3V3
Text GLabel 4250 2150 0 50 Input ~ 0
D5_3V3
Text GLabel 4250 2250 0 50 Input ~ 0
D0_3V3
Text GLabel 3300 1700 2 50 Input ~ 0
D0_3V3
Text GLabel 3300 1800 2 50 Input ~ 0
D2_3V3
Text GLabel 4250 2350 0 50 Input ~ 0
D2_3V3
Text GLabel 4250 2450 0 50 Input ~ 0
D1_3V3
Text GLabel 3300 1900 2 50 Input ~ 0
D1_3V3
Text GLabel 4250 2650 0 50 Input ~ 0
A0_3V3
Text GLabel 3300 2000 2 50 Input ~ 0
A0_3V3
Text GLabel 3300 2100 2 50 Input ~ 0
A1_3V3
Text GLabel 4250 2750 0 50 Input ~ 0
A1_3V3
Text GLabel 2500 1400 0 50 Input ~ 0
D4_5V
Text GLabel 2500 1500 0 50 Input ~ 0
D7_5V
$Comp
L power:+3V3 #PWR0109
U 1 1 61B41B66
P 3150 2500
F 0 "#PWR0109" H 3150 2350 50 0001 C CNN
F 1 "+3V3" H 3165 2673 50 0000 C CNN
F 2 "" H 3150 2500 50 0001 C CNN
F 3 "" H 3150 2500 50 0001 C CNN
1 3150 2500
-1 0 0 1
$EndComp
$Comp
L power:+3V3 #PWR0110
U 1 1 61B4ACB6
P 7550 1050
F 0 "#PWR0110" H 7550 900 50 0001 C CNN
F 1 "+3V3" H 7565 1223 50 0000 C CNN
F 2 "" H 7550 1050 50 0001 C CNN
F 3 "" H 7550 1050 50 0001 C CNN
1 7550 1050
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR0111
U 1 1 61B4B7D2
P 7600 3150
F 0 "#PWR0111" H 7600 3000 50 0001 C CNN
F 1 "+3V3" H 7615 3323 50 0000 C CNN
F 2 "" H 7600 3150 50 0001 C CNN
F 3 "" H 7600 3150 50 0001 C CNN
1 7600 3150
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR0105
U 1 1 61B4C2EE
P 3600 2550
F 0 "#PWR0105" H 3600 2400 50 0001 C CNN
F 1 "+3V3" H 3615 2723 50 0000 C CNN
F 2 "" H 3600 2550 50 0001 C CNN
F 3 "" H 3600 2550 50 0001 C CNN
1 3600 2550
-1 0 0 1
$EndComp
Text GLabel 2500 1600 0 50 Input ~ 0
D5_5V
Text GLabel 2500 1700 0 50 Input ~ 0
D0_5V
Text GLabel 2500 1800 0 50 Input ~ 0
D2_5V
Text GLabel 2500 1900 0 50 Input ~ 0
D1_5V
Text GLabel 2500 2000 0 50 Input ~ 0
A0_5V
Text GLabel 2500 2100 0 50 Input ~ 0
A1_5V
$Comp
L power:GND #PWR0107
U 1 1 61B51E9B
P 4950 4900
F 0 "#PWR0107" H 4950 4650 50 0001 C CNN
F 1 "GND" H 4955 4727 50 0000 C CNN
F 2 "" H 4950 4900 50 0001 C CNN
F 3 "" H 4950 4900 50 0001 C CNN
1 4950 4900
-1 0 0 1
$EndComp
Wire Wire Line
5100 4950 4950 4950
Wire Wire Line
4950 4950 4950 4900
$Comp
L power:+5V #PWR0112
U 1 1 61B52D90
P 5900 6450
F 0 "#PWR0112" H 5900 6300 50 0001 C CNN
F 1 "+5V" H 5850 6600 50 0000 L CNN
F 2 "" H 5900 6450 50 0001 C CNN
F 3 "" H 5900 6450 50 0001 C CNN
1 5900 6450
-1 0 0 1
$EndComp
$Comp
L power:+3.3V #PWR0108
U 1 1 61B423C6
P 3150 4550
F 0 "#PWR0108" H 3150 4400 50 0001 C CNN
F 1 "+3.3V" H 3165 4723 50 0000 C CNN
F 2 "" H 3150 4550 50 0001 C CNN
F 3 "" H 3150 4550 50 0001 C CNN
1 3150 4550
-1 0 0 1
$EndComp
$Comp
L power:+5V #PWR0113
U 1 1 61B53ADF
P 2650 4550
F 0 "#PWR0113" H 2650 4400 50 0001 C CNN
F 1 "+5V" H 2665 4723 50 0000 C CNN
F 2 "" H 2650 4550 50 0001 C CNN
F 3 "" H 2650 4550 50 0001 C CNN
1 2650 4550
-1 0 0 1
$EndComp
$Comp
L Logic_LevelTranslator:TXS0108EPW U3
U 1 1 61A55DAA
P 2900 3850
F 0 "U3" H 2900 3061 50 0000 C CNN
F 1 "TXS0108EPW" H 2900 2970 50 0000 C CNN
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 2900 3100 50 0001 C CNN
F 3 "www.ti.com/lit/ds/symlink/txs0108e.pdf" H 2900 3750 50 0001 C CNN
1 2900 3850
-1 0 0 1
$EndComp
$Comp
L power:+5V #PWR0114
U 1 1 61B58CD7
P 2650 2500
F 0 "#PWR0114" H 2650 2350 50 0001 C CNN
F 1 "+5V" H 2665 2673 50 0000 C CNN
F 2 "" H 2650 2500 50 0001 C CNN
F 3 "" H 2650 2500 50 0001 C CNN
1 2650 2500
-1 0 0 1
$EndComp
Wire Wire Line
3000 2500 3150 2500
Wire Wire Line
2800 2500 2650 2500
Wire Wire Line
2650 4550 2800 4550
Wire Wire Line
3000 4550 3150 4550
Wire Wire Line
7600 3150 7700 3150
$Comp
L power:+5V #PWR0115
U 1 1 61B66B1F
P 8000 3150
F 0 "#PWR0115" H 8000 3000 50 0001 C CNN
F 1 "+5V" H 8015 3323 50 0000 C CNN
F 2 "" H 8000 3150 50 0001 C CNN
F 3 "" H 8000 3150 50 0001 C CNN
1 8000 3150
1 0 0 -1
$EndComp
Wire Wire Line
8000 3150 7900 3150
Wire Wire Line
7650 1050 7550 1050
$Comp
L power:+5V #PWR0116
U 1 1 61B6924B
P 7950 1050
F 0 "#PWR0116" H 7950 900 50 0001 C CNN
F 1 "+5V" H 7965 1223 50 0000 C CNN
F 2 "" H 7950 1050 50 0001 C CNN
F 3 "" H 7950 1050 50 0001 C CNN
1 7950 1050
1 0 0 -1
$EndComp
Wire Wire Line
7950 1050 7850 1050
Text GLabel 5100 6350 0 50 Input ~ 0
A16_5V
Text GLabel 5100 6250 0 50 Input ~ 0
A15_5V
Text GLabel 5100 6150 0 50 Input ~ 0
A12_5V
Text GLabel 5100 6050 0 50 Input ~ 0
A7_5V
Text GLabel 5100 5950 0 50 Input ~ 0
A6_5V
Text GLabel 5100 5850 0 50 Input ~ 0
A5_5V
Text GLabel 5100 5750 0 50 Input ~ 0
A4_5V
Text GLabel 5100 5650 0 50 Input ~ 0
A3_5V
Text GLabel 5100 5550 0 50 Input ~ 0
A2_5V
Text GLabel 5100 5450 0 50 Input ~ 0
A1_5V
Text GLabel 5100 5350 0 50 Input ~ 0
A0_5V
Text GLabel 5100 5250 0 50 Input ~ 0
D0_5V
Text GLabel 5100 5150 0 50 Input ~ 0
D1_5V
Text GLabel 5100 5050 0 50 Input ~ 0
D2_5V
Text GLabel 5600 4950 2 50 Input ~ 0
D3_5V
Text GLabel 5600 5050 2 50 Input ~ 0
D4_5V
Text GLabel 5600 5150 2 50 Input ~ 0
D5_5V
Text GLabel 5600 5250 2 50 Input ~ 0
D6_5V
Text GLabel 5600 5350 2 50 Input ~ 0
D7_5V
Text GLabel 5600 5550 2 50 Input ~ 0
A10_5V
Text GLabel 5600 5750 2 50 Input ~ 0
A11_5V
Text GLabel 5600 5850 2 50 Input ~ 0
A9_5V
Text GLabel 5600 5950 2 50 Input ~ 0
A8_5V
Text GLabel 5600 6050 2 50 Input ~ 0
A13_5V
Text GLabel 5600 6150 2 50 Input ~ 0
A14_5V
Text GLabel 5600 6250 2 50 Input ~ 0
A17_5V
$Comp
L power:GND #PWR0117
U 1 1 61B44525
P 6050 5650
F 0 "#PWR0117" H 6050 5400 50 0001 C CNN
F 1 "GND" H 6055 5477 50 0000 C CNN
F 2 "" H 6050 5650 50 0001 C CNN
F 3 "" H 6050 5650 50 0001 C CNN
1 6050 5650
1 0 0 -1
$EndComp
Wire Wire Line
6050 5650 5600 5650
Text GLabel 4250 2850 0 50 Input ~ 0
A16_3V3
Text GLabel 4250 2950 0 50 Input ~ 0
A17_3V3
Text GLabel 4250 3450 0 50 Input ~ 0
D6_3V3
Text GLabel 6450 2950 2 50 Input ~ 0
A14_3V3
Text GLabel 6450 2850 2 50 Input ~ 0
A15_3V3
Text GLabel 6450 2750 2 50 Input ~ 0
A6_3V3
Text GLabel 6450 2650 2 50 Input ~ 0
A7_3V3
Text GLabel 3300 3450 2 50 Input ~ 0
A16_3V3
Text GLabel 3300 3550 2 50 Input ~ 0
A17_3V3
Text GLabel 3300 3650 2 50 Input ~ 0
D6_3V3
Text GLabel 2500 3450 0 50 Input ~ 0
A16_5V
Text GLabel 2500 3550 0 50 Input ~ 0
A17_5V
Text GLabel 2500 3650 0 50 Input ~ 0
D6_5V
NoConn ~ 4250 1250
NoConn ~ 4250 1350
NoConn ~ 4250 1450
NoConn ~ 4250 1550
NoConn ~ 4250 1650
NoConn ~ 4250 1750
NoConn ~ 4250 1950
NoConn ~ 4250 3050
NoConn ~ 4250 3150
NoConn ~ 4250 3250
NoConn ~ 4250 3350
NoConn ~ 4250 3650
NoConn ~ 4250 3750
NoConn ~ 4250 3900
NoConn ~ 4250 4000
NoConn ~ 4250 4100
NoConn ~ 4250 4200
NoConn ~ 4250 4300
NoConn ~ 5050 4600
NoConn ~ 5200 4600
NoConn ~ 5350 4600
NoConn ~ 5500 4600
NoConn ~ 5650 4600
NoConn ~ 6450 4200
NoConn ~ 6450 4100
NoConn ~ 6450 4000
NoConn ~ 6450 3900
NoConn ~ 6450 3800
NoConn ~ 6450 3700
NoConn ~ 6450 3450
NoConn ~ 6450 3350
NoConn ~ 6450 3250
NoConn ~ 6450 3150
NoConn ~ 6450 3050
Text GLabel 6450 2450 2 50 Input ~ 0
D3_3V3
Text GLabel 6450 2350 2 50 Input ~ 0
A4_3V3
Text GLabel 6450 2250 2 50 Input ~ 0
A5_3V3
Text GLabel 6450 2150 2 50 Input ~ 0
A9_3V3
Text GLabel 6450 2050 2 50 Input ~ 0
A8_3V3
Text GLabel 6450 1950 2 50 Input ~ 0
A3_3V3
Text GLabel 6450 1850 2 50 Input ~ 0
A2_3V3
Text GLabel 6450 1750 2 50 Input ~ 0
A12_3V3
Text GLabel 6450 1650 2 50 Input ~ 0
A13_3V3
Text GLabel 6450 1550 2 50 Input ~ 0
A10_3V3
Text GLabel 6450 1450 2 50 Input ~ 0
A11_3V3
NoConn ~ 6450 1350
NoConn ~ 6450 1250
NoConn ~ 6450 1150
NoConn ~ 6450 1000
NoConn ~ 6450 2550
Text GLabel 7350 1450 0 50 Input ~ 0
A11_3V3
Text GLabel 7350 1550 0 50 Input ~ 0
A10_3V3
Text GLabel 7350 1650 0 50 Input ~ 0
A13_3V3
Text GLabel 7350 1750 0 50 Input ~ 0
A12_3V3
Text GLabel 7350 1850 0 50 Input ~ 0
A2_3V3
Text GLabel 7350 1950 0 50 Input ~ 0
A3_3V3
Text GLabel 7350 2050 0 50 Input ~ 0
A8_3V3
Text GLabel 7350 2150 0 50 Input ~ 0
A9_3V3
$Comp
L Logic_LevelTranslator:TXS0108EPW U4
U 1 1 61A5865B
P 7800 3850
F 0 "U4" H 7800 3061 50 0000 C CNN
F 1 "TXS0108EPW" H 7800 2970 50 0000 C CNN
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 7800 3100 50 0001 C CNN
F 3 "www.ti.com/lit/ds/symlink/txs0108e.pdf" H 7800 3750 50 0001 C CNN
1 7800 3850
1 0 0 -1
$EndComp
NoConn ~ 7400 4250
NoConn ~ 8200 4250
NoConn ~ 2500 3950
NoConn ~ 2500 4050
NoConn ~ 2500 4150
NoConn ~ 3300 4150
NoConn ~ 3300 4050
NoConn ~ 3300 3950
Text GLabel 8150 1450 2 50 Input ~ 0
A11_5V
Text GLabel 8150 1550 2 50 Input ~ 0
A10_5V
Text GLabel 8150 1650 2 50 Input ~ 0
A13_5V
Text GLabel 8150 1750 2 50 Input ~ 0
A12_5V
Text GLabel 8150 1850 2 50 Input ~ 0
A2_5V
Text GLabel 8150 1950 2 50 Input ~ 0
A3_5V
Text GLabel 8150 2050 2 50 Input ~ 0
A8_5V
Text GLabel 8150 2150 2 50 Input ~ 0
A9_5V
Text GLabel 7400 4150 0 50 Input ~ 0
A14_3V3
Text GLabel 7400 4050 0 50 Input ~ 0
A15_3V3
Text GLabel 7400 3950 0 50 Input ~ 0
A6_3V3
Text GLabel 7400 3850 0 50 Input ~ 0
A7_3V3
Text GLabel 7400 3750 0 50 Input ~ 0
D3_3V3
Text GLabel 7400 3650 0 50 Input ~ 0
A4_3V3
Text GLabel 7400 3550 0 50 Input ~ 0
A5_3V3
Text GLabel 8200 3550 2 50 Input ~ 0
A5_5V
Text GLabel 8200 3650 2 50 Input ~ 0
A4_5V
Text GLabel 8200 3750 2 50 Input ~ 0
D3_5V
Text GLabel 8200 3850 2 50 Input ~ 0
A7_5V
Text GLabel 8200 3950 2 50 Input ~ 0
A6_5V
Text GLabel 8200 4050 2 50 Input ~ 0
A15_5V
Text GLabel 8200 4150 2 50 Input ~ 0
A14_5V
NoConn ~ 5600 6350
NoConn ~ 5100 6450
NoConn ~ 2500 3850
NoConn ~ 2500 3750
NoConn ~ 3300 3750
NoConn ~ 3300 3850
Wire Wire Line
4100 1150 4250 1150
$Comp
L power:GND #PWR0106
U 1 1 61B2EF8F
P 4100 1150
F 0 "#PWR0106" H 4100 900 50 0001 C CNN
F 1 "GND" H 4105 977 50 0000 C CNN
F 2 "" H 4100 1150 50 0001 C CNN
F 3 "" H 4100 1150 50 0001 C CNN
1 4100 1150
1 0 0 -1
$EndComp
Wire Wire Line
3600 2550 3700 2550
$Comp
L Logic_LevelTranslator:TXS0108EPW U2
U 1 1 61A54FCD
P 2900 1800
F 0 "U2" H 2900 1011 50 0000 C CNN
F 1 "TXS0108EPW" H 2900 920 50 0000 C CNN
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 2900 1050 50 0001 C CNN
F 3 "www.ti.com/lit/ds/symlink/txs0108e.pdf" H 2900 1700 50 0001 C CNN
1 2900 1800
-1 0 0 1
$EndComp
$Comp
L power:GND #PWR0103
U 1 1 61B6B98A
P 2000 1100
F 0 "#PWR0103" H 2000 850 50 0001 C CNN
F 1 "GND" H 2005 927 50 0000 C CNN
F 2 "" H 2000 1100 50 0001 C CNN
F 3 "" H 2000 1100 50 0001 C CNN
1 2000 1100
1 0 0 -1
$EndComp
Wire Wire Line
2900 1100 2000 1100
$Comp
L power:GND #PWR0101
U 1 1 61B70682
P 2000 3150
F 0 "#PWR0101" H 2000 2900 50 0001 C CNN
F 1 "GND" H 2005 2977 50 0000 C CNN
F 2 "" H 2000 3150 50 0001 C CNN
F 3 "" H 2000 3150 50 0001 C CNN
1 2000 3150
1 0 0 -1
$EndComp
Wire Wire Line
2000 3150 2900 3150
$Comp
L power:GND #PWR0104
U 1 1 61B7133C
P 8400 4550
F 0 "#PWR0104" H 8400 4300 50 0001 C CNN
F 1 "GND" H 8405 4377 50 0000 C CNN
F 2 "" H 8400 4550 50 0001 C CNN
F 3 "" H 8400 4550 50 0001 C CNN
1 8400 4550
1 0 0 -1
$EndComp
Wire Wire Line
8400 4550 7800 4550
$Comp
L power:PWR_FLAG #FLG0101
U 1 1 61B71FE1
P 4250 1150
F 0 "#FLG0101" H 4250 1225 50 0001 C CNN
F 1 "PWR_FLAG" H 4250 1323 50 0000 C CNN
F 2 "" H 4250 1150 50 0001 C CNN
F 3 "~" H 4250 1150 50 0001 C CNN
1 4250 1150
1 0 0 -1
$EndComp
Connection ~ 4250 1150
$Comp
L power:PWR_FLAG #FLG0102
U 1 1 61B73F25
P 3700 2550
F 0 "#FLG0102" H 3700 2625 50 0001 C CNN
F 1 "PWR_FLAG" H 3700 2723 50 0000 C CNN
F 2 "" H 3700 2550 50 0001 C CNN
F 3 "~" H 3700 2550 50 0001 C CNN
1 3700 2550
1 0 0 -1
$EndComp
Connection ~ 3700 2550
Wire Wire Line
3700 2550 4250 2550
Wire Wire Line
5600 6450 5900 6450
$Comp
L power:PWR_FLAG #FLG0103
U 1 1 61B79017
P 5900 6450
F 0 "#FLG0103" H 5900 6525 50 0001 C CNN
F 1 "PWR_FLAG" V 5900 6578 50 0000 L CNN
F 2 "" H 5900 6450 50 0001 C CNN
F 3 "~" H 5900 6450 50 0001 C CNN
1 5900 6450
0 1 1 0
$EndComp
Connection ~ 5900 6450
$Comp
L Logic_LevelTranslator:TXS0108EPW U5
U 1 1 61A56F94
P 7750 1750
F 0 "U5" H 7750 961 50 0000 C CNN
F 1 "TXS0108EPW" H 7750 870 50 0000 C CNN
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 7750 1000 50 0001 C CNN
F 3 "www.ti.com/lit/ds/symlink/txs0108e.pdf" H 7750 1650 50 0001 C CNN
1 7750 1750
1 0 0 -1
$EndComp
$Comp
L dk_Logic-Buffers-Drivers-Receivers-Transceivers:SN74LVC245AN U6
U 1 1 61B83B53
P 9500 1350
F 0 "U6" H 9400 1853 60 0000 C CNN
F 1 "SN74LVC245AN" H 9400 1747 60 0000 C CNN
F 2 "digikey-footprints:DIP-20_W7.62mm" H 9700 1550 60 0001 L CNN
F 3 "http://www.ti.com/general/docs/suppproductinfo.tsp?distId=10&gotoUrl=http%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Fsn74lvc245a" H 9700 1650 60 0001 L CNN
F 4 "296-8503-5-ND" H 9700 1750 60 0001 L CNN "Digi-Key_PN"
F 5 "SN74LVC245AN" H 9700 1850 60 0001 L CNN "MPN"
F 6 "Integrated Circuits (ICs)" H 9700 1950 60 0001 L CNN "Category"
F 7 "Logic - Buffers, Drivers, Receivers, Transceivers" H 9700 2050 60 0001 L CNN "Family"
F 8 "http://www.ti.com/general/docs/suppproductinfo.tsp?distId=10&gotoUrl=http%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Fsn74lvc245a" H 9700 2150 60 0001 L CNN "DK_Datasheet_Link"
F 9 "/product-detail/en/texas-instruments/SN74LVC245AN/296-8503-5-ND/377483" H 9700 2250 60 0001 L CNN "DK_Detail_Page"
F 10 "IC TXRX NON-INVERT 3.6V 20DIP" H 9700 2350 60 0001 L CNN "Description"
F 11 "Texas Instruments" H 9700 2450 60 0001 L CNN "Manufacturer"
F 12 "Active" H 9700 2550 60 0001 L CNN "Status"
1 9500 1350
1 0 0 -1
$EndComp
$EndSCHEMATC

1278
schematic/epromemu.ses
View File

File diff suppressed because it is too large Load Diff

644
schematic/epromemu.xml
View File

@ -1,644 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<export version="D">
<design>
<source>C:\Projects\EPROMEmu\schematic\epromemu.sch</source>
<date>12/10/2021 9:49:03 PM</date>
<tool>Eeschema (5.1.12)-1</tool>
<sheet number="1" name="/" tstamps="/">
<title_block>
<title>EPROM Emulator</title>
<company/>
<rev>1.0</rev>
<date>2021-12-09</date>
<source>epromemu.sch</source>
<comment number="1" value=""/>
<comment number="2" value=""/>
<comment number="3" value=""/>
<comment number="4" value=""/>
</title_block>
</sheet>
</design>
<components>
<comp ref="U1">
<value>Teensy4.1</value>
<footprint>teensy:Teensy41</footprint>
<libsource lib="teensy" part="Teensy4.1" description=""/>
<sheetpath names="/" tstamps="/"/>
<tstamp>61A52DD6</tstamp>
</comp>
<comp ref="J1">
<value>EPROM Connector</value>
<footprint>Connector_PinHeader_2.54mm:PinHeader_2x16_P2.54mm_Vertical</footprint>
<datasheet>~</datasheet>
<libsource lib="Connector_Generic" part="Conn_02x16_Counter_Clockwise" description="Generic connector, double row, 02x16, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>61A9BE2D</tstamp>
</comp>
<comp ref="U3">
<value>TXS0108EPW</value>
<footprint>Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm</footprint>
<datasheet>www.ti.com/lit/ds/symlink/txs0108e.pdf</datasheet>
<libsource lib="Logic_LevelTranslator" part="TXS0108EPW" description="Bidirectional level-shifting voltage translator, TSSOP-20"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>61A55DAA</tstamp>
</comp>
<comp ref="U4">
<value>TXS0108EPW</value>
<footprint>Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm</footprint>
<datasheet>www.ti.com/lit/ds/symlink/txs0108e.pdf</datasheet>
<libsource lib="Logic_LevelTranslator" part="TXS0108EPW" description="Bidirectional level-shifting voltage translator, TSSOP-20"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>61A5865B</tstamp>
</comp>
<comp ref="U2">
<value>TXS0108EPW</value>
<footprint>Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm</footprint>
<datasheet>www.ti.com/lit/ds/symlink/txs0108e.pdf</datasheet>
<libsource lib="Logic_LevelTranslator" part="TXS0108EPW" description="Bidirectional level-shifting voltage translator, TSSOP-20"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>61A54FCD</tstamp>
</comp>
<comp ref="U5">
<value>TXS0108EPW</value>
<footprint>Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm</footprint>
<datasheet>www.ti.com/lit/ds/symlink/txs0108e.pdf</datasheet>
<libsource lib="Logic_LevelTranslator" part="TXS0108EPW" description="Bidirectional level-shifting voltage translator, TSSOP-20"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>61A56F94</tstamp>
</comp>
</components>
<libparts>
<libpart lib="Connector_Generic" part="Conn_02x16_Counter_Clockwise">
<description>Generic connector, double row, 02x16, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)</description>
<docs>~</docs>
<footprints>
<fp>Connector*:*_2x??_*</fp>
</footprints>
<fields>
<field name="Reference">J</field>
<field name="Value">Conn_02x16_Counter_Clockwise</field>
</fields>
<pins>
<pin num="1" name="Pin_1" type="passive"/>
<pin num="2" name="Pin_2" type="passive"/>
<pin num="3" name="Pin_3" type="passive"/>
<pin num="4" name="Pin_4" type="passive"/>
<pin num="5" name="Pin_5" type="passive"/>
<pin num="6" name="Pin_6" type="passive"/>
<pin num="7" name="Pin_7" type="passive"/>
<pin num="8" name="Pin_8" type="passive"/>
<pin num="9" name="Pin_9" type="passive"/>
<pin num="10" name="Pin_10" type="passive"/>
<pin num="11" name="Pin_11" type="passive"/>
<pin num="12" name="Pin_12" type="passive"/>
<pin num="13" name="Pin_13" type="passive"/>
<pin num="14" name="Pin_14" type="passive"/>
<pin num="15" name="Pin_15" type="passive"/>
<pin num="16" name="Pin_16" type="passive"/>
<pin num="17" name="Pin_17" type="passive"/>
<pin num="18" name="Pin_18" type="passive"/>
<pin num="19" name="Pin_19" type="passive"/>
<pin num="20" name="Pin_20" type="passive"/>
<pin num="21" name="Pin_21" type="passive"/>
<pin num="22" name="Pin_22" type="passive"/>
<pin num="23" name="Pin_23" type="passive"/>
<pin num="24" name="Pin_24" type="passive"/>
<pin num="25" name="Pin_25" type="passive"/>
<pin num="26" name="Pin_26" type="passive"/>
<pin num="27" name="Pin_27" type="passive"/>
<pin num="28" name="Pin_28" type="passive"/>
<pin num="29" name="Pin_29" type="passive"/>
<pin num="30" name="Pin_30" type="passive"/>
<pin num="31" name="Pin_31" type="passive"/>
<pin num="32" name="Pin_32" type="passive"/>
</pins>
</libpart>
<libpart lib="Logic_LevelTranslator" part="TXS0108EPW">
<description>Bidirectional level-shifting voltage translator, TSSOP-20</description>
<docs>www.ti.com/lit/ds/symlink/txs0108e.pdf</docs>
<footprints>
<fp>*SSOP*4.4x6.5mm*P0.65mm*</fp>
</footprints>
<fields>
<field name="Reference">U</field>
<field name="Value">TXS0108EPW</field>
<field name="Footprint">Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm</field>
</fields>
<pins>
<pin num="1" name="A1" type="BiDi"/>
<pin num="2" name="VCCA" type="power_in"/>
<pin num="3" name="A2" type="BiDi"/>
<pin num="4" name="A3" type="BiDi"/>
<pin num="5" name="A4" type="BiDi"/>
<pin num="6" name="A5" type="BiDi"/>
<pin num="7" name="A6" type="BiDi"/>
<pin num="8" name="A7" type="BiDi"/>
<pin num="9" name="A8" type="BiDi"/>
<pin num="10" name="OE" type="input"/>
<pin num="11" name="GND" type="power_in"/>
<pin num="12" name="B8" type="BiDi"/>
<pin num="13" name="B7" type="BiDi"/>
<pin num="14" name="B6" type="BiDi"/>
<pin num="15" name="B5" type="BiDi"/>
<pin num="16" name="B4" type="BiDi"/>
<pin num="17" name="B3" type="BiDi"/>
<pin num="18" name="B2" type="BiDi"/>
<pin num="19" name="VCCB" type="power_in"/>
<pin num="20" name="B1" type="BiDi"/>
</pins>
</libpart>
<libpart lib="teensy" part="Teensy4.1">
<fields>
<field name="Reference">U</field>
<field name="Value">Teensy4.1</field>
</fields>
<pins>
<pin num="1" name="GND" type="power_in"/>
<pin num="2" name="0_RX1_CRX2_CS1" type="BiDi"/>
<pin num="3" name="1_TX1_CTX2_MISO1" type="BiDi"/>
<pin num="4" name="2_OUT2" type="BiDi"/>
<pin num="5" name="3_LRCLK2" type="BiDi"/>
<pin num="6" name="4_BCLK2" type="BiDi"/>
<pin num="7" name="5_IN2" type="BiDi"/>
<pin num="8" name="6_OUT1D" type="BiDi"/>
<pin num="9" name="7_RX2_OUT1A" type="BiDi"/>
<pin num="10" name="8_TX2_IN1" type="BiDi"/>
<pin num="11" name="9_OUT1C" type="BiDi"/>
<pin num="12" name="10_CS_MQSR" type="BiDi"/>
<pin num="13" name="11_MOSI_CTX1" type="BiDi"/>
<pin num="14" name="12_MISO_MQSL" type="BiDi"/>
<pin num="15" name="3V3" type="power_in"/>
<pin num="16" name="24_A10_TX6_SCL2" type="BiDi"/>
<pin num="17" name="25_A11_RX6_SDA2" type="BiDi"/>
<pin num="18" name="26_A12_MOSI1" type="BiDi"/>
<pin num="19" name="27_A13_SCK1" type="BiDi"/>
<pin num="20" name="28_RX7" type="BiDi"/>
<pin num="21" name="29_TX7" type="BiDi"/>
<pin num="22" name="30_CRX3" type="BiDi"/>
<pin num="23" name="31_CTX3" type="BiDi"/>
<pin num="24" name="32_OUT1B" type="BiDi"/>
<pin num="25" name="33_MCLK2" type="BiDi"/>
<pin num="26" name="34_RX8" type="BiDi"/>
<pin num="27" name="35_TX8" type="BiDi"/>
<pin num="28" name="36_CS" type="BiDi"/>
<pin num="29" name="37_CS" type="BiDi"/>
<pin num="30" name="38_CS1_IN1" type="BiDi"/>
<pin num="31" name="39_MISO1_OUT1A" type="BiDi"/>
<pin num="32" name="40_A16" type="BiDi"/>
<pin num="33" name="41_A17" type="BiDi"/>
<pin num="34" name="GND" type="power_in"/>
<pin num="35" name="13_SCK_LED" type="BiDi"/>
<pin num="36" name="14_A0_TX3_SPDIF_OUT" type="BiDi"/>
<pin num="37" name="15_A1_RX3_SPDIF_IN" type="BiDi"/>
<pin num="38" name="16_A2_RX4_SCL1" type="BiDi"/>
<pin num="39" name="17_A3_TX4_SDA1" type="BiDi"/>
<pin num="40" name="18_A4_SDA" type="BiDi"/>
<pin num="41" name="19_A5_SCL" type="BiDi"/>
<pin num="42" name="20_A6_TX5_LRCLK1" type="BiDi"/>
<pin num="43" name="21_A7_RX5_BCLK1" type="BiDi"/>
<pin num="44" name="22_A8_CTX1" type="BiDi"/>
<pin num="45" name="23_A9_CRX1_MCLK1" type="BiDi"/>
<pin num="46" name="3V3" type="output"/>
<pin num="47" name="GND" type="output"/>
<pin num="48" name="VIN" type="power_in"/>
<pin num="49" name="VUSB" type="power_out"/>
<pin num="50" name="VBAT" type="power_in"/>
<pin num="51" name="3V3" type="power_in"/>
<pin num="52" name="GND" type="input"/>
<pin num="53" name="PROGRAM" type="input"/>
<pin num="54" name="ON_OFF" type="input"/>
<pin num="55" name="5V" type="power_out"/>
<pin num="56" name="D-" type="BiDi"/>
<pin num="57" name="D+" type="BiDi"/>
<pin num="58" name="GND" type="power_in"/>
<pin num="59" name="GND" type="power_in"/>
<pin num="60" name="R+" type="BiDi"/>
<pin num="61" name="LED" type="BiDi"/>
<pin num="62" name="T-" type="BiDi"/>
<pin num="63" name="T+" type="BiDi"/>
<pin num="64" name="GND" type="power_in"/>
<pin num="65" name="R-" type="BiDi"/>
<pin num="66" name="D-" type="BiDi"/>
<pin num="67" name="D+" type="BiDi"/>
</pins>
</libpart>
</libparts>
<libraries>
<library logical="Connector_Generic">
<uri>C:\Program Files\KiCad\share\kicad\library/Connector_Generic.lib</uri>
</library>
<library logical="Logic_LevelTranslator">
<uri>C:\Program Files\KiCad\share\kicad\library/Logic_LevelTranslator.lib</uri>
</library>
<library logical="teensy">
<uri>c:\kicad/teensy_library/teensy.lib</uri>
</library>
</libraries>
<nets>
<net code="1" name="Net-(U1-Pad34)">
<node ref="U1" pin="34"/>
</net>
<net code="2" name="Net-(U1-Pad49)">
<node ref="U1" pin="49"/>
</net>
<net code="3" name="Net-(U1-Pad48)">
<node ref="U1" pin="48"/>
</net>
<net code="4" name="Net-(U1-Pad47)">
<node ref="U1" pin="47"/>
</net>
<net code="5" name="Net-(U1-Pad46)">
<node ref="U1" pin="46"/>
</net>
<net code="6" name="Net-(U1-Pad29)">
<node ref="U1" pin="29"/>
</net>
<net code="7" name="Net-(U1-Pad28)">
<node ref="U1" pin="28"/>
</net>
<net code="8" name="Net-(U1-Pad27)">
<node ref="U1" pin="27"/>
</net>
<net code="9" name="Net-(U1-Pad26)">
<node ref="U1" pin="26"/>
</net>
<net code="10" name="Net-(U1-Pad25)">
<node ref="U1" pin="25"/>
</net>
<net code="11" name="Net-(U1-Pad65)">
<node ref="U1" pin="65"/>
</net>
<net code="12" name="Net-(U1-Pad64)">
<node ref="U1" pin="64"/>
</net>
<net code="13" name="A15_5V">
<node ref="U4" pin="14"/>
<node ref="J1" pin="3"/>
</net>
<net code="14" name="A5_5V">
<node ref="U4" pin="20"/>
<node ref="J1" pin="7"/>
</net>
<net code="15" name="A4_5V">
<node ref="J1" pin="8"/>
<node ref="U4" pin="18"/>
</net>
<net code="16" name="D3_5V">
<node ref="U4" pin="17"/>
<node ref="J1" pin="17"/>
</net>
<net code="17" name="A7_5V">
<node ref="U4" pin="16"/>
<node ref="J1" pin="5"/>
</net>
<net code="18" name="A6_5V">
<node ref="J1" pin="6"/>
<node ref="U4" pin="15"/>
</net>
<net code="19" name="Net-(U1-Pad63)">
<node ref="U1" pin="63"/>
</net>
<net code="20" name="Net-(U4-Pad12)">
<node ref="U4" pin="12"/>
</net>
<net code="21" name="Net-(U4-Pad10)">
<node ref="U4" pin="10"/>
</net>
<net code="22" name="Net-(U1-Pad3)">
<node ref="U1" pin="3"/>
</net>
<net code="23" name="Net-(U1-Pad2)">
<node ref="U1" pin="2"/>
</net>
<net code="24" name="Net-(U1-Pad4)">
<node ref="U1" pin="4"/>
</net>
<net code="25" name="GND">
<node ref="U3" pin="11"/>
<node ref="J1" pin="24"/>
<node ref="J1" pin="16"/>
<node ref="U2" pin="11"/>
<node ref="U1" pin="1"/>
<node ref="U4" pin="11"/>
<node ref="U5" pin="11"/>
</net>
<net code="26" name="Net-(U1-Pad56)">
<node ref="U1" pin="56"/>
</net>
<net code="27" name="Net-(U1-Pad62)">
<node ref="U1" pin="62"/>
</net>
<net code="28" name="Net-(U1-Pad61)">
<node ref="U1" pin="61"/>
</net>
<net code="29" name="Net-(U1-Pad60)">
<node ref="U1" pin="60"/>
</net>
<net code="30" name="Net-(U1-Pad54)">
<node ref="U1" pin="54"/>
</net>
<net code="31" name="Net-(U1-Pad53)">
<node ref="U1" pin="53"/>
</net>
<net code="32" name="Net-(U1-Pad52)">
<node ref="U1" pin="52"/>
</net>
<net code="33" name="Net-(U1-Pad51)">
<node ref="U1" pin="51"/>
</net>
<net code="34" name="Net-(U1-Pad50)">
<node ref="U1" pin="50"/>
</net>
<net code="35" name="Net-(U1-Pad59)">
<node ref="U1" pin="59"/>
</net>
<net code="36" name="Net-(U1-Pad58)">
<node ref="U1" pin="58"/>
</net>
<net code="37" name="Net-(U1-Pad57)">
<node ref="U1" pin="57"/>
</net>
<net code="38" name="Net-(U1-Pad55)">
<node ref="U1" pin="55"/>
</net>
<net code="39" name="Net-(U1-Pad67)">
<node ref="U1" pin="67"/>
</net>
<net code="40" name="Net-(U1-Pad66)">
<node ref="U1" pin="66"/>
</net>
<net code="41" name="Net-(U1-Pad23)">
<node ref="U1" pin="23"/>
</net>
<net code="42" name="Net-(U1-Pad22)">
<node ref="U1" pin="22"/>
</net>
<net code="43" name="Net-(U1-Pad21)">
<node ref="U1" pin="21"/>
</net>
<net code="44" name="Net-(U1-Pad20)">
<node ref="U1" pin="20"/>
</net>
<net code="45" name="Net-(U1-Pad9)">
<node ref="U1" pin="9"/>
</net>
<net code="46" name="Net-(U1-Pad7)">
<node ref="U1" pin="7"/>
</net>
<net code="47" name="Net-(U1-Pad6)">
<node ref="U1" pin="6"/>
</net>
<net code="48" name="Net-(U1-Pad5)">
<node ref="U1" pin="5"/>
</net>
<net code="49" name="D0_3V3">
<node ref="U1" pin="12"/>
<node ref="U2" pin="6"/>
</net>
<net code="50" name="D1_3V3">
<node ref="U2" pin="4"/>
<node ref="U1" pin="14"/>
</net>
<net code="51" name="A0_3V3">
<node ref="U1" pin="16"/>
<node ref="U2" pin="3"/>
</net>
<net code="52" name="A12_5V">
<node ref="J1" pin="4"/>
<node ref="U5" pin="16"/>
</net>
<net code="53" name="+3V3">
<node ref="U1" pin="15"/>
<node ref="U3" pin="2"/>
<node ref="U5" pin="2"/>
<node ref="U4" pin="2"/>
<node ref="U2" pin="2"/>
</net>
<net code="54" name="A10_5V">
<node ref="U5" pin="18"/>
<node ref="J1" pin="23"/>
</net>
<net code="55" name="A2_5V">
<node ref="J1" pin="10"/>
<node ref="U5" pin="15"/>
</net>
<net code="56" name="A3_5V">
<node ref="J1" pin="9"/>
<node ref="U5" pin="14"/>
</net>
<net code="57" name="Net-(U5-Pad10)">
<node ref="U5" pin="10"/>
</net>
<net code="58" name="A11_3V3">
<node ref="U1" pin="45"/>
<node ref="U5" pin="1"/>
</net>
<net code="59" name="Net-(U3-Pad4)">
<node ref="U3" pin="4"/>
</net>
<net code="60" name="Net-(U3-Pad3)">
<node ref="U3" pin="3"/>
</net>
<net code="61" name="Net-(U3-Pad1)">
<node ref="U3" pin="1"/>
</net>
<net code="62" name="Net-(U3-Pad20)">
<node ref="U3" pin="20"/>
</net>
<net code="63" name="Net-(U3-Pad18)">
<node ref="U3" pin="18"/>
</net>
<net code="64" name="Net-(U3-Pad17)">
<node ref="U3" pin="17"/>
</net>
<net code="65" name="Net-(U4-Pad9)">
<node ref="U4" pin="9"/>
</net>
<net code="66" name="Net-(U3-Pad5)">
<node ref="U3" pin="5"/>
</net>
<net code="67" name="Net-(U2-Pad10)">
<node ref="U2" pin="10"/>
</net>
<net code="68" name="Net-(U3-Pad6)">
<node ref="U3" pin="6"/>
</net>
<net code="69" name="Net-(U3-Pad15)">
<node ref="U3" pin="15"/>
</net>
<net code="70" name="Net-(U3-Pad16)">
<node ref="U3" pin="16"/>
</net>
<net code="71" name="Net-(J1-Pad1)">
<node ref="J1" pin="1"/>
</net>
<net code="72" name="Net-(J1-Pad31)">
<node ref="J1" pin="31"/>
</net>
<net code="73" name="A0_5V">
<node ref="U2" pin="18"/>
<node ref="J1" pin="12"/>
</net>
<net code="74" name="A1_5V">
<node ref="U2" pin="20"/>
<node ref="J1" pin="11"/>
</net>
<net code="75" name="D4_3V3">
<node ref="U2" pin="9"/>
<node ref="U1" pin="8"/>
</net>
<net code="76" name="D0_5V">
<node ref="J1" pin="13"/>
<node ref="U2" pin="15"/>
</net>
<net code="77" name="A14_5V">
<node ref="J1" pin="29"/>
<node ref="U4" pin="13"/>
</net>
<net code="78" name="A13_5V">
<node ref="J1" pin="28"/>
<node ref="U5" pin="17"/>
</net>
<net code="79" name="A8_5V">
<node ref="J1" pin="27"/>
<node ref="U5" pin="13"/>
</net>
<net code="80" name="A9_5V">
<node ref="U5" pin="12"/>
<node ref="J1" pin="26"/>
</net>
<net code="81" name="A11_5V">
<node ref="J1" pin="25"/>
<node ref="U5" pin="20"/>
</net>
<net code="82" name="Net-(J1-Pad22)">
<node ref="J1" pin="22"/>
</net>
<net code="83" name="D7_5V">
<node ref="J1" pin="21"/>
<node ref="U2" pin="13"/>
</net>
<net code="84" name="D5_5V">
<node ref="U2" pin="14"/>
<node ref="J1" pin="19"/>
</net>
<net code="85" name="D4_5V">
<node ref="J1" pin="18"/>
<node ref="U2" pin="12"/>
</net>
<net code="86" name="D2_5V">
<node ref="J1" pin="15"/>
<node ref="U2" pin="16"/>
</net>
<net code="87" name="D1_5V">
<node ref="J1" pin="14"/>
<node ref="U2" pin="17"/>
</net>
<net code="88" name="A15_3V3">
<node ref="U1" pin="31"/>
<node ref="U4" pin="7"/>
</net>
<net code="89" name="A14_3V3">
<node ref="U1" pin="30"/>
<node ref="U4" pin="8"/>
</net>
<net code="90" name="D6_3V3">
<node ref="U3" pin="7"/>
<node ref="U1" pin="24"/>
</net>
<net code="91" name="A6_3V3">
<node ref="U1" pin="32"/>
<node ref="U4" pin="6"/>
</net>
<net code="92" name="A1_3V3">
<node ref="U2" pin="1"/>
<node ref="U1" pin="17"/>
</net>
<net code="93" name="D2_3V3">
<node ref="U1" pin="13"/>
<node ref="U2" pin="5"/>
</net>
<net code="94" name="D5_3V3">
<node ref="U1" pin="11"/>
<node ref="U2" pin="7"/>
</net>
<net code="95" name="D7_3V3">
<node ref="U1" pin="10"/>
<node ref="U2" pin="8"/>
</net>
<net code="96" name="A10_3V3">
<node ref="U5" pin="3"/>
<node ref="U1" pin="44"/>
</net>
<net code="97" name="A13_3V3">
<node ref="U5" pin="4"/>
<node ref="U1" pin="43"/>
</net>
<net code="98" name="A12_3V3">
<node ref="U5" pin="5"/>
<node ref="U1" pin="42"/>
</net>
<net code="99" name="A2_3V3">
<node ref="U5" pin="6"/>
<node ref="U1" pin="41"/>
</net>
<net code="100" name="A3_3V3">
<node ref="U5" pin="7"/>
<node ref="U1" pin="40"/>
</net>
<net code="101" name="A8_3V3">
<node ref="U5" pin="8"/>
<node ref="U1" pin="39"/>
</net>
<net code="102" name="A9_3V3">
<node ref="U5" pin="9"/>
<node ref="U1" pin="38"/>
</net>
<net code="103" name="A5_3V3">
<node ref="U4" pin="1"/>
<node ref="U1" pin="37"/>
</net>
<net code="104" name="A4_3V3">
<node ref="U1" pin="36"/>
<node ref="U4" pin="3"/>
</net>
<net code="105" name="D3_3V3">
<node ref="U1" pin="35"/>
<node ref="U4" pin="4"/>
</net>
<net code="106" name="A7_3V3">
<node ref="U4" pin="5"/>
<node ref="U1" pin="33"/>
</net>
<net code="107" name="+5V">
<node ref="U2" pin="19"/>
<node ref="U5" pin="19"/>
<node ref="J1" pin="32"/>
<node ref="U4" pin="19"/>
<node ref="U3" pin="19"/>
</net>
<net code="108" name="A16_3V3">
<node ref="U1" pin="18"/>
<node ref="U3" pin="9"/>
</net>
<net code="109" name="A17_3V3">
<node ref="U3" pin="8"/>
<node ref="U1" pin="19"/>
</net>
<net code="110" name="D6_5V">
<node ref="J1" pin="20"/>
<node ref="U3" pin="14"/>
</net>
<net code="111" name="A17_5V">
<node ref="J1" pin="30"/>
<node ref="U3" pin="13"/>
</net>
<net code="112" name="A16_5V">
<node ref="U3" pin="12"/>
<node ref="J1" pin="2"/>
</net>
<net code="113" name="Net-(U3-Pad10)">
<node ref="U3" pin="10"/>
</net>
</nets>
</export>

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schematic/fp-info-cache
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