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MicroCoreLabs 2021-01-06 20:11:46 -08:00
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 65xx_6502
#
DEF 65xx_6502 U 0 40 Y Y 1 F N
F0 "U" -400 1400 50 H V L CNN
F1 "65xx_6502" 0 0 50 V V C CIB
F2 "" 0 2000 50 H I C CNN
F3 "" 0 1900 50 H I C CNN
ALIAS 65CE02
$FPLIST
DIP-40_W15.24mm*
$ENDFPLIST
DRAW
S -400 1350 400 -1350 0 1 0 f
X VSS 1 -100 -1550 200 U 50 50 1 1 W
X A1 10 600 1100 200 L 50 50 1 1 O
X A2 11 600 1000 200 L 50 50 1 1 O
X A3 12 600 900 200 L 50 50 1 1 O
X A4 13 600 800 200 L 50 50 1 1 O
X A5 14 600 700 200 L 50 50 1 1 O
X A6 15 600 600 200 L 50 50 1 1 O
X A7 16 600 500 200 L 50 50 1 1 O
X A8 17 600 400 200 L 50 50 1 1 O
X A9 18 600 300 200 L 50 50 1 1 O
X A10 19 600 200 200 L 50 50 1 1 O
X RDY 2 -600 -300 200 R 50 50 1 1 I
X A11 20 600 100 200 L 50 50 1 1 O
X VSS 21 0 -1550 200 U 50 50 1 1 W
X A12 22 600 0 200 L 50 50 1 1 O
X A13 23 600 -100 200 L 50 50 1 1 O
X A14 24 600 -200 200 L 50 50 1 1 O
X A15 25 600 -300 200 L 50 50 1 1 O
X D7 26 600 -1200 200 L 50 50 1 1 B
X D6 27 600 -1100 200 L 50 50 1 1 B
X D5 28 600 -1000 200 L 50 50 1 1 B
X D4 29 600 -900 200 L 50 50 1 1 B
X ϕ1 3 -600 800 200 R 50 50 1 1 O
X D3 30 600 -800 200 L 50 50 1 1 B
X D2 31 600 -700 200 L 50 50 1 1 B
X D1 32 600 -600 200 L 50 50 1 1 B
X D0 33 600 -500 200 L 50 50 1 1 B
X R/~W 34 -600 0 200 R 50 50 1 1 O
X nc 35 -400 -1000 100 R 50 50 1 1 N NX
X nc 36 -400 -1100 100 R 50 50 1 1 N NX
X ϕ0 37 -600 900 200 R 50 50 1 1 I C
X ~SO 38 -600 -1200 200 R 50 50 1 1 I L
X ϕ2 39 -600 700 200 R 50 50 1 1 O
X ~IRQ 4 -600 400 200 R 50 50 1 1 I L
X ~RES 40 -600 1200 200 R 50 50 1 1 I L
X nc 5 -400 -900 101 R 50 50 1 1 N NX
X ~NMI 6 -600 300 200 R 50 50 1 1 I L
X SYNC 7 -600 -700 200 R 50 50 1 1 O
X VCC 8 0 1550 200 D 50 50 1 1 W
X A0 9 600 1200 200 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# 74xx_74HC14
#
DEF 74xx_74HC14 U 0 40 Y Y 7 L N
F0 "U" 0 50 50 H V C CNN
F1 "74xx_74HC14" 0 -50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS14
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -200 300 200 -300 7 1 10 f
P 4 1 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 2 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 3 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 4 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 5 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 6 0 10 -150 150 -150 -150 150 0 -150 150 f
P 3 1 1 0 -75 -50 -75 50 -25 50 N
P 4 1 1 0 -100 -50 -25 -50 -25 50 0 50 N
P 3 2 1 0 -75 -50 -75 50 -25 50 N
P 4 2 1 0 -100 -50 -25 -50 -25 50 0 50 N
P 3 3 1 0 -75 -50 -75 50 -25 50 N
P 4 3 1 0 -100 -50 -25 -50 -25 50 0 50 N
P 3 4 1 0 -75 -50 -75 50 -25 50 N
P 4 4 1 0 -100 -50 -25 -50 -25 50 0 50 N
P 3 5 1 0 -75 -50 -75 50 -25 50 N
P 4 5 1 0 -100 -50 -25 -50 -25 50 0 50 N
P 3 6 1 0 -75 -50 -75 50 -25 50 N
P 4 6 1 0 -100 -50 -25 -50 -25 50 0 50 N
X ~ 1 -300 0 150 R 50 50 1 0 I
X ~ 2 300 0 150 L 50 50 1 0 O I
X ~ 3 -300 0 150 R 50 50 2 0 I
X ~ 4 300 0 150 L 50 50 2 0 O I
X ~ 5 -300 0 150 R 50 50 3 0 I
X ~ 6 300 0 150 L 50 50 3 0 O I
X ~ 8 300 0 150 L 50 50 4 0 O I
X ~ 9 -300 0 150 R 50 50 4 0 I
X ~ 10 300 0 150 L 50 50 5 0 O I
X ~ 11 -300 0 150 R 50 50 5 0 I
X ~ 12 300 0 150 L 50 50 6 0 O I
X ~ 13 -300 0 150 R 50 50 6 0 I
X VCC 14 0 500 200 D 50 50 7 0 W
X GND 7 0 -500 200 U 50 50 7 0 W
ENDDRAW
ENDDEF
#
# 74xx_74LS573
#
DEF 74xx_74LS573 U 0 40 Y Y 1 L N
F0 "U" -300 650 50 H V C CNN
F1 "74xx_74LS573" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP?20*
$ENDFPLIST
DRAW
S -300 600 300 -600 1 1 10 f
X OE 1 -500 -500 200 R 50 50 1 0 I I
X GND 10 0 -800 200 U 50 50 1 0 W
X Load 11 -500 -400 200 R 50 50 1 0 I
X Q7 12 500 -200 200 L 50 50 1 0 T
X Q6 13 500 -100 200 L 50 50 1 0 T
X Q5 14 500 0 200 L 50 50 1 0 T
X Q4 15 500 100 200 L 50 50 1 0 T
X Q3 16 500 200 200 L 50 50 1 0 T
X Q2 17 500 300 200 L 50 50 1 0 T
X Q1 18 500 400 200 L 50 50 1 0 T
X Q0 19 500 500 200 L 50 50 1 0 T
X D0 2 -500 500 200 R 50 50 1 0 I
X VCC 20 0 800 200 D 50 50 1 0 W
X D1 3 -500 400 200 R 50 50 1 0 I
X D2 4 -500 300 200 R 50 50 1 0 I
X D3 5 -500 200 200 R 50 50 1 0 I
X D4 6 -500 100 200 R 50 50 1 0 I
X D5 7 -500 0 200 R 50 50 1 0 I
X D6 8 -500 -100 200 R 50 50 1 0 I
X D7 9 -500 -200 200 R 50 50 1 0 I
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+3.3V
#
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3.3V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# teensy_Teensy4.1
#
DEF teensy_Teensy4.1 U 0 40 Y Y 1 F N
F0 "U" 0 2550 50 H V C CNN
F1 "teensy_Teensy4.1" 0 2450 50 H V C CNN
F2 "" -400 400 50 H I C CNN
F3 "" -400 400 50 H I C CNN
DRAW
T 0 450 1950 40 0 0 0 "(250mA max)" Normal 0 C C
T 0 450 2150 40 0 0 0 "(3.6v to 5.5v)" Normal 0 C C
S -900 2400 900 -1100 0 1 0 N
S -800 -50 -800 -50 0 1 0 N
P 2 0 0 0 -900 -250 900 -250 N
X 8_TX2_IN1 10 -1100 1250 200 R 50 50 0 0 B
X 9_OUT1C 11 -1100 1150 200 R 50 50 0 0 B
X 10_CS_MQSR 12 -1100 1050 200 R 50 50 0 0 B
X 11_MOSI_CTX1 13 -1100 950 200 R 50 50 0 0 B
X 12_MISO_MQSL 14 -1100 850 200 R 50 50 0 0 B
X 3V3 15 -1100 750 200 R 50 50 0 0 W
X 24_A10_TX6_SCL2 16 -1100 650 200 R 50 50 0 0 B
X 25_A11_RX6_SDA2 17 -1100 550 200 R 50 50 0 0 B
X 26_A12_MOSI1 18 -1100 450 200 R 50 50 0 0 B
X 27_A13_SCK1 19 -1100 350 200 R 50 50 0 0 B
X 28_RX7 20 -1100 250 200 R 50 50 0 0 B
X 29_TX7 21 -1100 150 200 R 50 50 0 0 B
X 30_CRX3 22 -1100 50 200 R 50 50 0 0 B
X 31_CTX3 23 -1100 -50 200 R 50 50 0 0 B
X 32_OUT1B 24 -1100 -150 200 R 50 50 0 0 B
X 33_MCLK2 25 1100 -150 200 L 50 50 0 0 B
X 34_RX8 26 1100 -50 200 L 50 50 0 0 B
X 35_TX8 27 1100 50 200 L 50 50 0 0 B
X 36_CS 28 1100 150 200 L 50 50 0 0 B
X 37_CS 29 1100 250 200 L 50 50 0 0 B
X 38_CS1_IN1 30 1100 350 200 L 50 50 0 0 B
X 39_MISO1_OUT1A 31 1100 450 200 L 50 50 0 0 B
X 40_A16 32 1100 550 200 L 50 50 0 0 B
X 41_A17 33 1100 650 200 L 50 50 0 0 B
X 13_SCK_LED 35 1100 850 200 L 50 50 0 0 B
X 14_A0_TX3_SPDIF_OUT 36 1100 950 200 L 50 50 0 0 B
X 15_A1_RX3_SPDIF_IN 37 1100 1050 200 L 50 50 0 0 B
X 16_A2_RX4_SCL1 38 1100 1150 200 L 50 50 0 0 B
X 17_A3_TX4_SDA1 39 1100 1250 200 L 50 50 0 0 B
X 18_A4_SDA 40 1100 1350 200 L 50 50 0 0 B
X 19_A5_SCL 41 1100 1450 200 L 50 50 0 0 B
X 20_A6_TX5_LRCLK1 42 1100 1550 200 L 50 50 0 0 B
X 21_A7_RX5_BCLK1 43 1100 1650 200 L 50 50 0 0 B
X 22_A8_CTX1 44 1100 1750 200 L 50 50 0 0 B
X 23_A9_CRX1_MCLK1 45 1100 1850 200 L 50 50 0 0 B
X 3V3 46 1100 1950 200 L 50 50 0 0 O
X GND 47 1100 2050 200 L 50 50 0 0 O
X VIN 48 1100 2150 200 L 50 50 0 0 W
X 3_LRCLK2 5 -1100 1750 200 R 50 50 0 0 B
X 4_BCLK2 6 -1100 1650 200 R 50 50 0 0 B
X 5_IN2 7 -1100 1550 200 R 50 50 0 0 B
X 6_OUT1D 8 -1100 1450 200 R 50 50 0 0 B
X 7_RX2_OUT1A 9 -1100 1350 200 R 50 50 0 0 B
X GND 1 -1100 2150 200 R 50 50 1 1 W
X 0_RX1_CRX2_CS1 2 -1100 2050 200 R 50 50 1 1 B
X 1_TX1_CTX2_MISO1 3 -1100 1950 200 R 50 50 1 1 B
X GND 34 1100 750 200 L 50 50 1 1 W
X 2_OUT2 4 -1100 1850 200 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library

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(export (version D)
(design
(source Z:\Ted\projs\MCL65\PCB_MCL65+\MCL65+\MCL65+.sch)
(date "12/24/2020 5:52:09 PM")
(tool "Eeschema (5.1.8)-1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title MCL65+)
(company "Ted Fried, MicroCore Labs")
(rev)
(date)
(source MCL65+.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref U1)
(value 6502)
(footprint Package_DIP:DIP-40_W15.24mm)
(datasheet http://www.6502.org/documents/datasheets/mos/mos_6500_mpu_mar_1980.pdf)
(libsource (lib 65xx) (part 6502) (description "6502 8-bit NMOS Microprocessor, 64K, DIP-40"))
(sheetpath (names /) (tstamps /))
(tstamp 5FE26151))
(comp (ref U5)
(value Teensy4.1)
(footprint MCL65+:Teensy41)
(libsource (lib teensy) (part Teensy4.1) (description ""))
(sheetpath (names /) (tstamps /))
(tstamp 5FE26E42))
(comp (ref U3)
(value 74LS573)
(footprint Package_DIP:DIP-20_W7.62mm_Socket)
(datasheet 74xx/74hc573.pdf)
(libsource (lib 74xx) (part 74LS573) (description "8-bit Latch 3-state outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 60039FDC))
(comp (ref U4)
(value 74LS573)
(footprint Package_DIP:DIP-20_W7.62mm_Socket)
(datasheet 74xx/74hc573.pdf)
(libsource (lib 74xx) (part 74LS573) (description "8-bit Latch 3-state outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 60045BF1))
(comp (ref U2)
(value 74HC14)
(footprint Package_DIP:DIP-14_W7.62mm_Socket)
(datasheet http://www.ti.com/lit/gpn/sn74HC14)
(libsource (lib 74xx) (part 74HC14) (description "Hex inverter schmitt trigger"))
(sheetpath (names /) (tstamps /))
(tstamp 5FF03D77)))
(libparts
(libpart (lib 65xx) (part 6502)
(aliases
(alias 65CE02))
(description "6502 8-bit NMOS Microprocessor, 64K, DIP-40")
(docs http://www.6502.org/documents/datasheets/mos/mos_6500_mpu_mar_1980.pdf)
(footprints
(fp DIP-40_W15.24mm*))
(fields
(field (name Reference) U)
(field (name Value) 6502))
(pins
(pin (num 1) (name VSS) (type power_in))
(pin (num 2) (name RDY) (type input))
(pin (num 3) (name ϕ1) (type output))
(pin (num 4) (name ~IRQ) (type input))
(pin (num 5) (name nc) (type NotConnected))
(pin (num 6) (name ~NMI) (type input))
(pin (num 7) (name SYNC) (type output))
(pin (num 8) (name VCC) (type power_in))
(pin (num 9) (name A0) (type output))
(pin (num 10) (name A1) (type output))
(pin (num 11) (name A2) (type output))
(pin (num 12) (name A3) (type output))
(pin (num 13) (name A4) (type output))
(pin (num 14) (name A5) (type output))
(pin (num 15) (name A6) (type output))
(pin (num 16) (name A7) (type output))
(pin (num 17) (name A8) (type output))
(pin (num 18) (name A9) (type output))
(pin (num 19) (name A10) (type output))
(pin (num 20) (name A11) (type output))
(pin (num 21) (name VSS) (type power_in))
(pin (num 22) (name A12) (type output))
(pin (num 23) (name A13) (type output))
(pin (num 24) (name A14) (type output))
(pin (num 25) (name A15) (type output))
(pin (num 26) (name D7) (type BiDi))
(pin (num 27) (name D6) (type BiDi))
(pin (num 28) (name D5) (type BiDi))
(pin (num 29) (name D4) (type BiDi))
(pin (num 30) (name D3) (type BiDi))
(pin (num 31) (name D2) (type BiDi))
(pin (num 32) (name D1) (type BiDi))
(pin (num 33) (name D0) (type BiDi))
(pin (num 34) (name R/~W) (type output))
(pin (num 35) (name nc) (type NotConnected))
(pin (num 36) (name nc) (type NotConnected))
(pin (num 37) (name ϕ0) (type input))
(pin (num 38) (name ~SO) (type input))
(pin (num 39) (name ϕ2) (type output))
(pin (num 40) (name ~RES) (type input))))
(libpart (lib 74xx) (part 74HC14)
(aliases
(alias 74LS14))
(description "Hex inverter schmitt trigger")
(docs http://www.ti.com/lit/gpn/sn74HC14)
(footprints
(fp DIP*W7.62mm*))
(fields
(field (name Reference) U)
(field (name Value) 74HC14))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type output))
(pin (num 3) (name ~) (type input))
(pin (num 4) (name ~) (type output))
(pin (num 5) (name ~) (type input))
(pin (num 6) (name ~) (type output))
(pin (num 7) (name GND) (type power_in))
(pin (num 8) (name ~) (type output))
(pin (num 9) (name ~) (type input))
(pin (num 10) (name ~) (type output))
(pin (num 11) (name ~) (type input))
(pin (num 12) (name ~) (type output))
(pin (num 13) (name ~) (type input))
(pin (num 14) (name VCC) (type power_in))))
(libpart (lib 74xx) (part 74LS573)
(description "8-bit Latch 3-state outputs")
(docs 74xx/74hc573.pdf)
(footprints
(fp DIP?20*))
(fields
(field (name Reference) U)
(field (name Value) 74LS573))
(pins
(pin (num 1) (name OE) (type input))
(pin (num 2) (name D0) (type input))
(pin (num 3) (name D1) (type input))
(pin (num 4) (name D2) (type input))
(pin (num 5) (name D3) (type input))
(pin (num 6) (name D4) (type input))
(pin (num 7) (name D5) (type input))
(pin (num 8) (name D6) (type input))
(pin (num 9) (name D7) (type input))
(pin (num 10) (name GND) (type power_in))
(pin (num 11) (name Load) (type input))
(pin (num 12) (name Q7) (type 3state))
(pin (num 13) (name Q6) (type 3state))
(pin (num 14) (name Q5) (type 3state))
(pin (num 15) (name Q4) (type 3state))
(pin (num 16) (name Q3) (type 3state))
(pin (num 17) (name Q2) (type 3state))
(pin (num 18) (name Q1) (type 3state))
(pin (num 19) (name Q0) (type 3state))
(pin (num 20) (name VCC) (type power_in))))
(libpart (lib teensy) (part Teensy4.1)
(fields
(field (name Reference) U)
(field (name Value) Teensy4.1))
(pins
(pin (num 1) (name GND) (type power_in))
(pin (num 2) (name 0_RX1_CRX2_CS1) (type BiDi))
(pin (num 3) (name 1_TX1_CTX2_MISO1) (type BiDi))
(pin (num 4) (name 2_OUT2) (type BiDi))
(pin (num 5) (name 3_LRCLK2) (type BiDi))
(pin (num 6) (name 4_BCLK2) (type BiDi))
(pin (num 7) (name 5_IN2) (type BiDi))
(pin (num 8) (name 6_OUT1D) (type BiDi))
(pin (num 9) (name 7_RX2_OUT1A) (type BiDi))
(pin (num 10) (name 8_TX2_IN1) (type BiDi))
(pin (num 11) (name 9_OUT1C) (type BiDi))
(pin (num 12) (name 10_CS_MQSR) (type BiDi))
(pin (num 13) (name 11_MOSI_CTX1) (type BiDi))
(pin (num 14) (name 12_MISO_MQSL) (type BiDi))
(pin (num 15) (name 3V3) (type power_in))
(pin (num 16) (name 24_A10_TX6_SCL2) (type BiDi))
(pin (num 17) (name 25_A11_RX6_SDA2) (type BiDi))
(pin (num 18) (name 26_A12_MOSI1) (type BiDi))
(pin (num 19) (name 27_A13_SCK1) (type BiDi))
(pin (num 20) (name 28_RX7) (type BiDi))
(pin (num 21) (name 29_TX7) (type BiDi))
(pin (num 22) (name 30_CRX3) (type BiDi))
(pin (num 23) (name 31_CTX3) (type BiDi))
(pin (num 24) (name 32_OUT1B) (type BiDi))
(pin (num 25) (name 33_MCLK2) (type BiDi))
(pin (num 26) (name 34_RX8) (type BiDi))
(pin (num 27) (name 35_TX8) (type BiDi))
(pin (num 28) (name 36_CS) (type BiDi))
(pin (num 29) (name 37_CS) (type BiDi))
(pin (num 30) (name 38_CS1_IN1) (type BiDi))
(pin (num 31) (name 39_MISO1_OUT1A) (type BiDi))
(pin (num 32) (name 40_A16) (type BiDi))
(pin (num 33) (name 41_A17) (type BiDi))
(pin (num 34) (name GND) (type power_in))
(pin (num 35) (name 13_SCK_LED) (type BiDi))
(pin (num 36) (name 14_A0_TX3_SPDIF_OUT) (type BiDi))
(pin (num 37) (name 15_A1_RX3_SPDIF_IN) (type BiDi))
(pin (num 38) (name 16_A2_RX4_SCL1) (type BiDi))
(pin (num 39) (name 17_A3_TX4_SDA1) (type BiDi))
(pin (num 40) (name 18_A4_SDA) (type BiDi))
(pin (num 41) (name 19_A5_SCL) (type BiDi))
(pin (num 42) (name 20_A6_TX5_LRCLK1) (type BiDi))
(pin (num 43) (name 21_A7_RX5_BCLK1) (type BiDi))
(pin (num 44) (name 22_A8_CTX1) (type BiDi))
(pin (num 45) (name 23_A9_CRX1_MCLK1) (type BiDi))
(pin (num 46) (name 3V3) (type output))
(pin (num 47) (name GND) (type output))
(pin (num 48) (name VIN) (type power_in)))))
(libraries
(library (logical 65xx)
(uri Z:/Ted/projs/MCL65/PCB_MCL65+/65xx.lib))
(library (logical 74xx)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/74xx.lib"))
(library (logical teensy)
(uri Z:/Ted/projs/MCL65/PCB_MCL65+/teensy.lib)))
(nets
(net (code 1) (name 6502_D5)
(node (ref U1) (pin 28))
(node (ref U3) (pin 7))
(node (ref U4) (pin 17)))
(net (code 2) (name 6502_D4)
(node (ref U1) (pin 29))
(node (ref U3) (pin 6))
(node (ref U4) (pin 16)))
(net (code 3) (name 6502_D3)
(node (ref U4) (pin 15))
(node (ref U3) (pin 5))
(node (ref U1) (pin 30)))
(net (code 4) (name 6502_D2)
(node (ref U1) (pin 31))
(node (ref U4) (pin 14))
(node (ref U3) (pin 4)))
(net (code 5) (name 6502_D1)
(node (ref U3) (pin 3))
(node (ref U4) (pin 13))
(node (ref U1) (pin 32)))
(net (code 6) (name 6502_D0)
(node (ref U3) (pin 2))
(node (ref U1) (pin 33))
(node (ref U4) (pin 12)))
(net (code 7) (name TEENSY_DATAIN0)
(node (ref U3) (pin 19))
(node (ref U5) (pin 36)))
(net (code 8) (name TEENSY_DATAOUT2)
(node (ref U5) (pin 8))
(node (ref U4) (pin 4)))
(net (code 9) (name TEENSY_DATAOUT3)
(node (ref U5) (pin 9))
(node (ref U4) (pin 5)))
(net (code 10) (name TEENSY_DATAOUT4)
(node (ref U5) (pin 10))
(node (ref U4) (pin 6)))
(net (code 11) (name TEENSY_DATAOUT5)
(node (ref U4) (pin 7))
(node (ref U5) (pin 11)))
(net (code 12) (name TEENSY_DATAOUT6)
(node (ref U5) (pin 12))
(node (ref U4) (pin 8)))
(net (code 13) (name TEENSY_DATAOUT7)
(node (ref U5) (pin 13))
(node (ref U4) (pin 9)))
(net (code 14) (name TEENSY_DATAIN7)
(node (ref U3) (pin 12))
(node (ref U5) (pin 43)))
(net (code 15) (name TEENSY_DATAIN6)
(node (ref U5) (pin 42))
(node (ref U3) (pin 13)))
(net (code 16) (name TEENSY_DATAIN5)
(node (ref U5) (pin 41))
(node (ref U3) (pin 14)))
(net (code 17) (name TEENSY_DATAIN4)
(node (ref U3) (pin 15))
(node (ref U5) (pin 40)))
(net (code 18) (name TEENSY_DATAIN3)
(node (ref U5) (pin 39))
(node (ref U3) (pin 16)))
(net (code 19) (name TEENSY_DATAIN2)
(node (ref U5) (pin 38))
(node (ref U3) (pin 17)))
(net (code 20) (name TEENSY_DATAIN1)
(node (ref U3) (pin 18))
(node (ref U5) (pin 37)))
(net (code 21) (name 6502_D7)
(node (ref U4) (pin 19))
(node (ref U1) (pin 26))
(node (ref U3) (pin 9)))
(net (code 22) (name 6502_D6)
(node (ref U1) (pin 27))
(node (ref U4) (pin 18))
(node (ref U3) (pin 8)))
(net (code 23) (name +3V3)
(node (ref U4) (pin 20))
(node (ref U3) (pin 20))
(node (ref U4) (pin 11))
(node (ref U5) (pin 46))
(node (ref U5) (pin 15))
(node (ref U2) (pin 14)))
(net (code 24) (name GND)
(node (ref U1) (pin 1))
(node (ref U5) (pin 47))
(node (ref U1) (pin 21))
(node (ref U2) (pin 7))
(node (ref U5) (pin 1))
(node (ref U3) (pin 10))
(node (ref U5) (pin 34))
(node (ref U4) (pin 10))
(node (ref U3) (pin 1)))
(net (code 25) (name 6502_A13)
(node (ref U1) (pin 23))
(node (ref U5) (pin 4)))
(net (code 26) (name 6502_A12)
(node (ref U5) (pin 3))
(node (ref U1) (pin 22)))
(net (code 27) (name TEENSY_DATAOUT_OE_n)
(node (ref U4) (pin 1)))
(net (code 28) (name TEENSY_DATAOUT1)
(node (ref U5) (pin 7))
(node (ref U4) (pin 3)))
(net (code 29) (name +5V)
(node (ref U1) (pin 8))
(node (ref U5) (pin 48)))
(net (code 30) (name TEENSY_IRQ_n)
(node (ref U2) (pin 10)))
(net (code 31) (name 6502_IRQ_n)
(node (ref U2) (pin 11))
(node (ref U1) (pin 4)))
(net (code 32) (name 6502_READY)
(node (ref U1) (pin 2))
(node (ref U2) (pin 13)))
(net (code 33) (name TEENSY_READY)
(node (ref U2) (pin 12)))
(net (code 34) (name 6502_NMI_n)
(node (ref U2) (pin 3))
(node (ref U1) (pin 6)))
(net (code 35) (name 6502_CLK2)
(node (ref U5) (pin 44))
(node (ref U1) (pin 39))
(node (ref U2) (pin 8))
(node (ref U3) (pin 11)))
(net (code 36) (name TEENSY_RESET_n)
(node (ref U2) (pin 2)))
(net (code 37) (name 6502_RESET_n)
(node (ref U1) (pin 40))
(node (ref U2) (pin 1)))
(net (code 38) (name TEENSY_NMI_n)
(node (ref U2) (pin 4)))
(net (code 39) (name TEENSY_CLK1)
(node (ref U2) (pin 6))
(node (ref U2) (pin 9)))
(net (code 40) (name 6502_CLK0)
(node (ref U2) (pin 5))
(node (ref U1) (pin 37)))
(net (code 41) (name 6502_A14)
(node (ref U1) (pin 24))
(node (ref U5) (pin 45)))
(net (code 42) (name 6502_A8)
(node (ref U1) (pin 17)))
(net (code 43) (name 6502_A9)
(node (ref U1) (pin 18)))
(net (code 44) (name 6502_A10)
(node (ref U1) (pin 19)))
(net (code 45) (name 6502_A11)
(node (ref U5) (pin 2))
(node (ref U1) (pin 20)))
(net (code 46) (name 6502_A15)
(node (ref U5) (pin 5))
(node (ref U1) (pin 25)))
(net (code 47) (name TEENSY_DATAOUT0)
(node (ref U5) (pin 6))
(node (ref U4) (pin 2)))
(net (code 48) (name 6502_A3)
(node (ref U1) (pin 12)))
(net (code 49) (name 6502_WR_n)
(node (ref U1) (pin 34))
(node (ref U5) (pin 14)))
(net (code 50) (name 6502_A1)
(node (ref U1) (pin 10)))
(net (code 51) (name 6502_A5)
(node (ref U1) (pin 14)))
(net (code 52) (name 6502_A0)
(node (ref U1) (pin 9)))
(net (code 53) (name 6502_A2)
(node (ref U1) (pin 11)))
(net (code 54) (name 6502_A4)
(node (ref U1) (pin 13)))
(net (code 55) (name 6502_A6)
(node (ref U1) (pin 15)))
(net (code 56) (name 6502_A7)
(node (ref U1) (pin 16)))
(net (code 57) (name "Net-(U1-Pad38)")
(node (ref U1) (pin 38)))
(net (code 58) (name "Net-(U1-Pad36)")
(node (ref U1) (pin 36)))
(net (code 59) (name "Net-(U1-Pad35)")
(node (ref U1) (pin 35)))
(net (code 60) (name 6502_CLK1)
(node (ref U1) (pin 3)))
(net (code 61) (name 6502_SYNC)
(node (ref U1) (pin 7)))
(net (code 62) (name "Net-(U5-Pad25)")
(node (ref U5) (pin 25)))
(net (code 63) (name "Net-(U5-Pad24)")
(node (ref U5) (pin 24)))
(net (code 64) (name "Net-(U5-Pad23)")
(node (ref U5) (pin 23)))
(net (code 65) (name "Net-(U5-Pad22)")
(node (ref U5) (pin 22)))
(net (code 66) (name "Net-(U5-Pad21)")
(node (ref U5) (pin 21)))
(net (code 67) (name "Net-(U5-Pad20)")
(node (ref U5) (pin 20)))
(net (code 68) (name "Net-(U5-Pad19)")
(node (ref U5) (pin 19)))
(net (code 69) (name "Net-(U5-Pad18)")
(node (ref U5) (pin 18)))
(net (code 70) (name "Net-(U5-Pad17)")
(node (ref U5) (pin 17)))
(net (code 71) (name "Net-(U5-Pad16)")
(node (ref U5) (pin 16)))
(net (code 72) (name "Net-(U5-Pad26)")
(node (ref U5) (pin 26)))
(net (code 73) (name "Net-(U5-Pad35)")
(node (ref U5) (pin 35)))
(net (code 74) (name "Net-(U5-Pad33)")
(node (ref U5) (pin 33)))
(net (code 75) (name "Net-(U5-Pad32)")
(node (ref U5) (pin 32)))
(net (code 76) (name "Net-(U5-Pad31)")
(node (ref U5) (pin 31)))
(net (code 77) (name "Net-(U5-Pad30)")
(node (ref U5) (pin 30)))
(net (code 78) (name "Net-(U5-Pad29)")
(node (ref U5) (pin 29)))
(net (code 79) (name "Net-(U5-Pad28)")
(node (ref U5) (pin 28)))
(net (code 80) (name "Net-(U5-Pad27)")
(node (ref U5) (pin 27)))
(net (code 81) (name "Net-(U1-Pad5)")
(node (ref U1) (pin 5)))))

BIN
MCL65+/PCBA/MCL65+.pdf Normal file
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248
MCL65+/PCBA/MCL65+.pro Normal file
View File

@ -0,0 +1,248 @@
update=1/6/2021 8:06:07 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=MCL65+.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=Top.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=Bottom.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
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NetFmtName=Pcbnew
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LabSize=50
ERC_TestSimilarLabels=1

887
MCL65+/PCBA/MCL65+.sch Normal file
View File

@ -0,0 +1,887 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
Sheet 1 1
Title "MCL65+"
Date ""
Rev ""
Comp "Ted Fried, MicroCore Labs"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Wire Wire Line
2850 3300 2850 3550
$Comp
L power:+5V #PWR01
U 1 1 5FE54780
P 2850 3300
F 0 "#PWR01" H 2850 3150 50 0001 C CNN
F 1 "+5V" H 2865 3473 50 0000 C CNN
F 2 "" H 2850 3300 50 0001 C CNN
F 3 "" H 2850 3300 50 0001 C CNN
1 2850 3300
1 0 0 -1
$EndComp
Wire Wire Line
2850 6750 2850 6900
Connection ~ 2850 6750
Wire Wire Line
2750 6750 2850 6750
Wire Wire Line
2750 6650 2750 6750
Wire Wire Line
2850 6650 2850 6750
$Comp
L power:GND #PWR02
U 1 1 5FE527DB
P 2850 6900
F 0 "#PWR02" H 2850 6650 50 0001 C CNN
F 1 "GND" H 2855 6727 50 0000 C CNN
F 2 "" H 2850 6900 50 0001 C CNN
F 3 "" H 2850 6900 50 0001 C CNN
1 2850 6900
1 0 0 -1
$EndComp
Text GLabel 1850 5800 0 50 Input ~ 0
6502_SYNC
Wire Wire Line
1850 5800 2250 5800
Text GLabel 1850 3900 0 50 Output ~ 0
6502_RESET_n
Wire Wire Line
1850 3900 2250 3900
Text GLabel 1850 5400 0 50 Output ~ 0
6502_READY
Wire Wire Line
1850 5400 2250 5400
Text GLabel 1850 5100 0 50 Input ~ 0
6502_WR_n
Wire Wire Line
1850 5100 2250 5100
Text GLabel 1850 4800 0 50 Output ~ 0
6502_NMI_n
Wire Wire Line
1850 4800 2250 4800
Text GLabel 1850 4700 0 50 Output ~ 0
6502_IRQ_n
Wire Wire Line
1850 4700 2250 4700
Text GLabel 1850 4400 0 50 Input ~ 0
TEENSY_CLK2
Wire Wire Line
1850 4400 2250 4400
Text GLabel 1850 4300 0 50 Input ~ 0
TEENSY_CLK1
Wire Wire Line
1850 4300 2250 4300
Text GLabel 1850 4200 0 50 Output ~ 0
6502_CLK0
Wire Wire Line
1850 4200 2250 4200
Text GLabel 3850 5400 2 50 Input ~ 0
6502_A15
Text GLabel 3850 5300 2 50 Input ~ 0
6502_A14
Text GLabel 3850 5200 2 50 Input ~ 0
6502_A13
Text GLabel 3850 5100 2 50 Input ~ 0
6502_A12
Text GLabel 3850 5000 2 50 Input ~ 0
6502_A11
Text GLabel 3850 4900 2 50 Input ~ 0
6502_A10
Text GLabel 3850 4800 2 50 Input ~ 0
6502_A9
Text GLabel 3850 4700 2 50 Input ~ 0
6502_A8
Text GLabel 3850 4600 2 50 Input ~ 0
6502_A7
Text GLabel 3850 4500 2 50 Input ~ 0
6502_A6
Text GLabel 3850 4400 2 50 Input ~ 0
6502_A5
Text GLabel 3850 4300 2 50 Input ~ 0
6502_A4
Text GLabel 3850 4200 2 50 Input ~ 0
6502_A3
Text GLabel 3850 4100 2 50 Input ~ 0
6502_A2
Text GLabel 3850 4000 2 50 Input ~ 0
6502_A1
Wire Wire Line
3850 4600 3450 4600
Wire Wire Line
3850 4500 3450 4500
Wire Wire Line
3850 4400 3450 4400
Wire Wire Line
3850 4300 3450 4300
Wire Wire Line
3850 4200 3450 4200
Wire Wire Line
3850 4100 3450 4100
Wire Wire Line
3850 4000 3450 4000
Text GLabel 3850 3900 2 50 Input ~ 0
6502_A0
Wire Wire Line
3850 3900 3450 3900
Wire Wire Line
3850 5400 3450 5400
Wire Wire Line
3850 5300 3450 5300
Wire Wire Line
3850 5200 3450 5200
Wire Wire Line
3850 5100 3450 5100
Wire Wire Line
3850 5000 3450 5000
Wire Wire Line
3850 4900 3450 4900
Wire Wire Line
3850 4800 3450 4800
Wire Wire Line
3850 4700 3450 4700
Text GLabel 3850 6300 2 50 BiDi ~ 0
6502_D7
Wire Wire Line
3850 6300 3450 6300
Text GLabel 3850 6200 2 50 BiDi ~ 0
6502_D6
Wire Wire Line
3850 6200 3450 6200
Text GLabel 3850 6100 2 50 BiDi ~ 0
6502_D5
Wire Wire Line
3850 6100 3450 6100
Text GLabel 3850 6000 2 50 BiDi ~ 0
6502_D4
Wire Wire Line
3850 6000 3450 6000
Text GLabel 3850 5900 2 50 BiDi ~ 0
6502_D3
Wire Wire Line
3850 5900 3450 5900
Text GLabel 3850 5800 2 50 BiDi ~ 0
6502_D2
Wire Wire Line
3850 5800 3450 5800
Text GLabel 3850 5700 2 50 BiDi ~ 0
6502_D1
Wire Wire Line
3850 5700 3450 5700
Text GLabel 3850 5600 2 50 BiDi ~ 0
6502_D0
Wire Wire Line
3850 5600 3450 5600
$Comp
L 65xx:6502 U1
U 1 1 5FE26151
P 2850 5100
F 0 "U1" H 2456 6831 50 0000 C CNN
F 1 "6502" H 2457 6740 50 0000 C CIB
F 2 "Package_DIP:DIP-40_W15.24mm" H 2850 7100 50 0001 C CNN
F 3 "http://www.6502.org/documents/datasheets/mos/mos_6500_mpu_mar_1980.pdf" H 2850 7000 50 0001 C CNN
1 2850 5100
1 0 0 -1
$EndComp
Wire Wire Line
8850 2750 8450 2750
Wire Wire Line
8850 2650 8450 2650
Wire Wire Line
8850 2550 8450 2550
Wire Wire Line
8850 2450 8450 2450
Wire Wire Line
8850 2350 8450 2350
Wire Wire Line
8850 2250 8450 2250
Wire Wire Line
8850 2150 8450 2150
Text GLabel 8850 2050 2 50 Output ~ 0
TEENSY_DATAIN0
Wire Wire Line
8850 2050 8450 2050
Text GLabel 8850 2150 2 50 Output ~ 0
TEENSY_DATAIN1
Text GLabel 8850 2250 2 50 Output ~ 0
TEENSY_DATAIN2
Text GLabel 8850 2350 2 50 Output ~ 0
TEENSY_DATAIN3
Text GLabel 8850 2450 2 50 Output ~ 0
TEENSY_DATAIN4
Text GLabel 8850 2550 2 50 Output ~ 0
TEENSY_DATAIN5
Text GLabel 8850 2650 2 50 Output ~ 0
TEENSY_DATAIN6
Text GLabel 8850 2750 2 50 Output ~ 0
TEENSY_DATAIN7
Wire Wire Line
7950 3350 7950 3500
$Comp
L power:GND #PWR06
U 1 1 5FE8FB44
P 7950 3500
F 0 "#PWR06" H 7950 3250 50 0001 C CNN
F 1 "GND" H 7955 3327 50 0000 C CNN
F 2 "" H 7950 3500 50 0001 C CNN
F 3 "" H 7950 3500 50 0001 C CNN
1 7950 3500
1 0 0 -1
$EndComp
Wire Wire Line
7950 1550 7950 1750
$Comp
L power:GND #PWR04
U 1 1 5FE95529
P 7350 3250
F 0 "#PWR04" H 7350 3000 50 0001 C CNN
F 1 "GND" H 7355 3077 50 0000 C CNN
F 2 "" H 7350 3250 50 0001 C CNN
F 3 "" H 7350 3250 50 0001 C CNN
1 7350 3250
1 0 0 -1
$EndComp
Wire Wire Line
7450 3050 7350 3050
Wire Wire Line
7350 3050 7350 3250
Wire Wire Line
7950 4550 7950 4750
$Comp
L power:+3.3V #PWR07
U 1 1 5FEA1051
P 7950 4550
F 0 "#PWR07" H 7950 4400 50 0001 C CNN
F 1 "+3.3V" H 7965 4723 50 0000 C CNN
F 2 "" H 7950 4550 50 0001 C CNN
F 3 "" H 7950 4550 50 0001 C CNN
1 7950 4550
-1 0 0 -1
$EndComp
$Comp
L power:GND #PWR08
U 1 1 5FEA104B
P 7950 6500
F 0 "#PWR08" H 7950 6250 50 0001 C CNN
F 1 "GND" H 7955 6327 50 0000 C CNN
F 2 "" H 7950 6500 50 0001 C CNN
F 3 "" H 7950 6500 50 0001 C CNN
1 7950 6500
-1 0 0 -1
$EndComp
Wire Wire Line
7950 6350 7950 6500
Text GLabel 8850 5750 2 50 Input ~ 0
TEENSY_DATAOUT0
Text GLabel 8850 5650 2 50 Input ~ 0
TEENSY_DATAOUT1
Text GLabel 8850 5550 2 50 Input ~ 0
TEENSY_DATAOUT2
Text GLabel 8850 5450 2 50 Input ~ 0
TEENSY_DATAOUT3
Text GLabel 8850 5350 2 50 Input ~ 0
TEENSY_DATAOUT4
Text GLabel 8850 5250 2 50 Input ~ 0
TEENSY_DATAOUT5
Text GLabel 8850 5150 2 50 Input ~ 0
TEENSY_DATAOUT6
Wire Wire Line
8850 5050 8450 5050
Text GLabel 8850 5050 2 50 Input ~ 0
TEENSY_DATAOUT7
Wire Wire Line
8850 5150 8450 5150
Wire Wire Line
8850 5250 8450 5250
Wire Wire Line
8850 5350 8450 5350
Wire Wire Line
8850 5450 8450 5450
Wire Wire Line
8850 5550 8450 5550
Wire Wire Line
8850 5650 8450 5650
Wire Wire Line
8850 5750 8450 5750
$Comp
L power:+3.3V #PWR010
U 1 1 5FEB9904
P 9950 5700
F 0 "#PWR010" H 9950 5550 50 0001 C CNN
F 1 "+3.3V" H 9965 5873 50 0000 C CNN
F 2 "" H 9950 5700 50 0001 C CNN
F 3 "" H 9950 5700 50 0001 C CNN
1 9950 5700
-1 0 0 -1
$EndComp
Wire Wire Line
8450 5950 9950 5950
Wire Wire Line
9950 5700 9950 5950
Text GLabel 8850 6050 2 50 Input ~ 0
TEENSY_DATAOUT_OE_n
Wire Wire Line
8850 6050 8450 6050
$Comp
L power:+3.3V #PWR05
U 1 1 5FE9272D
P 7950 1550
F 0 "#PWR05" H 7950 1400 50 0001 C CNN
F 1 "+3.3V" H 7965 1723 50 0000 C CNN
F 2 "" H 7950 1550 50 0001 C CNN
F 3 "" H 7950 1550 50 0001 C CNN
1 7950 1550
1 0 0 -1
$EndComp
Wire Wire Line
7050 2950 7450 2950
Text GLabel 7050 2950 0 50 Input ~ 0
6502_CLK0
Text GLabel 10150 9100 2 50 Output ~ 0
TEENSY_CLK2
$Comp
L power:GND #PWR09
U 1 1 5FF3D5BF
P 8800 10000
F 0 "#PWR09" H 8800 9750 50 0001 C CNN
F 1 "GND" H 8805 9827 50 0000 C CNN
F 2 "" H 8800 10000 50 0001 C CNN
F 3 "" H 8800 10000 50 0001 C CNN
1 8800 10000
1 0 0 -1
$EndComp
Wire Wire Line
8800 10000 8800 9900
Wire Wire Line
8800 9900 8650 9900
$Comp
L power:+3.3V #PWR03
U 1 1 5FF4CA3D
P 7400 9800
F 0 "#PWR03" H 7400 9650 50 0001 C CNN
F 1 "+3.3V" H 7415 9973 50 0000 C CNN
F 2 "" H 7400 9800 50 0001 C CNN
F 3 "" H 7400 9800 50 0001 C CNN
1 7400 9800
-1 0 0 -1
$EndComp
Wire Wire Line
7650 9900 7400 9900
Wire Wire Line
7400 9900 7400 9800
Wire Wire Line
7050 2050 7450 2050
Text GLabel 7050 2050 0 50 Input ~ 0
6502_D0
Wire Wire Line
7050 2150 7450 2150
Text GLabel 7050 2150 0 50 Input ~ 0
6502_D1
Wire Wire Line
7050 2250 7450 2250
Text GLabel 7050 2250 0 50 Input ~ 0
6502_D2
Wire Wire Line
7050 2350 7450 2350
Text GLabel 7050 2350 0 50 Input ~ 0
6502_D3
Wire Wire Line
7050 2450 7450 2450
Text GLabel 7050 2450 0 50 Input ~ 0
6502_D4
Wire Wire Line
7050 2550 7450 2550
Text GLabel 7050 2550 0 50 Input ~ 0
6502_D5
Wire Wire Line
7050 2650 7450 2650
Text GLabel 7050 2650 0 50 Input ~ 0
6502_D6
Wire Wire Line
7050 2750 7450 2750
Text GLabel 7050 2750 0 50 Input ~ 0
6502_D7
$Comp
L 74xx:74LS573 U3
U 1 1 60039FDC
P 7950 2550
F 0 "U3" H 7556 3531 50 0000 C CNN
F 1 "74LS573" H 7556 3440 50 0000 C CNN
F 2 "Package_DIP:DIP-20_W7.62mm_Socket" H 7950 2550 50 0001 C CNN
F 3 "74xx/74hc573.pdf" H 7950 2550 50 0001 C CNN
1 7950 2550
1 0 0 -1
$EndComp
$Comp
L 74xx:74LS573 U4
U 1 1 60045BF1
P 7950 5550
F 0 "U4" H 8344 6531 50 0000 C CNN
F 1 "74LS573" H 8344 6440 50 0000 C CNN
F 2 "Package_DIP:DIP-20_W7.62mm_Socket" H 7950 5550 50 0001 C CNN
F 3 "74xx/74hc573.pdf" H 7950 5550 50 0001 C CNN
1 7950 5550
-1 0 0 -1
$EndComp
Wire Wire Line
7050 5750 7450 5750
Text GLabel 7050 5750 0 50 Input ~ 0
6502_D0
Wire Wire Line
7050 5650 7450 5650
Text GLabel 7050 5650 0 50 Input ~ 0
6502_D1
Wire Wire Line
7050 5550 7450 5550
Text GLabel 7050 5550 0 50 Input ~ 0
6502_D2
Wire Wire Line
7050 5450 7450 5450
Text GLabel 7050 5450 0 50 Input ~ 0
6502_D3
Wire Wire Line
7050 5350 7450 5350
Text GLabel 7050 5350 0 50 Input ~ 0
6502_D4
Wire Wire Line
7050 5250 7450 5250
Text GLabel 7050 5250 0 50 Input ~ 0
6502_D5
Wire Wire Line
7050 5150 7450 5150
Text GLabel 7050 5150 0 50 Input ~ 0
6502_D6
Wire Wire Line
7050 5050 7450 5050
Text GLabel 7050 5050 0 50 Input ~ 0
6502_D7
Wire Wire Line
14950 4400 14550 4400
Wire Wire Line
14950 4500 14550 4500
Wire Wire Line
14950 4600 14550 4600
Wire Wire Line
14950 4700 14550 4700
Wire Wire Line
14950 4800 14550 4800
Wire Wire Line
14950 4900 14550 4900
Wire Wire Line
14950 5000 14550 5000
Text GLabel 14950 5100 2 50 Input ~ 0
TEENSY_DATAIN0
Wire Wire Line
14950 5100 14550 5100
Text GLabel 14950 5000 2 50 Input ~ 0
TEENSY_DATAIN1
Text GLabel 14950 4900 2 50 Input ~ 0
TEENSY_DATAIN2
Text GLabel 14950 4800 2 50 Input ~ 0
TEENSY_DATAIN3
Text GLabel 14950 4700 2 50 Input ~ 0
TEENSY_DATAIN4
Text GLabel 14950 4600 2 50 Input ~ 0
TEENSY_DATAIN5
Text GLabel 14950 4500 2 50 Input ~ 0
TEENSY_DATAIN6
Text GLabel 14950 4400 2 50 Input ~ 0
TEENSY_DATAIN7
Text GLabel 11950 5000 0 50 Input ~ 0
TEENSY_DATAOUT1
Text GLabel 11950 4900 0 50 Input ~ 0
TEENSY_DATAOUT2
Text GLabel 11950 4800 0 50 Input ~ 0
TEENSY_DATAOUT3
Text GLabel 11950 4700 0 50 Input ~ 0
TEENSY_DATAOUT4
Text GLabel 11950 4600 0 50 Input ~ 0
TEENSY_DATAOUT5
Text GLabel 11950 4500 0 50 Input ~ 0
TEENSY_DATAOUT6
Wire Wire Line
11950 4400 12350 4400
Text GLabel 11950 4400 0 50 Input ~ 0
TEENSY_DATAOUT7
Wire Wire Line
11950 4500 12350 4500
Wire Wire Line
11950 4600 12350 4600
Wire Wire Line
11950 4700 12350 4700
Wire Wire Line
11950 4800 12350 4800
Wire Wire Line
11950 4900 12350 4900
Wire Wire Line
11950 5000 12350 5000
Wire Wire Line
11950 5100 12350 5100
Wire Wire Line
11950 5400 12350 5400
Text GLabel 11950 5400 0 50 Input ~ 0
TEENSY_CLK1
Text GLabel 14950 4200 2 50 Input ~ 0
6502_A15
Text GLabel 11950 4200 0 50 Input ~ 0
6502_A14
Text GLabel 11950 4000 0 50 Input ~ 0
6502_A13
Text GLabel 11950 4100 0 50 Input ~ 0
6502_A12
Wire Wire Line
14950 4200 14550 4200
Wire Wire Line
11950 4200 12350 4200
Wire Wire Line
11950 4000 12350 4000
Wire Wire Line
11950 4100 12350 4100
Text GLabel 14950 6200 2 50 Input ~ 0
6502_A11
Text GLabel 11950 6200 0 50 Input ~ 0
6502_A10
Text GLabel 14950 6100 2 50 Input ~ 0
6502_A9
Text GLabel 11950 6100 0 50 Input ~ 0
6502_A8
Wire Wire Line
11950 6200 12350 6200
Wire Wire Line
14950 6100 14550 6100
Wire Wire Line
11950 6100 12350 6100
Wire Wire Line
14950 6200 14550 6200
Text GLabel 14950 6000 2 50 Input ~ 0
6502_A7
Wire Wire Line
14950 6000 14550 6000
Text GLabel 11950 6000 0 50 Input ~ 0
6502_A6
Wire Wire Line
11950 6000 12350 6000
Text GLabel 11950 5900 0 50 Input ~ 0
6502_A4
Wire Wire Line
11950 5900 12350 5900
Text GLabel 11950 5800 0 50 Input ~ 0
6502_A2
Wire Wire Line
11950 5800 12350 5800
Text GLabel 11950 5700 0 50 Input ~ 0
6502_A0
Wire Wire Line
11950 5700 12350 5700
Text GLabel 14950 5900 2 50 Input ~ 0
6502_A5
Wire Wire Line
14950 5900 14550 5900
Text GLabel 14950 5800 2 50 Input ~ 0
6502_A3
Wire Wire Line
14950 5800 14550 5800
Text GLabel 14950 5700 2 50 Input ~ 0
6502_A1
Wire Wire Line
14950 5700 14550 5700
Text GLabel 11950 5200 0 50 Input ~ 0
6502_WR_n
Wire Wire Line
11950 5200 12350 5200
$Comp
L power:+3.3V #PWR0101
U 1 1 601E017C
P 10850 5050
F 0 "#PWR0101" H 10850 4900 50 0001 C CNN
F 1 "+3.3V" H 10865 5223 50 0000 C CNN
F 2 "" H 10850 5050 50 0001 C CNN
F 3 "" H 10850 5050 50 0001 C CNN
1 10850 5050
1 0 0 -1
$EndComp
Wire Wire Line
12350 5300 10850 5300
Wire Wire Line
10850 5050 10850 5300
$Comp
L power:GND #PWR0102
U 1 1 601EDC26
P 15650 5550
F 0 "#PWR0102" H 15650 5300 50 0001 C CNN
F 1 "GND" H 15655 5377 50 0000 C CNN
F 2 "" H 15650 5550 50 0001 C CNN
F 3 "" H 15650 5550 50 0001 C CNN
1 15650 5550
-1 0 0 -1
$EndComp
Wire Wire Line
14550 5300 15650 5300
Wire Wire Line
15650 5300 15650 5550
$Comp
L power:GND #PWR0103
U 1 1 601FABF9
P 10950 4150
F 0 "#PWR0103" H 10950 3900 50 0001 C CNN
F 1 "GND" H 10955 3977 50 0000 C CNN
F 2 "" H 10950 4150 50 0001 C CNN
F 3 "" H 10950 4150 50 0001 C CNN
1 10950 4150
1 0 0 -1
$EndComp
Wire Wire Line
10950 3900 10950 4150
Wire Wire Line
10950 3900 12350 3900
Wire Wire Line
15650 4000 15650 3750
Wire Wire Line
14550 4000 15650 4000
$Comp
L power:GND #PWR0104
U 1 1 60224C47
P 15650 3750
F 0 "#PWR0104" H 15650 3500 50 0001 C CNN
F 1 "GND" H 15655 3577 50 0000 C CNN
F 2 "" H 15650 3750 50 0001 C CNN
F 3 "" H 15650 3750 50 0001 C CNN
1 15650 3750
-1 0 0 1
$EndComp
$Comp
L power:+3.3V #PWR0105
U 1 1 6023A115
P 16050 3850
F 0 "#PWR0105" H 16050 3700 50 0001 C CNN
F 1 "+3.3V" H 16065 4023 50 0000 C CNN
F 2 "" H 16050 3850 50 0001 C CNN
F 3 "" H 16050 3850 50 0001 C CNN
1 16050 3850
-1 0 0 -1
$EndComp
Wire Wire Line
14550 4100 16050 4100
Wire Wire Line
16050 3850 16050 4100
Wire Wire Line
14950 3650 14950 3900
$Comp
L power:+5V #PWR0106
U 1 1 60247EDA
P 14950 3650
F 0 "#PWR0106" H 14950 3500 50 0001 C CNN
F 1 "+5V" H 14965 3823 50 0000 C CNN
F 2 "" H 14950 3650 50 0001 C CNN
F 3 "" H 14950 3650 50 0001 C CNN
1 14950 3650
1 0 0 -1
$EndComp
Wire Wire Line
14550 3900 14950 3900
Wire Wire Line
10150 7800 9750 7800
Text GLabel 8750 7800 0 50 Input ~ 0
6502_READY
Wire Wire Line
8750 7800 9150 7800
Wire Wire Line
8750 8500 9150 8500
Text GLabel 8750 8500 0 50 Input ~ 0
6502_IRQ_n
Text GLabel 10150 8500 2 50 Output ~ 0
TEENSY_IRQ
Wire Wire Line
10150 8500 9750 8500
Text GLabel 7300 7800 2 50 Output ~ 0
TEENSY_CLK1
Text GLabel 7300 8450 2 50 Output ~ 0
TEENSY_NMI
$Comp
L 74xx:74HC14 U2
U 5 1 5FF03D77
P 9450 8500
F 0 "U2" H 9450 8817 50 0000 C CNN
F 1 "74HC14" H 9450 8726 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 9450 8500 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 9450 8500 50 0001 C CNN
5 9450 8500
1 0 0 -1
$EndComp
$Comp
L 74xx:74HC14 U2
U 7 1 5FF0F320
P 8150 9900
F 0 "U2" V 8400 9650 50 0000 L CNN
F 1 "74HC14" V 8400 9900 50 0000 L CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 8150 9900 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 8150 9900 50 0001 C CNN
7 8150 9900
0 -1 -1 0
$EndComp
$Comp
L 74xx:74HC14 U2
U 6 1 5FF08731
P 9450 9100
F 0 "U2" H 9450 9417 50 0000 C CNN
F 1 "74HC14" H 9450 9326 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 9450 9100 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 9450 9100 50 0001 C CNN
6 9450 9100
1 0 0 -1
$EndComp
Text GLabel 5900 9100 0 50 Input ~ 0
6502_RESET_n
Wire Wire Line
5900 7800 6300 7800
Text GLabel 5900 7800 0 50 Input ~ 0
6502_CLK0
Wire Wire Line
7300 7800 6900 7800
Text GLabel 7300 9100 2 50 Output ~ 0
TEENSY_RESET
Wire Wire Line
7300 8450 6900 8450
Wire Wire Line
7300 9100 6900 9100
Wire Wire Line
5900 8450 6300 8450
Text GLabel 5900 8450 0 50 Input ~ 0
6502_NMI_n
Wire Wire Line
5900 9100 6300 9100
$Comp
L 74xx:74HC14 U2
U 3 1 5FEF370F
P 6600 9100
F 0 "U2" H 6600 9417 50 0000 C CNN
F 1 "74HC14" H 6600 9326 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 6600 9100 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 6600 9100 50 0001 C CNN
3 6600 9100
1 0 0 -1
$EndComp
$Comp
L 74xx:74HC14 U2
U 2 1 5FF0607A
P 6600 8450
F 0 "U2" H 6600 8767 50 0000 C CNN
F 1 "74HC14" H 6600 8676 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 6600 8450 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 6600 8450 50 0001 C CNN
2 6600 8450
1 0 0 -1
$EndComp
$Comp
L 74xx:74HC14 U2
U 1 1 5FF0A9D7
P 6600 7800
F 0 "U2" H 6600 8117 50 0000 C CNN
F 1 "74HC14" H 6600 8026 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 6600 7800 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 6600 7800 50 0001 C CNN
1 6600 7800
1 0 0 -1
$EndComp
Wire Wire Line
10150 9100 9750 9100
Wire Wire Line
8750 9100 9150 9100
Text GLabel 8750 9100 0 50 Input ~ 0
TEENSY_CLK1
$Comp
L 74xx:74HC14 U2
U 4 1 5FF0CE1C
P 9450 7800
F 0 "U2" H 9450 8117 50 0000 C CNN
F 1 "74HC14" H 9450 8026 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 9450 7800 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 9450 7800 50 0001 C CNN
4 9450 7800
1 0 0 -1
$EndComp
Text GLabel 14950 5400 2 50 Output ~ 0
TEENSY_NMI
Wire Wire Line
14950 5400 14550 5400
Text GLabel 14950 5500 2 50 Output ~ 0
TEENSY_RESET
Wire Wire Line
14950 5500 14550 5500
Wire Wire Line
11950 5600 12350 5600
Text GLabel 11950 5600 0 50 Output ~ 0
TEENSY_READY_n
Text GLabel 11950 5500 0 50 Output ~ 0
TEENSY_IRQ
Wire Wire Line
11950 5500 12350 5500
Wire Wire Line
14950 5600 14550 5600
Text GLabel 14950 5600 2 50 Input ~ 0
6502_SYNC
$Comp
L teensy:Teensy4.1 U5
U 1 1 5FE26E42
P 13450 6050
F 0 "U5" H 13450 8615 50 0000 C CNN
F 1 "Teensy4.1" H 13450 8524 50 0000 C CNN
F 2 "MCL65+:Teensy41" H 13050 6450 50 0001 C CNN
F 3 "" H 13050 6450 50 0001 C CNN
1 13450 6050
1 0 0 -1
$EndComp
Text Notes 1150 1450 0 247 ~ 49
MicroCore Labs MCL65+
Text GLabel 11950 5100 0 50 Input ~ 0
TEENSY_DATAOUT0
Text GLabel 10150 7800 2 50 Output ~ 0
TEENSY_READY_n
Text GLabel 11950 4300 0 50 Input ~ 0
TEENSY_DATAOUT_OE_n
Wire Wire Line
11950 4300 12350 4300
$Comp
L Device:C C1
U 1 1 6087FF8B
P 6800 9900
F 0 "C1" H 6915 9946 50 0000 L CNN
F 1 "10uF" H 6915 9855 50 0000 L CNN
F 2 "Capacitor_THT:C_Disc_D7.0mm_W2.5mm_P5.00mm" H 6838 9750 50 0001 C CNN
F 3 "~" H 6800 9900 50 0001 C CNN
1 6800 9900
1 0 0 -1
$EndComp
$Comp
L power:+3.3V #PWR0107
U 1 1 608885E0
P 6800 9650
F 0 "#PWR0107" H 6800 9500 50 0001 C CNN
F 1 "+3.3V" H 6815 9823 50 0000 C CNN
F 2 "" H 6800 9650 50 0001 C CNN
F 3 "" H 6800 9650 50 0001 C CNN
1 6800 9650
-1 0 0 -1
$EndComp
Wire Wire Line
6800 9750 6800 9650
$Comp
L power:GND #PWR0108
U 1 1 60890310
P 6800 10150
F 0 "#PWR0108" H 6800 9900 50 0001 C CNN
F 1 "GND" H 6805 9977 50 0000 C CNN
F 2 "" H 6800 10150 50 0001 C CNN
F 3 "" H 6800 10150 50 0001 C CNN
1 6800 10150
1 0 0 -1
$EndComp
Wire Wire Line
6800 10150 6800 10050
$EndSCHEMATC

889
MCL65+/PCBA/MCL65+.sch-bak Normal file
View File

@ -0,0 +1,889 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
Sheet 1 1
Title "MCL65+"
Date ""
Rev ""
Comp "Ted Fried, MicroCore Labs"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Wire Wire Line
2850 3300 2850 3550
$Comp
L power:+5V #PWR01
U 1 1 5FE54780
P 2850 3300
F 0 "#PWR01" H 2850 3150 50 0001 C CNN
F 1 "+5V" H 2865 3473 50 0000 C CNN
F 2 "" H 2850 3300 50 0001 C CNN
F 3 "" H 2850 3300 50 0001 C CNN
1 2850 3300
1 0 0 -1
$EndComp
Wire Wire Line
2850 6750 2850 6900
Connection ~ 2850 6750
Wire Wire Line
2750 6750 2850 6750
Wire Wire Line
2750 6650 2750 6750
Wire Wire Line
2850 6650 2850 6750
$Comp
L power:GND #PWR02
U 1 1 5FE527DB
P 2850 6900
F 0 "#PWR02" H 2850 6650 50 0001 C CNN
F 1 "GND" H 2855 6727 50 0000 C CNN
F 2 "" H 2850 6900 50 0001 C CNN
F 3 "" H 2850 6900 50 0001 C CNN
1 2850 6900
1 0 0 -1
$EndComp
Text GLabel 1850 5800 0 50 Input ~ 0
6502_SYNC
Wire Wire Line
1850 5800 2250 5800
Text GLabel 1850 3900 0 50 Output ~ 0
6502_RESET_n
Wire Wire Line
1850 3900 2250 3900
Text GLabel 1850 5400 0 50 Output ~ 0
6502_READY
Wire Wire Line
1850 5400 2250 5400
Text GLabel 1850 5100 0 50 Input ~ 0
6502_WR_n
Wire Wire Line
1850 5100 2250 5100
Text GLabel 1850 4800 0 50 Output ~ 0
6502_NMI_n
Wire Wire Line
1850 4800 2250 4800
Text GLabel 1850 4700 0 50 Output ~ 0
6502_IRQ_n
Wire Wire Line
1850 4700 2250 4700
Text GLabel 1850 4400 0 50 Input ~ 0
TEENSY_CLK2
Wire Wire Line
1850 4400 2250 4400
Text GLabel 1850 4300 0 50 Input ~ 0
TEENSY_CLK1
Wire Wire Line
1850 4300 2250 4300
Text GLabel 1850 4200 0 50 Output ~ 0
6502_CLK0
Wire Wire Line
1850 4200 2250 4200
Text GLabel 3850 5400 2 50 Input ~ 0
6502_A15
Text GLabel 3850 5300 2 50 Input ~ 0
6502_A14
Text GLabel 3850 5200 2 50 Input ~ 0
6502_A13
Text GLabel 3850 5100 2 50 Input ~ 0
6502_A12
Text GLabel 3850 5000 2 50 Input ~ 0
6502_A11
Text GLabel 3850 4900 2 50 Input ~ 0
6502_A10
Text GLabel 3850 4800 2 50 Input ~ 0
6502_A9
Text GLabel 3850 4700 2 50 Input ~ 0
6502_A8
Text GLabel 3850 4600 2 50 Input ~ 0
6502_A7
Text GLabel 3850 4500 2 50 Input ~ 0
6502_A6
Text GLabel 3850 4400 2 50 Input ~ 0
6502_A5
Text GLabel 3850 4300 2 50 Input ~ 0
6502_A4
Text GLabel 3850 4200 2 50 Input ~ 0
6502_A3
Text GLabel 3850 4100 2 50 Input ~ 0
6502_A2
Text GLabel 3850 4000 2 50 Input ~ 0
6502_A1
Wire Wire Line
3850 4600 3450 4600
Wire Wire Line
3850 4500 3450 4500
Wire Wire Line
3850 4400 3450 4400
Wire Wire Line
3850 4300 3450 4300
Wire Wire Line
3850 4200 3450 4200
Wire Wire Line
3850 4100 3450 4100
Wire Wire Line
3850 4000 3450 4000
Text GLabel 3850 3900 2 50 Input ~ 0
6502_A0
Wire Wire Line
3850 3900 3450 3900
Wire Wire Line
3850 5400 3450 5400
Wire Wire Line
3850 5300 3450 5300
Wire Wire Line
3850 5200 3450 5200
Wire Wire Line
3850 5100 3450 5100
Wire Wire Line
3850 5000 3450 5000
Wire Wire Line
3850 4900 3450 4900
Wire Wire Line
3850 4800 3450 4800
Wire Wire Line
3850 4700 3450 4700
Text GLabel 3850 6300 2 50 BiDi ~ 0
6502_D7
Wire Wire Line
3850 6300 3450 6300
Text GLabel 3850 6200 2 50 BiDi ~ 0
6502_D6
Wire Wire Line
3850 6200 3450 6200
Text GLabel 3850 6100 2 50 BiDi ~ 0
6502_D5
Wire Wire Line
3850 6100 3450 6100
Text GLabel 3850 6000 2 50 BiDi ~ 0
6502_D4
Wire Wire Line
3850 6000 3450 6000
Text GLabel 3850 5900 2 50 BiDi ~ 0
6502_D3
Wire Wire Line
3850 5900 3450 5900
Text GLabel 3850 5800 2 50 BiDi ~ 0
6502_D2
Wire Wire Line
3850 5800 3450 5800
Text GLabel 3850 5700 2 50 BiDi ~ 0
6502_D1
Wire Wire Line
3850 5700 3450 5700
Text GLabel 3850 5600 2 50 BiDi ~ 0
6502_D0
Wire Wire Line
3850 5600 3450 5600
$Comp
L 65xx:6502 U1
U 1 1 5FE26151
P 2850 5100
F 0 "U1" H 2456 6831 50 0000 C CNN
F 1 "6502" H 2457 6740 50 0000 C CIB
F 2 "Package_DIP:DIP-40_W15.24mm" H 2850 7100 50 0001 C CNN
F 3 "http://www.6502.org/documents/datasheets/mos/mos_6500_mpu_mar_1980.pdf" H 2850 7000 50 0001 C CNN
1 2850 5100
1 0 0 -1
$EndComp
Wire Wire Line
8850 2750 8450 2750
Wire Wire Line
8850 2650 8450 2650
Wire Wire Line
8850 2550 8450 2550
Wire Wire Line
8850 2450 8450 2450
Wire Wire Line
8850 2350 8450 2350
Wire Wire Line
8850 2250 8450 2250
Wire Wire Line
8850 2150 8450 2150
Text GLabel 8850 2050 2 50 Output ~ 0
TEENSY_DATAIN0
Wire Wire Line
8850 2050 8450 2050
Text GLabel 8850 2150 2 50 Output ~ 0
TEENSY_DATAIN1
Text GLabel 8850 2250 2 50 Output ~ 0
TEENSY_DATAIN2
Text GLabel 8850 2350 2 50 Output ~ 0
TEENSY_DATAIN3
Text GLabel 8850 2450 2 50 Output ~ 0
TEENSY_DATAIN4
Text GLabel 8850 2550 2 50 Output ~ 0
TEENSY_DATAIN5
Text GLabel 8850 2650 2 50 Output ~ 0
TEENSY_DATAIN6
Text GLabel 8850 2750 2 50 Output ~ 0
TEENSY_DATAIN7
Wire Wire Line
7950 3350 7950 3500
$Comp
L power:GND #PWR06
U 1 1 5FE8FB44
P 7950 3500
F 0 "#PWR06" H 7950 3250 50 0001 C CNN
F 1 "GND" H 7955 3327 50 0000 C CNN
F 2 "" H 7950 3500 50 0001 C CNN
F 3 "" H 7950 3500 50 0001 C CNN
1 7950 3500
1 0 0 -1
$EndComp
Wire Wire Line
7950 1550 7950 1750
$Comp
L power:GND #PWR04
U 1 1 5FE95529
P 7350 3250
F 0 "#PWR04" H 7350 3000 50 0001 C CNN
F 1 "GND" H 7355 3077 50 0000 C CNN
F 2 "" H 7350 3250 50 0001 C CNN
F 3 "" H 7350 3250 50 0001 C CNN
1 7350 3250
1 0 0 -1
$EndComp
Wire Wire Line
7450 3050 7350 3050
Wire Wire Line
7350 3050 7350 3250
Wire Wire Line
7950 4550 7950 4750
$Comp
L power:+3.3V #PWR07
U 1 1 5FEA1051
P 7950 4550
F 0 "#PWR07" H 7950 4400 50 0001 C CNN
F 1 "+3.3V" H 7965 4723 50 0000 C CNN
F 2 "" H 7950 4550 50 0001 C CNN
F 3 "" H 7950 4550 50 0001 C CNN
1 7950 4550
-1 0 0 -1
$EndComp
$Comp
L power:GND #PWR08
U 1 1 5FEA104B
P 7950 6500
F 0 "#PWR08" H 7950 6250 50 0001 C CNN
F 1 "GND" H 7955 6327 50 0000 C CNN
F 2 "" H 7950 6500 50 0001 C CNN
F 3 "" H 7950 6500 50 0001 C CNN
1 7950 6500
-1 0 0 -1
$EndComp
Wire Wire Line
7950 6350 7950 6500
Text GLabel 8850 5750 2 50 Input ~ 0
TEENSY_DATAOUT0
Text GLabel 8850 5650 2 50 Input ~ 0
TEENSY_DATAOUT1
Text GLabel 8850 5550 2 50 Input ~ 0
TEENSY_DATAOUT2
Text GLabel 8850 5450 2 50 Input ~ 0
TEENSY_DATAOUT3
Text GLabel 8850 5350 2 50 Input ~ 0
TEENSY_DATAOUT4
Text GLabel 8850 5250 2 50 Input ~ 0
TEENSY_DATAOUT5
Text GLabel 8850 5150 2 50 Input ~ 0
TEENSY_DATAOUT6
Wire Wire Line
8850 5050 8450 5050
Text GLabel 8850 5050 2 50 Input ~ 0
TEENSY_DATAOUT7
Wire Wire Line
8850 5150 8450 5150
Wire Wire Line
8850 5250 8450 5250
Wire Wire Line
8850 5350 8450 5350
Wire Wire Line
8850 5450 8450 5450
Wire Wire Line
8850 5550 8450 5550
Wire Wire Line
8850 5650 8450 5650
Wire Wire Line
8850 5750 8450 5750
$Comp
L power:+3.3V #PWR010
U 1 1 5FEB9904
P 9950 5700
F 0 "#PWR010" H 9950 5550 50 0001 C CNN
F 1 "+3.3V" H 9965 5873 50 0000 C CNN
F 2 "" H 9950 5700 50 0001 C CNN
F 3 "" H 9950 5700 50 0001 C CNN
1 9950 5700
-1 0 0 -1
$EndComp
Wire Wire Line
8450 5950 9950 5950
Wire Wire Line
9950 5700 9950 5950
Text GLabel 8850 6050 2 50 Input ~ 0
TEENSY_DATAOUT_OE_n
Wire Wire Line
8850 6050 8450 6050
$Comp
L power:+3.3V #PWR05
U 1 1 5FE9272D
P 7950 1550
F 0 "#PWR05" H 7950 1400 50 0001 C CNN
F 1 "+3.3V" H 7965 1723 50 0000 C CNN
F 2 "" H 7950 1550 50 0001 C CNN
F 3 "" H 7950 1550 50 0001 C CNN
1 7950 1550
1 0 0 -1
$EndComp
Wire Wire Line
7050 2950 7450 2950
Text GLabel 7050 2950 0 50 Input ~ 0
6502_CLK0
Text GLabel 10150 9100 2 50 Output ~ 0
TEENSY_CLK2
$Comp
L power:GND #PWR09
U 1 1 5FF3D5BF
P 8800 10000
F 0 "#PWR09" H 8800 9750 50 0001 C CNN
F 1 "GND" H 8805 9827 50 0000 C CNN
F 2 "" H 8800 10000 50 0001 C CNN
F 3 "" H 8800 10000 50 0001 C CNN
1 8800 10000
1 0 0 -1
$EndComp
Wire Wire Line
8800 10000 8800 9900
Wire Wire Line
8800 9900 8650 9900
$Comp
L power:+3.3V #PWR03
U 1 1 5FF4CA3D
P 7400 9800
F 0 "#PWR03" H 7400 9650 50 0001 C CNN
F 1 "+3.3V" H 7415 9973 50 0000 C CNN
F 2 "" H 7400 9800 50 0001 C CNN
F 3 "" H 7400 9800 50 0001 C CNN
1 7400 9800
-1 0 0 -1
$EndComp
Wire Wire Line
7650 9900 7400 9900
Wire Wire Line
7400 9900 7400 9800
Text Notes 11900 1800 0 207 ~ 0
Bypass caps\ncheck 373 latch polatiry\ncheck clocks in and out
Wire Wire Line
7050 2050 7450 2050
Text GLabel 7050 2050 0 50 Input ~ 0
6502_D0
Wire Wire Line
7050 2150 7450 2150
Text GLabel 7050 2150 0 50 Input ~ 0
6502_D1
Wire Wire Line
7050 2250 7450 2250
Text GLabel 7050 2250 0 50 Input ~ 0
6502_D2
Wire Wire Line
7050 2350 7450 2350
Text GLabel 7050 2350 0 50 Input ~ 0
6502_D3
Wire Wire Line
7050 2450 7450 2450
Text GLabel 7050 2450 0 50 Input ~ 0
6502_D4
Wire Wire Line
7050 2550 7450 2550
Text GLabel 7050 2550 0 50 Input ~ 0
6502_D5
Wire Wire Line
7050 2650 7450 2650
Text GLabel 7050 2650 0 50 Input ~ 0
6502_D6
Wire Wire Line
7050 2750 7450 2750
Text GLabel 7050 2750 0 50 Input ~ 0
6502_D7
$Comp
L 74xx:74LS573 U3
U 1 1 60039FDC
P 7950 2550
F 0 "U3" H 7556 3531 50 0000 C CNN
F 1 "74LS573" H 7556 3440 50 0000 C CNN
F 2 "Package_DIP:DIP-20_W7.62mm_Socket" H 7950 2550 50 0001 C CNN
F 3 "74xx/74hc573.pdf" H 7950 2550 50 0001 C CNN
1 7950 2550
1 0 0 -1
$EndComp
$Comp
L 74xx:74LS573 U4
U 1 1 60045BF1
P 7950 5550
F 0 "U4" H 8344 6531 50 0000 C CNN
F 1 "74LS573" H 8344 6440 50 0000 C CNN
F 2 "Package_DIP:DIP-20_W7.62mm_Socket" H 7950 5550 50 0001 C CNN
F 3 "74xx/74hc573.pdf" H 7950 5550 50 0001 C CNN
1 7950 5550
-1 0 0 -1
$EndComp
Wire Wire Line
7050 5750 7450 5750
Text GLabel 7050 5750 0 50 Input ~ 0
6502_D0
Wire Wire Line
7050 5650 7450 5650
Text GLabel 7050 5650 0 50 Input ~ 0
6502_D1
Wire Wire Line
7050 5550 7450 5550
Text GLabel 7050 5550 0 50 Input ~ 0
6502_D2
Wire Wire Line
7050 5450 7450 5450
Text GLabel 7050 5450 0 50 Input ~ 0
6502_D3
Wire Wire Line
7050 5350 7450 5350
Text GLabel 7050 5350 0 50 Input ~ 0
6502_D4
Wire Wire Line
7050 5250 7450 5250
Text GLabel 7050 5250 0 50 Input ~ 0
6502_D5
Wire Wire Line
7050 5150 7450 5150
Text GLabel 7050 5150 0 50 Input ~ 0
6502_D6
Wire Wire Line
7050 5050 7450 5050
Text GLabel 7050 5050 0 50 Input ~ 0
6502_D7
Wire Wire Line
14950 4400 14550 4400
Wire Wire Line
14950 4500 14550 4500
Wire Wire Line
14950 4600 14550 4600
Wire Wire Line
14950 4700 14550 4700
Wire Wire Line
14950 4800 14550 4800
Wire Wire Line
14950 4900 14550 4900
Wire Wire Line
14950 5000 14550 5000
Text GLabel 14950 5100 2 50 Input ~ 0
TEENSY_DATAIN0
Wire Wire Line
14950 5100 14550 5100
Text GLabel 14950 5000 2 50 Input ~ 0
TEENSY_DATAIN1
Text GLabel 14950 4900 2 50 Input ~ 0
TEENSY_DATAIN2
Text GLabel 14950 4800 2 50 Input ~ 0
TEENSY_DATAIN3
Text GLabel 14950 4700 2 50 Input ~ 0
TEENSY_DATAIN4
Text GLabel 14950 4600 2 50 Input ~ 0
TEENSY_DATAIN5
Text GLabel 14950 4500 2 50 Input ~ 0
TEENSY_DATAIN6
Text GLabel 14950 4400 2 50 Input ~ 0
TEENSY_DATAIN7
Text GLabel 11950 5000 0 50 Input ~ 0
TEENSY_DATAOUT1
Text GLabel 11950 4900 0 50 Input ~ 0
TEENSY_DATAOUT2
Text GLabel 11950 4800 0 50 Input ~ 0
TEENSY_DATAOUT3
Text GLabel 11950 4700 0 50 Input ~ 0
TEENSY_DATAOUT4
Text GLabel 11950 4600 0 50 Input ~ 0
TEENSY_DATAOUT5
Text GLabel 11950 4500 0 50 Input ~ 0
TEENSY_DATAOUT6
Wire Wire Line
11950 4400 12350 4400
Text GLabel 11950 4400 0 50 Input ~ 0
TEENSY_DATAOUT7
Wire Wire Line
11950 4500 12350 4500
Wire Wire Line
11950 4600 12350 4600
Wire Wire Line
11950 4700 12350 4700
Wire Wire Line
11950 4800 12350 4800
Wire Wire Line
11950 4900 12350 4900
Wire Wire Line
11950 5000 12350 5000
Wire Wire Line
11950 5100 12350 5100
Wire Wire Line
11950 5400 12350 5400
Text GLabel 11950 5400 0 50 Input ~ 0
TEENSY_CLK1
Text GLabel 14950 4200 2 50 Input ~ 0
6502_A15
Text GLabel 11950 4200 0 50 Input ~ 0
6502_A14
Text GLabel 11950 4000 0 50 Input ~ 0
6502_A13
Text GLabel 11950 4100 0 50 Input ~ 0
6502_A12
Wire Wire Line
14950 4200 14550 4200
Wire Wire Line
11950 4200 12350 4200
Wire Wire Line
11950 4000 12350 4000
Wire Wire Line
11950 4100 12350 4100
Text GLabel 14950 6200 2 50 Input ~ 0
6502_A11
Text GLabel 11950 6200 0 50 Input ~ 0
6502_A10
Text GLabel 14950 6100 2 50 Input ~ 0
6502_A9
Text GLabel 11950 6100 0 50 Input ~ 0
6502_A8
Wire Wire Line
11950 6200 12350 6200
Wire Wire Line
14950 6100 14550 6100
Wire Wire Line
11950 6100 12350 6100
Wire Wire Line
14950 6200 14550 6200
Text GLabel 14950 6000 2 50 Input ~ 0
6502_A7
Wire Wire Line
14950 6000 14550 6000
Text GLabel 11950 6000 0 50 Input ~ 0
6502_A6
Wire Wire Line
11950 6000 12350 6000
Text GLabel 11950 5900 0 50 Input ~ 0
6502_A4
Wire Wire Line
11950 5900 12350 5900
Text GLabel 11950 5800 0 50 Input ~ 0
6502_A2
Wire Wire Line
11950 5800 12350 5800
Text GLabel 11950 5700 0 50 Input ~ 0
6502_A0
Wire Wire Line
11950 5700 12350 5700
Text GLabel 14950 5900 2 50 Input ~ 0
6502_A5
Wire Wire Line
14950 5900 14550 5900
Text GLabel 14950 5800 2 50 Input ~ 0
6502_A3
Wire Wire Line
14950 5800 14550 5800
Text GLabel 14950 5700 2 50 Input ~ 0
6502_A1
Wire Wire Line
14950 5700 14550 5700
Text GLabel 11950 5200 0 50 Input ~ 0
6502_WR_n
Wire Wire Line
11950 5200 12350 5200
$Comp
L power:+3.3V #PWR0101
U 1 1 601E017C
P 10850 5050
F 0 "#PWR0101" H 10850 4900 50 0001 C CNN
F 1 "+3.3V" H 10865 5223 50 0000 C CNN
F 2 "" H 10850 5050 50 0001 C CNN
F 3 "" H 10850 5050 50 0001 C CNN
1 10850 5050
1 0 0 -1
$EndComp
Wire Wire Line
12350 5300 10850 5300
Wire Wire Line
10850 5050 10850 5300
$Comp
L power:GND #PWR0102
U 1 1 601EDC26
P 15650 5550
F 0 "#PWR0102" H 15650 5300 50 0001 C CNN
F 1 "GND" H 15655 5377 50 0000 C CNN
F 2 "" H 15650 5550 50 0001 C CNN
F 3 "" H 15650 5550 50 0001 C CNN
1 15650 5550
-1 0 0 -1
$EndComp
Wire Wire Line
14550 5300 15650 5300
Wire Wire Line
15650 5300 15650 5550
$Comp
L power:GND #PWR0103
U 1 1 601FABF9
P 10950 4150
F 0 "#PWR0103" H 10950 3900 50 0001 C CNN
F 1 "GND" H 10955 3977 50 0000 C CNN
F 2 "" H 10950 4150 50 0001 C CNN
F 3 "" H 10950 4150 50 0001 C CNN
1 10950 4150
1 0 0 -1
$EndComp
Wire Wire Line
10950 3900 10950 4150
Wire Wire Line
10950 3900 12350 3900
Wire Wire Line
15650 4000 15650 3750
Wire Wire Line
14550 4000 15650 4000
$Comp
L power:GND #PWR0104
U 1 1 60224C47
P 15650 3750
F 0 "#PWR0104" H 15650 3500 50 0001 C CNN
F 1 "GND" H 15655 3577 50 0000 C CNN
F 2 "" H 15650 3750 50 0001 C CNN
F 3 "" H 15650 3750 50 0001 C CNN
1 15650 3750
-1 0 0 1
$EndComp
$Comp
L power:+3.3V #PWR0105
U 1 1 6023A115
P 16050 3850
F 0 "#PWR0105" H 16050 3700 50 0001 C CNN
F 1 "+3.3V" H 16065 4023 50 0000 C CNN
F 2 "" H 16050 3850 50 0001 C CNN
F 3 "" H 16050 3850 50 0001 C CNN
1 16050 3850
-1 0 0 -1
$EndComp
Wire Wire Line
14550 4100 16050 4100
Wire Wire Line
16050 3850 16050 4100
Wire Wire Line
14950 3650 14950 3900
$Comp
L power:+5V #PWR0106
U 1 1 60247EDA
P 14950 3650
F 0 "#PWR0106" H 14950 3500 50 0001 C CNN
F 1 "+5V" H 14965 3823 50 0000 C CNN
F 2 "" H 14950 3650 50 0001 C CNN
F 3 "" H 14950 3650 50 0001 C CNN
1 14950 3650
1 0 0 -1
$EndComp
Wire Wire Line
14550 3900 14950 3900
Wire Wire Line
10150 7800 9750 7800
Text GLabel 8750 7800 0 50 Input ~ 0
6502_READY
Wire Wire Line
8750 7800 9150 7800
Wire Wire Line
8750 8500 9150 8500
Text GLabel 8750 8500 0 50 Input ~ 0
6502_IRQ_n
Text GLabel 10150 8500 2 50 Output ~ 0
TEENSY_IRQ
Wire Wire Line
10150 8500 9750 8500
Text GLabel 7300 7800 2 50 Output ~ 0
TEENSY_CLK1
Text GLabel 7300 8450 2 50 Output ~ 0
TEENSY_NMI
$Comp
L 74xx:74HC14 U2
U 5 1 5FF03D77
P 9450 8500
F 0 "U2" H 9450 8817 50 0000 C CNN
F 1 "74HC14" H 9450 8726 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 9450 8500 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 9450 8500 50 0001 C CNN
5 9450 8500
1 0 0 -1
$EndComp
$Comp
L 74xx:74HC14 U2
U 7 1 5FF0F320
P 8150 9900
F 0 "U2" V 8400 9650 50 0000 L CNN
F 1 "74HC14" V 8400 9900 50 0000 L CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 8150 9900 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 8150 9900 50 0001 C CNN
7 8150 9900
0 -1 -1 0
$EndComp
$Comp
L 74xx:74HC14 U2
U 6 1 5FF08731
P 9450 9100
F 0 "U2" H 9450 9417 50 0000 C CNN
F 1 "74HC14" H 9450 9326 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 9450 9100 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 9450 9100 50 0001 C CNN
6 9450 9100
1 0 0 -1
$EndComp
Text GLabel 5900 9100 0 50 Input ~ 0
6502_RESET_n
Wire Wire Line
5900 7800 6300 7800
Text GLabel 5900 7800 0 50 Input ~ 0
6502_CLK0
Wire Wire Line
7300 7800 6900 7800
Text GLabel 7300 9100 2 50 Output ~ 0
TEENSY_RESET
Wire Wire Line
7300 8450 6900 8450
Wire Wire Line
7300 9100 6900 9100
Wire Wire Line
5900 8450 6300 8450
Text GLabel 5900 8450 0 50 Input ~ 0
6502_NMI_n
Wire Wire Line
5900 9100 6300 9100
$Comp
L 74xx:74HC14 U2
U 3 1 5FEF370F
P 6600 9100
F 0 "U2" H 6600 9417 50 0000 C CNN
F 1 "74HC14" H 6600 9326 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 6600 9100 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 6600 9100 50 0001 C CNN
3 6600 9100
1 0 0 -1
$EndComp
$Comp
L 74xx:74HC14 U2
U 2 1 5FF0607A
P 6600 8450
F 0 "U2" H 6600 8767 50 0000 C CNN
F 1 "74HC14" H 6600 8676 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 6600 8450 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 6600 8450 50 0001 C CNN
2 6600 8450
1 0 0 -1
$EndComp
$Comp
L 74xx:74HC14 U2
U 1 1 5FF0A9D7
P 6600 7800
F 0 "U2" H 6600 8117 50 0000 C CNN
F 1 "74HC14" H 6600 8026 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 6600 7800 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 6600 7800 50 0001 C CNN
1 6600 7800
1 0 0 -1
$EndComp
Wire Wire Line
10150 9100 9750 9100
Wire Wire Line
8750 9100 9150 9100
Text GLabel 8750 9100 0 50 Input ~ 0
TEENSY_CLK1
$Comp
L 74xx:74HC14 U2
U 4 1 5FF0CE1C
P 9450 7800
F 0 "U2" H 9450 8117 50 0000 C CNN
F 1 "74HC14" H 9450 8026 50 0000 C CNN
F 2 "Package_DIP:DIP-14_W7.62mm_Socket" H 9450 7800 50 0001 C CNN
F 3 "http://www.ti.com/lit/gpn/sn74HC14" H 9450 7800 50 0001 C CNN
4 9450 7800
1 0 0 -1
$EndComp
Text GLabel 14950 5400 2 50 Output ~ 0
TEENSY_NMI
Wire Wire Line
14950 5400 14550 5400
Text GLabel 14950 5500 2 50 Output ~ 0
TEENSY_RESET
Wire Wire Line
14950 5500 14550 5500
Wire Wire Line
11950 5600 12350 5600
Text GLabel 11950 5600 0 50 Output ~ 0
TEENSY_READY_n
Text GLabel 11950 5500 0 50 Output ~ 0
TEENSY_IRQ
Wire Wire Line
11950 5500 12350 5500
Wire Wire Line
14950 5600 14550 5600
Text GLabel 14950 5600 2 50 Input ~ 0
6502_SYNC
$Comp
L teensy:Teensy4.1 U5
U 1 1 5FE26E42
P 13450 6050
F 0 "U5" H 13450 8615 50 0000 C CNN
F 1 "Teensy4.1" H 13450 8524 50 0000 C CNN
F 2 "MCL65+:Teensy41" H 13050 6450 50 0001 C CNN
F 3 "" H 13050 6450 50 0001 C CNN
1 13450 6050
1 0 0 -1
$EndComp
Text Notes 1150 1450 0 247 ~ 49
MicroCore Labs MCL65+
Text GLabel 11950 5100 0 50 Input ~ 0
TEENSY_DATAOUT0
Text GLabel 10150 7800 2 50 Output ~ 0
TEENSY_READY_n
Text GLabel 11950 4300 0 50 Input ~ 0
TEENSY_DATAOUT_OE_n
Wire Wire Line
11950 4300 12350 4300
$Comp
L Device:C C1
U 1 1 6087FF8B
P 6800 9900
F 0 "C1" H 6915 9946 50 0000 L CNN
F 1 "10uF" H 6915 9855 50 0000 L CNN
F 2 "Capacitor_THT:C_Disc_D7.0mm_W2.5mm_P5.00mm" H 6838 9750 50 0001 C CNN
F 3 "~" H 6800 9900 50 0001 C CNN
1 6800 9900
1 0 0 -1
$EndComp
$Comp
L power:+3.3V #PWR0107
U 1 1 608885E0
P 6800 9650
F 0 "#PWR0107" H 6800 9500 50 0001 C CNN
F 1 "+3.3V" H 6815 9823 50 0000 C CNN
F 2 "" H 6800 9650 50 0001 C CNN
F 3 "" H 6800 9650 50 0001 C CNN
1 6800 9650
-1 0 0 -1
$EndComp
Wire Wire Line
6800 9750 6800 9650
$Comp
L power:GND #PWR0108
U 1 1 60890310
P 6800 10150
F 0 "#PWR0108" H 6800 9900 50 0001 C CNN
F 1 "GND" H 6805 9977 50 0000 C CNN
F 2 "" H 6800 10150 50 0001 C CNN
F 3 "" H 6800 10150 50 0001 C CNN
1 6800 10150
1 0 0 -1
$EndComp
Wire Wire Line
6800 10150 6800 10050
$EndSCHEMATC

174
MCL65+/PCBA/MCL65_Gerbers/MCL65+-B_Mask.gbs Normal file
View File

@ -0,0 +1,174 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.8)-1*
G04 #@! TF.CreationDate,2020-12-27T21:30:32-08:00*
G04 #@! TF.ProjectId,MCL65+,4d434c36-352b-42e6-9b69-6361645f7063,rev?*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Soldermask,Bot*
G04 #@! TF.FilePolarity,Negative*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.8)-1) date 2020-12-27 21:30:32*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10C,1.600000*%
%ADD11O,1.600000X1.600000*%
%ADD12R,1.600000X1.600000*%
G04 APERTURE END LIST*
D10*
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D11*
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D12*
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X117094000Y-114604800D03*
X117094000Y-112064800D03*
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D12*
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D10*
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X117094000Y-96824800D03*
X117094000Y-94284800D03*
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X104165400Y-112090200D03*
X111785400Y-129870200D03*
X104165400Y-114630200D03*
X111785400Y-127330200D03*
X104165400Y-117170200D03*
X111785400Y-124790200D03*
X104165400Y-119710200D03*
X111785400Y-122250200D03*
X104165400Y-122250200D03*
X111785400Y-119710200D03*
X104165400Y-124790200D03*
X111785400Y-117170200D03*
X104165400Y-127330200D03*
X111785400Y-114630200D03*
X104165400Y-129870200D03*
X111785400Y-112090200D03*
X104165400Y-132410200D03*
X111785400Y-109550200D03*
D13*
X119862600Y-104749600D03*
X119507000Y-132689600D03*
D14*
X84505800Y-91973400D02*
X98425000Y-91973400D01*
X79654400Y-96824800D02*
X84505800Y-91973400D01*
X72009000Y-96824800D02*
X79654400Y-96824800D01*
X115925600Y-138811000D02*
X114731800Y-140004800D01*
X114731800Y-140004800D02*
X87249000Y-140004800D01*
X130987800Y-138811000D02*
X115925600Y-138811000D01*
X132334000Y-137464800D02*
X130987800Y-138811000D01*
X85852000Y-138861800D02*
X87249000Y-137464800D01*
X85852000Y-140462000D02*
X85852000Y-138861800D01*
X86690200Y-141300200D02*
X85852000Y-140462000D01*
X131038600Y-141300200D02*
X86690200Y-141300200D01*
X132334000Y-140004800D02*
X131038600Y-141300200D01*
X97078800Y-97053400D02*
X98425000Y-97053400D01*
X96062800Y-98069400D02*
X97078800Y-97053400D01*
X83794600Y-98069400D02*
X96062800Y-98069400D01*
X79959200Y-101904800D02*
X83794600Y-98069400D01*
X72009000Y-101904800D02*
X79959200Y-101904800D01*
X87630000Y-135305800D02*
X87249000Y-134924800D01*
X87757000Y-135432800D02*
X87249000Y-134924800D01*
X90678000Y-135432800D02*
X87757000Y-135432800D01*
X91295001Y-136049801D02*
X90678000Y-135432800D01*
X131208999Y-136049801D02*
X91295001Y-136049801D01*
X132334000Y-134924800D02*
X131208999Y-136049801D01*
X117094000Y-134924800D02*
X116713000Y-135305800D01*
X89458800Y-134594600D02*
X87249000Y-132384800D01*
X116763800Y-134594600D02*
X89458800Y-134594600D01*
X117094000Y-134924800D02*
X116763800Y-134594600D01*
X97078800Y-98374200D02*
X103581200Y-98374200D01*
X104800400Y-99593400D02*
X106045000Y-99593400D01*
X94894400Y-100558600D02*
X97078800Y-98374200D01*
X103581200Y-98374200D02*
X104800400Y-99593400D01*
X86385400Y-100558600D02*
X94894400Y-100558600D01*
X79959200Y-106984800D02*
X86385400Y-100558600D01*
X72009000Y-106984800D02*
X79959200Y-106984800D01*
X91795600Y-129844800D02*
X91846400Y-129895600D01*
X87249000Y-129844800D02*
X91795600Y-129844800D01*
X102158800Y-129870200D02*
X104165400Y-129870200D01*
X101059199Y-128770599D02*
X102158800Y-129870200D01*
X92971401Y-128770599D02*
X101059199Y-128770599D01*
X91846400Y-129895600D02*
X92971401Y-128770599D01*
X70433989Y-107949789D02*
X72009000Y-109524800D01*
X70433989Y-93674809D02*
X70433989Y-107949789D01*
X106585001Y-88308399D02*
X75800399Y-88308399D01*
X75800399Y-88308399D02*
X70433989Y-93674809D01*
X107170001Y-88893399D02*
X106585001Y-88308399D01*
X107170001Y-90101201D02*
X107170001Y-88893399D01*
X116433600Y-99364800D02*
X107170001Y-90101201D01*
X117094000Y-99364800D02*
X116433600Y-99364800D01*
X91795600Y-127304800D02*
X91846400Y-127355600D01*
X87249000Y-127304800D02*
X91795600Y-127304800D01*
X102235000Y-127330200D02*
X104165400Y-127330200D01*
X100845401Y-125940601D02*
X102235000Y-127330200D01*
X93261399Y-125940601D02*
X100845401Y-125940601D01*
X91846400Y-127355600D02*
X93261399Y-125940601D01*
D15*
X74142600Y-114198400D02*
X72009000Y-112064800D01*
X74142600Y-139954000D02*
X74142600Y-114198400D01*
X78308200Y-144119600D02*
X74142600Y-139954000D01*
X115519200Y-144119600D02*
X78308200Y-144119600D01*
X117094000Y-142544800D02*
X115519200Y-144119600D01*
D14*
X91795600Y-124764800D02*
X91846400Y-124815600D01*
X87249000Y-124764800D02*
X91795600Y-124764800D01*
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X100794601Y-123400601D02*
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X93261399Y-123400601D02*
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X91846400Y-124815600D02*
X93261399Y-123400601D01*
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X130919001Y-98239799D01*
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X107620011Y-89332011D01*
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X107620011Y-88706999D01*
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X130919001Y-98239799D01*
X75613999Y-87858389D02*
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X92971401Y-121150599D01*
X116738400Y-96824800D02*
X117094000Y-96824800D01*
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X75427600Y-87408380D02*
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X69533971Y-93302007D02*
X75427600Y-87408380D01*
X69533971Y-114669771D02*
X69533971Y-93302007D01*
X72009000Y-117144800D02*
X69533971Y-114669771D01*
X91795600Y-119684800D02*
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X91795600Y-119684800D01*
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X74868400Y-86058350D02*
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X67733935Y-92556403D01*
X74682001Y-85608341D02*
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X67733935Y-123029735D01*
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X115552001Y-110675201D02*
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X66833916Y-127209716D02*
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X72009000Y-137464800D02*
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X131038600Y-85420200D02*
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X131038600Y-85420200D01*
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X65483890Y-91624398D01*
X72009000Y-140004800D02*
X65483890Y-133479690D01*
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X72009000Y-142544800D01*
X65033881Y-91437997D02*
X65033881Y-135569681D01*
X73609888Y-82861990D02*
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X117094000Y-84124800D02*
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X87249000Y-94284800D02*
X88145401Y-93388399D01*
X99695000Y-90703400D02*
X98425000Y-89433400D01*
X106984800Y-90703400D02*
X99695000Y-90703400D01*
X107924600Y-91643200D02*
X106984800Y-90703400D01*
X107924600Y-92659200D02*
X107924600Y-91643200D01*
X115900200Y-100634800D02*
X107924600Y-92659200D01*
X131064000Y-100634800D02*
X115900200Y-100634800D01*
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X72009000Y-99364800D01*
X117094000Y-101357398D02*
X117094000Y-101904800D01*
X115976400Y-101904800D02*
X117094000Y-101904800D01*
X106045000Y-91973400D02*
X115976400Y-101904800D01*
D16*
X117094000Y-137464800D02*
X116941600Y-137617200D01*
D17*
X131142959Y-108175841D02*
X113159759Y-108175841D01*
X132334000Y-106984800D02*
X131142959Y-108175841D01*
X90601800Y-110820200D02*
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X85928200Y-110820200D02*
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X110169749Y-107934549D01*
D14*
X98425000Y-107645200D02*
X98135651Y-107934549D01*
D17*
X98425000Y-104673400D02*
X98425000Y-107645200D01*
X110169749Y-107934549D02*
X98135651Y-107934549D01*
X85775800Y-110972600D02*
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X85775800Y-108686600D02*
X85775800Y-110972600D01*
X86207600Y-108254800D02*
X85775800Y-108686600D01*
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X86207600Y-108254800D01*
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X90195400Y-137464800D02*
X88950800Y-136220200D01*
X117094000Y-137464800D02*
X90195400Y-137464800D01*
D14*
X117068600Y-129870200D02*
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X117068600Y-129870200D01*
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X101697371Y-115755201D01*
X131183599Y-115755201D02*
X132334000Y-114604800D01*
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X100597770Y-114655600D01*
X131183599Y-118295201D02*
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M02*

119
MCL65+/PCBA/Teensy41.kicad_mod Normal file
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@ -0,0 +1,119 @@
(module Teensy41 (layer F.Cu) (tedit 5FE4F9EE)
(fp_text reference REF** (at 0 -10.16) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "Teensy 4.1" (at 0 10.16) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user DVJ6A (at -2.54 -0.18 -90) (layer F.SilkS)
(effects (font (size 0.7 0.7) (thickness 0.15)))
)
(fp_text user MIMXRT1062 (at -1.27 0 -90) (layer F.SilkS)
(effects (font (size 0.7 0.7) (thickness 0.15)))
)
(fp_text user "Micro SD" (at 24.13 0) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user USB (at -26.67 0 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user Ethernet (at -12.065 -3.2766 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 12.065 0) (end 12.7 -0.635) (layer F.SilkS) (width 0.15))
(fp_line (start -7.62 -6.35) (end -7.62 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 5.08 -6.35) (end -7.62 -6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 5.08 6.35) (end 5.08 -6.35) (layer F.SilkS) (width 0.15))
(fp_line (start -7.62 6.35) (end 5.08 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start -17.25 -6.3516) (end -17.25 -6.1016) (layer F.SilkS) (width 0.15))
(fp_line (start -13.25 -6.3516) (end -17.25 -6.3516) (layer F.SilkS) (width 0.15))
(fp_line (start -13.25 -0.1016) (end -13.25 -6.3516) (layer F.SilkS) (width 0.15))
(fp_line (start -17.25 -6.1016) (end -17.25 -0.1016) (layer F.SilkS) (width 0.15))
(fp_line (start -21.6408 3.2992) (end -21.6408 5.8392) (layer F.SilkS) (width 0.15))
(fp_line (start -24.1808 3.2992) (end -21.6408 3.2992) (layer F.SilkS) (width 0.15))
(fp_line (start -24.1808 5.8392) (end -24.1808 3.2992) (layer F.SilkS) (width 0.15))
(fp_line (start -11.4808 5.8392) (end -24.1808 5.8392) (layer F.SilkS) (width 0.15))
(fp_line (start -11.4808 3.2992) (end -11.4808 5.8392) (layer F.SilkS) (width 0.15))
(fp_line (start -24.1808 3.2992) (end -11.4808 3.2992) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 -1.27) (end 13.97 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 1.27) (end 10.16 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 13.97 1.27) (end 10.16 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 13.97 -1.27) (end 13.97 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 29.21 5.08) (end 30.48 5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 29.21 -5.08) (end 29.21 5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 -5.08) (end 29.21 -5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 17.78 6.35) (end 30.48 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 17.78 -6.35) (end 17.78 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 -6.35) (end 17.78 -6.35) (layer F.SilkS) (width 0.15))
(fp_line (start -30.48 3.81) (end -31.75 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -31.75 3.81) (end -31.75 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -31.75 -3.81) (end -30.48 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 3.81) (end -25.4 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 -3.81) (end -30.48 -3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 3.81) (end -30.48 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -30.48 -8.89) (end 30.48 -8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 -8.89) (end 30.48 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 30.48 8.89) (end -30.48 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -30.48 8.89) (end -30.48 -8.89) (layer F.SilkS) (width 0.15))
(fp_poly (pts (xy 2.435 0.455) (xy 2.181 0.709) (xy 1.927 0.328) (xy 2.181 0.074)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 2.054 -0.053) (xy 1.8 0.201) (xy 1.546 -0.18) (xy 1.8 -0.434)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 1.673 -0.561) (xy 1.419 -0.307) (xy 1.165 -0.688) (xy 1.419 -0.942)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 1.673 0.328) (xy 1.419 0.582) (xy 1.165 0.201) (xy 1.419 -0.053)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 1.292 -0.18) (xy 1.038 0.074) (xy 0.784 -0.307) (xy 1.038 -0.561)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 0.911 -0.688) (xy 0.657 -0.434) (xy 0.403 -0.815) (xy 0.657 -1.069)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 2.816 0.074) (xy 2.562 0.328) (xy 2.308 -0.053) (xy 2.562 -0.307)) (layer F.SilkS) (width 0.1))
(fp_poly (pts (xy 3.197 -0.307) (xy 2.943 -0.053) (xy 2.689 -0.434) (xy 2.943 -0.688)) (layer F.SilkS) (width 0.1))
(pad 48 thru_hole circle (at -29.21 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 47 thru_hole circle (at -26.67 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 46 thru_hole circle (at -24.13 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 45 thru_hole circle (at -21.59 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 44 thru_hole circle (at -19.05 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 43 thru_hole circle (at -16.51 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 42 thru_hole circle (at -13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 41 thru_hole circle (at -11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 40 thru_hole circle (at -8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 39 thru_hole circle (at -6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 38 thru_hole circle (at -3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 37 thru_hole circle (at -1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 36 thru_hole circle (at 1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 35 thru_hole circle (at 3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at -29.21 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at -26.67 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at -24.13 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at -21.59 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at -19.05 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at -16.51 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at -13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at -11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at -8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at -6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 11 thru_hole circle (at -3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 12 thru_hole circle (at -1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 13 thru_hole circle (at 1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 34 thru_hole circle (at 6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 33 thru_hole circle (at 8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 32 thru_hole circle (at 11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 31 thru_hole circle (at 13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 30 thru_hole circle (at 16.51 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 29 thru_hole circle (at 19.05 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 28 thru_hole circle (at 21.59 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 27 thru_hole circle (at 24.13 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 26 thru_hole circle (at 26.67 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 25 thru_hole circle (at 29.21 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 24 thru_hole circle (at 29.21 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 23 thru_hole circle (at 26.67 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 22 thru_hole circle (at 24.13 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 21 thru_hole circle (at 21.59 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 14 thru_hole circle (at 3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 15 thru_hole circle (at 6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 16 thru_hole circle (at 8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 20 thru_hole circle (at 19.05 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 19 thru_hole circle (at 16.51 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 18 thru_hole circle (at 13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(pad 17 thru_hole circle (at 11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask))
(model ${KICAD_USER_DIR}/teensy.pretty/Teensy_4.1_Assembly.STEP
(offset (xyz 0 0 0.762))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

2626
MCL65+/PCBA/fp-info-cache Normal file
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File diff suppressed because it is too large Load Diff

3
MCL65+/PCBA/fp-lib-table Normal file
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@ -0,0 +1,3 @@
(fp_lib_table
(lib (name MCL65+)(type KiCad)(uri Z:/Ted/projs/MCL65/PCB_MCL65+/MCL65+)(options "")(descr ""))
)

3
MCL65+/PCBA/sym-lib-table Normal file
View File

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name 65xx)(type Legacy)(uri Z:/Ted/projs/MCL65/PCB_MCL65+/65xx.lib)(options "")(descr ""))
)