138 lines
6.0 KiB
Plaintext
138 lines
6.0 KiB
Plaintext
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LDMICRO INTERNALS
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=================
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This document describes LDmicro's internal structure. I intend it as a
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quick reference for my own use.
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ADDING A NEW ELEM_XXX LADDER INSTRUCTION
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========================================
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It is necessary to make changes in the following places:
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* ldmicro.h -- add the new ELEM_XXX #define
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-- add the new MNU_XXX for the menu to add it
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-- add any necessary data structures to ElemLeaf
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-- add prototypes for newly created extern functions
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-- if it is a leaf (it almost certainly is), to
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CASE_LEAF
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* maincontrols. -- add the code to create the menu
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cpp -- add the code to enable/disable the menu when we
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go from `edit' to `simulate' mode
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* iolist.cpp -- add to routines that build the I/O list; even if
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it does not affect the I/O list, it must be added
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to the case statement in ExtractNamesFromCircuit,
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so that it explicitly does nothing
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* draw.cpp -- routines to draw the element on the ladder diagram
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* loadsave.cpp -- routines to load and save the element to the
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xxx.ld file
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* intcode.cpp -- routines to generate intermediate code from the
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instruction
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* schematic.cpp -- WhatCanWeDoFromCursorAndTopology, update the
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enabled state of the menus (what can be inserted
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above/below/left/right, etc.) based on selection
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-- EditSelectedElement, self-explanatory
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* ldmicro.cpp -- typically menu/keyboard handlers to call the
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AddXXX function to insert the element
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* circuit.cpp -- the new AddXXX function, to add the element at the
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cursor point
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* simulate.cpp -- CheckVariableNamesCircuit, the design rules check
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to ensure that e.g. same Tname isn't used with
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two timers
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* xxxdialog.cpp -- an `edit element' dialog if necessary, somewhere
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(most likely to be simpledialog.cpp, using that)
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REPRESENTATION OF THE PROGRAM
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=============================
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(adapted from an email message, so the tone's a little odd, sorry)
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A ladder program can be thought of as a series-parallel network. Each
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rung is a series circuit; this circuit contains either leaf elements
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(like contacts, coils, etc.), or parallel circuits. The parallel circuits
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contain either leaf elements or series subcircuits. If you look at a
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.ld file in a text editor then you can see that I chose to represent
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the program in this way.
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This representation makes the compiler a relatively simple problem.
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Imagine that you wish to write a routine to evaluate a circuit. This
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routine will take as an input the circuit's rung-in condition, and
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provide as an output its rung-out. For a circuit consisting of a single
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leaf element this is straightforward; if you look at the Allen Bradley
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documentation then you will see that this is actually how they specify
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their instructions. For example, the rung-out condition of a set of
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contacts is false if either its rung-in condition is false or the input
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corresponding to the set of contacts is false. Let us say that for a
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leaf element L, the output
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Rout = L(Rin).
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If that element is a set of contacts named `Xin,' then
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L(Rin) := Rin && (Xin is HIGH).
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(I will use && for AND, and || for OR.)
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Next we must figure out how to compile a series circuit, for example (left
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to right), sub-circuits A, B, and C in series. In that case, the rung-in
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condition for A is the rung-in condition for the circuit. Then the rung-in
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condition for B is the rung-out condition for B, the rung-in condition for C
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is the rung-out condition for B, and the rung-out condition for the whole
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circuit is the rung-out condition for C. So if the whole series circuit is
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X, then
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X(Rin) := C(B(A(Rin))).
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Notice that the series circuit is not defined in terms of a boolean AND.
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That would work if you just had contacts, but for ops like TOF, whose
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rung-out can be true when their rung-ins are false, it breaks down.
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For a parallel circuit, for example sub-circuits A, B, and C in parallel,
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the rung-in condition for each of the sub-circuits is the rung-in
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condition for the whole circuit, and the rung-out condition is true if
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at least one of the rung-out conditions of the subcircuits is true. So
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if the whole parallel circuit is Y, then
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Y(Rin) := A(Rin) || B(Rin) || C(Rin).
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For the series or parallel circuits, the sub-circuits A, B, or C need not
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be leaf elements; they could be parallel or series circuits themselves. In
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that case you would have to apply the appropriate definition, maybe
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recursively (you could have a series circuit that contains a parallel
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circuit that contains another parallel circuit). Once you have written
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the program in that form, as cascaded and OR'd simple functions, any
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textbook in compilers can tell you what to do with it, if it is not
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obvious already.
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As I said, though, there are many implementation details. For example,
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I currently support five different targets: PIC16, AVR, ANSI C code,
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interpretable byte code, and the simulator. To reduce the amount of work
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that I must do, I have a simple intermediate representation, with only
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a couple dozen ops. The ladder logic is compiled to intermediate code,
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and the intermediate code is then compiled to whatever I need by the
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appropriate back end. This intermediate code is designed to be as simple
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and as easy to compile as possible, to minimize the time required for me
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to maintain five back ends. That is one of the major reasons why LDmicro
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generates poor code; a more expressive intcode would make it possible
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to write better back ends, but at the cost of implementation time.
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If you would like to see how I compile ladder logic to a procedural
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language, then I would suggest that you look at the code generated by the
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ANSI C back end.
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Jonathan Westhues, Mar 2006, Oct 2007
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