FOME-Tech
/
fome-fw
mirror of https://github.com/FOME-Tech/fome-fw.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

compile gpiochips as cpp (#2702) 

* rename

* core

* structing

* more

* makefile

* structing

* 6240 compiles

* explicit cast instead of implicit narrowing

* 8888

* no extern C

* fix tests build

* extern "C"

* 33810

* 8860

* 33810

* linker

* unbreak master

* don't need that if compiling as C++

* bump config

* fix test

* tests

* unit tests bad merge

* build

* move subaru logic to cpp file

* cpp goodness

* hpp include

* this is probably the right thing to do

* simulator
This commit is contained in:
Matthew Kennedy 2021-05-16 22:42:56 -07:00 committed by GitHub
parent bf9eb8844a
commit 4b69e7d441
21 changed files with 297 additions and 353 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

95
firmware/config/boards/subaru_eg33/board.c
View File

@ -12,8 +12,6 @@
#include "board_io.h" #include "board_io.h"
#include "drivers/gpio/mc33810.h"
/* drivers */ /* drivers */
/*==========================================================================*/ /*==========================================================================*/
@ -196,96 +194,3 @@ void BLIIINK(int t) {
chThdSleepMilliseconds(1000); chThdSleepMilliseconds(1000);
} }
} }
static const struct mc33810_config mc33810_odd = {
.spi_bus = &SPID5,
.spi_config = {
.circular = false,
.end_cb = NULL,
.ssport = GPIOF,
.sspad = 1,
.cr1 =
//SPI_CR1_16BIT_MODE |
SPI_CR1_SSM |
SPI_CR1_SSI |
((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) | /* div = 16 */
SPI_CR1_MSTR |
/* SPI_CR1_CPOL | */ // = 0
SPI_CR1_CPHA | // = 1
0,
.cr2 = //SPI_CR2_16BIT_MODE |
SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
},
.direct_io = {
/* injector drivers */
[0] = {.port = GPIOI, .pad = 6}, /* INJ 1 */
[1] = {.port = GPIOI, .pad = 5}, /* INJ 3 */
[2] = {.port = GPIOI, .pad = 4}, /* INJ 5 */
[3] = {.port = GPIOB, .pad = 9}, /* INJ 7 */
/* ignition pre-dirvers */
[4] = {.port = GPIOB, .pad = 3}, /* IGN 1 */
[5] = {.port = GPIOB, .pad = 4}, /* IGN 3 */
[6] = {.port = GPIOB, .pad = 5}, /* IGN 7 */
[7] = {.port = GPIOB, .pad = 8}, /* IGN 5 */
},
/* en shared between two chips */
.en = {.port = GPIOI, .pad = 7}
};
static const struct mc33810_config mc33810_even = {
.spi_bus = &SPID5,
.spi_config = {
.circular = false,
.end_cb = NULL,
.ssport = GPIOF,
.sspad = 2,
.cr1 =
//SPI_CR1_16BIT_MODE |
SPI_CR1_SSM |
SPI_CR1_SSI |
((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) | /* div = 16 */
SPI_CR1_MSTR |
/* SPI_CR1_CPOL | */ // = 0
SPI_CR1_CPHA | // = 1
0,
.cr2 = //SPI_CR2_16BIT_MODE |
SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
},
.direct_io = {
/* injector drivers */
[0] = {.port = GPIOE, .pad = 3}, /* INJ 2 */
[1] = {.port = GPIOE, .pad = 4}, /* INJ 4 */
[2] = {.port = GPIOE, .pad = 5}, /* INJ 6 */
[3] = {.port = GPIOE, .pad = 6}, /* INJ 8 */
/* ignition pre-dirvers */
[4] = {.port = GPIOC, .pad = 14}, /* IGN 2 */
[5] = {.port = GPIOC, .pad = 13}, /* IGN 4 */
[6] = {.port = GPIOC, .pad = 15}, /* IGN 6 */
[7] = {.port = GPIOI, .pad = 9}, /* IGN 8 */
},
/* en shared between two chips */
//.en = {.port = GPIOI, .pad = 7}
};
static void board_init_ext_gpios(void)
{
int ret;
ret = mc33810_add(MC33810_0_OUT_0, 0, &mc33810_odd);
if (ret < 0) {
/* error */
}
ret = mc33810_add(MC33810_1_OUT_0, 1, &mc33810_even);
if (ret < 0) {
/* error */
}
}
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void)
{
board_init_ext_gpios();
}

94
firmware/config/boards/subaru_eg33/board_configuration.cpp
View File

@ -14,6 +14,7 @@
#include "fsio_impl.h" #include "fsio_impl.h"
#include "engine_configuration.h" #include "engine_configuration.h"
#include "smart_gpio.h" #include "smart_gpio.h"
#include "drivers/gpio/mc33810.h"
EXTERN_ENGINE; EXTERN_ENGINE;
@ -262,3 +263,96 @@ void setBoardDefaultConfiguration(void) {
if (engineConfiguration->fuelAlgorithm == LM_ALPHA_N) if (engineConfiguration->fuelAlgorithm == LM_ALPHA_N)
setAlgorithm(LM_ALPHA_N PASS_CONFIG_PARAMETER_SUFFIX); setAlgorithm(LM_ALPHA_N PASS_CONFIG_PARAMETER_SUFFIX);
} }
static const struct mc33810_config mc33810_odd = {
.spi_bus = &SPID5,
.spi_config = {
.circular = false,
.end_cb = NULL,
.ssport = GPIOF,
.sspad = 1,
.cr1 =
//SPI_CR1_16BIT_MODE |
SPI_CR1_SSM |
SPI_CR1_SSI |
((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) | /* div = 16 */
SPI_CR1_MSTR |
/* SPI_CR1_CPOL | */ // = 0
SPI_CR1_CPHA | // = 1
0,
.cr2 = //SPI_CR2_16BIT_MODE |
SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
},
.direct_io = {
/* injector drivers */
[0] = {.port = GPIOI, .pad = 6}, /* INJ 1 */
[1] = {.port = GPIOI, .pad = 5}, /* INJ 3 */
[2] = {.port = GPIOI, .pad = 4}, /* INJ 5 */
[3] = {.port = GPIOB, .pad = 9}, /* INJ 7 */
/* ignition pre-dirvers */
[4] = {.port = GPIOB, .pad = 3}, /* IGN 1 */
[5] = {.port = GPIOB, .pad = 4}, /* IGN 3 */
[6] = {.port = GPIOB, .pad = 5}, /* IGN 7 */
[7] = {.port = GPIOB, .pad = 8}, /* IGN 5 */
},
/* en shared between two chips */
.en = {.port = GPIOI, .pad = 7}
};
static const struct mc33810_config mc33810_even = {
.spi_bus = &SPID5,
.spi_config = {
.circular = false,
.end_cb = NULL,
.ssport = GPIOF,
.sspad = 2,
.cr1 =
//SPI_CR1_16BIT_MODE |
SPI_CR1_SSM |
SPI_CR1_SSI |
((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) | /* div = 16 */
SPI_CR1_MSTR |
/* SPI_CR1_CPOL | */ // = 0
SPI_CR1_CPHA | // = 1
0,
.cr2 = //SPI_CR2_16BIT_MODE |
SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
},
.direct_io = {
/* injector drivers */
[0] = {.port = GPIOE, .pad = 3}, /* INJ 2 */
[1] = {.port = GPIOE, .pad = 4}, /* INJ 4 */
[2] = {.port = GPIOE, .pad = 5}, /* INJ 6 */
[3] = {.port = GPIOE, .pad = 6}, /* INJ 8 */
/* ignition pre-dirvers */
[4] = {.port = GPIOC, .pad = 14}, /* IGN 2 */
[5] = {.port = GPIOC, .pad = 13}, /* IGN 4 */
[6] = {.port = GPIOC, .pad = 15}, /* IGN 6 */
[7] = {.port = GPIOI, .pad = 9}, /* IGN 8 */
},
/* en shared between two chips */
.en = {.port = nullptr, .pad = 0}
};
static void board_init_ext_gpios(void)
{
int ret;
ret = mc33810_add(MC33810_0_OUT_0, 0, &mc33810_odd);
if (ret < 0) {
/* error */
}
ret = mc33810_add(MC33810_1_OUT_0, 1, &mc33810_even);
if (ret < 0) {
/* error */
}
}
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void)
{
board_init_ext_gpios();
}

1
firmware/global.h
View File

@ -34,6 +34,7 @@ typedef unsigned int time_t;
#ifdef __cplusplus #ifdef __cplusplus
#include "eficonsole.h" #include "eficonsole.h"
#include <ch.hpp>
#endif /* __cplusplus */ #endif /* __cplusplus */

20
firmware/hw_layer/drivers/drivers.mk
View File

@ -9,20 +9,20 @@ HW_LAYER_DRIVERS_INC = \
$(DRIVERS_DIR)/lcd \ $(DRIVERS_DIR)/lcd \
HW_LAYER_DRIVERS_CORE = \ HW_LAYER_DRIVERS_CORE = \
$(DRIVERS_DIR)/gpio/core.c \
HW_LAYER_DRIVERS_CORE_CPP = HW_LAYER_DRIVERS_CORE_CPP = \
$(DRIVERS_DIR)/gpio/core.cpp \
$(DRIVERS_DIR)/i2c/i2c_bb.cpp \
HW_LAYER_DRIVERS = \ HW_LAYER_DRIVERS =
$(DRIVERS_DIR)/gpio/tle6240.c \
$(DRIVERS_DIR)/gpio/tle8888.c \
$(DRIVERS_DIR)/gpio/mc33972.c \
$(DRIVERS_DIR)/gpio/mc33810.c \
$(DRIVERS_DIR)/gpio/drv8860.c \
HW_LAYER_DRIVERS_CPP = \ HW_LAYER_DRIVERS_CPP = \
$(DRIVERS_DIR)/can/can_hw.cpp \ $(DRIVERS_DIR)/can/can_hw.cpp \
$(DRIVERS_DIR)/can/can_msg_tx.cpp \ $(DRIVERS_DIR)/can/can_msg_tx.cpp \
$(DRIVERS_DIR)/serial/serial_hw.cpp \ $(DRIVERS_DIR)/serial/serial_hw.cpp \
$(DRIVERS_DIR)/i2c/i2c_bb.cpp \ $(DRIVERS_DIR)/gpio/tle6240.cpp \
$(DRIVERS_DIR)/lcd/HD44780.cpp $(DRIVERS_DIR)/gpio/tle8888.cpp \
$(DRIVERS_DIR)/gpio/mc33972.cpp \
$(DRIVERS_DIR)/gpio/mc33810.cpp \
$(DRIVERS_DIR)/gpio/drv8860.cpp \
$(DRIVERS_DIR)/lcd/HD44780.cpp \

40
firmware/hw_layer/drivers/gpio/core.c → firmware/hw_layer/drivers/gpio/core.cpp
View File

@ -32,7 +32,7 @@
struct gpiochip { struct gpiochip {
brain_pin_e base; brain_pin_e base;
size_t size; size_t size;
struct gpiochip_ops *ops; gpiochip_ops *ops;
const char *name; const char *name;
/* optional names of each gpio */ /* optional names of each gpio */
const char **gpio_names; const char **gpio_names;
@ -40,7 +40,7 @@ struct gpiochip {
void *priv; void *priv;
}; };
static struct gpiochip chips[BOARD_EXT_GPIOCHIPS]; static gpiochip chips[BOARD_EXT_GPIOCHIPS];
/*==========================================================================*/ /*==========================================================================*/
/* Local functions. */ /* Local functions. */
@ -49,10 +49,10 @@ static struct gpiochip chips[BOARD_EXT_GPIOCHIPS];
/** /**
* @return pointer to GPIO device for specified pin * @return pointer to GPIO device for specified pin
*/ */
static struct gpiochip *gpiochip_find(brain_pin_e pin) static gpiochip *gpiochip_find(brain_pin_e pin)
{ {
for (int i = 0; i < BOARD_EXT_GPIOCHIPS; i++) { for (int i = 0; i < BOARD_EXT_GPIOCHIPS; i++) {
struct gpiochip *chip = &chips[i]; gpiochip *chip = &chips[i];
if ((pin >= chip->base) && (pin < (chip->base + chip->size))) if ((pin >= chip->base) && (pin < (chip->base + chip->size)))
return chip; return chip;
@ -72,7 +72,7 @@ static struct gpiochip *gpiochip_find(brain_pin_e pin)
int gpiochips_getPinOffset(brain_pin_e pin) int gpiochips_getPinOffset(brain_pin_e pin)
{ {
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (chip) if (chip)
return pin - chip->base; return pin - chip->base;
@ -87,7 +87,7 @@ int gpiochips_getPinOffset(brain_pin_e pin)
*/ */
const char *gpiochips_getChipName(brain_pin_e pin) { const char *gpiochips_getChipName(brain_pin_e pin) {
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (chip) if (chip)
return chip->name; return chip->name;
@ -103,7 +103,7 @@ const char *gpiochips_getChipName(brain_pin_e pin) {
const char *gpiochips_getPinName(brain_pin_e pin) const char *gpiochips_getPinName(brain_pin_e pin)
{ {
int offset; int offset;
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (chip) { if (chip) {
offset = pin - chip->base; offset = pin - chip->base;
@ -123,7 +123,7 @@ const char *gpiochips_getPinName(brain_pin_e pin)
* else returns chip base * else returns chip base
*/ */
int gpiochip_register(brain_pin_e base, const char *name, struct gpiochip_ops *ops, size_t size, void *priv) int gpiochip_register(brain_pin_e base, const char *name, gpiochip_ops *ops, size_t size, void *priv)
{ {
int i; int i;
@ -150,7 +150,7 @@ int gpiochip_register(brain_pin_e base, const char *name, struct gpiochip_ops *o
} }
} }
struct gpiochip *chip = NULL; gpiochip *chip = NULL;
/* find free gpiochip struct */ /* find free gpiochip struct */
for (i = 0; i < BOARD_EXT_GPIOCHIPS; i++) { for (i = 0; i < BOARD_EXT_GPIOCHIPS; i++) {
if (chips[i].base == 0) { if (chips[i].base == 0) {
@ -184,7 +184,7 @@ int gpiochip_register(brain_pin_e base, const char *name, struct gpiochip_ops *o
int gpiochip_unregister(brain_pin_e base) int gpiochip_unregister(brain_pin_e base)
{ {
struct gpiochip *chip = gpiochip_find(base); gpiochip *chip = gpiochip_find(base);
if (!chip) if (!chip)
return -1; return -1;
@ -196,7 +196,7 @@ int gpiochip_unregister(brain_pin_e base)
/* unregister chip */ /* unregister chip */
chip->name = NULL; chip->name = NULL;
chip->ops = NULL; chip->ops = NULL;
chip->base = 0; chip->base = GPIO_UNASSIGNED;
chip->size = 0; chip->size = 0;
chip->gpio_names = NULL; chip->gpio_names = NULL;
chip->priv = NULL; chip->priv = NULL;
@ -212,7 +212,7 @@ int gpiochip_unregister(brain_pin_e base)
int gpiochips_setPinNames(brain_pin_e base, const char **names) int gpiochips_setPinNames(brain_pin_e base, const char **names)
{ {
struct gpiochip *chip = gpiochip_find(base); gpiochip *chip = gpiochip_find(base);
if (!chip) if (!chip)
return -1; return -1;
@ -235,7 +235,7 @@ int gpiochips_init(void)
int pins_added = 0; int pins_added = 0;
for (i = 0; i < BOARD_EXT_GPIOCHIPS; i++) { for (i = 0; i < BOARD_EXT_GPIOCHIPS; i++) {
struct gpiochip *chip = &chips[i]; gpiochip *chip = &chips[i];
if (!chip->base) if (!chip->base)
continue; continue;
@ -246,7 +246,7 @@ int gpiochips_init(void)
if (ret < 0) { if (ret < 0) {
/* remove chip if it fails to init */ /* remove chip if it fails to init */
/* TODO: we will have a gap, is it ok? */ /* TODO: we will have a gap, is it ok? */
chip->base = 0; chip->base = GPIO_UNASSIGNED;
} else { } else {
pins_added += chip->size; pins_added += chip->size;
} }
@ -265,7 +265,7 @@ int gpiochips_init(void)
* output modes. Use some common enums? */ * output modes. Use some common enums? */
int gpiochips_setPadMode(brain_pin_e pin, iomode_t mode) int gpiochips_setPadMode(brain_pin_e pin, iomode_t mode)
{ {
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (!chip) if (!chip)
return -1; return -1;
@ -287,7 +287,7 @@ int gpiochips_setPadMode(brain_pin_e pin, iomode_t mode)
int gpiochips_writePad(brain_pin_e pin, int value) int gpiochips_writePad(brain_pin_e pin, int value)
{ {
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (!chip) if (!chip)
return -1; return -1;
@ -308,7 +308,7 @@ int gpiochips_writePad(brain_pin_e pin, int value)
int gpiochips_readPad(brain_pin_e pin) int gpiochips_readPad(brain_pin_e pin)
{ {
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (!chip) if (!chip)
return -1; return -1;
@ -329,7 +329,7 @@ int gpiochips_readPad(brain_pin_e pin)
brain_pin_diag_e gpiochips_getDiag(brain_pin_e pin) brain_pin_diag_e gpiochips_getDiag(brain_pin_e pin)
{ {
struct gpiochip *chip = gpiochip_find(pin); gpiochip *chip = gpiochip_find(pin);
if (!chip) if (!chip)
return PIN_INVALID; return PIN_INVALID;
@ -352,7 +352,7 @@ int gpiochips_get_total_pins(void)
int cnt = 0; int cnt = 0;
for (i = 0; i < BOARD_EXT_GPIOCHIPS; i++) { for (i = 0; i < BOARD_EXT_GPIOCHIPS; i++) {
struct gpiochip *chip = &chips[i]; gpiochip *chip = &chips[i];
if (!chip->base) if (!chip->base)
continue; continue;
@ -383,7 +383,7 @@ const char *gpiochips_getPinName(brain_pin_e pin) {
return NULL; return NULL;
} }
int gpiochip_register(brain_pin_e base, const char *name, struct gpiochip_ops *ops, size_t size, void *priv) int gpiochip_register(brain_pin_e base, const char *name, gpiochip_ops *ops, size_t size, void *priv)
{ {
(void)base; (void)name; (void)ops; (void)size; (void)priv; (void)base; (void)name; (void)ops; (void)size; (void)priv;

36
firmware/hw_layer/drivers/gpio/drv8860.c → firmware/hw_layer/drivers/gpio/drv8860.cpp
View File

@ -50,7 +50,7 @@ static THD_WORKING_AREA(drv8860_thread_1_wa, 256);
/* Driver */ /* Driver */
struct drv8860_priv { struct drv8860_priv {
const struct drv8860_config *cfg; const drv8860_config *cfg;
/* cached output state - state last send to chip */ /* cached output state - state last send to chip */
uint16_t o_state_cached; uint16_t o_state_cached;
/* state to be sended to chip */ /* state to be sended to chip */
@ -59,7 +59,7 @@ struct drv8860_priv {
drv8860_drv_state drv_state; drv8860_drv_state drv_state;
}; };
static struct drv8860_priv chips[BOARD_DRV8860_COUNT]; static drv8860_priv chips[BOARD_DRV8860_COUNT];
static const char* drv8860_pin_names[DRV8860_OUTPUTS] = { static const char* drv8860_pin_names[DRV8860_OUTPUTS] = {
"drv8860.OUT1", "drv8860.OUT2", "drv8860.OUT3", "drv8860.OUT4", "drv8860.OUT1", "drv8860.OUT2", "drv8860.OUT3", "drv8860.OUT4",
@ -72,7 +72,7 @@ static const char* drv8860_pin_names[DRV8860_OUTPUTS] = {
/* Driver local functions. */ /* Driver local functions. */
/*==========================================================================*/ /*==========================================================================*/
static SPIDriver *get_bus(struct drv8860_priv *chip) { static SPIDriver *get_bus(drv8860_priv *chip) {
/* return non-const SPIDriver* from const struct cfg */ /* return non-const SPIDriver* from const struct cfg */
return chip->cfg->spi_bus; return chip->cfg->spi_bus;
} }
@ -82,7 +82,7 @@ static SPIDriver *get_bus(struct drv8860_priv *chip) {
* @details Sends 8/16 bits. CS asserted before and released after transaction. * @details Sends 8/16 bits. CS asserted before and released after transaction.
*/ */
static void drv8860_spi_send(struct drv8860_priv *chip, uint16_t tx) { static void drv8860_spi_send(drv8860_priv *chip, uint16_t tx) {
SPIDriver *spi = get_bus(chip); SPIDriver *spi = get_bus(chip);
/* Acquire ownership of the bus. */ /* Acquire ownership of the bus. */
@ -103,7 +103,7 @@ static void drv8860_spi_send(struct drv8860_priv *chip, uint16_t tx) {
* @brief DRV8860 send output data. * @brief DRV8860 send output data.
*/ */
static void drv8860_update_outputs(struct drv8860_priv *chip) { static void drv8860_update_outputs(drv8860_priv *chip) {
/* TODO: lock? */ /* TODO: lock? */
/* atomic */ /* atomic */
@ -122,7 +122,7 @@ static void drv8860_update_outputs(struct drv8860_priv *chip) {
* @todo: Checks direct io signals integrity, read initial diagnostic state. * @todo: Checks direct io signals integrity, read initial diagnostic state.
*/ */
static int drv8860_chip_init(struct drv8860_priv *chip) { static int drv8860_chip_init(drv8860_priv *chip) {
/* upload pin states */ /* upload pin states */
drv8860_update_outputs(chip); drv8860_update_outputs(chip);
@ -134,7 +134,7 @@ static int drv8860_chip_init(struct drv8860_priv *chip) {
* @details Wake up driver. Will cause output register update. * @details Wake up driver. Will cause output register update.
*/ */
static int drv8860_wake_driver(struct drv8860_priv *chip) { static int drv8860_wake_driver(drv8860_priv *chip) {
(void)chip; (void)chip;
/* Entering a reentrant critical zone.*/ /* Entering a reentrant critical zone.*/
@ -165,7 +165,7 @@ static THD_FUNCTION(drv8860_driver_thread, p) {
(void)msg; (void)msg;
for (i = 0; i < BOARD_DRV8860_COUNT; i++) { for (i = 0; i < BOARD_DRV8860_COUNT; i++) {
struct drv8860_priv *chip; drv8860_priv *chip;
chip = &chips[i]; chip = &chips[i];
if ((chip->cfg == NULL) || if ((chip->cfg == NULL) ||
@ -189,12 +189,12 @@ static THD_FUNCTION(drv8860_driver_thread, p) {
/*==========================================================================*/ /*==========================================================================*/
int drv8860_writePad(void *data, unsigned int pin, int value) { int drv8860_writePad(void *data, unsigned int pin, int value) {
struct drv8860_priv *chip; drv8860_priv *chip;
if ((pin >= DRV8860_OUTPUTS) || (data == NULL)) if ((pin >= DRV8860_OUTPUTS) || (data == NULL))
return -1; return -1;
chip = (struct drv8860_priv *)data; chip = (drv8860_priv *)data;
/* TODO: lock */ /* TODO: lock */
if (value) if (value)
@ -207,16 +207,16 @@ int drv8860_writePad(void *data, unsigned int pin, int value) {
return 0; return 0;
} }
brain_pin_diag_e drv8860_getDiag(void *data, unsigned int pin) { brain_pin_diag_e drv8860_getDiag(void* /*data*/, unsigned int /*pin*/) {
// todo: implement diag // todo: implement diag
return PIN_OK; return PIN_OK;
} }
int drv8860_init(void * data) { int drv8860_init(void * data) {
int ret; int ret;
struct drv8860_priv *chip; drv8860_priv *chip;
chip = (struct drv8860_priv *)data; chip = (drv8860_priv *)data;
ret = drv8860_chip_init(chip); ret = drv8860_chip_init(chip);
if (ret) if (ret)
@ -241,6 +241,7 @@ int drv8860_deinit(void *data) {
} }
struct gpiochip_ops drv8860_ops = { struct gpiochip_ops drv8860_ops = {
.setPadMode = nullptr,
.writePad = drv8860_writePad, .writePad = drv8860_writePad,
.readPad = NULL, /* chip outputs only */ .readPad = NULL, /* chip outputs only */
.getDiag = drv8860_getDiag, .getDiag = drv8860_getDiag,
@ -253,10 +254,9 @@ struct gpiochip_ops drv8860_ops = {
* @details Checks for valid config * @details Checks for valid config
*/ */
int drv8860_add(brain_pin_e base, unsigned int index, const struct drv8860_config *cfg) { int drv8860_add(brain_pin_e base, unsigned int index, const drv8860_config *cfg) {
int i;
int ret; int ret;
struct drv8860_priv *chip; drv8860_priv *chip;
/* no config or no such chip */ /* no config or no such chip */
if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_DRV8860_COUNT)) if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_DRV8860_COUNT))
@ -284,14 +284,14 @@ int drv8860_add(brain_pin_e base, unsigned int index, const struct drv8860_confi
return ret; return ret;
/* set default pin names, board init code can rewrite */ /* set default pin names, board init code can rewrite */
gpiochips_setPinNames(ret, drv8860_pin_names); gpiochips_setPinNames(static_cast<brain_pin_e>(ret), drv8860_pin_names);
return ret; return ret;
} }
#else /* BOARD_DRV8860_COUNT > 0 */ #else /* BOARD_DRV8860_COUNT > 0 */
int drv8860_add(brain_pin_e base, unsigned int index, const struct drv8860_config *cfg) { int drv8860_add(brain_pin_e base, unsigned int index, const drv8860_config *cfg) {
(void)base; (void)index; (void)cfg; (void)base; (void)index; (void)cfg;
return -1; return -1;

14
firmware/hw_layer/drivers/gpio/drv8860.h
View File

@ -9,8 +9,7 @@
* @author Andrey Belomutskiy, (c) 2012-2020 * @author Andrey Belomutskiy, (c) 2012-2020
*/ */
#ifndef HW_LAYER_DRV8860_H_ #pragma once
#define HW_LAYER_DRV8860_H_
#include "efifeatures.h" #include "efifeatures.h"
#include <hal.h> #include <hal.h>
@ -31,15 +30,4 @@ struct drv8860_config {
} reset; } reset;
}; };
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
int drv8860_add(brain_pin_e base, unsigned int index, const struct drv8860_config *cfg); int drv8860_add(brain_pin_e base, unsigned int index, const struct drv8860_config *cfg);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* HW_LAYER_DRV8860_H_ */

11
firmware/hw_layer/drivers/gpio/gpio_ext.h
View File

@ -19,11 +19,6 @@
/* Checks */ /* Checks */
/*==========================================================================*/ /*==========================================================================*/
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
struct gpiochip_ops { struct gpiochip_ops {
/* pin argument is pin number within gpio chip, not a global number */ /* pin argument is pin number within gpio chip, not a global number */
int (*setPadMode)(void *data, unsigned int pin, iomode_t mode); int (*setPadMode)(void *data, unsigned int pin, iomode_t mode);
@ -39,7 +34,7 @@ const char *gpiochips_getChipName(brain_pin_e pin);
const char *gpiochips_getPinName(brain_pin_e pin); const char *gpiochips_getPinName(brain_pin_e pin);
/* register/unregister GPIO chip */ /* register/unregister GPIO chip */
int gpiochip_register(brain_pin_e base, const char *name, struct gpiochip_ops *ops, size_t size, void *priv); int gpiochip_register(brain_pin_e base, const char *name, gpiochip_ops *ops, size_t size, void *priv);
int gpiochip_unregister(brain_pin_e base); int gpiochip_unregister(brain_pin_e base);
/* Set individual names for pins */ /* Set individual names for pins */
@ -55,7 +50,3 @@ brain_pin_diag_e gpiochips_getDiag(brain_pin_e pin);
/* return total number of external gpios */ /* return total number of external gpios */
int gpiochips_get_total_pins(void); int gpiochips_get_total_pins(void);
#ifdef __cplusplus
}
#endif

109
firmware/hw_layer/drivers/gpio/mc33810.c → firmware/hw_layer/drivers/gpio/mc33810.cpp
View File

@ -91,7 +91,7 @@ static THD_WORKING_AREA(mc33810_thread_1_wa, 256);
/* Driver */ /* Driver */
struct mc33810_priv { struct mc33810_priv {
const struct mc33810_config *cfg; const mc33810_config *cfg;
/* cached output state - state last send to chip */ /* cached output state - state last send to chip */
uint8_t o_state_cached; uint8_t o_state_cached;
/* state to be sended to chip */ /* state to be sended to chip */
@ -114,7 +114,7 @@ struct mc33810_priv {
mc33810_drv_state drv_state; mc33810_drv_state drv_state;
}; };
static struct mc33810_priv chips[BOARD_MC33810_COUNT]; static mc33810_priv chips[BOARD_MC33810_COUNT];
static const char* mc33810_pin_names[MC33810_OUTPUTS] = { static const char* mc33810_pin_names[MC33810_OUTPUTS] = {
"mc33810.OUT1", "mc33810.OUT2", "mc33810.OUT3", "mc33810.OUT4", "mc33810.OUT1", "mc33810.OUT2", "mc33810.OUT3", "mc33810.OUT4",
@ -125,7 +125,7 @@ static const char* mc33810_pin_names[MC33810_OUTPUTS] = {
/* Driver local functions. */ /* Driver local functions. */
/*==========================================================================*/ /*==========================================================================*/
static SPIDriver *get_bus(struct mc33810_priv *chip) static SPIDriver *get_bus(mc33810_priv *chip)
{ {
/* return non-const SPIDriver* from const struct cfg */ /* return non-const SPIDriver* from const struct cfg */
return chip->cfg->spi_bus; return chip->cfg->spi_bus;
@ -137,7 +137,7 @@ static SPIDriver *get_bus(struct mc33810_priv *chip)
* after transaction. * after transaction.
*/ */
static int mc33810_spi_rw(struct mc33810_priv *chip, uint16_t tx, uint16_t *rx) static int mc33810_spi_rw(mc33810_priv *chip, uint16_t tx, uint16_t *rx)
{ {
uint16_t rxb; uint16_t rxb;
SPIDriver *spi = get_bus(chip); SPIDriver *spi = get_bus(chip);
@ -180,7 +180,7 @@ static int mc33810_spi_rw(struct mc33810_priv *chip, uint16_t tx, uint16_t *rx)
* @details Sends ORed data to register, also receive diagnostic. * @details Sends ORed data to register, also receive diagnostic.
*/ */
static int mc33810_update_output_and_diag(struct mc33810_priv *chip) static int mc33810_update_output_and_diag(mc33810_priv *chip)
{ {
int ret = 0; int ret = 0;
@ -262,21 +262,25 @@ static int mc33810_update_output_and_diag(struct mc33810_priv *chip)
* @details Checks communication. Check chip presense. * @details Checks communication. Check chip presense.
*/ */
static int mc33810_chip_init(struct mc33810_priv *chip) static int mc33810_chip_init(mc33810_priv *chip)
{ {
int n; int n;
int ret; int ret;
uint16_t rx; uint16_t rx;
const struct mc33810_config *cfg = chip->cfg; const mc33810_config *cfg = chip->cfg;
/* mark pins used */ /* mark pins used */
//ret = gpio_pin_markUsed(cfg->spi_config.ssport, cfg->spi_config.sspad, DRIVER_NAME " CS"); //ret = gpio_pin_markUsed(cfg->spi_config.ssport, cfg->spi_config.sspad, DRIVER_NAME " CS");
ret = 0; ret = 0;
if (cfg->en.port != NULL) if (cfg->en.port) {
ret |= gpio_pin_markUsed(cfg->en.port, cfg->en.pad, DRIVER_NAME " EN"); ret |= gpio_pin_markUsed(cfg->en.port, cfg->en.pad, DRIVER_NAME " EN");
for (n = 0; n < MC33810_DIRECT_OUTPUTS; n++) }
if (cfg->direct_io[n].port)
for (n = 0; n < MC33810_DIRECT_OUTPUTS; n++) {
if (cfg->direct_io[n].port) {
ret |= gpio_pin_markUsed(cfg->direct_io[n].port, cfg->direct_io[n].pad, DRIVER_NAME " DIRECT IO"); ret |= gpio_pin_markUsed(cfg->direct_io[n].port, cfg->direct_io[n].pad, DRIVER_NAME " DIRECT IO");
}
}
if (ret) { if (ret) {
ret = -1; ret = -1;
@ -316,20 +320,22 @@ static int mc33810_chip_init(struct mc33810_priv *chip)
* - read diagnostic * - read diagnostic
*/ */
uint16_t spark_settings = {
//(3 << 9) | /* max dwell is 16 mS */ uint16_t spark_settings =
(2 << 9) | /* max dwell is 8 mS */ //(3 << 9) | /* max dwell is 16 mS */
BIT(8) | /* enable max dwell control */ (2 << 9) | /* max dwell is 8 mS */
(3 << 2) | /* Open Secondary OSFLT = 100 uS, default */ BIT(8) | /* enable max dwell control */
(1 << 0) | /* End Spark THreshold: VPWR +5.5V, defaul */ (3 << 2) | /* Open Secondary OSFLT = 100 uS, default */
0; (1 << 0) | /* End Spark THreshold: VPWR +5.5V, defaul */
ret = mc33810_spi_rw(chip, MC_CMD_SPARK(spark_settings), NULL); 0;
if (ret) { ret = mc33810_spi_rw(chip, MC_CMD_SPARK(spark_settings), NULL);
goto err_gpios; if (ret) {
goto err_gpios;
}
} }
/* n. set EN pin low - active */ /* n. set EN pin low - active */
if (cfg->en.port != NULL) { if (cfg->en.port) {
palClearPort(cfg->en.port, palClearPort(cfg->en.port,
PAL_PORT_BIT(cfg->en.pad)); PAL_PORT_BIT(cfg->en.pad));
} }
@ -339,15 +345,18 @@ static int mc33810_chip_init(struct mc33810_priv *chip)
err_gpios: err_gpios:
/* unmark pins */ /* unmark pins */
//gpio_pin_markUnused(cfg->spi_config.ssport, cfg->spi_config.sspad); //gpio_pin_markUnused(cfg->spi_config.ssport, cfg->spi_config.sspad);
if (cfg->en.port != NULL) { if (cfg->en.port) {
/* disable and mark unused */ /* disable and mark unused */
palSetPort(cfg->en.port, palSetPort(cfg->en.port,
PAL_PORT_BIT(cfg->en.pad)); PAL_PORT_BIT(cfg->en.pad));
gpio_pin_markUnused(cfg->en.port, cfg->en.pad); gpio_pin_markUnused(cfg->en.port, cfg->en.pad);
} }
for (n = 0; n < MC33810_DIRECT_OUTPUTS; n++)
if (cfg->direct_io[n].port) for (n = 0; n < MC33810_DIRECT_OUTPUTS; n++) {
if (cfg->direct_io[n].port) {
gpio_pin_markUnused(cfg->direct_io[n].port, cfg->direct_io[n].pad); gpio_pin_markUnused(cfg->direct_io[n].port, cfg->direct_io[n].pad);
}
}
return ret; return ret;
} }
@ -358,12 +367,12 @@ err_gpios:
* diagnostic update. * diagnostic update.
*/ */
static int mc33810_wake_driver(struct mc33810_priv *chip) static int mc33810_wake_driver(mc33810_priv *chip)
{ {
(void)chip; (void)chip;
/* Entering a reentrant critical zone.*/ /* Entering a reentrant critical zone.*/
syssts_t sts = chSysGetStatusAndLockX(); chibios_rt::CriticalSectionLocker csl;
chSemSignalI(&mc33810_wake); chSemSignalI(&mc33810_wake);
if (!port_is_isr_context()) { if (!port_is_isr_context()) {
/** /**
@ -372,8 +381,6 @@ static int mc33810_wake_driver(struct mc33810_priv *chip)
*/ */
chSchRescheduleS(); chSchRescheduleS();
} }
/* Leaving the critical zone.*/
chSysRestoreStatusX(sts);
return 0; return 0;
} }
@ -399,7 +406,7 @@ static THD_FUNCTION(mc33810_driver_thread, p)
for (i = 0; i < BOARD_MC33810_COUNT; i++) { for (i = 0; i < BOARD_MC33810_COUNT; i++) {
int ret; int ret;
struct mc33810_priv *chip; mc33810_priv *chip;
chip = &chips[i]; chip = &chips[i];
if ((chip->cfg == NULL) || if ((chip->cfg == NULL) ||
@ -428,19 +435,22 @@ static THD_FUNCTION(mc33810_driver_thread, p)
int mc33810_writePad(void *data, unsigned int pin, int value) int mc33810_writePad(void *data, unsigned int pin, int value)
{ {
struct mc33810_priv *chip; if ((pin >= MC33810_OUTPUTS) || !data) {
if ((pin >= MC33810_OUTPUTS) || (data == NULL))
return -1; return -1;
}
chip = (struct mc33810_priv *)data; auto chip = (mc33810_priv*)data;
{
// mutate driver state under lock
chibios_rt::CriticalSectionLocker csl;
if (value)
chip->o_state |= BIT(pin);
else
chip->o_state &= ~BIT(pin);
}
/* TODO: lock */
if (value)
chip->o_state |= BIT(pin);
else
chip->o_state &= ~BIT(pin);
/* TODO: unlock */
/* direct driven? */ /* direct driven? */
if (chip->o_direct_mask & BIT(pin)) { if (chip->o_direct_mask & BIT(pin)) {
/* TODO: ensure that output driver enabled */ /* TODO: ensure that output driver enabled */
@ -460,13 +470,13 @@ int mc33810_writePad(void *data, unsigned int pin, int value)
brain_pin_diag_e mc33810_getDiag(void *data, unsigned int pin) brain_pin_diag_e mc33810_getDiag(void *data, unsigned int pin)
{ {
int val; int val;
struct mc33810_priv *chip; mc33810_priv *chip;
brain_pin_diag_e diag = PIN_OK; int diag = PIN_OK;
if ((pin >= MC33810_DIRECT_OUTPUTS) || (data == NULL)) if ((pin >= MC33810_DIRECT_OUTPUTS) || (data == NULL))
return PIN_INVALID; return PIN_INVALID;
chip = (struct mc33810_priv *)data; chip = (mc33810_priv *)data;
if (pin < 4) { if (pin < 4) {
/* OUT drivers */ /* OUT drivers */
@ -497,15 +507,15 @@ brain_pin_diag_e mc33810_getDiag(void *data, unsigned int pin)
diag |= PIN_OVERLOAD; diag |= PIN_OVERLOAD;
} }
/* convert to some common enum? */ /* convert to some common enum? */
return diag; return static_cast<brain_pin_diag_e>(diag);
} }
int mc33810_init(void * data) int mc33810_init(void * data)
{ {
int ret; int ret;
struct mc33810_priv *chip; mc33810_priv *chip;
chip = (struct mc33810_priv *)data; chip = (mc33810_priv *)data;
ret = mc33810_chip_init(chip); ret = mc33810_chip_init(chip);
if (ret) if (ret)
@ -531,6 +541,7 @@ int mc33810_deinit(void *data)
} }
struct gpiochip_ops mc33810_ops = { struct gpiochip_ops mc33810_ops = {
.setPadMode = nullptr,
.writePad = mc33810_writePad, .writePad = mc33810_writePad,
.readPad = NULL, /* chip outputs only */ .readPad = NULL, /* chip outputs only */
.getDiag = mc33810_getDiag, .getDiag = mc33810_getDiag,
@ -543,11 +554,11 @@ struct gpiochip_ops mc33810_ops = {
* @details Checks for valid config * @details Checks for valid config
*/ */
int mc33810_add(brain_pin_e base, unsigned int index, const struct mc33810_config *cfg) int mc33810_add(brain_pin_e base, unsigned int index, const mc33810_config *cfg)
{ {
int i; int i;
int ret; int ret;
struct mc33810_priv *chip; mc33810_priv *chip;
/* no config or no such chip */ /* no config or no such chip */
if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_MC33810_COUNT)) if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_MC33810_COUNT))
@ -585,7 +596,7 @@ int mc33810_add(brain_pin_e base, unsigned int index, const struct mc33810_confi
return ret; return ret;
/* set default pin names, board init code can rewrite */ /* set default pin names, board init code can rewrite */
gpiochips_setPinNames(ret, mc33810_pin_names); gpiochips_setPinNames(static_cast<brain_pin_e>(ret), mc33810_pin_names);
chip->drv_state = MC33810_WAIT_INIT; chip->drv_state = MC33810_WAIT_INIT;
@ -594,7 +605,7 @@ int mc33810_add(brain_pin_e base, unsigned int index, const struct mc33810_confi
#else /* BOARD_MC33810_COUNT > 0 */ #else /* BOARD_MC33810_COUNT > 0 */
int mc33810_add(brain_pin_e base, unsigned int index, const struct mc33810_config *cfg) int mc33810_add(brain_pin_e base, unsigned int index, const mc33810_config *cfg)
{ {
(void)base; (void)index; (void)cfg; (void)base; (void)index; (void)cfg;

12
firmware/hw_layer/drivers/gpio/mc33810.h
View File

@ -37,14 +37,4 @@ struct mc33810_config {
} en; } en;
}; };
#ifdef __cplusplus int mc33810_add(brain_pin_e base, unsigned int index, const mc33810_config *cfg);
extern "C"
{
#endif /* __cplusplus */
int mc33810_add(brain_pin_e base, unsigned int index, const struct mc33810_config *cfg);
#ifdef __cplusplus
}
#endif /* __cplusplus */

40
firmware/hw_layer/drivers/gpio/mc33972.c → firmware/hw_layer/drivers/gpio/mc33972.cpp
View File

@ -97,13 +97,13 @@ struct mc33972_priv {
mc33972_drv_state drv_state; mc33972_drv_state drv_state;
}; };
static struct mc33972_priv chips[BOARD_MC33972_COUNT]; static mc33972_priv chips[BOARD_MC33972_COUNT];
/*==========================================================================*/ /*==========================================================================*/
/* Driver local functions. */ /* Driver local functions. */
/*==========================================================================*/ /*==========================================================================*/
static SPIDriver *get_bus(struct mc33972_priv *chip) static SPIDriver *get_bus(mc33972_priv *chip)
{ {
/* return non-const SPIDriver* from const struct cfg */ /* return non-const SPIDriver* from const struct cfg */
return chip->cfg->spi_bus; return chip->cfg->spi_bus;
@ -116,7 +116,7 @@ static SPIDriver *get_bus(struct mc33972_priv *chip)
* of diagnostic. This routine save it to chip->i_state * of diagnostic. This routine save it to chip->i_state
*/ */
static int mc33972_spi_w(struct mc33972_priv *chip, uint32_t tx) static int mc33972_spi_w(mc33972_priv *chip, uint32_t tx)
{ {
int i; int i;
uint8_t rxb[3]; uint8_t rxb[3];
@ -154,7 +154,7 @@ static int mc33972_spi_w(struct mc33972_priv *chip, uint32_t tx)
* @details Chip reply with input data and two bits of diag * @details Chip reply with input data and two bits of diag
*/ */
static int mc33972_update_status(struct mc33972_priv *chip) static int mc33972_update_status(mc33972_priv *chip)
{ {
int ret; int ret;
@ -167,7 +167,7 @@ static int mc33972_update_status(struct mc33972_priv *chip)
return ret; return ret;
} }
static int mc33972_update_pullups(struct mc33972_priv *chip) static int mc33972_update_pullups(mc33972_priv *chip)
{ {
int ret; int ret;
@ -180,7 +180,7 @@ static int mc33972_update_pullups(struct mc33972_priv *chip)
return ret; return ret;
} }
static int mc33972_comm_test(struct mc33972_priv *chip) static int mc33972_comm_test(mc33972_priv *chip)
{ {
int ret; int ret;
@ -212,7 +212,7 @@ static int mc33972_comm_test(struct mc33972_priv *chip)
* Performs reset. * Performs reset.
*/ */
static int mc33972_chip_init(struct mc33972_priv *chip) static int mc33972_chip_init(mc33972_priv *chip)
{ {
int ret; int ret;
@ -261,7 +261,7 @@ static int mc33972_chip_init(struct mc33972_priv *chip)
* @details Wake up driver. Will cause input and diagnostic * @details Wake up driver. Will cause input and diagnostic
* update * update
*/ */
static int mc33972_wake_driver(struct mc33972_priv *chip) static int mc33972_wake_driver(mc33972_priv *chip)
{ {
/* Entering a reentrant critical zone.*/ /* Entering a reentrant critical zone.*/
syssts_t sts = chSysGetStatusAndLockX(); syssts_t sts = chSysGetStatusAndLockX();
@ -286,7 +286,7 @@ static int mc33972_wake_driver(struct mc33972_priv *chip)
static THD_FUNCTION(mc33972_driver_thread, p) static THD_FUNCTION(mc33972_driver_thread, p)
{ {
int ret; int ret;
struct mc33972_priv *chip = p; mc33972_priv *chip = reinterpret_cast<mc33972_priv*>(p);
chRegSetThreadName(DRIVER_NAME); chRegSetThreadName(DRIVER_NAME);
@ -335,12 +335,12 @@ static THD_FUNCTION(mc33972_driver_thread, p)
/*==========================================================================*/ /*==========================================================================*/
static int mc33972_setPadMode(void *data, unsigned int pin, iomode_t mode) { static int mc33972_setPadMode(void *data, unsigned int pin, iomode_t mode) {
struct mc33972_priv *chip; mc33972_priv *chip;
if ((pin >= MC33972_INPUTS) || (data == NULL)) if ((pin >= MC33972_INPUTS) || (data == NULL))
return -1; return -1;
chip = (struct mc33972_priv *)data; chip = (mc33972_priv *)data;
/* currently driver doesn't know how to hanlde different modes */ /* currently driver doesn't know how to hanlde different modes */
(void)mode; (void)mode;
@ -360,12 +360,12 @@ static int mc33972_setPadMode(void *data, unsigned int pin, iomode_t mode) {
} }
static int mc33972_readPad(void *data, unsigned int pin) { static int mc33972_readPad(void *data, unsigned int pin) {
struct mc33972_priv *chip; mc33972_priv *chip;
if ((pin >= MC33972_INPUTS) || (data == NULL)) if ((pin >= MC33972_INPUTS) || (data == NULL))
return -1; return -1;
chip = (struct mc33972_priv *)data; chip = (mc33972_priv *)data;
/* convert to some common enum? */ /* convert to some common enum? */
return !!(chip->i_state & PIN_MASK(pin)); return !!(chip->i_state & PIN_MASK(pin));
@ -373,12 +373,12 @@ static int mc33972_readPad(void *data, unsigned int pin) {
static brain_pin_diag_e mc33972_getDiag(void *data, unsigned int pin) { static brain_pin_diag_e mc33972_getDiag(void *data, unsigned int pin) {
brain_pin_diag_e diag = PIN_OK; brain_pin_diag_e diag = PIN_OK;
struct mc33972_priv *chip; mc33972_priv *chip;
if ((pin >= MC33972_INPUTS) || (data == NULL)) if ((pin >= MC33972_INPUTS) || (data == NULL))
return PIN_INVALID; return PIN_INVALID;
chip = (struct mc33972_priv *)data; chip = (mc33972_priv *)data;
/* one diag bit for all pins */ /* one diag bit for all pins */
if (chip->i_state & FLAG_THERM) if (chip->i_state & FLAG_THERM)
@ -389,9 +389,9 @@ static brain_pin_diag_e mc33972_getDiag(void *data, unsigned int pin) {
static int mc33972_init(void * data) static int mc33972_init(void * data)
{ {
struct mc33972_priv *chip; mc33972_priv *chip;
chip = (struct mc33972_priv *)data; chip = (mc33972_priv *)data;
/* no pins enabled yet */ /* no pins enabled yet */
chip->en_pins = 0x0000; chip->en_pins = 0x0000;
@ -408,9 +408,9 @@ static int mc33972_init(void * data)
static int mc33972_deinit(void *data) static int mc33972_deinit(void *data)
{ {
struct mc33972_priv *chip; mc33972_priv *chip;
chip = (struct mc33972_priv *)data; chip = (mc33972_priv *)data;
/* TODO: disable pulls for all pins? */ /* TODO: disable pulls for all pins? */
@ -436,7 +436,7 @@ struct gpiochip_ops mc33972_ops = {
int mc33972_add(brain_pin_e base, unsigned int index, const struct mc33972_config *cfg) int mc33972_add(brain_pin_e base, unsigned int index, const struct mc33972_config *cfg)
{ {
struct mc33972_priv *chip; mc33972_priv *chip;
/* no config or no such chip */ /* no config or no such chip */
if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_MC33972_COUNT)) if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_MC33972_COUNT))

10
firmware/hw_layer/drivers/gpio/mc33972.h
View File

@ -24,14 +24,4 @@ struct mc33972_config {
#endif #endif
}; };
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
int mc33972_add(brain_pin_e base, unsigned int index, const struct mc33972_config *cfg); int mc33972_add(brain_pin_e base, unsigned int index, const struct mc33972_config *cfg);
#ifdef __cplusplus
}
#endif /* __cplusplus */

41
firmware/hw_layer/drivers/gpio/tle6240.c → firmware/hw_layer/drivers/gpio/tle6240.cpp
View File

@ -84,7 +84,7 @@ static THD_WORKING_AREA(tle6240_thread_1_wa, 256);
/* Driver */ /* Driver */
struct tle6240_priv { struct tle6240_priv {
const struct tle6240_config *cfg; const tle6240_config *cfg;
/* cached output state - state last send to chip */ /* cached output state - state last send to chip */
uint16_t o_state_cached; uint16_t o_state_cached;
/* state to be sended to chip */ /* state to be sended to chip */
@ -100,7 +100,7 @@ struct tle6240_priv {
tle6240_drv_state drv_state; tle6240_drv_state drv_state;
}; };
static struct tle6240_priv chips[BOARD_TLE6240_COUNT]; static tle6240_priv chips[BOARD_TLE6240_COUNT];
static const char* tle6240_pin_names[TLE6240_OUTPUTS] = { static const char* tle6240_pin_names[TLE6240_OUTPUTS] = {
"tle6240.OUT1", "tle6240.OUT2", "tle6240.OUT3", "tle6240.OUT4", "tle6240.OUT1", "tle6240.OUT2", "tle6240.OUT3", "tle6240.OUT4",
@ -113,7 +113,7 @@ static const char* tle6240_pin_names[TLE6240_OUTPUTS] = {
/* Driver local functions. */ /* Driver local functions. */
/*==========================================================================*/ /*==========================================================================*/
static SPIDriver *get_bus(struct tle6240_priv *chip) static SPIDriver *get_bus(tle6240_priv *chip)
{ {
/* return non-const SPIDriver* from const struct cfg */ /* return non-const SPIDriver* from const struct cfg */
return chip->cfg->spi_bus; return chip->cfg->spi_bus;
@ -125,7 +125,7 @@ static SPIDriver *get_bus(struct tle6240_priv *chip)
* after transaction. * after transaction.
*/ */
static int tle6240_spi_rw(struct tle6240_priv *chip, uint16_t tx, uint16_t *rx) static int tle6240_spi_rw(tle6240_priv *chip, uint16_t tx, uint16_t *rx)
{ {
uint16_t rxb; uint16_t rxb;
SPIDriver *spi = get_bus(chip); SPIDriver *spi = get_bus(chip);
@ -157,7 +157,7 @@ static int tle6240_spi_rw(struct tle6240_priv *chip, uint16_t tx, uint16_t *rx)
* @details Sends ORed data to register, also receive 2-bit diagnostic. * @details Sends ORed data to register, also receive 2-bit diagnostic.
*/ */
static int tle6240_update_output_and_diag(struct tle6240_priv *chip) static int tle6240_update_output_and_diag(tle6240_priv *chip)
{ {
int ret; int ret;
uint16_t out_data; uint16_t out_data;
@ -197,12 +197,12 @@ static int tle6240_update_output_and_diag(struct tle6240_priv *chip)
* Reads initial diagnostic state. * Reads initial diagnostic state.
*/ */
static int tle6240_chip_init(struct tle6240_priv *chip) static int tle6240_chip_init(tle6240_priv *chip)
{ {
int n; int n;
int ret; int ret;
uint16_t rx; uint16_t rx;
const struct tle6240_config *cfg = chip->cfg; const tle6240_config *cfg = chip->cfg;
/* mark pins used */ /* mark pins used */
//ret = gpio_pin_markUsed(cfg->spi_config.ssport, cfg->spi_config.sspad, DRIVER_NAME " CS"); //ret = gpio_pin_markUsed(cfg->spi_config.ssport, cfg->spi_config.sspad, DRIVER_NAME " CS");
@ -311,7 +311,7 @@ err_gpios:
* diagnostic update. * diagnostic update.
*/ */
static int tle6240_wake_driver(struct tle6240_priv *chip) static int tle6240_wake_driver(tle6240_priv *chip)
{ {
(void)chip; (void)chip;
@ -352,7 +352,7 @@ static THD_FUNCTION(tle6240_driver_thread, p)
for (i = 0; i < BOARD_TLE6240_COUNT; i++) { for (i = 0; i < BOARD_TLE6240_COUNT; i++) {
int ret; int ret;
struct tle6240_priv *chip; tle6240_priv *chip;
chip = &chips[i]; chip = &chips[i];
if ((chip->cfg == NULL) || if ((chip->cfg == NULL) ||
@ -380,12 +380,12 @@ static THD_FUNCTION(tle6240_driver_thread, p)
static int tle6240_writePad(void *data, unsigned int pin, int value) static int tle6240_writePad(void *data, unsigned int pin, int value)
{ {
struct tle6240_priv *chip; tle6240_priv *chip;
if ((pin >= TLE6240_OUTPUTS) || (data == NULL)) if ((pin >= TLE6240_OUTPUTS) || (data == NULL))
return -1; return -1;
chip = (struct tle6240_priv *)data; chip = (tle6240_priv *)data;
/* TODO: lock */ /* TODO: lock */
if (value) if (value)
@ -414,13 +414,13 @@ static int tle6240_writePad(void *data, unsigned int pin, int value)
static brain_pin_diag_e tle6240_getDiag(void *data, unsigned int pin) static brain_pin_diag_e tle6240_getDiag(void *data, unsigned int pin)
{ {
int val; int val;
brain_pin_diag_e diag; int diag;
struct tle6240_priv *chip; tle6240_priv *chip;
if ((pin >= TLE6240_OUTPUTS) || (data == NULL)) if ((pin >= TLE6240_OUTPUTS) || (data == NULL))
return PIN_INVALID; return PIN_INVALID;
chip = (struct tle6240_priv *)data; chip = (tle6240_priv *)data;
val = (chip->diag[(pin > 7) ? 1 : 0] >> ((pin % 8) * 2)) & 0x03; val = (chip->diag[(pin > 7) ? 1 : 0] >> ((pin % 8) * 2)) & 0x03;
if (val == 0x3) if (val == 0x3)
@ -433,15 +433,15 @@ static brain_pin_diag_e tle6240_getDiag(void *data, unsigned int pin)
else if (val == 0x0) else if (val == 0x0)
diag = PIN_SHORT_TO_GND; diag = PIN_SHORT_TO_GND;
return diag; return static_cast<brain_pin_diag_e>(diag);
} }
static int tle6240_init(void * data) static int tle6240_init(void * data)
{ {
int ret; int ret;
struct tle6240_priv *chip; tle6240_priv *chip;
chip = (struct tle6240_priv *)data; chip = (tle6240_priv *)data;
ret = tle6240_chip_init(chip); ret = tle6240_chip_init(chip);
if (ret) if (ret)
@ -467,6 +467,7 @@ static int tle6240_deinit(void *data)
} }
struct gpiochip_ops tle6240_ops = { struct gpiochip_ops tle6240_ops = {
.setPadMode = nullptr,
.writePad = tle6240_writePad, .writePad = tle6240_writePad,
.readPad = NULL, /* chip outputs only */ .readPad = NULL, /* chip outputs only */
.getDiag = tle6240_getDiag, .getDiag = tle6240_getDiag,
@ -479,11 +480,11 @@ struct gpiochip_ops tle6240_ops = {
* @details Checks for valid config * @details Checks for valid config
*/ */
int tle6240_add(brain_pin_e base, unsigned int index, const struct tle6240_config *cfg) int tle6240_add(brain_pin_e base, unsigned int index, const tle6240_config *cfg)
{ {
int i; int i;
int ret; int ret;
struct tle6240_priv *chip; tle6240_priv *chip;
/* no config or no such chip */ /* no config or no such chip */
if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_TLE6240_COUNT)) if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_TLE6240_COUNT))
@ -525,7 +526,7 @@ int tle6240_add(brain_pin_e base, unsigned int index, const struct tle6240_confi
#else /* BOARD_TLE6240_COUNT > 0 */ #else /* BOARD_TLE6240_COUNT > 0 */
int tle6240_add(brain_pin_e base, unsigned int index, const struct tle6240_config *cfg) int tle6240_add(brain_pin_e base, unsigned int index, const tle6240_config *cfg)
{ {
(void)base; (void)index; (void)cfg; (void)base; (void)index; (void)cfg;

10
firmware/hw_layer/drivers/gpio/tle6240.h
View File

@ -33,14 +33,4 @@ struct tle6240_config {
} reset; } reset;
}; };
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
int tle6240_add(brain_pin_e base, unsigned int index, const struct tle6240_config *cfg); int tle6240_add(brain_pin_e base, unsigned int index, const struct tle6240_config *cfg);
#ifdef __cplusplus
}
#endif /* __cplusplus */

98
firmware/hw_layer/drivers/gpio/tle8888.c → firmware/hw_layer/drivers/gpio/tle8888.cpp
View File

@ -70,8 +70,8 @@ typedef enum {
/* CD7:0 */ /* CD7:0 */
#define CMD_REG_DATA(d) (((d) & 0xff) << 8) #define CMD_REG_DATA(d) (((d) & 0xff) << 8)
#define CMD_W(a, d) (CMD_WRITE | CMD_REG_ADDR(a) | CMD_REG_DATA(d)) #define CMD_W(a, d) (static_cast<uint16_t>((CMD_WRITE | CMD_REG_ADDR(a) | CMD_REG_DATA(d))))
#define CMD_R(a) (CMD_READ | CMD_REG_ADDR(a)) #define CMD_R(a) (static_cast<uint16_t>((CMD_READ | CMD_REG_ADDR(a))))
#define REG_INVALID 0x00 #define REG_INVALID 0x00
@ -176,7 +176,7 @@ float vBattForTle8888 = 0;
/* Driver private data */ /* Driver private data */
struct tle8888_priv { struct tle8888_priv {
const struct tle8888_config *cfg; const tle8888_config *cfg;
/* thread stuff */ /* thread stuff */
thread_t *thread; thread_t *thread;
@ -241,7 +241,7 @@ struct tle8888_priv {
uint16_t rx; uint16_t rx;
}; };
static struct tle8888_priv chips[BOARD_TLE8888_COUNT]; static tle8888_priv chips[BOARD_TLE8888_COUNT];
static const char* tle8888_pin_names[TLE8888_SIGNALS] = { static const char* tle8888_pin_names[TLE8888_SIGNALS] = {
"TLE8888.INJ1", "TLE8888.INJ2", "TLE8888.INJ3", "TLE8888.INJ4", "TLE8888.INJ1", "TLE8888.INJ2", "TLE8888.INJ3", "TLE8888.INJ4",
@ -257,7 +257,7 @@ static const char* tle8888_pin_names[TLE8888_SIGNALS] = {
#if EFI_TUNER_STUDIO #if EFI_TUNER_STUDIO
// set debug_mode 31 // set debug_mode 31
void tle8888PostState(TsDebugChannels *debugChannels) { void tle8888PostState(TsDebugChannels *debugChannels) {
struct tle8888_priv *chip = &chips[0]; tle8888_priv *chip = &chips[0];
debugChannels->debugIntField1 = chip->wwd_err_cnt; debugChannels->debugIntField1 = chip->wwd_err_cnt;
debugChannels->debugIntField2 = chip->fwd_err_cnt; debugChannels->debugIntField2 = chip->fwd_err_cnt;
@ -278,13 +278,13 @@ void tle8888PostState(TsDebugChannels *debugChannels) {
/* Driver local functions. */ /* Driver local functions. */
/*==========================================================================*/ /*==========================================================================*/
static SPIDriver *get_bus(struct tle8888_priv *chip) static SPIDriver *get_bus(tle8888_priv *chip)
{ {
/* return non-const SPIDriver* from const struct cfg */ /* return non-const SPIDriver* from const struct cfg */
return chip->cfg->spi_bus; return chip->cfg->spi_bus;
} }
static int tle8888_spi_validate(struct tle8888_priv *chip, uint16_t rx) static int tle8888_spi_validate(tle8888_priv *chip, uint16_t rx)
{ {
uint8_t reg = getRegisterFromResponse(rx); uint8_t reg = getRegisterFromResponse(rx);
@ -322,7 +322,7 @@ static int tle8888_spi_validate(struct tle8888_priv *chip, uint16_t rx)
/** /**
* @returns -1 in case of communication error * @returns -1 in case of communication error
*/ */
static int tle8888_spi_rw(struct tle8888_priv *chip, uint16_t tx, uint16_t *rx_ptr) static int tle8888_spi_rw(tle8888_priv *chip, uint16_t tx, uint16_t *rx_ptr)
{ {
int ret; int ret;
uint16_t rx; uint16_t rx;
@ -368,7 +368,7 @@ static int tle8888_spi_rw(struct tle8888_priv *chip, uint16_t tx, uint16_t *rx_p
/** /**
* @return -1 in case of communication error * @return -1 in case of communication error
*/ */
static int tle8888_spi_rw_array(struct tle8888_priv *chip, const uint16_t *tx, uint16_t *rx, int n) static int tle8888_spi_rw_array(tle8888_priv *chip, const uint16_t *tx, uint16_t *rx, int n)
{ {
int ret; int ret;
uint16_t rxdata; uint16_t rxdata;
@ -422,7 +422,7 @@ static int tle8888_spi_rw_array(struct tle8888_priv *chip, const uint16_t *tx, u
* @details Sends ORed data to register. * @details Sends ORed data to register.
*/ */
static int tle8888_update_output(struct tle8888_priv *chip) static int tle8888_update_output(tle8888_priv *chip)
{ {
int i; int i;
int ret; int ret;
@ -480,7 +480,7 @@ static int tle8888_update_output(struct tle8888_priv *chip)
* @brief read TLE8888 diagnostic registers data. * @brief read TLE8888 diagnostic registers data.
* @details Chained read of several registers * @details Chained read of several registers
*/ */
static int tle8888_update_status_and_diag(struct tle8888_priv *chip) static int tle8888_update_status_and_diag(tle8888_priv *chip)
{ {
int ret = 0; int ret = 0;
const uint16_t tx[] = { const uint16_t tx[] = {
@ -527,10 +527,10 @@ static int tle8888_update_status_and_diag(struct tle8888_priv *chip)
* @details This is faster than updating Cont registers over SPI * @details This is faster than updating Cont registers over SPI
*/ */
static int tle8888_update_direct_output(struct tle8888_priv *chip, int pin, int value) static int tle8888_update_direct_output(tle8888_priv *chip, int pin, int value)
{ {
int index = -1; int index = -1;
const struct tle8888_config *cfg = chip->cfg; const tle8888_config *cfg = chip->cfg;
if (pin < 4) { if (pin < 4) {
/* OUT1..4 */ /* OUT1..4 */
@ -567,10 +567,10 @@ static int tle8888_update_direct_output(struct tle8888_priv *chip, int pin, int
* @details Wake up driver. Will cause output register update * @details Wake up driver. Will cause output register update
*/ */
static int tle8888_wake_driver(struct tle8888_priv *chip) static int tle8888_wake_driver(tle8888_priv *chip)
{ {
/* Entering a reentrant critical zone.*/ /* Entering a reentrant critical zone.*/
syssts_t sts = chSysGetStatusAndLockX(); chibios_rt::CriticalSectionLocker csl;
chSemSignalI(&chip->wake); chSemSignalI(&chip->wake);
if (!port_is_isr_context()) { if (!port_is_isr_context()) {
/** /**
@ -579,8 +579,6 @@ static int tle8888_wake_driver(struct tle8888_priv *chip)
*/ */
chSchRescheduleS(); chSchRescheduleS();
} }
/* Leaving the critical zone.*/
chSysRestoreStatusX(sts);
return 0; return 0;
} }
@ -598,15 +596,15 @@ static brain_pin_diag_e tle8888_2b_to_diag_no_temp(unsigned int bits)
static brain_pin_diag_e tle8888_2b_to_diag_with_temp(unsigned int bits) static brain_pin_diag_e tle8888_2b_to_diag_with_temp(unsigned int bits)
{ {
brain_pin_diag_e diag = tle8888_2b_to_diag_no_temp(bits); int diag = tle8888_2b_to_diag_no_temp(bits);
if (diag == PIN_SHORT_TO_BAT) if (diag == PIN_SHORT_TO_BAT)
diag |= PIN_DRIVER_OVERTEMP; diag |= PIN_DRIVER_OVERTEMP;
return diag; return static_cast<brain_pin_diag_e>(diag);
} }
static int tle8888_chip_reset(struct tle8888_priv *chip) { static int tle8888_chip_reset(tle8888_priv *chip) {
int ret; int ret;
ret = tle8888_spi_rw(chip, CMD_SR, NULL); ret = tle8888_spi_rw(chip, CMD_SR, NULL);
@ -620,7 +618,7 @@ static int tle8888_chip_reset(struct tle8888_priv *chip) {
return ret; return ret;
} }
static int tle8888_chip_init(struct tle8888_priv *chip) static int tle8888_chip_init(tle8888_priv *chip)
{ {
int ret; int ret;
@ -687,7 +685,7 @@ static int tle8888_chip_init(struct tle8888_priv *chip)
/* TODO: unlock? */ /* TODO: unlock? */
if (ret == 0) { if (ret == 0) {
const struct tle8888_config *cfg = chip->cfg; const tle8888_config *cfg = chip->cfg;
/* enable pins */ /* enable pins */
if (cfg->ign_en.port) if (cfg->ign_en.port)
@ -703,13 +701,13 @@ static int tle8888_chip_init(struct tle8888_priv *chip)
return ret; return ret;
} }
static int tle8888_wwd_feed(struct tle8888_priv *chip) { static int tle8888_wwd_feed(tle8888_priv *chip) {
tle8888_spi_rw(chip, CMD_WWDSERVICECMD, NULL); tle8888_spi_rw(chip, CMD_WWDSERVICECMD, NULL);
return 0; return 0;
} }
static int tle8888_fwd_feed(struct tle8888_priv *chip) { static int tle8888_fwd_feed(tle8888_priv *chip) {
uint16_t reg; uint16_t reg;
tle8888_spi_rw(chip, CMD_FWDSTAT(1), NULL); tle8888_spi_rw(chip, CMD_FWDSTAT(1), NULL);
@ -731,7 +729,7 @@ static int tle8888_fwd_feed(struct tle8888_priv *chip) {
return 0; return 0;
} }
static int tle8888_wd_get_status(struct tle8888_priv *chip) { static int tle8888_wd_get_status(tle8888_priv *chip) {
uint16_t reg; uint16_t reg;
tle8888_spi_rw(chip, CMD_WDDIAG, NULL); tle8888_spi_rw(chip, CMD_WDDIAG, NULL);
@ -753,7 +751,7 @@ static int tle8888_wd_get_status(struct tle8888_priv *chip) {
return 0; return 0;
} }
static int tle8888_wd_feed(struct tle8888_priv *chip) { static int tle8888_wd_feed(tle8888_priv *chip) {
bool update_status; bool update_status;
if (chip->wwd_ts <= chVTGetSystemTimeX()) { if (chip->wwd_ts <= chVTGetSystemTimeX()) {
@ -791,7 +789,7 @@ static int tle8888_wd_feed(struct tle8888_priv *chip) {
} }
} }
static int tle8888_calc_sleep_interval(struct tle8888_priv *chip) { static int tle8888_calc_sleep_interval(tle8888_priv *chip) {
systime_t now = chVTGetSystemTimeX(); systime_t now = chVTGetSystemTimeX();
sysinterval_t wwd_delay = chTimeDiffX(now, chip->wwd_ts); sysinterval_t wwd_delay = chTimeDiffX(now, chip->wwd_ts);
@ -810,7 +808,7 @@ static int tle8888_calc_sleep_interval(struct tle8888_priv *chip) {
/*==========================================================================*/ /*==========================================================================*/
static THD_FUNCTION(tle8888_driver_thread, p) { static THD_FUNCTION(tle8888_driver_thread, p) {
struct tle8888_priv *chip = p; tle8888_priv *chip = reinterpret_cast<tle8888_priv*>(p);
sysinterval_t poll_interval = 0; sysinterval_t poll_interval = 0;
chRegSetThreadName(DRIVER_NAME); chRegSetThreadName(DRIVER_NAME);
@ -907,7 +905,7 @@ static int tle8888_setPadMode(void *data, unsigned int pin, iomode_t mode) {
if ((pin >= TLE8888_SIGNALS) || (data == NULL)) if ((pin >= TLE8888_SIGNALS) || (data == NULL))
return -1; return -1;
struct tle8888_priv *chip = (struct tle8888_priv *)data; tle8888_priv *chip = (tle8888_priv *)data;
/* if someone has requested MR pin - switch it to manual mode */ /* if someone has requested MR pin - switch it to manual mode */
if (pin == TLE8888_OUTPUT_MR) { if (pin == TLE8888_OUTPUT_MR) {
@ -940,7 +938,7 @@ static int tle8888_writePad(void *data, unsigned int pin, int value) {
if ((pin >= TLE8888_OUTPUTS) || (data == NULL)) if ((pin >= TLE8888_OUTPUTS) || (data == NULL))
return -1; return -1;
struct tle8888_priv *chip = (struct tle8888_priv *)data; tle8888_priv *chip = (tle8888_priv *)data;
/* TODO: lock */ /* TODO: lock */
if (value) { if (value) {
@ -962,7 +960,7 @@ static int tle8888_readPad(void *data, unsigned int pin) {
if ((pin >= TLE8888_OUTPUTS) || (data == NULL)) if ((pin >= TLE8888_OUTPUTS) || (data == NULL))
return -1; return -1;
struct tle8888_priv *chip = (struct tle8888_priv *)data; tle8888_priv *chip = (tle8888_priv *)data;
if (pin < TLE8888_OUTPUTS_REGULAR) { if (pin < TLE8888_OUTPUTS_REGULAR) {
/* return output state */ /* return output state */
@ -981,7 +979,7 @@ static int tle8888_readPad(void *data, unsigned int pin) {
return -1; return -1;
} }
static brain_pin_diag_e tle8888_getOutputDiag(struct tle8888_priv *chip, unsigned int pin) static brain_pin_diag_e tle8888_getOutputDiag(tle8888_priv *chip, unsigned int pin)
{ {
/* OUT1..OUT4, indexes 0..3 */ /* OUT1..OUT4, indexes 0..3 */
if (pin < 4) if (pin < 4)
@ -992,7 +990,7 @@ static brain_pin_diag_e tle8888_getOutputDiag(struct tle8888_priv *chip, unsigne
} }
/* OUT8 to OUT13, indexes 7..12 */ /* OUT8 to OUT13, indexes 7..12 */
if (pin < 13) { if (pin < 13) {
brain_pin_diag_e ret; int ret;
/* OUT8 */ /* OUT8 */
if (pin == 7) if (pin == 7)
@ -1008,7 +1006,7 @@ static brain_pin_diag_e tle8888_getOutputDiag(struct tle8888_priv *chip, unsigne
if (chip->PPOVDiag & BIT(pin - 7)) if (chip->PPOVDiag & BIT(pin - 7))
ret |= PIN_SHORT_TO_BAT; ret |= PIN_SHORT_TO_BAT;
return ret; return static_cast<brain_pin_diag_e>(ret);
} }
/* OUT14 to OUT16, indexes 13..15 */ /* OUT14 to OUT16, indexes 13..15 */
if (pin < 16) if (pin < 16)
@ -1019,7 +1017,7 @@ static brain_pin_diag_e tle8888_getOutputDiag(struct tle8888_priv *chip, unsigne
/* OUT21..OUT24, indexes 20..23 */ /* OUT21..OUT24, indexes 20..23 */
if (pin < 24) { if (pin < 24) {
/* half bridges */ /* half bridges */
brain_pin_diag_e diag; int diag;
diag = tle8888_2b_to_diag_no_temp((chip->BriDiag[0] >> ((pin - 20) * 2)) & 0x03); diag = tle8888_2b_to_diag_no_temp((chip->BriDiag[0] >> ((pin - 20) * 2)) & 0x03);
if (((pin == 22) || (pin == 23)) && if (((pin == 22) || (pin == 23)) &&
@ -1031,7 +1029,7 @@ static brain_pin_diag_e tle8888_getOutputDiag(struct tle8888_priv *chip, unsigne
if (chip->BriDiag[1] & BIT(pin - 20)) if (chip->BriDiag[1] & BIT(pin - 20))
diag |= PIN_OVERLOAD; /* overcurrent */ diag |= PIN_OVERLOAD; /* overcurrent */
return diag; return static_cast<brain_pin_diag_e>(diag);
} }
if (pin < 28) if (pin < 28)
return tle8888_2b_to_diag_with_temp((chip->IgnDiag >> ((pin - 24) * 2)) & 0x03); return tle8888_2b_to_diag_with_temp((chip->IgnDiag >> ((pin - 24) * 2)) & 0x03);
@ -1039,7 +1037,7 @@ static brain_pin_diag_e tle8888_getOutputDiag(struct tle8888_priv *chip, unsigne
return PIN_OK; return PIN_OK;
} }
static brain_pin_diag_e tle8888_getInputDiag(struct tle8888_priv *chip, unsigned int pin) static brain_pin_diag_e tle8888_getInputDiag(tle8888_priv *chip, unsigned int pin)
{ {
(void)chip; (void)pin; (void)chip; (void)pin;
@ -1051,7 +1049,7 @@ static brain_pin_diag_e tle8888_getDiag(void *data, unsigned int pin)
if ((pin >= TLE8888_SIGNALS) || (data == NULL)) if ((pin >= TLE8888_SIGNALS) || (data == NULL))
return PIN_INVALID; return PIN_INVALID;
struct tle8888_priv *chip = (struct tle8888_priv *)data; tle8888_priv *chip = (tle8888_priv *)data;
if (pin < TLE8888_OUTPUTS) if (pin < TLE8888_OUTPUTS)
return tle8888_getOutputDiag(chip, pin); return tle8888_getOutputDiag(chip, pin);
@ -1061,8 +1059,8 @@ static brain_pin_diag_e tle8888_getDiag(void *data, unsigned int pin)
static int tle8888_chip_init_data(void * data) { static int tle8888_chip_init_data(void * data) {
int i; int i;
struct tle8888_priv *chip = (struct tle8888_priv *)data; tle8888_priv *chip = (tle8888_priv *)data;
const struct tle8888_config *cfg = chip->cfg; const tle8888_config *cfg = chip->cfg;
int ret = 0; int ret = 0;
@ -1172,9 +1170,9 @@ err_gpios:
static int tle8888_init(void * data) static int tle8888_init(void * data)
{ {
int ret; int ret;
struct tle8888_priv *chip; tle8888_priv *chip;
chip = (struct tle8888_priv *)data; chip = (tle8888_priv *)data;
/* check for multiple init */ /* check for multiple init */
if (chip->drv_state != TLE8888_WAIT_INIT) if (chip->drv_state != TLE8888_WAIT_INIT)
@ -1206,8 +1204,8 @@ static int tle8888_init(void * data)
static int tle8888_deinit(void *data) static int tle8888_deinit(void *data)
{ {
struct tle8888_priv *chip = (struct tle8888_priv *)data; tle8888_priv *chip = (tle8888_priv *)data;
const struct tle8888_config *cfg = chip->cfg; const tle8888_config *cfg = chip->cfg;
/* disable pins */ /* disable pins */
if (cfg->ign_en.port) if (cfg->ign_en.port)
@ -1236,7 +1234,7 @@ struct gpiochip_ops tle8888_ops = {
* @return return gpio chip base * @return return gpio chip base
*/ */
int tle8888_add(brain_pin_e base, unsigned int index, const struct tle8888_config *cfg) { int tle8888_add(brain_pin_e base, unsigned int index, const tle8888_config *cfg) {
efiAssert(OBD_PCM_Processor_Fault, cfg != NULL, "8888CFG", 0) efiAssert(OBD_PCM_Processor_Fault, cfg != NULL, "8888CFG", 0)
@ -1249,7 +1247,7 @@ int tle8888_add(brain_pin_e base, unsigned int index, const struct tle8888_confi
if (cfg->spi_config.ssport == NULL) if (cfg->spi_config.ssport == NULL)
return -1; return -1;
struct tle8888_priv *chip = &chips[index]; tle8888_priv *chip = &chips[index];
/* already initted? */ /* already initted? */
if (chip->cfg != NULL) if (chip->cfg != NULL)
@ -1277,14 +1275,14 @@ int tle8888_add(brain_pin_e base, unsigned int index, const struct tle8888_confi
/*==========================================================================*/ /*==========================================================================*/
void tle8888_read_reg(uint16_t reg, uint16_t *val) void tle8888_read_reg(uint16_t reg, uint16_t *val)
{ {
struct tle8888_priv *chip = &chips[0]; tle8888_priv *chip = &chips[0];
tle8888_spi_rw(chip, CMD_R(reg), val); tle8888_spi_rw(chip, CMD_R(reg), val);
} }
void tle8888_req_init(void) void tle8888_req_init(void)
{ {
struct tle8888_priv *chip = &chips[0]; tle8888_priv *chip = &chips[0];
chip->need_init = true; chip->need_init = true;
chip->init_req_cnt++; chip->init_req_cnt++;
@ -1292,7 +1290,7 @@ void tle8888_req_init(void)
#else /* BOARD_TLE8888_COUNT > 0 */ #else /* BOARD_TLE8888_COUNT > 0 */
int tle8888_add(brain_pin_e base, unsigned int index, const struct tle8888_config *cfg) int tle8888_add(brain_pin_e base, unsigned int index, const tle8888_config *cfg)
{ {
(void)base; (void)index; (void)cfg; (void)base; (void)index; (void)cfg;

10
firmware/hw_layer/drivers/gpio/tle8888.h
View File

@ -72,11 +72,6 @@ struct tle8888_config {
bool stepper; bool stepper;
}; };
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
/** /**
* @return return gpio chip base * @return return gpio chip base
*/ */
@ -90,8 +85,3 @@ void tle8888_req_init(void);
#include "tunerstudio_debug_struct.h" #include "tunerstudio_debug_struct.h"
void tle8888PostState(TsDebugChannels *tsDebugChannels); void tle8888PostState(TsDebugChannels *tsDebugChannels);
#endif /* EFI_TUNER_STUDIO */ #endif /* EFI_TUNER_STUDIO */
#ifdef __cplusplus
}
#endif /* __cplusplus */

2
firmware/integration/rusefi_config.txt
View File

@ -1,5 +1,3 @@
! this file defines the format of rusEfi persistent configuration structure ! this file defines the format of rusEfi persistent configuration structure
! this file is processed by ../java_tools/config_definition.jar tool ! this file is processed by ../java_tools/config_definition.jar tool
! comments start with '!' ! comments start with '!'

3
java_tools/configuration_definition/src/com/rusefi/output/BaseCHeaderConsumer.java
View File

@ -56,9 +56,6 @@ public abstract class BaseCHeaderConsumer implements ConfigurationConsumer {
content.append("\t/** total size " + currentOffset + "*/" + EOL); content.append("\t/** total size " + currentOffset + "*/" + EOL);
content.append("};" + EOL + EOL); content.append("};" + EOL + EOL);
// https://stackoverflow.com/questions/1675351/typedef-struct-vs-struct-definitions
content.append("typedef struct " + structure.name + " " + structure.name + ";" + EOL + EOL);
} }
public StringBuilder getContent() { public StringBuilder getContent() {

1
java_tools/configuration_definition/src/com/rusefi/test/ConfigFieldParserTest.java
View File

@ -316,7 +316,6 @@ public class ConfigFieldParserTest {
"\t/** total size 4*/\n" + "\t/** total size 4*/\n" +
"};\n" + "};\n" +
"\n" + "\n" +
"typedef struct pid_s pid_s;\n" +
"\n", consumer.getContent().toString()); "\n", consumer.getContent().toString());
} }

1
simulator/Makefile
View File

@ -169,6 +169,7 @@ CPPSRC = $(ALLCPPSRC) \
$(HW_LAYER_EMS_CPP) \ $(HW_LAYER_EMS_CPP) \
$(HW_SENSORS_CPP) \ $(HW_SENSORS_CPP) \
$(HW_LAYER_DRIVERS_CPP) \ $(HW_LAYER_DRIVERS_CPP) \
$(HW_LAYER_DRIVERS_CORE_CPP) \
$(TRIGGER_SRC_CPP) \ $(TRIGGER_SRC_CPP) \
$(TRIGGER_DECODERS_SRC_CPP) \ $(TRIGGER_DECODERS_SRC_CPP) \
$(SYSTEMSRC_CPP) \ $(SYSTEMSRC_CPP) \

2
unit_tests/Makefile
View File

@ -42,7 +42,7 @@ CPPSRC += $(ALLCPPSRC) \
$(TRIGGER_DECODERS_SRC_CPP) \ $(TRIGGER_DECODERS_SRC_CPP) \
$(ENGINES_SRC_CPP) \ $(ENGINES_SRC_CPP) \
$(CONTROLLERS_SRC_CPP) \ $(CONTROLLERS_SRC_CPP) \
$(HW_LAYER_DRIVERS_CPP) \ $(HW_LAYER_DRIVERS_CORE_CPP) \
$(CONTROLLERS_CORE_SRC_CPP) \ $(CONTROLLERS_CORE_SRC_CPP) \
$(CONTROLLERS_MATH_SRC_CPP) \ $(CONTROLLERS_MATH_SRC_CPP) \
$(CONTROLLERS_SENSORS_SRC_CPP) \ $(CONTROLLERS_SENSORS_SRC_CPP) \