From 4e7715fab222c7862b4fe0076a617d48b347a715 Mon Sep 17 00:00:00 2001
From: andreika-git <andreika-git@users.noreply.github.com>
Date: Sun, 14 Apr 2019 20:35:30 +0300
Subject: [PATCH] Add more portability to smart_gpio & SPI (#754)

---
 firmware/hw_layer/drivers/gpio/tle8888.c      | 18 +----------
 .../hw_layer/ports/stm32/stm32f4/mpu_util.h   |  7 +++++
 .../hw_layer/ports/stm32/stm32f7/mpu_util.h   |  8 +++++
 firmware/hw_layer/smart_gpio.cpp              |  2 ++
 firmware/hw_layer/smart_gpio.h                | 31 -------------------
 5 files changed, 18 insertions(+), 48 deletions(-)

diff --git a/firmware/hw_layer/drivers/gpio/tle8888.c b/firmware/hw_layer/drivers/gpio/tle8888.c
index 74770a8475..b81b44549d 100644
--- a/firmware/hw_layer/drivers/gpio/tle8888.c
+++ b/firmware/hw_layer/drivers/gpio/tle8888.c
@@ -28,6 +28,7 @@ EXTERN_CONFIG;
 #include "gpio/tle8888.h"
 #include "pin_repository.h"
 #include "rfiutil.h"
+#include "mpu_util.h"
 
 #if EFI_TUNER_STUDIO
 #include "tunerstudio.h"
@@ -537,7 +538,6 @@ static struct tle8888_config tle8888_cfg = {
 		.end_cb = NULL,
 		.ssport = GPIOF,
 		.sspad = 0U,
-#if defined(STM_F4_FAMILY)
 		.cr1 =
 			SPI_CR1_16BIT_MODE |
 			SPI_CR1_SSM |
@@ -548,22 +548,6 @@ static struct tle8888_config tle8888_cfg = {
 			SPI_CR1_CPHA |
 			0,
 		.cr2 = SPI_CR2_16BIT_MODE
-#elif defined(STM_F7_FAMILY)
-		.cr1 =
-			SPI_CR1_16BIT_MODE |
-			SPI_CR1_SSM |
-			SPI_CR1_SSI |
-			SPI_CR1_LSBFIRST |
-			SPI_CR1_MSTR |
-			((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
-			SPI_CR1_CPHA |
-			0,
-		.cr2 = SPI_CR2_16BIT_MODE
-#else
-		unexpected platform
-#endif
-
-
 	},
 	.direct_io = {
 		[0] = {.port = NULL,	.pad = 0,	.output = 9},
diff --git a/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h b/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h
index 7222b61734..d0d14de419 100644
--- a/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h
+++ b/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h
@@ -65,6 +65,13 @@ BOR_Result_t BOR_Set(BOR_Level_t BORValue);
 #define ADC_CR2_SWSTART ((uint32_t)0x40000000)
 #endif
 
+#define SPI_CR1_16BIT_MODE SPI_CR1_DFF
+#define SPI_CR2_16BIT_MODE 0
+
+// TODO
+#define SPI_CR1_24BIT_MODE 0
+#define SPI_CR2_24BIT_MODE 0
+
 void baseHardwareInit(void);
 void turnOnSpi(spi_device_e device);
 
diff --git a/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h b/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h
index 123e3c6dcf..835d3b23e2 100644
--- a/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h
+++ b/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h
@@ -65,6 +65,14 @@ BOR_Result_t BOR_Set(BOR_Level_t BORValue);
 #define ADC_CR2_SWSTART ((uint32_t)0x40000000)
 #endif
 
+#define SPI_CR1_16BIT_MODE 0
+#define SPI_CR2_16BIT_MODE SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
+
+#define SPI_CR1_24BIT_MODE 0
+/* 3 x 8-bit transfer */
+#define SPI_CR2_24BIT_MODE SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
+
+
 void baseHardwareInit(void);
 void turnOnSpi(spi_device_e device);
 
diff --git a/firmware/hw_layer/smart_gpio.cpp b/firmware/hw_layer/smart_gpio.cpp
index e123ff99b1..c93c52ea2c 100644
--- a/firmware/hw_layer/smart_gpio.cpp
+++ b/firmware/hw_layer/smart_gpio.cpp
@@ -12,6 +12,7 @@
 #include "efi_gpio.h"
 #include "engine_configuration.h"
 #include "hardware.h"
+#include "mpu_util.h"
 #include "gpio_ext.h"
 #include "drivers/gpio/tle6240.h"
 #include "drivers/gpio/mc33972.h"
@@ -28,6 +29,7 @@ struct tle6240_config tle6240 = {
 		.ssport = GPIOF,
 		.sspad = 0U,
 		.cr1 =
+			SPI_CR1_16BIT_MODE |
 			SPI_CR1_SSM |
 			SPI_CR1_SSI |
 			/* SPI_CR1_LSBFIRST | */
diff --git a/firmware/hw_layer/smart_gpio.h b/firmware/hw_layer/smart_gpio.h
index 525aca9382..0ea9eb6c9b 100644
--- a/firmware/hw_layer/smart_gpio.h
+++ b/firmware/hw_layer/smart_gpio.h
@@ -15,35 +15,4 @@
 
 void initSmartGpio(void);
 
-#if (defined(STM32F405xx) || defined(STM32F407xx) || defined (STM32F469xx))
- #define	STM_F4_FAMILY
-#elif (defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F746xx))
- #define	STM_F7_FAMILY
-#else
- unexpected platform
-#endif
-
-
-#if (BOARD_EXT_GPIOCHIPS > 0)
-
-#if defined(STM_F4_FAMILY)
- #define SPI_CR1_16BIT_MODE SPI_CR1_DFF
- #define SPI_CR2_16BIT_MODE 0
-
- // TODO
- #define SPI_CR1_24BIT_MODE 0
- #define SPI_CR2_24BIT_MODE 0
-#elif defined(STM_F7_FAMILY)
- #define SPI_CR1_16BIT_MODE 0
- #define SPI_CR2_16BIT_MODE SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
-
- #define SPI_CR1_24BIT_MODE 0
- /* 3 x 8-bit transfer */
- #define SPI_CR2_24BIT_MODE SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
-#else
- unexpected platform
-#endif
-
-#endif /* (BOARD_EXT_GPIOCHIPS > 0) */
-
 #endif /* HW_LAYER_SMART_GPIO_H_ */