mirror of https://github.com/FOME-Tech/fome-fw.git
dead
This commit is contained in:
parent
891f311531
commit
54e3bb8b75
|
@ -1,552 +0,0 @@
|
|||
diff -uwr Chibios.16_original/.git/FETCH_HEAD Chibios.16_rusefi/.git/FETCH_HEAD
|
||||
--- Chibios.16_original/.git/FETCH_HEAD 2018-01-23 12:09:57.277990800 -0500
|
||||
+++ Chibios.16_rusefi/.git/FETCH_HEAD 2018-01-23 12:09:57.943028800 -0500
|
||||
@@ -1,9 +1,10 @@
|
||||
-c8198eb36c2174484141f0119f720bcf0468a0b9 branch 'stable_16.1.x' of https://github.com/rusefi/ChibiOS
|
||||
+93fdc45672692a73b3734b0e77f5978944477a2b branch 'stable_rusefi' of https://github.com/rusefi/ChibiOS
|
||||
b263680b98fbb41e939ce62e55916254ece4acc7 not-for-merge branch 'master' of https://github.com/rusefi/ChibiOS
|
||||
a4b2c113e74e026dfc7cc02060b32ab3f047ae8d not-for-merge branch 'revert-10-master' of https://github.com/rusefi/ChibiOS
|
||||
e61ff3aa1c1fd0f1057e08ae4551abbc01595550 not-for-merge branch 'stable_1.0.x' of https://github.com/rusefi/ChibiOS
|
||||
3957b74f871e2ac11b8447aa067b1cece4861970 not-for-merge branch 'stable_1.2.x' of https://github.com/rusefi/ChibiOS
|
||||
06c45ae2ef94ff95bbdab317bc53aebe7c51aacc not-for-merge branch 'stable_1.4.x' of https://github.com/rusefi/ChibiOS
|
||||
+c8198eb36c2174484141f0119f720bcf0468a0b9 not-for-merge branch 'stable_16.1.x' of https://github.com/rusefi/ChibiOS
|
||||
c71ef710730191f767d077bc660142b1c8984915 not-for-merge branch 'stable_17.6.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
c71ef710730191f767d077bc660142b1c8984915 not-for-merge branch 'stable_17.6.x' of https://github.com/rusefi/ChibiOS
|
||||
e324eb668a8399c5e5342d3111d175f42f14b50b not-for-merge branch 'stable_2.0.x' of https://github.com/rusefi/ChibiOS
|
||||
@@ -12,5 +13,4 @@
|
||||
0b0e793cc832373af431029878bc4b6f8c3e5fa5 not-for-merge branch 'stable_2.6.x' of https://github.com/rusefi/ChibiOS
|
||||
7596c99a218929e8c93341e2afa353134b64e233 not-for-merge branch 'stable_3.0.x' of https://github.com/rusefi/ChibiOS
|
||||
a21bf76fe0b033ce00052f30ccec286a422d9654 not-for-merge branch 'stable_log_issue' of https://github.com/rusefi/ChibiOS
|
||||
-93fdc45672692a73b3734b0e77f5978944477a2b not-for-merge branch 'stable_rusefi' of https://github.com/rusefi/ChibiOS
|
||||
454717f06820c73845dac29dc95b72fbe7165704 not-for-merge branch 'trunk' of https://github.com/rusefi/ChibiOS
|
||||
diff -uwr Chibios.16_original/.git/HEAD Chibios.16_rusefi/.git/HEAD
|
||||
--- Chibios.16_original/.git/HEAD 2018-01-23 11:24:49.134093800 -0500
|
||||
+++ Chibios.16_rusefi/.git/HEAD 2018-01-23 11:25:49.489545900 -0500
|
||||
@@ -1 +1 @@
|
||||
-ref: refs/heads/stable_16.1.x
|
||||
+ref: refs/heads/stable_rusefi
|
||||
diff -uwr Chibios.16_original/.git/ORIG_HEAD Chibios.16_rusefi/.git/ORIG_HEAD
|
||||
--- Chibios.16_original/.git/ORIG_HEAD 2018-01-23 12:09:57.324993400 -0500
|
||||
+++ Chibios.16_rusefi/.git/ORIG_HEAD 2018-01-23 12:09:57.990031500 -0500
|
||||
@@ -1 +1 @@
|
||||
-c8198eb36c2174484141f0119f720bcf0468a0b9
|
||||
+02f9f87361e018ce50bfe19dd9927012b9d97db8
|
||||
diff -uwr Chibios.16_original/.git/config Chibios.16_rusefi/.git/config
|
||||
--- Chibios.16_original/.git/config 2018-01-23 11:24:49.141094200 -0500
|
||||
+++ Chibios.16_rusefi/.git/config 2018-01-23 11:25:49.499546500 -0500
|
||||
@@ -8,6 +8,6 @@
|
||||
[remote "origin"]
|
||||
url = https://github.com/rusefi/ChibiOS
|
||||
fetch = +refs/heads/*:refs/remotes/origin/*
|
||||
-[branch "stable_16.1.x"]
|
||||
+[branch "stable_rusefi"]
|
||||
remote = origin
|
||||
- merge = refs/heads/stable_16.1.x
|
||||
+ merge = refs/heads/stable_rusefi
|
||||
Binary files Chibios.16_original/.git/index and Chibios.16_rusefi/.git/index differ
|
||||
diff -uwr Chibios.16_original/.git/logs/HEAD Chibios.16_rusefi/.git/logs/HEAD
|
||||
--- Chibios.16_original/.git/logs/HEAD 2018-01-23 11:24:49.138094000 -0500
|
||||
+++ Chibios.16_rusefi/.git/logs/HEAD 2018-01-23 12:09:58.083036800 -0500
|
||||
@@ -1 +1,2 @@
|
||||
-0000000000000000000000000000000000000000 c8198eb36c2174484141f0119f720bcf0468a0b9 rusefi <arro239+rusefi@gmail.com> 1516724689 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+0000000000000000000000000000000000000000 02f9f87361e018ce50bfe19dd9927012b9d97db8 rusefi <arro239+rusefi@gmail.com> 1516724749 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+02f9f87361e018ce50bfe19dd9927012b9d97db8 93fdc45672692a73b3734b0e77f5978944477a2b rusefi <arro239+rusefi@gmail.com> 1516727398 -0500 pull: Fast-forward
|
||||
Only in Chibios.16_original/.git/logs/refs/heads: stable_16.1.x
|
||||
Only in Chibios.16_rusefi/.git/logs/refs/heads: stable_rusefi
|
||||
diff -uwr Chibios.16_original/.git/logs/refs/remotes/origin/HEAD Chibios.16_rusefi/.git/logs/refs/remotes/origin/HEAD
|
||||
--- Chibios.16_original/.git/logs/refs/remotes/origin/HEAD 2018-01-23 11:24:49.133093700 -0500
|
||||
+++ Chibios.16_rusefi/.git/logs/refs/remotes/origin/HEAD 2018-01-23 11:25:49.487545800 -0500
|
||||
@@ -1 +1 @@
|
||||
-0000000000000000000000000000000000000000 b263680b98fbb41e939ce62e55916254ece4acc7 rusefi <arro239+rusefi@gmail.com> 1516724689 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+0000000000000000000000000000000000000000 b263680b98fbb41e939ce62e55916254ece4acc7 rusefi <arro239+rusefi@gmail.com> 1516724749 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
Only in Chibios.16_original/.git/refs/heads: stable_16.1.x
|
||||
Only in Chibios.16_rusefi/.git/refs/heads: stable_rusefi
|
||||
diff -uwr Chibios.16_original/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h Chibios.16_rusefi/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h
|
||||
--- Chibios.16_original/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h 2018-01-23 11:24:50.558175200 -0500
|
||||
+++ Chibios.16_rusefi/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h 2018-01-23 11:25:50.422599300 -0500
|
||||
@@ -67,7 +67,7 @@
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_USE_ADC2 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
-#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
+#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
|
||||
Only in Chibios.16_original: doc
|
||||
diff -uwr Chibios.16_original/os/common/ports/ARMCMx/compilers/GCC/rules.mk Chibios.16_rusefi/os/common/ports/ARMCMx/compilers/GCC/rules.mk
|
||||
--- Chibios.16_original/os/common/ports/ARMCMx/compilers/GCC/rules.mk 2018-01-23 11:24:51.324219100 -0500
|
||||
+++ Chibios.16_rusefi/os/common/ports/ARMCMx/compilers/GCC/rules.mk 2018-01-23 11:25:50.907627000 -0500
|
||||
@@ -93,8 +93,9 @@
|
||||
TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
|
||||
TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
|
||||
ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
|
||||
-ASMXOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
|
||||
-OBJS := $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
|
||||
+#ASMXOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
|
||||
+#OBJS := $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
|
||||
+OBJS := $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
|
||||
|
||||
# Paths
|
||||
IINCDIR := $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
|
||||
@@ -226,14 +227,14 @@
|
||||
@$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
-$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
|
||||
-ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
- @echo
|
||||
- $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
-else
|
||||
- @echo Compiling $(<F)
|
||||
- @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
-endif
|
||||
+#$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
|
||||
+#ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
+# @echo
|
||||
+# $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
+#else
|
||||
+# @echo Compiling $(<F)
|
||||
+# @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
+#endif
|
||||
|
||||
$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
Only in Chibios.16_rusefi/os/common: startup
|
||||
diff -uwr Chibios.16_original/os/hal/include/uart.h Chibios.16_rusefi/os/hal/include/uart.h
|
||||
--- Chibios.16_original/os/hal/include/uart.h 2018-01-23 11:24:53.586348400 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/include/uart.h 2018-01-23 11:25:52.187700200 -0500
|
||||
@@ -185,6 +185,23 @@
|
||||
#define _uart_wakeup_rx_error_isr(uartp)
|
||||
#endif /* !UART_USE_WAIT */
|
||||
|
||||
+#if (UART_USE_WAIT == TRUE) || defined(__DOXYGEN__)
|
||||
+/**
|
||||
+ * @brief Wakes up the waiting thread in case of RX timeout.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ *
|
||||
+ * @notapi
|
||||
+ */
|
||||
+#define _uart_wakeup_rx_timeout_isr(uartp) { \
|
||||
+ osalSysLockFromISR(); \
|
||||
+ osalThreadResumeI(&(uartp)->threadrx, MSG_TIMEOUT); \
|
||||
+ osalSysUnlockFromISR(); \
|
||||
+}
|
||||
+#else /* !UART_USE_WAIT */
|
||||
+#define _uart_wakeup_rx_timeout_isr(uartp)
|
||||
+#endif /* !UART_USE_WAIT */
|
||||
+
|
||||
/**
|
||||
* @brief Common ISR code for early TX.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
@@ -258,6 +275,27 @@
|
||||
}
|
||||
|
||||
/**
|
||||
+ * @brief Common ISR code for RX half-transfer data.
|
||||
+ * @details This code handles the portable part of the ISR code:
|
||||
+ * - Callback invocation.
|
||||
+ * - Waiting thread wakeup, if any.
|
||||
+ * - Driver state transitions.
|
||||
+ * .
|
||||
+ * @note This macro is meant to be used in the low level drivers
|
||||
+ * implementation only.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ * @param[in] full flag set to 1 for the second half, and 0 for the first half
|
||||
+ *
|
||||
+ * @notapi
|
||||
+ */
|
||||
+#define _uart_rx_half_isr_code(uartp, full) { \
|
||||
+ if ((uartp)->config->rxhalf_cb != NULL) \
|
||||
+ (uartp)->config->rxhalf_cb(uartp, full); \
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/**
|
||||
* @brief Common ISR code for RX error.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
* - Callback invocation.
|
||||
@@ -279,7 +317,6 @@
|
||||
_uart_wakeup_rx_error_isr(uartp); \
|
||||
}
|
||||
|
||||
-
|
||||
/**
|
||||
* @brief Common ISR code for RX on idle.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
@@ -298,6 +335,28 @@
|
||||
if ((uartp)->config->rxchar_cb != NULL) \
|
||||
(uartp)->config->rxchar_cb(uartp, (uartp)->rxbuf); \
|
||||
}
|
||||
+
|
||||
+/**
|
||||
+ * @brief Timeout ISR code for receiver.
|
||||
+ * @details This code handles the portable part of the ISR code:
|
||||
+ * - Callback invocation.
|
||||
+ * - Waiting thread wakeup, if any.
|
||||
+ * - Driver state transitions.
|
||||
+ * .
|
||||
+ * @note This macro is meant to be used in the low level drivers
|
||||
+ * implementation only.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ *
|
||||
+ * @notapi
|
||||
+ */
|
||||
+#define _uart_timeout_isr_code(uartp) { \
|
||||
+ if ((uartp)->config->timeout_cb != NULL) { \
|
||||
+ (uartp)->config->timeout_cb(uartp); \
|
||||
+ } \
|
||||
+ _uart_wakeup_rx_timeout_isr(uartp); \
|
||||
+}
|
||||
+
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
diff -uwr Chibios.16_original/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c
|
||||
--- Chibios.16_original/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c 2018-01-23 11:24:54.074376400 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c 2018-01-23 11:25:52.592723400 -0500
|
||||
@@ -137,7 +137,7 @@
|
||||
t = localtime_r((time_t *)&(tv_sec), &tim);
|
||||
osalDbgAssert(t != NULL, "conversion failed");
|
||||
#else
|
||||
- struct tm *t = localtime(&tv_sec);
|
||||
+ t = localtime(&tv_sec);
|
||||
memcpy(&tim, t, sizeof(struct tm));
|
||||
#endif
|
||||
|
||||
diff -uwr Chibios.16_original/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
|
||||
--- Chibios.16_original/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c 2018-01-23 11:24:54.079376600 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c 2018-01-23 11:25:52.594723500 -0500
|
||||
@@ -27,6 +27,7 @@
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
+#include "rusefi_lse_fix.h"
|
||||
|
||||
#if HAL_USE_RTC || defined(__DOXYGEN__)
|
||||
|
||||
@@ -75,10 +76,11 @@
|
||||
* @notapi
|
||||
*/
|
||||
static void rtc_enter_init(void) {
|
||||
-
|
||||
+ int counter = 0;
|
||||
RTCD1.rtc->ISR |= RTC_ISR_INIT;
|
||||
- while ((RTCD1.rtc->ISR & RTC_ISR_INITF) == 0)
|
||||
+ while ((RTCD1.rtc->ISR & RTC_ISR_INITF) == 0 && ++counter < LSE_TIMEOUT)
|
||||
;
|
||||
+
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -347,13 +349,16 @@
|
||||
rtc_enter_init();
|
||||
rtcp->rtc->TR = tr;
|
||||
rtcp->rtc->DR = dr;
|
||||
- rtcp->rtc->CR |= timespec->dstflag << RTC_CR_BKP_OFFSET;
|
||||
+ rtcp->rtc->CR = (rtcp->rtc->CR & ~(1U << RTC_CR_BKP_OFFSET)) |
|
||||
+ (timespec->dstflag << RTC_CR_BKP_OFFSET);
|
||||
rtc_exit_init();
|
||||
|
||||
/* Leaving a reentrant critical zone.*/
|
||||
osalSysRestoreStatusX(sts);
|
||||
}
|
||||
|
||||
+extern bool rtcWorks;
|
||||
+
|
||||
/**
|
||||
* @brief Get current time.
|
||||
* @note The function can be called from any context.
|
||||
@@ -374,10 +379,13 @@
|
||||
/* Entering a reentrant critical zone.*/
|
||||
sts = osalSysGetStatusAndLockX();
|
||||
|
||||
+ int counter = 0; \
|
||||
/* Synchronization with the RTC and reading the registers, note
|
||||
DR must be read last.*/
|
||||
- while ((rtcp->rtc->ISR & RTC_ISR_RSF) == 0)
|
||||
+ while ((rtcp->rtc->ISR & RTC_ISR_RSF) == 0 && rtcWorks && ++counter <LSE_TIMEOUT)
|
||||
;
|
||||
+ if (counter==LSE_TIMEOUT) {rtcWorks = false; } \
|
||||
+
|
||||
#if STM32_RTC_HAS_SUBSECONDS
|
||||
ssr = rtcp->rtc->SSR;
|
||||
#endif /* STM32_RTC_HAS_SUBSECONDS */
|
||||
diff -uwr Chibios.16_original/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h
|
||||
--- Chibios.16_original/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h 2018-01-23 11:24:54.081376800 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h 2018-01-23 11:25:52.595723600 -0500
|
||||
@@ -29,6 +29,7 @@
|
||||
#ifndef _RTC_LLD_H_
|
||||
#define _RTC_LLD_H_
|
||||
|
||||
+
|
||||
#if HAL_USE_RTC || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
Only in Chibios.16_rusefi/os/hal/ports/STM32/LLD/RTCv2: rusefi_lse_fix.h
|
||||
diff -uwr Chibios.16_original/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c Chibios.16_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c
|
||||
--- Chibios.16_original/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c 2018-01-23 11:24:54.143380300 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c 2018-01-23 11:25:52.722730900 -0500
|
||||
@@ -226,6 +226,11 @@
|
||||
/* Mustn't ever set TCIE here - if done, it causes an immediate
|
||||
interrupt.*/
|
||||
cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE;
|
||||
+
|
||||
+ /* Add Idle interrupt if needed */
|
||||
+ if (uartp->config->timeout_cb != NULL)
|
||||
+ cr1 |= USART_CR1_IDLEIE;
|
||||
+
|
||||
u->CR1 = uartp->config->cr1 | cr1;
|
||||
|
||||
/* Starting the receiver idle loop.*/
|
||||
@@ -254,7 +259,14 @@
|
||||
received character and then the driver stays in the same state.*/
|
||||
_uart_rx_idle_code(uartp);
|
||||
}
|
||||
- else {
|
||||
+ /* DMA half-transter interrupt handling - for the 1st/2nd half transfers. */
|
||||
+ else if (uartp->config->rxhalf_cb != NULL) {
|
||||
+ if ((flags & STM32_DMA_ISR_HTIF) != 0) {
|
||||
+ _uart_rx_half_isr_code(uartp, 0);
|
||||
+ } else if ((flags & STM32_DMA_ISR_TCIF) != 0) {
|
||||
+ _uart_rx_half_isr_code(uartp, 1);
|
||||
+ }
|
||||
+ } else {
|
||||
/* Receiver in active state, a callback is generated, if enabled, after
|
||||
a completed transfer.*/
|
||||
dmaStreamDisable(uartp->dmarx);
|
||||
@@ -312,6 +324,11 @@
|
||||
/* End of transmission, a callback is generated.*/
|
||||
_uart_tx2_isr_code(uartp);
|
||||
}
|
||||
+
|
||||
+ /* Idle interrupt sources are only checked if enabled in CR1.*/
|
||||
+ if ((sr & USART_SR_IDLE) && (cr1 & USART_CR1_IDLEIE)) {
|
||||
+ _uart_timeout_isr_code(uartp);
|
||||
+ }
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
@@ -778,8 +795,14 @@
|
||||
/* RX DMA channel preparation.*/
|
||||
dmaStreamSetMemory0(uartp->dmarx, rxbuf);
|
||||
dmaStreamSetTransactionSize(uartp->dmarx, n);
|
||||
- dmaStreamSetMode(uartp->dmarx, uartp->dmamode | STM32_DMA_CR_DIR_P2M |
|
||||
- STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
|
||||
+
|
||||
+ uint32_t mode = STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
|
||||
+
|
||||
+ /* DMA half-transfer interrupt & circular mode, if needed */
|
||||
+ if (uartp->config->rxhalf_cb != NULL)
|
||||
+ mode |= STM32_DMA_CR_HTIE | STM32_DMA_CR_CIRC;
|
||||
+
|
||||
+ dmaStreamSetMode(uartp->dmarx, uartp->dmamode | mode);
|
||||
|
||||
/* Starting transfer.*/
|
||||
dmaStreamEnable(uartp->dmarx);
|
||||
diff -uwr Chibios.16_original/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h Chibios.16_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h
|
||||
--- Chibios.16_original/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h 2018-01-23 11:24:54.145380400 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h 2018-01-23 11:25:52.724731000 -0500
|
||||
@@ -461,6 +461,14 @@
|
||||
typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e);
|
||||
|
||||
/**
|
||||
+ * @brief Receive Half-transfer UART notification callback type.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ * @param[in] full flag set to 1 for the second half, and 0 for the first half
|
||||
+ */
|
||||
+typedef void (*uarthcb_t)(UARTDriver *uartp, uartflags_t full);
|
||||
+
|
||||
+/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
@@ -502,6 +510,16 @@
|
||||
* @brief Initialization value for the CR3 register.
|
||||
*/
|
||||
uint16_t cr3;
|
||||
+ /* Additional (optional) handlers. Placed here for the struct compatibility.*/
|
||||
+ /**
|
||||
+ * @brief Receiver timeout (idle) callback.
|
||||
+ * @details Handles an idle interrupt for USARTv1.
|
||||
+ */
|
||||
+ uartcb_t timeout_cb;
|
||||
+ /**
|
||||
+ * @brief Half-transfer receive buffer callback.
|
||||
+ */
|
||||
+ uarthcb_t rxhalf_cb;
|
||||
} UARTConfig;
|
||||
|
||||
/**
|
||||
diff -uwr Chibios.16_original/os/hal/ports/STM32/STM32F4xx/hal_lld.c Chibios.16_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.c
|
||||
--- Chibios.16_original/os/hal/ports/STM32/STM32F4xx/hal_lld.c 2018-01-23 11:24:54.577405100 -0500
|
||||
+++ Chibios.16_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.c 2018-01-23 11:25:52.934743000 -0500
|
||||
@@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
+#include "rusefi_lse_fix.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
@@ -63,6 +64,9 @@
|
||||
RCC->BDCR = 0;
|
||||
}
|
||||
|
||||
+ extern bool rtcWorks;
|
||||
+
|
||||
+
|
||||
#if STM32_LSE_ENABLED
|
||||
#if defined(STM32_LSE_BYPASS)
|
||||
/* LSE Bypass.*/
|
||||
@@ -71,7 +75,8 @@
|
||||
/* No LSE Bypass.*/
|
||||
RCC->BDCR |= RCC_BDCR_LSEON;
|
||||
#endif
|
||||
- while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
|
||||
+ int waitCounter = 0;
|
||||
+ while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0 && rtcWorks && ++waitCounter <LSE_TIMEOUT)
|
||||
; /* Waits until LSE is stable. */
|
||||
#endif
|
||||
|
||||
Only in Chibios.16_rusefi/os/hal/ports/simulator: posix
|
||||
diff -uwr Chibios.16_original/os/rt/include/chdebug.h Chibios.16_rusefi/os/rt/include/chdebug.h
|
||||
--- Chibios.16_original/os/rt/include/chdebug.h 2018-01-23 11:24:55.635465600 -0500
|
||||
+++ Chibios.16_rusefi/os/rt/include/chdebug.h 2018-01-23 11:25:53.640783400 -0500
|
||||
@@ -121,8 +121,8 @@
|
||||
/*===========================================================================*/
|
||||
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK == TRUE
|
||||
-#define _dbg_enter_lock() (ch.dbg.lock_cnt = (cnt_t)1)
|
||||
-#define _dbg_leave_lock() (ch.dbg.lock_cnt = (cnt_t)0)
|
||||
+#define _dbg_enter_lock() {(ch.dbg.lock_cnt = (cnt_t)1); ON_LOCK_HOOK;}
|
||||
+#define _dbg_leave_lock() {ON_UNLOCK_HOOK;(ch.dbg.lock_cnt = (cnt_t)0);}
|
||||
#endif
|
||||
|
||||
/* When the state checker feature is disabled then the following functions
|
||||
diff -uwr Chibios.16_original/os/rt/ports/ARM/chcore.h Chibios.16_rusefi/os/rt/ports/ARM/chcore.h
|
||||
--- Chibios.16_original/os/rt/ports/ARM/chcore.h 2018-01-23 11:24:55.676468000 -0500
|
||||
+++ Chibios.16_rusefi/os/rt/ports/ARM/chcore.h 2018-01-23 11:25:53.682785800 -0500
|
||||
@@ -28,6 +28,8 @@
|
||||
#ifndef _CHCORE_H_
|
||||
#define _CHCORE_H_
|
||||
|
||||
+#include "chdebug.h"
|
||||
+
|
||||
/*===========================================================================*/
|
||||
/* Module constants. */
|
||||
/*===========================================================================*/
|
||||
@@ -288,6 +290,8 @@
|
||||
#define PORT_FAST_IRQ_HANDLER(id) \
|
||||
__attribute__((interrupt("FIQ"))) void id(void)
|
||||
|
||||
+void chDbgStackOverflowPanic(thread_t *otp);
|
||||
+
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
@@ -305,7 +309,7 @@
|
||||
#define port_switch(ntp, otp) { \
|
||||
register struct port_intctx *r13 asm ("r13"); \
|
||||
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
|
||||
- chSysHalt("stack overflow"); \
|
||||
+ chDbgStackOverflowPanic(otp); \
|
||||
_port_switch_thumb(ntp, otp); \
|
||||
}
|
||||
#else
|
||||
@@ -318,7 +322,7 @@
|
||||
#define port_switch(ntp, otp) { \
|
||||
register struct port_intctx *r13 asm ("r13"); \
|
||||
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
|
||||
- chSysHalt("stack overflow"); \
|
||||
+ chDbgStackOverflowPanic(otp); \
|
||||
_port_switch_arm(ntp, otp); \
|
||||
}
|
||||
#else
|
||||
diff -uwr Chibios.16_original/os/rt/ports/SIMIA32/chcore.c Chibios.16_rusefi/os/rt/ports/SIMIA32/chcore.c
|
||||
--- Chibios.16_original/os/rt/ports/SIMIA32/chcore.c 2018-01-23 11:24:55.737471500 -0500
|
||||
+++ Chibios.16_rusefi/os/rt/ports/SIMIA32/chcore.c 2018-01-23 11:25:53.752789800 -0500
|
||||
@@ -25,7 +25,12 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
+#if defined(WIN32)
|
||||
#include <windows.h>
|
||||
+#else
|
||||
+ #include <stdlib.h>
|
||||
+ #include <sys/time.h>
|
||||
+#endif
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
@@ -109,11 +114,18 @@
|
||||
* @return The realtime counter value.
|
||||
*/
|
||||
rtcnt_t port_rt_get_counter_value(void) {
|
||||
+#if defined(WIN32)
|
||||
LARGE_INTEGER n;
|
||||
|
||||
QueryPerformanceCounter(&n);
|
||||
|
||||
return (rtcnt_t)(n.QuadPart / 1000LL);
|
||||
+#else // POSIX
|
||||
+ struct timeval tv;
|
||||
+
|
||||
+ gettimeofday(&tv, NULL);
|
||||
+ return (rtcnt_t)(tv.tv_usec);
|
||||
+#endif
|
||||
}
|
||||
|
||||
/** @} */
|
||||
diff -uwr Chibios.16_original/os/rt/src/chdebug.c Chibios.16_rusefi/os/rt/src/chdebug.c
|
||||
--- Chibios.16_original/os/rt/src/chdebug.c 2018-01-23 11:24:55.745471900 -0500
|
||||
+++ Chibios.16_rusefi/os/rt/src/chdebug.c 2018-01-23 11:25:53.770790800 -0500
|
||||
@@ -85,6 +85,8 @@
|
||||
/* Module local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
+extern int maxNesting;
|
||||
+
|
||||
/*===========================================================================*/
|
||||
/* Module exported variables. */
|
||||
/*===========================================================================*/
|
||||
@@ -150,7 +152,7 @@
|
||||
void _dbg_check_lock(void) {
|
||||
|
||||
if ((ch.dbg.isr_cnt != (cnt_t)0) || (ch.dbg.lock_cnt != (cnt_t)0)) {
|
||||
- chSysHalt("SV#4");
|
||||
+ chSysHalt("SV#4 misplaced chSysLock()");
|
||||
}
|
||||
_dbg_enter_lock();
|
||||
}
|
||||
@@ -176,7 +178,7 @@
|
||||
void _dbg_check_lock_from_isr(void) {
|
||||
|
||||
if ((ch.dbg.isr_cnt <= (cnt_t)0) || (ch.dbg.lock_cnt != (cnt_t)0)) {
|
||||
- chSysHalt("SV#6");
|
||||
+ chSysHalt("SV#6 misplaced chSysLockFromISR()");
|
||||
}
|
||||
_dbg_enter_lock();
|
||||
}
|
||||
@@ -206,6 +208,8 @@
|
||||
chSysHalt("SV#8");
|
||||
}
|
||||
ch.dbg.isr_cnt++;
|
||||
+ if (ch.dbg.isr_cnt > maxNesting)
|
||||
+ maxNesting = ch.dbg.isr_cnt;
|
||||
port_unlock_from_isr();
|
||||
}
|
||||
|
||||
@@ -235,7 +239,7 @@
|
||||
void chDbgCheckClassI(void) {
|
||||
|
||||
if ((ch.dbg.isr_cnt < (cnt_t)0) || (ch.dbg.lock_cnt <= (cnt_t)0)) {
|
||||
- chSysHalt("SV#10");
|
||||
+ chSysHalt("SV#10 misplaced I-class function");
|
||||
}
|
||||
}
|
||||
|
|
@ -1,199 +0,0 @@
|
|||
diff -uwr Chibios.17_original/.git/FETCH_HEAD Chibios.17_rusefi/.git/FETCH_HEAD
|
||||
--- Chibios.17_original/.git/FETCH_HEAD 2018-01-30 21:31:37.600033400 -0500
|
||||
+++ Chibios.17_rusefi/.git/FETCH_HEAD 2018-01-30 21:41:12.360907800 -0500
|
||||
@@ -1,11 +1,11 @@
|
||||
-5b4a1f5837a83f32fd5e5e439eaa370cc7399237 branch 'stable_17.6.x' of https://github.com/rusefi/ChibiOS
|
||||
+da33521329932cb7a0bb494dd3df9c1c9bd9af1a branch 'stable_17.6.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
b263680b98fbb41e939ce62e55916254ece4acc7 not-for-merge branch 'master' of https://github.com/rusefi/ChibiOS
|
||||
a4b2c113e74e026dfc7cc02060b32ab3f047ae8d not-for-merge branch 'revert-10-master' of https://github.com/rusefi/ChibiOS
|
||||
e61ff3aa1c1fd0f1057e08ae4551abbc01595550 not-for-merge branch 'stable_1.0.x' of https://github.com/rusefi/ChibiOS
|
||||
3957b74f871e2ac11b8447aa067b1cece4861970 not-for-merge branch 'stable_1.2.x' of https://github.com/rusefi/ChibiOS
|
||||
06c45ae2ef94ff95bbdab317bc53aebe7c51aacc not-for-merge branch 'stable_1.4.x' of https://github.com/rusefi/ChibiOS
|
||||
c8198eb36c2174484141f0119f720bcf0468a0b9 not-for-merge branch 'stable_16.1.x' of https://github.com/rusefi/ChibiOS
|
||||
-da33521329932cb7a0bb494dd3df9c1c9bd9af1a not-for-merge branch 'stable_17.6.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
+5b4a1f5837a83f32fd5e5e439eaa370cc7399237 not-for-merge branch 'stable_17.6.x' of https://github.com/rusefi/ChibiOS
|
||||
e324eb668a8399c5e5342d3111d175f42f14b50b not-for-merge branch 'stable_2.0.x' of https://github.com/rusefi/ChibiOS
|
||||
c807840cdcec4e09b3fd0d2268370d9a317f0b90 not-for-merge branch 'stable_2.2.x' of https://github.com/rusefi/ChibiOS
|
||||
062803674562e117754c051992535d69a3762573 not-for-merge branch 'stable_2.4.x' of https://github.com/rusefi/ChibiOS
|
||||
diff -uwr Chibios.17_original/.git/HEAD Chibios.17_rusefi/.git/HEAD
|
||||
--- Chibios.17_original/.git/HEAD 2018-01-30 21:25:23.689646900 -0500
|
||||
+++ Chibios.17_rusefi/.git/HEAD 2018-01-30 21:33:39.406000300 -0500
|
||||
@@ -1 +1 @@
|
||||
-ref: refs/heads/stable_17.6.x
|
||||
+ref: refs/heads/stable_17.6.rusefi
|
||||
diff -uwr Chibios.17_original/.git/ORIG_HEAD Chibios.17_rusefi/.git/ORIG_HEAD
|
||||
--- Chibios.17_original/.git/ORIG_HEAD 2018-01-30 21:32:00.640351200 -0500
|
||||
+++ Chibios.17_rusefi/.git/ORIG_HEAD 2018-01-30 21:41:17.857222200 -0500
|
||||
@@ -1 +1 @@
|
||||
-5b4a1f5837a83f32fd5e5e439eaa370cc7399237
|
||||
+da33521329932cb7a0bb494dd3df9c1c9bd9af1a
|
||||
diff -uwr Chibios.17_original/.git/config Chibios.17_rusefi/.git/config
|
||||
--- Chibios.17_original/.git/config 2018-01-30 21:25:23.731649300 -0500
|
||||
+++ Chibios.17_rusefi/.git/config 2018-01-30 21:33:39.550008500 -0500
|
||||
@@ -9,6 +9,6 @@
|
||||
[remote "origin"]
|
||||
url = https://github.com/rusefi/ChibiOS
|
||||
fetch = +refs/heads/*:refs/remotes/origin/*
|
||||
-[branch "stable_17.6.x"]
|
||||
+[branch "stable_17.6.rusefi"]
|
||||
remote = origin
|
||||
- merge = refs/heads/stable_17.6.x
|
||||
+ merge = refs/heads/stable_17.6.rusefi
|
||||
Binary files Chibios.17_original/.git/index and Chibios.17_rusefi/.git/index differ
|
||||
diff -uwr Chibios.17_original/.git/logs/HEAD Chibios.17_rusefi/.git/logs/HEAD
|
||||
--- Chibios.17_original/.git/logs/HEAD 2018-01-30 21:25:23.711648200 -0500
|
||||
+++ Chibios.17_rusefi/.git/logs/HEAD 2018-01-30 21:33:39.538007800 -0500
|
||||
@@ -1 +1 @@
|
||||
-0000000000000000000000000000000000000000 5b4a1f5837a83f32fd5e5e439eaa370cc7399237 rusEfi <russianefi@gmail.com> 1517365523 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+0000000000000000000000000000000000000000 da33521329932cb7a0bb494dd3df9c1c9bd9af1a rusEfi <russianefi@gmail.com> 1517366019 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
Only in Chibios.17_rusefi/.git/logs/refs/heads: stable_17.6.rusefi
|
||||
Only in Chibios.17_original/.git/logs/refs/heads: stable_17.6.x
|
||||
diff -uwr Chibios.17_original/.git/logs/refs/remotes/origin/HEAD Chibios.17_rusefi/.git/logs/refs/remotes/origin/HEAD
|
||||
--- Chibios.17_original/.git/logs/refs/remotes/origin/HEAD 2018-01-30 21:25:23.687646800 -0500
|
||||
+++ Chibios.17_rusefi/.git/logs/refs/remotes/origin/HEAD 2018-01-30 21:33:39.283993300 -0500
|
||||
@@ -1 +1 @@
|
||||
-0000000000000000000000000000000000000000 b263680b98fbb41e939ce62e55916254ece4acc7 rusEfi <russianefi@gmail.com> 1517365523 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+0000000000000000000000000000000000000000 b263680b98fbb41e939ce62e55916254ece4acc7 rusEfi <russianefi@gmail.com> 1517366019 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
Only in Chibios.17_rusefi/.git/refs/heads: stable_17.6.rusefi
|
||||
Only in Chibios.17_original/.git/refs/heads: stable_17.6.x
|
||||
diff -uwr Chibios.17_original/os/hal/include/hal_uart.h Chibios.17_rusefi/os/hal/include/hal_uart.h
|
||||
--- Chibios.17_original/os/hal/include/hal_uart.h 2018-01-30 21:27:32.434010700 -0500
|
||||
+++ Chibios.17_rusefi/os/hal/include/hal_uart.h 2018-01-30 21:36:52.840064100 -0500
|
||||
@@ -275,6 +275,26 @@
|
||||
}
|
||||
|
||||
/**
|
||||
+ * @brief Common ISR code for RX half-transfer data.
|
||||
+ * @details This code handles the portable part of the ISR code:
|
||||
+ * - Callback invocation.
|
||||
+ * - Waiting thread wakeup, if any.
|
||||
+ * - Driver state transitions.
|
||||
+ * .
|
||||
+ * @note This macro is meant to be used in the low level drivers
|
||||
+ * implementation only.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ * @param[in] full flag set to 1 for the second half, and 0 for the first half
|
||||
+ *
|
||||
+ * @notapi
|
||||
+ */
|
||||
+#define _uart_rx_half_isr_code(uartp, full) { \
|
||||
+ if ((uartp)->config->rxhalf_cb != NULL) \
|
||||
+ (uartp)->config->rxhalf_cb(uartp, full); \
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
* @brief Common ISR code for RX error.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
* - Callback invocation.
|
||||
diff -uwr Chibios.17_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c Chibios.17_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c
|
||||
--- Chibios.17_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c 2018-01-30 21:27:40.457469600 -0500
|
||||
+++ Chibios.17_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c 2018-01-30 21:37:06.091822000 -0500
|
||||
@@ -226,6 +226,11 @@
|
||||
/* Mustn't ever set TCIE here - if done, it causes an immediate
|
||||
interrupt.*/
|
||||
cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE;
|
||||
+
|
||||
+ /* Add Idle interrupt if needed */
|
||||
+ if (uartp->config->timeout_cb != NULL)
|
||||
+ cr1 |= USART_CR1_IDLEIE;
|
||||
+
|
||||
u->CR1 = uartp->config->cr1 | cr1;
|
||||
|
||||
/* Starting the receiver idle loop.*/
|
||||
@@ -254,6 +259,15 @@
|
||||
received character and then the driver stays in the same state.*/
|
||||
_uart_rx_idle_code(uartp);
|
||||
}
|
||||
+ /* DMA half-transter interrupt handling - for the 1st/2nd half transfers. */
|
||||
+ else if (uartp->config->rxhalf_cb != NULL) {
|
||||
+ if ((flags & STM32_DMA_ISR_HTIF) != 0) {
|
||||
+ _uart_rx_half_isr_code(uartp, 0);
|
||||
+ }
|
||||
+ else if ((flags & STM32_DMA_ISR_TCIF) != 0) {
|
||||
+ _uart_rx_half_isr_code(uartp, 1);
|
||||
+ }
|
||||
+ }
|
||||
else {
|
||||
/* Receiver in active state, a callback is generated, if enabled, after
|
||||
a completed transfer.*/
|
||||
@@ -312,6 +326,11 @@
|
||||
/* End of transmission, a callback is generated.*/
|
||||
_uart_tx2_isr_code(uartp);
|
||||
}
|
||||
+
|
||||
+ /* Idle interrupt sources are only checked if enabled in CR1.*/
|
||||
+ if ((sr & USART_SR_IDLE) && (cr1 & USART_CR1_IDLEIE)) {
|
||||
+ _uart_timeout_isr_code(uartp);
|
||||
+ }
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
@@ -779,8 +798,14 @@
|
||||
/* RX DMA channel preparation.*/
|
||||
dmaStreamSetMemory0(uartp->dmarx, rxbuf);
|
||||
dmaStreamSetTransactionSize(uartp->dmarx, n);
|
||||
- dmaStreamSetMode(uartp->dmarx, uartp->dmamode | STM32_DMA_CR_DIR_P2M |
|
||||
- STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
|
||||
+
|
||||
+ uint32_t mode = STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
|
||||
+
|
||||
+ /* DMA half-transfer interrupt & circular mode, if needed */
|
||||
+ if (uartp->config->rxhalf_cb != NULL)
|
||||
+ mode |= STM32_DMA_CR_HTIE | STM32_DMA_CR_CIRC;
|
||||
+
|
||||
+ dmaStreamSetMode(uartp->dmarx, uartp->dmamode | mode);
|
||||
|
||||
/* Starting transfer.*/
|
||||
dmaStreamEnable(uartp->dmarx);
|
||||
diff -uwr Chibios.17_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h Chibios.17_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h
|
||||
--- Chibios.17_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h 2018-01-30 21:27:40.460469800 -0500
|
||||
+++ Chibios.17_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h 2018-01-30 21:37:06.388839000 -0500
|
||||
@@ -463,6 +463,14 @@
|
||||
typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e);
|
||||
|
||||
/**
|
||||
+ * @brief Receive Half-transfer UART notification callback type.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ * @param[in] full flag set to 1 for the second half, and 0 for the first half
|
||||
+ */
|
||||
+typedef void (*uarthcb_t)(UARTDriver *uartp, uartflags_t full);
|
||||
+
|
||||
+/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
@@ -504,6 +512,16 @@
|
||||
* @brief Initialization value for the CR3 register.
|
||||
*/
|
||||
uint16_t cr3;
|
||||
+ /* Additional (optional) handlers. Placed here for the struct compatibility.*/
|
||||
+ /**
|
||||
+ * @brief Receiver timeout (idle) callback.
|
||||
+ * @details Handles an idle interrupt for USARTv1.
|
||||
+ */
|
||||
+ uartcb_t timeout_cb;
|
||||
+ /**
|
||||
+ * @brief Half-transfer receive buffer callback.
|
||||
+ */
|
||||
+ uarthcb_t rxhalf_cb;
|
||||
} UARTConfig;
|
||||
|
||||
/**
|
||||
diff -uwr Chibios.17_original/os/rt/include/chdebug.h Chibios.17_rusefi/os/rt/include/chdebug.h
|
||||
--- Chibios.17_original/os/rt/include/chdebug.h 2018-01-30 21:27:57.446441300 -0500
|
||||
+++ Chibios.17_rusefi/os/rt/include/chdebug.h 2018-01-30 21:37:18.955557800 -0500
|
||||
@@ -60,9 +60,10 @@
|
||||
/* Module macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
+//rusEfi additional hooks
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK == TRUE
|
||||
-#define _dbg_enter_lock() (ch.dbg.lock_cnt = (cnt_t)1)
|
||||
-#define _dbg_leave_lock() (ch.dbg.lock_cnt = (cnt_t)0)
|
||||
+#define _dbg_enter_lock() {(ch.dbg.lock_cnt = (cnt_t)1); ON_LOCK_HOOK;}
|
||||
+#define _dbg_leave_lock() {ON_UNLOCK_HOOK;(ch.dbg.lock_cnt = (cnt_t)0);}
|
||||
#endif
|
||||
|
||||
/* When the state checker feature is disabled then the following functions
|
|
@ -1,631 +0,0 @@
|
|||
diff -uwr Chibios.18_original/.git/FETCH_HEAD Chibios.18_rusefi/.git/FETCH_HEAD
|
||||
--- Chibios.18_original/.git/FETCH_HEAD 2021-01-09 18:01:03.021336000 -0500
|
||||
+++ Chibios.18_rusefi/.git/FETCH_HEAD 2021-01-09 18:01:03.331269900 -0500
|
||||
@@ -1,4 +1,4 @@
|
||||
-0f0799eaacdceb3ef295eb0ab865f4f309dba14d branch 'stable_18.2.x' of https://github.com/rusefi/ChibiOS
|
||||
+1a2c5967dc813bdbf1cc7eabfea8377340c8a29e branch 'stable_18.2.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
bbb700257e3e932f60e12e8a2c7dc2120cea3e26 not-for-merge branch 'master' of https://github.com/rusefi/ChibiOS
|
||||
a4b2c113e74e026dfc7cc02060b32ab3f047ae8d not-for-merge branch 'revert-10-master' of https://github.com/rusefi/ChibiOS
|
||||
e61ff3aa1c1fd0f1057e08ae4551abbc01595550 not-for-merge branch 'stable_1.0.x' of https://github.com/rusefi/ChibiOS
|
||||
@@ -7,7 +7,7 @@
|
||||
c8198eb36c2174484141f0119f720bcf0468a0b9 not-for-merge branch 'stable_16.1.x' of https://github.com/rusefi/ChibiOS
|
||||
2a2aa99e112861110c1ba6230be258ba3b4e278f not-for-merge branch 'stable_17.6.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
78b70816a88c805db5ca61a190e79b5fed6d25dc not-for-merge branch 'stable_17.6.x' of https://github.com/rusefi/ChibiOS
|
||||
-1a2c5967dc813bdbf1cc7eabfea8377340c8a29e not-for-merge branch 'stable_18.2.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
+0f0799eaacdceb3ef295eb0ab865f4f309dba14d not-for-merge branch 'stable_18.2.x' of https://github.com/rusefi/ChibiOS
|
||||
71a12f97d5c6ec2d926c67c9bc100f3b2fa3950d not-for-merge branch 'stable_19.1.rusefi' of https://github.com/rusefi/ChibiOS
|
||||
e324eb668a8399c5e5342d3111d175f42f14b50b not-for-merge branch 'stable_2.0.x' of https://github.com/rusefi/ChibiOS
|
||||
c807840cdcec4e09b3fd0d2268370d9a317f0b90 not-for-merge branch 'stable_2.2.x' of https://github.com/rusefi/ChibiOS
|
||||
diff -uwr Chibios.18_original/.git/HEAD Chibios.18_rusefi/.git/HEAD
|
||||
--- Chibios.18_original/.git/HEAD 2021-01-09 17:57:14.360825500 -0500
|
||||
+++ Chibios.18_rusefi/.git/HEAD 2021-01-09 17:57:38.605678200 -0500
|
||||
@@ -1 +1 @@
|
||||
-ref: refs/heads/stable_18.2.x
|
||||
+ref: refs/heads/stable_18.2.rusefi
|
||||
diff -uwr Chibios.18_original/.git/ORIG_HEAD Chibios.18_rusefi/.git/ORIG_HEAD
|
||||
--- Chibios.18_original/.git/ORIG_HEAD 2021-01-09 18:01:03.057344100 -0500
|
||||
+++ Chibios.18_rusefi/.git/ORIG_HEAD 2021-01-09 18:01:03.367092300 -0500
|
||||
@@ -1 +1 @@
|
||||
-0f0799eaacdceb3ef295eb0ab865f4f309dba14d
|
||||
+1a2c5967dc813bdbf1cc7eabfea8377340c8a29e
|
||||
diff -uwr Chibios.18_original/.git/config Chibios.18_rusefi/.git/config
|
||||
--- Chibios.18_original/.git/config 2021-01-09 17:57:14.365039900 -0500
|
||||
+++ Chibios.18_rusefi/.git/config 2021-01-09 17:57:38.609676000 -0500
|
||||
@@ -8,6 +8,6 @@
|
||||
[remote "origin"]
|
||||
url = https://github.com/rusefi/ChibiOS
|
||||
fetch = +refs/heads/*:refs/remotes/origin/*
|
||||
-[branch "stable_18.2.x"]
|
||||
+[branch "stable_18.2.rusefi"]
|
||||
remote = origin
|
||||
- merge = refs/heads/stable_18.2.x
|
||||
+ merge = refs/heads/stable_18.2.rusefi
|
||||
Binary files Chibios.18_original/.git/index and Chibios.18_rusefi/.git/index differ
|
||||
diff -uwr Chibios.18_original/.git/logs/HEAD Chibios.18_rusefi/.git/logs/HEAD
|
||||
--- Chibios.18_original/.git/logs/HEAD 2021-01-09 17:57:14.363031800 -0500
|
||||
+++ Chibios.18_rusefi/.git/logs/HEAD 2021-01-09 17:57:38.607676900 -0500
|
||||
@@ -1 +1 @@
|
||||
-0000000000000000000000000000000000000000 0f0799eaacdceb3ef295eb0ab865f4f309dba14d rusefillc <sdfsdfqsf2334234234> 1610233034 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+0000000000000000000000000000000000000000 1a2c5967dc813bdbf1cc7eabfea8377340c8a29e rusefillc <sdfsdfqsf2334234234> 1610233058 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
Only in Chibios.18_rusefi/.git/logs/refs/heads: stable_18.2.rusefi
|
||||
Only in Chibios.18_original/.git/logs/refs/heads: stable_18.2.x
|
||||
diff -uwr Chibios.18_original/.git/logs/refs/remotes/origin/HEAD Chibios.18_rusefi/.git/logs/refs/remotes/origin/HEAD
|
||||
--- Chibios.18_original/.git/logs/refs/remotes/origin/HEAD 2021-01-09 17:57:14.359816600 -0500
|
||||
+++ Chibios.18_rusefi/.git/logs/refs/remotes/origin/HEAD 2021-01-09 17:57:38.604667300 -0500
|
||||
@@ -1 +1 @@
|
||||
-0000000000000000000000000000000000000000 bbb700257e3e932f60e12e8a2c7dc2120cea3e26 rusefillc <sdfsdfqsf2334234234> 1610233034 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
+0000000000000000000000000000000000000000 bbb700257e3e932f60e12e8a2c7dc2120cea3e26 rusefillc <sdfsdfqsf2334234234> 1610233058 -0500 clone: from https://github.com/rusefi/ChibiOS
|
||||
Only in Chibios.18_original/.git/objects/pack: pack-668cff25d611c7199e7543d5cdd7c5662f4aa17b.idx
|
||||
Only in Chibios.18_original/.git/objects/pack: pack-668cff25d611c7199e7543d5cdd7c5662f4aa17b.pack
|
||||
Only in Chibios.18_rusefi/.git/objects/pack: pack-bbcef4de2c0001c4f9864417bebcfd4e562d8838.idx
|
||||
Only in Chibios.18_rusefi/.git/objects/pack: pack-bbcef4de2c0001c4f9864417bebcfd4e562d8838.pack
|
||||
Only in Chibios.18_rusefi/.git/refs/heads: stable_18.2.rusefi
|
||||
Only in Chibios.18_original/.git/refs/heads: stable_18.2.x
|
||||
diff -uwr Chibios.18_original/os/common/ext/ST/STM32F4xx/stm32f407xx.h Chibios.18_rusefi/os/common/ext/ST/STM32F4xx/stm32f407xx.h
|
||||
--- Chibios.18_original/os/common/ext/ST/STM32F4xx/stm32f407xx.h 2021-01-09 17:57:15.012972500 -0500
|
||||
+++ Chibios.18_rusefi/os/common/ext/ST/STM32F4xx/stm32f407xx.h 2021-01-09 17:57:39.210485500 -0500
|
||||
@@ -6727,9 +6727,9 @@
|
||||
#define FLASH_SR_EOP_Pos (0U)
|
||||
#define FLASH_SR_EOP_Msk (0x1U << FLASH_SR_EOP_Pos) /*!< 0x00000001 */
|
||||
#define FLASH_SR_EOP FLASH_SR_EOP_Msk
|
||||
-#define FLASH_SR_SOP_Pos (1U)
|
||||
-#define FLASH_SR_SOP_Msk (0x1U << FLASH_SR_SOP_Pos) /*!< 0x00000002 */
|
||||
-#define FLASH_SR_SOP FLASH_SR_SOP_Msk
|
||||
+#define FLASH_SR_OPERR_Pos (1U)
|
||||
+#define FLASH_SR_OPERR_Msk (0x1U << FLASH_SR_OPERR_Pos) /*!< 0x00000002 */
|
||||
+#define FLASH_SR_OPERR FLASH_SR_OPERR_Msk
|
||||
#define FLASH_SR_WRPERR_Pos (4U)
|
||||
#define FLASH_SR_WRPERR_Msk (0x1U << FLASH_SR_WRPERR_Pos) /*!< 0x00000010 */
|
||||
#define FLASH_SR_WRPERR FLASH_SR_WRPERR_Msk
|
||||
diff -uwr Chibios.18_original/os/ex/Micron/m25q.c Chibios.18_rusefi/os/ex/Micron/m25q.c
|
||||
--- Chibios.18_original/os/ex/Micron/m25q.c 2021-01-09 17:57:15.411973700 -0500
|
||||
+++ Chibios.18_rusefi/os/ex/Micron/m25q.c 2021-01-09 17:57:39.719581600 -0500
|
||||
@@ -290,6 +290,8 @@
|
||||
static flash_error_t m25q_poll_status(M25QDriver *devp) {
|
||||
uint8_t sts;
|
||||
|
||||
+ /* Micron */
|
||||
+ if (devp->device_id[0] == 0x20) {
|
||||
do {
|
||||
#if M25Q_NICE_WAITING == TRUE
|
||||
osalThreadSleepMilliseconds(1);
|
||||
@@ -307,6 +309,19 @@
|
||||
/* Program operation failed.*/
|
||||
return FLASH_ERROR_PROGRAM;
|
||||
}
|
||||
+ }
|
||||
+
|
||||
+ /* Windbond */
|
||||
+ if (devp->device_id[0] == 0xef) {
|
||||
+ do {
|
||||
+#if M25Q_NICE_WAITING == TRUE
|
||||
+ osalThreadSleepMilliseconds(1);
|
||||
+#endif
|
||||
+ /* Read status command.*/
|
||||
+ jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_STATUS_REGISTER,
|
||||
+ 1, &sts);
|
||||
+ } while ((sts & W25Q_FLAGS_BUSY) != 0U);
|
||||
+ }
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
@@ -561,6 +576,8 @@
|
||||
/* Bus acquired.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
+ /* Micron */
|
||||
+ if (devp->device_id[0] == 0x20) {
|
||||
/* Read status command.*/
|
||||
jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_FLAG_STATUS_REGISTER,
|
||||
1, &sts);
|
||||
@@ -594,6 +611,32 @@
|
||||
/* Erase operation failed.*/
|
||||
return FLASH_ERROR_ERASE;
|
||||
}
|
||||
+ }
|
||||
+ /* Windbond */
|
||||
+ if (devp->device_id[0] == 0xef) {
|
||||
+ /* Read status command.*/
|
||||
+ jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_STATUS_REGISTER,
|
||||
+ 1, &sts);
|
||||
+
|
||||
+ /* If the busy bit is 1 then
|
||||
+ report that the operation is still in progress.*/
|
||||
+ if ((sts & W25Q_FLAGS_BUSY) != 0U) {
|
||||
+
|
||||
+ /* Bus released.*/
|
||||
+ jesd216_bus_release(devp->config->busp);
|
||||
+
|
||||
+ /* Recommended time before polling again, this is a simplified
|
||||
+ implementation.*/
|
||||
+ if (msec != NULL) {
|
||||
+ *msec = 1U;
|
||||
+ }
|
||||
+
|
||||
+ return FLASH_BUSY_ERASING;
|
||||
+ }
|
||||
+
|
||||
+ /* The device is ready to accept commands.*/
|
||||
+ devp->state = FLASH_READY;
|
||||
+ }
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
diff -uwr Chibios.18_original/os/ex/Micron/m25q.h Chibios.18_rusefi/os/ex/Micron/m25q.h
|
||||
--- Chibios.18_original/os/ex/Micron/m25q.h 2021-01-09 17:57:15.411973700 -0500
|
||||
+++ Chibios.18_rusefi/os/ex/Micron/m25q.h 2021-01-09 17:57:39.719581600 -0500
|
||||
@@ -111,6 +111,8 @@
|
||||
M25Q_FLAGS_PROGRAM_ERROR | \
|
||||
M25Q_FLAGS_VPP_ERROR | \
|
||||
M25Q_FLAGS_PROTECTION_ERROR)
|
||||
+
|
||||
+#define W25Q_FLAGS_BUSY 0x01U
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
@@ -163,14 +165,14 @@
|
||||
* @brief Supported JEDEC manufacturer identifiers.
|
||||
*/
|
||||
#if !defined(M25Q_SUPPORTED_MANUFACTURE_IDS) || defined(__DOXYGEN__)
|
||||
-#define M25Q_SUPPORTED_MANUFACTURE_IDS {0x20}
|
||||
+#define M25Q_SUPPORTED_MANUFACTURE_IDS {0x20, 0xef}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Supported memory type identifiers.
|
||||
*/
|
||||
#if !defined(M25Q_SUPPORTED_MEMORY_TYPE_IDS) || defined(__DOXYGEN__)
|
||||
-#define M25Q_SUPPORTED_MEMORY_TYPE_IDS {0xBA, 0xBB}
|
||||
+#define M25Q_SUPPORTED_MEMORY_TYPE_IDS {0xBA, 0xBB, 0x40}
|
||||
#endif
|
||||
|
||||
/**
|
||||
diff -uwr Chibios.18_original/os/ex/Micron/m25q.mk Chibios.18_rusefi/os/ex/Micron/m25q.mk
|
||||
--- Chibios.18_original/os/ex/Micron/m25q.mk 2021-01-09 17:57:15.412973300 -0500
|
||||
+++ Chibios.18_rusefi/os/ex/Micron/m25q.mk 2021-01-09 17:57:39.720581700 -0500
|
||||
@@ -1,6 +1,5 @@
|
||||
# List of all the m25Q device files.
|
||||
-M25QSRC := $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_flash.c \
|
||||
- $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_jesd216_flash.c \
|
||||
+M25QSRC := $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_jesd216_flash.c \
|
||||
$(CHIBIOS)/os/ex/Micron/m25q.c
|
||||
|
||||
# Required include directories
|
||||
diff -uwr Chibios.18_original/os/ex/ST/lis302dl.c Chibios.18_rusefi/os/ex/ST/lis302dl.c
|
||||
--- Chibios.18_original/os/ex/ST/lis302dl.c 2021-01-09 17:57:15.415973700 -0500
|
||||
+++ Chibios.18_rusefi/os/ex/ST/lis302dl.c 2021-01-09 17:57:39.723581800 -0500
|
||||
@@ -397,7 +397,7 @@
|
||||
devp->accbias[i] *= scale;
|
||||
}
|
||||
}
|
||||
- return msg;
|
||||
+ return MSG_OK;
|
||||
}
|
||||
|
||||
static const struct LIS302DLVMT vmt_device = {
|
||||
diff -uwr Chibios.18_original/os/hal/hal.mk Chibios.18_rusefi/os/hal/hal.mk
|
||||
--- Chibios.18_original/os/hal/hal.mk 2021-01-09 17:57:15.628973400 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/hal.mk 2021-01-09 17:57:39.919581600 -0500
|
||||
@@ -26,9 +26,15 @@
|
||||
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
|
||||
HALSRC += $(CHIBIOS)/os/hal/src/hal_dac.c
|
||||
endif
|
||||
+ifneq ($(findstring HAL_USE_EFL TRUE,$(HALCONF)),)
|
||||
+HALSRC += $(CHIBIOS)/os/hal/src/hal_efl.c
|
||||
+endif
|
||||
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
|
||||
HALSRC += $(CHIBIOS)/os/hal/src/hal_ext.c
|
||||
endif
|
||||
+ifneq ($(findstring HAL_USE_FLASH TRUE,$(HALCONF)),)
|
||||
+HALSRC += $(CHIBIOS)/os/hal/src/hal_flash.c
|
||||
+endif
|
||||
ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),)
|
||||
HALSRC += $(CHIBIOS)/os/hal/src/hal_gpt.c
|
||||
endif
|
||||
@@ -84,11 +90,13 @@
|
||||
HALSRC = $(CHIBIOS)/os/hal/src/hal.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_buffers.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_queues.c \
|
||||
+ $(CHIBIOS)/os/hal/src/hal_flash.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_mmcsd.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_adc.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_can.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_crypto.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_dac.c \
|
||||
+ $(CHIBIOS)/os/hal/src/hal_efl.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_ext.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_gpt.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_i2c.c \
|
||||
diff -uwr Chibios.18_original/os/hal/include/hal.h Chibios.18_rusefi/os/hal/include/hal.h
|
||||
--- Chibios.18_original/os/hal/include/hal.h 2021-01-09 17:57:15.628973400 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/include/hal.h 2021-01-09 17:57:39.919581600 -0500
|
||||
@@ -50,6 +50,10 @@
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
+#if !defined(HAL_USE_EFL)
|
||||
+#define HAL_USE_EFL FALSE
|
||||
+#endif
|
||||
+
|
||||
#if !defined(HAL_USE_EXT)
|
||||
#define HAL_USE_ETX FALSE
|
||||
#endif
|
||||
@@ -120,6 +124,8 @@
|
||||
#include "hal_files.h"
|
||||
#include "hal_ioblock.h"
|
||||
#include "hal_mmcsd.h"
|
||||
+#include "hal_persistent.h"
|
||||
+#include "hal_flash.h"
|
||||
|
||||
/* Shared headers.*/
|
||||
#include "hal_buffers.h"
|
||||
@@ -131,6 +137,7 @@
|
||||
#include "hal_can.h"
|
||||
#include "hal_crypto.h"
|
||||
#include "hal_dac.h"
|
||||
+#include "hal_efl.h"
|
||||
#include "hal_ext.h"
|
||||
#include "hal_gpt.h"
|
||||
#include "hal_i2c.h"
|
||||
Only in Chibios.18_rusefi/os/hal/include: hal_efl.h
|
||||
Only in Chibios.18_rusefi/os/hal/include: hal_flash.h
|
||||
Only in Chibios.18_rusefi/os/hal/include: hal_persistent.h
|
||||
diff -uwr Chibios.18_original/os/hal/include/hal_uart.h Chibios.18_rusefi/os/hal/include/hal_uart.h
|
||||
--- Chibios.18_original/os/hal/include/hal_uart.h 2021-01-09 17:57:15.639973800 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/include/hal_uart.h 2021-01-09 17:57:39.931581500 -0500
|
||||
@@ -299,6 +299,26 @@
|
||||
}
|
||||
|
||||
/**
|
||||
+ * @brief Common ISR code for RX half-transfer data.
|
||||
+ * @details This code handles the portable part of the ISR code:
|
||||
+ * - Callback invocation.
|
||||
+ * - Waiting thread wakeup, if any.
|
||||
+ * - Driver state transitions.
|
||||
+ * .
|
||||
+ * @note This macro is meant to be used in the low level drivers
|
||||
+ * implementation only.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ * @param[in] full flag set to 1 for the second half, and 0 for the first half
|
||||
+ *
|
||||
+ * @notapi
|
||||
+ */
|
||||
+#define _uart_rx_half_isr_code(uartp, full) { \
|
||||
+ if ((uartp)->config->rxhalf_cb != NULL) \
|
||||
+ (uartp)->config->rxhalf_cb(uartp, full); \
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
* @brief Common ISR code for RX error.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
* - Callback invocation.
|
||||
Only in Chibios.18_original/os/hal/lib/peripherals/flash: hal_flash.c
|
||||
Only in Chibios.18_original/os/hal/lib/peripherals/flash: hal_flash.h
|
||||
diff -uwr Chibios.18_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c Chibios.18_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c
|
||||
--- Chibios.18_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c 2021-01-09 17:57:15.777973800 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c 2021-01-09 17:57:40.183225100 -0500
|
||||
@@ -236,6 +236,11 @@
|
||||
/* Mustn't ever set TCIE here - if done, it causes an immediate
|
||||
interrupt.*/
|
||||
cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE;
|
||||
+
|
||||
+ /* Add Idle interrupt if needed */
|
||||
+ if (uartp->config->timeout_cb != NULL)
|
||||
+ cr1 |= USART_CR1_IDLEIE;
|
||||
+
|
||||
u->CR1 = uartp->config->cr1 | cr1;
|
||||
|
||||
/* Starting the receiver idle loop.*/
|
||||
@@ -264,6 +269,15 @@
|
||||
received character and then the driver stays in the same state.*/
|
||||
_uart_rx_idle_code(uartp);
|
||||
}
|
||||
+ /* DMA half-transter interrupt handling - for the 1st/2nd half transfers. */
|
||||
+ else if (uartp->config->rxhalf_cb != NULL) {
|
||||
+ if ((flags & STM32_DMA_ISR_HTIF) != 0) {
|
||||
+ _uart_rx_half_isr_code(uartp, 0);
|
||||
+ }
|
||||
+ else if ((flags & STM32_DMA_ISR_TCIF) != 0) {
|
||||
+ _uart_rx_half_isr_code(uartp, 1);
|
||||
+ }
|
||||
+ }
|
||||
else {
|
||||
/* Receiver in active state, a callback is generated, if enabled, after
|
||||
a completed transfer.*/
|
||||
@@ -322,6 +336,11 @@
|
||||
/* End of transmission, a callback is generated.*/
|
||||
_uart_tx2_isr_code(uartp);
|
||||
}
|
||||
+
|
||||
+ /* Idle interrupt sources are only checked if enabled in CR1.*/
|
||||
+ if ((sr & USART_SR_IDLE) && (cr1 & USART_CR1_IDLEIE)) {
|
||||
+ _uart_timeout_isr_code(uartp);
|
||||
+ }
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
@@ -793,8 +812,14 @@
|
||||
/* RX DMA channel preparation.*/
|
||||
dmaStreamSetMemory0(uartp->dmarx, rxbuf);
|
||||
dmaStreamSetTransactionSize(uartp->dmarx, n);
|
||||
- dmaStreamSetMode(uartp->dmarx, uartp->dmamode | STM32_DMA_CR_DIR_P2M |
|
||||
- STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
|
||||
+
|
||||
+ uint32_t mode = STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
|
||||
+
|
||||
+ /* DMA half-transfer interrupt & circular mode, if needed */
|
||||
+ if (uartp->config->rxhalf_cb != NULL)
|
||||
+ mode |= STM32_DMA_CR_HTIE | STM32_DMA_CR_CIRC;
|
||||
+
|
||||
+ dmaStreamSetMode(uartp->dmarx, uartp->dmamode | mode);
|
||||
|
||||
/* Starting transfer.*/
|
||||
dmaStreamEnable(uartp->dmarx);
|
||||
diff -uwr Chibios.18_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h Chibios.18_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h
|
||||
--- Chibios.18_original/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h 2021-01-09 17:57:15.777973800 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.h 2021-01-09 17:57:40.183225100 -0500
|
||||
@@ -463,6 +463,14 @@
|
||||
typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e);
|
||||
|
||||
/**
|
||||
+ * @brief Receive Half-transfer UART notification callback type.
|
||||
+ *
|
||||
+ * @param[in] uartp pointer to the @p UARTDriver object
|
||||
+ * @param[in] full flag set to 1 for the second half, and 0 for the first half
|
||||
+ */
|
||||
+typedef void (*uarthcb_t)(UARTDriver *uartp, uartflags_t full);
|
||||
+
|
||||
+/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
@@ -504,6 +512,16 @@
|
||||
* @brief Initialization value for the CR3 register.
|
||||
*/
|
||||
uint16_t cr3;
|
||||
+ /* Additional (optional) handlers. Placed here for the struct compatibility.*/
|
||||
+ /**
|
||||
+ * @brief Receiver timeout (idle) callback.
|
||||
+ * @details Handles an idle interrupt for USARTv1.
|
||||
+ */
|
||||
+ uartcb_t timeout_cb;
|
||||
+ /**
|
||||
+ * @brief Half-transfer receive buffer callback.
|
||||
+ */
|
||||
+ uarthcb_t rxhalf_cb;
|
||||
} UARTConfig;
|
||||
|
||||
/**
|
||||
Only in Chibios.18_rusefi/os/hal/ports/STM32/STM32F4xx: hal_efl_lld.c
|
||||
Only in Chibios.18_rusefi/os/hal/ports/STM32/STM32F4xx: hal_efl_lld.h
|
||||
diff -uwr Chibios.18_original/os/hal/ports/STM32/STM32F4xx/hal_lld.h Chibios.18_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.h
|
||||
--- Chibios.18_original/os/hal/ports/STM32/STM32F4xx/hal_lld.h 2021-01-09 17:57:15.801973400 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.h 2021-01-09 17:57:40.208224900 -0500
|
||||
@@ -991,6 +991,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 2
|
||||
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
|
||||
#define STM32_0WS_THRESHOLD 24000000
|
||||
#define STM32_1WS_THRESHOLD 48000000
|
||||
@@ -1001,6 +1002,7 @@
|
||||
#define STM32_6WS_THRESHOLD 168000000
|
||||
#define STM32_7WS_THRESHOLD 180000000
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
|
||||
#define STM32_0WS_THRESHOLD 22000000
|
||||
#define STM32_1WS_THRESHOLD 44000000
|
||||
@@ -1011,6 +1013,7 @@
|
||||
#define STM32_6WS_THRESHOLD 154000000
|
||||
#define STM32_7WS_THRESHOLD 176000000
|
||||
#define STM32_8WS_THRESHOLD 180000000
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
|
||||
#define STM32_0WS_THRESHOLD 20000000
|
||||
#define STM32_1WS_THRESHOLD 40000000
|
||||
@@ -1021,6 +1024,7 @@
|
||||
#define STM32_6WS_THRESHOLD 140000000
|
||||
#define STM32_7WS_THRESHOLD 168000000
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 0
|
||||
#else
|
||||
#error "invalid VDD voltage specified"
|
||||
#endif
|
||||
@@ -1036,6 +1040,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 2
|
||||
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
|
||||
#define STM32_0WS_THRESHOLD 24000000
|
||||
#define STM32_1WS_THRESHOLD 48000000
|
||||
@@ -1046,6 +1051,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
|
||||
#define STM32_0WS_THRESHOLD 18000000
|
||||
#define STM32_1WS_THRESHOLD 36000000
|
||||
@@ -1056,6 +1062,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
|
||||
#define STM32_0WS_THRESHOLD 16000000
|
||||
#define STM32_1WS_THRESHOLD 32000000
|
||||
@@ -1066,6 +1073,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 0
|
||||
#else
|
||||
#error "invalid VDD voltage specified"
|
||||
#endif
|
||||
@@ -1081,6 +1089,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 2
|
||||
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
|
||||
#define STM32_0WS_THRESHOLD 24000000
|
||||
#define STM32_1WS_THRESHOLD 48000000
|
||||
@@ -1091,6 +1100,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
|
||||
#define STM32_0WS_THRESHOLD 18000000
|
||||
#define STM32_1WS_THRESHOLD 36000000
|
||||
@@ -1101,6 +1111,7 @@
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 171) && (STM32_VDD < 210)
|
||||
#define STM32_0WS_THRESHOLD 16000000
|
||||
#define STM32_1WS_THRESHOLD 32000000
|
||||
@@ -1111,6 +1122,7 @@
|
||||
#define STM32_6WS_THRESHOLD 100000000
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
#define STM32_8WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 0
|
||||
#else
|
||||
#error "invalid VDD voltage specified"
|
||||
#endif
|
||||
@@ -1125,6 +1137,7 @@
|
||||
#define STM32_5WS_THRESHOLD 0
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 2
|
||||
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
|
||||
#define STM32_0WS_THRESHOLD 24000000
|
||||
#define STM32_1WS_THRESHOLD 48000000
|
||||
@@ -1134,6 +1147,7 @@
|
||||
#define STM32_5WS_THRESHOLD 0
|
||||
#define STM32_6WS_THRESHOLD 0
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
|
||||
#define STM32_0WS_THRESHOLD 18000000
|
||||
#define STM32_1WS_THRESHOLD 36000000
|
||||
@@ -1143,6 +1157,7 @@
|
||||
#define STM32_5WS_THRESHOLD 108000000
|
||||
#define STM32_6WS_THRESHOLD 120000000
|
||||
#define STM32_7WS_THRESHOLD 0
|
||||
+#define STM32_FLASH_PSIZE 1
|
||||
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
|
||||
#define STM32_0WS_THRESHOLD 16000000
|
||||
#define STM32_1WS_THRESHOLD 32000000
|
||||
@@ -1152,6 +1167,7 @@
|
||||
#define STM32_5WS_THRESHOLD 96000000
|
||||
#define STM32_6WS_THRESHOLD 112000000
|
||||
#define STM32_7WS_THRESHOLD 120000000
|
||||
+#define STM32_FLASH_PSIZE 0
|
||||
#else
|
||||
#error "invalid VDD voltage specified"
|
||||
#endif
|
||||
diff -uwr Chibios.18_original/os/hal/ports/STM32/STM32F4xx/platform.mk Chibios.18_rusefi/os/hal/ports/STM32/STM32F4xx/platform.mk
|
||||
--- Chibios.18_original/os/hal/ports/STM32/STM32F4xx/platform.mk 2021-01-09 17:57:15.801973400 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/ports/STM32/STM32F4xx/platform.mk 2021-01-09 17:57:40.208224900 -0500
|
||||
@@ -1,7 +1,8 @@
|
||||
# Required platform files.
|
||||
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
|
||||
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/stm32_isr.c \
|
||||
- $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_lld.c
|
||||
+ $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_lld.c \
|
||||
+ $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c
|
||||
|
||||
# Required include directories.
|
||||
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
|
||||
diff -uwr Chibios.18_original/os/hal/src/hal.c Chibios.18_rusefi/os/hal/src/hal.c
|
||||
--- Chibios.18_original/os/hal/src/hal.c 2021-01-09 17:57:15.828973300 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/src/hal.c 2021-01-09 17:57:40.236225100 -0500
|
||||
@@ -80,6 +80,9 @@
|
||||
#if (HAL_USE_DAC == TRUE) || defined(__DOXYGEN__)
|
||||
dacInit();
|
||||
#endif
|
||||
+#if (HAL_USE_EFL == TRUE) || defined(__DOXYGEN__)
|
||||
+ eflInit();
|
||||
+#endif
|
||||
#if (HAL_USE_EXT == TRUE) || defined(__DOXYGEN__)
|
||||
extInit();
|
||||
#endif
|
||||
Only in Chibios.18_rusefi/os/hal/src: hal_efl.c
|
||||
Only in Chibios.18_rusefi/os/hal/src: hal_flash.c
|
||||
diff -uwr Chibios.18_original/os/hal/src/hal_mmc_spi.c Chibios.18_rusefi/os/hal/src/hal_mmc_spi.c
|
||||
--- Chibios.18_original/os/hal/src/hal_mmc_spi.c 2021-01-09 17:57:15.833973400 -0500
|
||||
+++ Chibios.18_rusefi/os/hal/src/hal_mmc_spi.c 2021-01-09 17:57:40.242225300 -0500
|
||||
@@ -31,6 +31,8 @@
|
||||
|
||||
#if (HAL_USE_MMC_SPI == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
+#define MMC_WAIT_RETRY 3000
|
||||
+
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
@@ -172,6 +174,10 @@
|
||||
return;
|
||||
}
|
||||
}
|
||||
+#if MMC_NICE_WAITING == TRUE
|
||||
+ int waitCounter = 0;
|
||||
+#endif
|
||||
+
|
||||
/* Looks like it is a long wait.*/
|
||||
while (true) {
|
||||
spiReceive(mmcp->config->spip, 1, buf);
|
||||
@@ -181,6 +187,10 @@
|
||||
#if MMC_NICE_WAITING == TRUE
|
||||
/* Trying to be nice with the other threads.*/
|
||||
osalThreadSleepMilliseconds(1);
|
||||
+ if (++waitCounter == MMC_WAIT_RETRY) {
|
||||
+ // it's time to give up, this MMC card is not working property
|
||||
+ break;
|
||||
+ }
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@@ -356,6 +366,9 @@
|
||||
uint8_t buf[1];
|
||||
|
||||
spiSelect(mmcp->config->spip);
|
||||
+#if MMC_NICE_WAITING == TRUE
|
||||
+ int waitCounter = 0;
|
||||
+#endif
|
||||
while (true) {
|
||||
spiReceive(mmcp->config->spip, 1, buf);
|
||||
if (buf[0] == 0xFFU) {
|
||||
@@ -364,6 +377,10 @@
|
||||
#if MMC_NICE_WAITING == TRUE
|
||||
/* Trying to be nice with the other threads.*/
|
||||
osalThreadSleepMilliseconds(1);
|
||||
+ if (++waitCounter == MMC_WAIT_RETRY) {
|
||||
+ // it's time to give up, this MMC card is not working property
|
||||
+ break;
|
||||
+ }
|
||||
#endif
|
||||
}
|
||||
spiUnselect(mmcp->config->spip);
|
||||
diff -uwr Chibios.18_original/os/rt/include/chdebug.h Chibios.18_rusefi/os/rt/include/chdebug.h
|
||||
--- Chibios.18_original/os/rt/include/chdebug.h 2021-01-09 17:57:15.865973200 -0500
|
||||
+++ Chibios.18_rusefi/os/rt/include/chdebug.h 2021-01-09 17:57:40.274224800 -0500
|
||||
@@ -60,9 +60,10 @@
|
||||
/* Module macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
+//rusEfi additional hooks
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK == TRUE
|
||||
-#define _dbg_enter_lock() (ch.dbg.lock_cnt = (cnt_t)1)
|
||||
-#define _dbg_leave_lock() (ch.dbg.lock_cnt = (cnt_t)0)
|
||||
+#define _dbg_enter_lock() {(ch.dbg.lock_cnt = (cnt_t)1); ON_LOCK_HOOK;}
|
||||
+#define _dbg_leave_lock() {ON_UNLOCK_HOOK;(ch.dbg.lock_cnt = (cnt_t)0);}
|
||||
#endif
|
||||
|
||||
/* When the state checker feature is disabled then the following functions
|
|
@ -12,23 +12,9 @@ rem git -C Chibios.16_rusefi pull
|
|||
rem diff -uwr Chibios.16_rusefi Chibios.16_original > rusefi_chibios_16.patch
|
||||
rem diff -uwr Chibios.16_original Chibios.16_rusefi > chibios_rusefi_16.patch
|
||||
|
||||
|
||||
git clone -b stable_17.6.x https://github.com/rusefi/ChibiOS Chibios.17_original
|
||||
git -C Chibios.17_original pull
|
||||
git clone -b stable_17.6.rusefi https://github.com/rusefi/ChibiOS Chibios.17_rusefi
|
||||
git -C Chibios.17_rusefi pull
|
||||
|
||||
git clone -b stable_18.2.x https://github.com/rusefi/ChibiOS Chibios.18_original
|
||||
git -C Chibios.18_original pull
|
||||
git clone -b stable_18.2.rusefi https://github.com/rusefi/ChibiOS Chibios.18_rusefi
|
||||
git -C Chibios.18_rusefi pull
|
||||
|
||||
git clone -b stable_20.3.x https://github.com/rusefi/ChibiOS Chibios.20_original
|
||||
git -C Chibios.20_original pull
|
||||
git clone -b stable_20.3.x.rusefi https://github.com/rusefi/ChibiOS Chibios.20_rusefi
|
||||
git -C Chibios.20_rusefi pull
|
||||
|
||||
diff -uwr Chibios.17_original Chibios.17_rusefi > chibios_rusefi_17.patch
|
||||
diff -uwr Chibios.18_original Chibios.18_rusefi > chibios_rusefi_18.patch
|
||||
diff -uwr Chibios.20_original Chibios.20_rusefi > chibios_rusefi_20.patch
|
||||
|
||||
|
|
Loading…
Reference in New Issue