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fome-fw
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OpenBLT-based USB serial bootloader (#228) 

* flash layout

* bootloader builds

* output name

* hard fp

* strip out dfu

* bootloader gets hardfault

* loader gets USB but not MSD

* kinda usb?

* USB enumerates!

* cleanup

* shared params

* nonfunctional openblt

* stub flash

* flash.h

* openblt responds over USB!

* implement flash driver

* blt conf, linker

* boards no longer need specific openblt files

* no ccache

* common_make.sh

* cleanup

* delete bootloader crust

* simplifying linker logic

* script tweaks

* flash layout is handled entirely by FOME flash driver

* simplify memcpy

* format

* comment

* dead

* makefiles cleanup

* cleanup

* h7 linker script for bootloader

* h7 bootloader build

* build script
This commit is contained in:
Matthew Kennedy 2023-08-27 10:30:02 -07:00 committed by GitHub
parent 8b450caad2
commit 5813c20a32
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
51 changed files with 745 additions and 4806 deletions
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29
firmware/Makefile
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@ -3,8 +3,6 @@
# see setup_linux_environment.sh but Windows is also totally fine
#
.PHONY: openblt
CHIBIOS = ChibiOS
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
RULESFILE = $(RULESPATH)/rules.mk
@ -113,10 +111,6 @@ ifeq ($(USE_SMART_BUILD),)
USE_SMART_BUILD = no
endif
ifeq ($(USE_BOOTLOADER),)
USE_BOOTLOADER = no
endif
ifeq ($(USE_OPENBLT),)
USE_OPENBLT = no
endif
@ -205,18 +199,9 @@ endif
include $(PROJECT_DIR)/hw_layer/mass_storage/mass_storage.mk
include $(PROJECT_DIR)/common.mk
ifeq ($(BOOTLOADERINC),)
# include default bootloader code
BOOTLOADERINC= $(PROJECT_DIR)/bootloader/
endif
ifeq ($(USE_BOOTLOADER),yes)
include $(PROJECT_DIR)/bootloader/bootloader.mk
endif
ifeq ($(USE_OPENBLT),yes)
# Reserve start of flash for OpenBLT
USE_OPT += -Wl,--defsym=BOOTLOADER=1
USE_OPT += -Wl,--defsym=HAS_BOOTLOADER=1
DDEFS += -DEFI_USE_OPENBLT=TRUE
endif
@ -235,13 +220,12 @@ CSRC = gcc_version_check.c \
$(BOARDSRC) \
$(CHIBIOS_CONTRIB)/os/various/ramdisk.c \
$(CHIBIOS)/os/various/evtimer.c \
$(BOOTLOADERSRC) \
${HW_MASS_STORAGE_SRC_C} \
$(HW_LAYER_EMS) \
$(HW_LAYER_DRIVERS_CORE) \
$(HW_LAYER_DRIVERS) \
$(RUSEFI_LIB_C) \
main_hardfault.c
$(PROJECT_DIR)/hw_layer/main_hardfault.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
@ -279,7 +263,7 @@ TCPPSRC =
# List ASM source files here
ASMXSRC = $(ALLXASMSRC) \
$(RUSEFIASM) \
main_hardfault_asm.S
$(PROJECT_DIR)/hw_layer/main_hardfault_asm.S
#
# WARNING! order of variables is important here - for instance cypress own folders should go before default folders
@ -289,7 +273,6 @@ INCDIR = \
$(BOARDINC) \
$(ALLINC) \
$(TESTINC) \
$(BOOTLOADERINC) \
$(CHIBIOS)/os/various \
$(RUSEFI_LIB_INC) \
$(CONFDIR) \
@ -372,12 +355,6 @@ ULIBS = -lm --specs=nano.specs -Wl,--sort-section=alignment
include $(RULESFILE)
openblt:
make -f $(PROJECT_DIR)/hw_layer/openblt/openblt.mk BOARD_DIR=$(BOARD_DIR) PROJECT_BOARD=$(PROJECT_BOARD) PROJECT_CPU=$(PROJECT_CPU)
openblt_clean:
make -f $(PROJECT_DIR)/hw_layer/openblt/openblt.mk clean BOARD_DIR=$(BOARD_DIR) PROJECT_BOARD=$(PROJECT_BOARD) PROJECT_CPU=$(PROJECT_CPU)
# Enable precompiled header
include $(PROJECT_DIR)/rusefi_pch.mk
include $(PROJECT_DIR)/gitversion.mk

2
firmware/bootloader/!clean_bootloader.bat
View File

@ -1,2 +0,0 @@
@echo off
sh.exe clean_bootloader.sh

2
firmware/bootloader/!compile_bootloader.bat
View File

@ -1,2 +0,0 @@
@echo off
sh.exe compile_bootloader.sh

22
firmware/bootloader/!compile_bootloader_405.bat
View File

@ -1,22 +0,0 @@
@echo off
echo Starting compilation for Prometheus-405
set PROJECT_BOARD=prometheus/f405
set PROMETHEUS_BOARD=405
set EXTRA_PARAMS=-DDUMMY ^
-DEFI_BOOTLOADER ^
-DSTM32F405xx ^
-DEFI_ENABLE_ASSERTS=FALSE ^
-DCH_DBG_ENABLE_CHECKS=FALSE ^
-DCH_DBG_ENABLE_ASSERTS=FALSE ^
-DCH_DBG_ENABLE_STACK_CHECK=FALSE ^
-DCH_DBG_FILL_THREADS=FALSE ^
-DBOARD_TLE8888_COUNT=0 ^
-DBOARD_TLE6240_COUNT=0 ^
-DBOARD_MC33972_COUNT=0 ^
-DCH_DBG_THREADS_PROFILING=FALSE
set BOOTLOADER_CODE_DESTINATION_PATH="../Prometheus/405"
set DEBUG_LEVEL_OPT="-O2"
call !compile_bootloader.bat -r

15
firmware/bootloader/!compile_bootloader_469.bat
View File

@ -1,15 +0,0 @@
@echo off
echo Starting compilation for Prometheus-469
set PROJECT_BOARD=prometheus/f469
set PROMETHEUS_BOARD=469
set EXTRA_PARAMS=-DDUMMY -DEFI_BOOTLOADER -DSTM32F469xx -DEFI_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_CHECKS=FALSE -DCH_DBG_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_STACK_CHECK=FALSE -DCH_DBG_FILL_THREADS=FALSE ^
-DBOARD_TLE8888_COUNT=0 ^
-DBOARD_TLE6240_COUNT=0 ^
-DBOARD_MC33972_COUNT=0 ^
-DCH_DBG_THREADS_PROFILING=FALSE
set BOOTLOADER_CODE_DESTINATION_PATH="../Prometheus/469"
set DEBUG_LEVEL_OPT="-O2"
call !compile_bootloader.bat -r

BIN
firmware/bootloader/STMFlashLoader_all_screenshots.png
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14
firmware/bootloader/bootloader.h
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@ -1,14 +0,0 @@
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/*
* Used to trick the linker to include bootloader code into the binary.
*/
int initBootloader(void);
#ifdef __cplusplus
}
#endif

15
firmware/bootloader/bootloader.mk
View File

@ -1,15 +0,0 @@
# Added if USE_BOOTLOADER=yes in Makefile
BOOTLOADERSRC= $(PROJECT_DIR)/bootloader/bootloader_storage.c
ifeq ($(BOOTLOADERINC),)
BOOTLOADERINC=$(PROJECT_DIR)/bootloader
endif
USE_OPT += -Wl,--defsym=BOOTLOADER=1
# Add bootloader code to the firmware
DDEFS += -DEFI_BOOTLOADER_INCLUDE_CODE=TRUE
# Relocate interrupt vectors for the new application start address
DDEFS += -DCORTEX_VTOR_INIT=0x8000

899
firmware/bootloader/bootloader_generated.hxx
View File

@ -1,899 +0,0 @@
// This file was generated by Bin2Header
// Sun Jun 04 21:58:31 EEST 2017
#ifndef BOOTLOADER_GENERATED_HXX_
#define BOOTLOADER_GENERATED_HXX_
static const volatile uint8_t bootloader_code[] BOOTLOADER_SECTION = {
0x00, 0x10, 0x00, 0x20, 0xd1, 0x01, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0x21, 0x12, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xb1, 0x1d, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0x71, 0x16, 0x00, 0x08,
0xa1, 0x16, 0x00, 0x08, 0xe1, 0x16, 0x00, 0x08, 0x21, 0x17, 0x00, 0x08, 0x61, 0x17, 0x00, 0x08,
0x91, 0x17, 0x00, 0x08, 0xd1, 0x17, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0x71, 0x1f, 0x00, 0x08, 0x91, 0x1f, 0x00, 0x08, 0xb1, 0x1f, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0x11, 0x18, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0x51, 0x18, 0x00, 0x08, 0x81, 0x18, 0x00, 0x08, 0xc1, 0x18, 0x00, 0x08, 0x01, 0x19, 0x00, 0x08,
0x41, 0x19, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0x71, 0x19, 0x00, 0x08, 0xb1, 0x19, 0x00, 0x08, 0xf1, 0x19, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08, 0xf1, 0x04, 0x00, 0x08,
0x11, 0x27, 0x00, 0x08, 0x41, 0x28, 0x00, 0x08, 0x41, 0x29, 0x00, 0x08, 0x71, 0x2f, 0x00, 0x08,
0x72, 0xb6, 0x34, 0x48, 0x80, 0xf3, 0x09, 0x88, 0x40, 0xf2, 0x00, 0x00, 0xcc, 0xf2, 0x00, 0x00,
0x4e, 0xf6, 0x34, 0x71, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0xbf, 0xf3, 0x4f, 0x8f, 0xbf, 0xf3,
0x6f, 0x8f, 0x40, 0xf2, 0x00, 0x00, 0xc0, 0xf2, 0xf0, 0x00, 0x4e, 0xf6, 0x88, 0x51, 0xce, 0xf2,
0x00, 0x01, 0x08, 0x60, 0xbf, 0xf3, 0x4f, 0x8f, 0xbf, 0xf3, 0x6f, 0x8f, 0x4f, 0xf0, 0x00, 0x00,
0xe1, 0xee, 0x10, 0x0a, 0x4e, 0xf6, 0x3c, 0x71, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0x06, 0x20,
0x80, 0xf3, 0x14, 0x88, 0xbf, 0xf3, 0x6f, 0x8f, 0x00, 0xf0, 0x1a, 0xf9, 0x01, 0xf0, 0x70, 0xff,
0x4f, 0xf0, 0x55, 0x30, 0x1c, 0x49, 0x1d, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8, 0x04, 0x0b,
0xfa, 0xe7, 0x1b, 0x49, 0x17, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8, 0x04, 0x0b, 0xfa, 0xe7,
0x18, 0x49, 0x19, 0x4a, 0x19, 0x4b, 0x9a, 0x42, 0x3e, 0xbf, 0x51, 0xf8, 0x04, 0x0b, 0x42, 0xf8,
0x04, 0x0b, 0xf8, 0xe7, 0x00, 0x20, 0x16, 0x49, 0x16, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8,
0x04, 0x0b, 0xfa, 0xe7, 0x00, 0xf0, 0x0c, 0xf9, 0x00, 0xf0, 0xfa, 0xf8, 0x12, 0x4c, 0x13, 0x4d,
0xac, 0x42, 0x03, 0xda, 0x54, 0xf8, 0x04, 0x1b, 0x88, 0x47, 0xf9, 0xe7, 0x02, 0xf0, 0x48, 0xfe,
0x0f, 0x4c, 0x10, 0x4d, 0xac, 0x42, 0x03, 0xda, 0x54, 0xf8, 0x04, 0x1b, 0x88, 0x47, 0xf9, 0xe7,
0x00, 0xf0, 0xee, 0xb8, 0x00, 0x16, 0x00, 0x20, 0x00, 0x00, 0x00, 0x20, 0x00, 0x10, 0x00, 0x20,
0x00, 0x10, 0x00, 0x20, 0x78, 0x37, 0x00, 0x08, 0x00, 0x16, 0x00, 0x20, 0x18, 0x16, 0x00, 0x20,
0x18, 0x16, 0x00, 0x20, 0xec, 0x79, 0x00, 0x20, 0xc0, 0x01, 0x00, 0x08, 0xd0, 0x01, 0x00, 0x08,
0xd0, 0x01, 0x00, 0x08, 0xd0, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x2d, 0xe9, 0xf0, 0x4f, 0x2d, 0xed, 0x10, 0x8a, 0xc1, 0xf8, 0x0c, 0xd0, 0xc3, 0x68, 0x9d, 0x46,
0xbd, 0xec, 0x10, 0x8a, 0xbd, 0xe8, 0xf0, 0x8f, 0x00, 0xf0, 0xda, 0xf9, 0x00, 0x23, 0x83, 0xf3,
0x11, 0x88, 0x28, 0x46, 0xa0, 0x47, 0x00, 0x20, 0x00, 0xf0, 0xb2, 0xfc, 0x00, 0xf0, 0xc0, 0xf9,
0x00, 0xf0, 0xee, 0xfb, 0x00, 0xf0, 0xcc, 0xf9, 0x00, 0xdf, 0xfe, 0xe7, 0x00, 0x00, 0x00, 0x00,
0x84, 0x46, 0x41, 0xea, 0x00, 0x03, 0x13, 0xf0, 0x03, 0x03, 0x6d, 0xd1, 0x40, 0x3a, 0x41, 0xd3,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x40, 0x3a, 0xbd, 0xd2, 0x30, 0x32, 0x11, 0xd3, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x10, 0x3a, 0xed, 0xd2, 0x0c, 0x32, 0x05, 0xd3,
0x51, 0xf8, 0x04, 0x3b, 0x40, 0xf8, 0x04, 0x3b, 0x04, 0x3a, 0xf9, 0xd2, 0x04, 0x32, 0x08, 0xd0,
0xd2, 0x07, 0x1c, 0xbf, 0x11, 0xf8, 0x01, 0x3b, 0x00, 0xf8, 0x01, 0x3b, 0x01, 0xd3, 0x0b, 0x88,
0x03, 0x80, 0x60, 0x46, 0x70, 0x47, 0x00, 0xbf, 0x08, 0x2a, 0x13, 0xd3, 0x8b, 0x07, 0x8d, 0xd0,
0x10, 0xf0, 0x03, 0x03, 0x8a, 0xd0, 0xc3, 0xf1, 0x04, 0x03, 0xd2, 0x1a, 0xdb, 0x07, 0x1c, 0xbf,
0x11, 0xf8, 0x01, 0x3b, 0x00, 0xf8, 0x01, 0x3b, 0x80, 0xd3, 0x31, 0xf8, 0x02, 0x3b, 0x20, 0xf8,
0x02, 0x3b, 0x7b, 0xe7, 0x04, 0x3a, 0xd9, 0xd3, 0x01, 0x3a, 0x11, 0xf8, 0x01, 0x3b, 0x00, 0xf8,
0x01, 0x3b, 0xf9, 0xd2, 0x0b, 0x78, 0x03, 0x70, 0x4b, 0x78, 0x43, 0x70, 0x8b, 0x78, 0x83, 0x70,
0x60, 0x46, 0x70, 0x47, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x70, 0x47, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x70, 0x47, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xfe, 0xe7, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xf0, 0xb5, 0x12, 0x4f, 0x12, 0x4d, 0x13, 0x4c, 0x13, 0x4b, 0x14, 0x49, 0x07, 0xf1, 0x80, 0x0e,
0x00, 0x26, 0x9c, 0x42, 0x11, 0xd9, 0x04, 0x39, 0x1a, 0x46, 0x51, 0xf8, 0x04, 0x0f, 0x42, 0xf8,
0x04, 0x0b, 0x94, 0x42, 0xf9, 0xd8, 0xda, 0x43, 0x14, 0x44, 0x24, 0xf0, 0x03, 0x04, 0x04, 0x34,
0x23, 0x44, 0x9d, 0x42, 0x03, 0xd9, 0x43, 0xf8, 0x04, 0x6b, 0x9d, 0x42, 0xfb, 0xd8, 0x10, 0x37,
0x77, 0x45, 0x02, 0xd2, 0x97, 0xe8, 0x3a, 0x00, 0xe3, 0xe7, 0xf0, 0xbd, 0x20, 0x30, 0x00, 0x08,
0xec, 0x79, 0x00, 0x20, 0xec, 0x79, 0x00, 0x20, 0xec, 0x79, 0x00, 0x20, 0x90, 0x37, 0x00, 0x08,
0xfe, 0xe7, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xfe, 0xe7, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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};
#endif /* BOOTLOADER_GENERATED_HXX_ */

24
firmware/bootloader/bootloader_storage.c
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@ -1,24 +0,0 @@
#include "bootloader/bootloader.h"
#include <stdint.h>
#if defined(EFI_BOOTLOADER_INCLUDE_CODE)
#if defined __GNUC__
#define BOOTLOADER_SECTION __attribute__((section(".bl"))) /* todo: add 'used'? */
#else
#define BOOTLOADER_SECTION @ ".bl"
#endif
#include <bootloader_generated.hxx>
int initBootloader(void) {
// just make sure we use 'bootloader_code' array
// We're forcing the array to be included into the linked binary.
// The first 4 bytes contain a 32-bit address in RAM, which always starts from 0x20000000 for STM32.
// So the bootloader_code[3] is the most significant byte of the address which equals to 0x20.
return (bootloader_code[3] == 0x20) ? 0 : 1; /* todo: should always be 0x20? */
}
#endif /* EFI_BOOTLOADER_INCLUDE_CODE */

3
firmware/bootloader/clean_bootloader.sh
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@ -1,3 +0,0 @@
#!/bin/bash
make -f src/Makefile clean

45
firmware/bootloader/openblt_chibios/flash.h Normal file
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@ -0,0 +1,45 @@
/************************************************************************************//**
* \file Source/_template/flash.h
* \brief Bootloader flash driver header file.
* \ingroup Target__template_flash
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2019 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
#ifndef FLASH_H
#define FLASH_H
/****************************************************************************************
* Function prototypes
****************************************************************************************/
void FlashInit(void);
void FlashReinit(void);
blt_bool FlashWrite(blt_addr addr, blt_int32u len, blt_int8u *data);
blt_bool FlashErase(blt_addr addr, blt_int32u len);
blt_bool FlashWriteChecksum(void);
blt_bool FlashVerifyChecksum(void);
blt_bool FlashDone(void);
blt_addr FlashGetUserProgBaseAddress(void);
#endif /* FLASH_H */
/*********************************** end of flash.h ************************************/

257
firmware/bootloader/openblt_chibios/nvm.c Normal file
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@ -0,0 +1,257 @@
/************************************************************************************//**
* \file Source/_template/nvm.c
* \brief Bootloader non-volatile memory driver source file.
* \ingroup Target__template_nvm
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2019 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
/************************************************************************************//**
* \defgroup Target__template_nvm Non-volatile memory driver of a port
* \brief This module implements the non-volatile memory driver of a microcontroller
* port. Note that the default implementation if for a microcontroller that
* has internal flash memory. At the time of this writing pretty much all
* microcontrollers use flash EEPROM as non-volatile memory to store the
* program code. Assuming that this is also the case for the microcontroller
* for which the port is developed, nothing needs to be modified in this
* source file.
* \ingroup Target__template
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#include "flash.h"
/****************************************************************************************
* Hook functions
****************************************************************************************/
#if (BOOT_NVM_HOOKS_ENABLE > 0)
extern void NvmInitHook(void);
extern void NvmReinitHook(void);
extern blt_int8u NvmWriteHook(blt_addr addr, blt_int32u len, blt_int8u *data);
extern blt_int8u NvmEraseHook(blt_addr addr, blt_int32u len);
extern blt_bool NvmDoneHook(void);
#endif
#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)
extern blt_bool NvmWriteChecksumHook(void);
extern blt_bool NvmVerifyChecksumHook(void);
#endif
/************************************************************************************//**
** \brief Initializes the NVM driver.
** \return none.
**
****************************************************************************************/
void NvmInit(void)
{
#if (BOOT_NVM_HOOKS_ENABLE > 0)
/* give the application a chance to initialize a driver for operating on NVM
* that is not by default supported by this driver.
*/
NvmInitHook();
#endif
/* init the internal driver */
FlashInit();
} /*** end of NvmInit ***/
/************************************************************************************//**
** \brief Reinitializes the NVM driver. This function is called at the start of each
** firmware update as opposed to NvmInit, which is only called once during
** power on.
** \return none.
**
****************************************************************************************/
void NvmReinit(void)
{
#if (BOOT_NVM_HOOKS_ENABLE > 0)
/* give the application a chance to re-initialize a driver for operating on NVM
* that is not by default supported by this driver.
*/
NvmReinitHook();
#endif
/* reinitialize the internal driver */
FlashReinit();
} /*** end of NvmReinit ***/
/************************************************************************************//**
** \brief Programs the non-volatile memory.
** \param addr Start address.
** \param len Length in bytes.
** \param data Pointer to the data buffer.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool NvmWrite(blt_addr addr, blt_int32u len, blt_int8u *data)
{
#if (BOOT_NVM_HOOKS_ENABLE > 0)
blt_int8u result = BLT_NVM_NOT_IN_RANGE;
#endif
#if (BOOT_NVM_HOOKS_ENABLE > 0)
/* give the application a chance to operate on memory that is not by default supported
* by this driver.
*/
result = NvmWriteHook(addr, len, data);
/* process the return code */
if (result == BLT_NVM_OKAY)
{
/* data was within range of the additionally supported memory and succesfully
* programmed, so we are all done.
*/
return BLT_TRUE;
}
else if (result == BLT_NVM_ERROR)
{
/* data was within range of the additionally supported memory and attempted to be
* programmed, but an error occurred, so we can't continue.
*/
return BLT_FALSE;
}
#endif
/* still here so the internal driver should try and perform the program operation */
return FlashWrite(addr, len, data);
} /*** end of NvmWrite ***/
/************************************************************************************//**
** \brief Erases the non-volatile memory.
** \param addr Start address.
** \param len Length in bytes.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool NvmErase(blt_addr addr, blt_int32u len)
{
#if (BOOT_NVM_HOOKS_ENABLE > 0)
blt_int8u result = BLT_NVM_NOT_IN_RANGE;
#endif
#if (BOOT_NVM_HOOKS_ENABLE > 0)
/* give the application a chance to operate on memory that is not by default supported
* by this driver.
*/
result = NvmEraseHook(addr, len);
/* process the return code */
if (result == BLT_NVM_OKAY)
{
/* address was within range of the additionally supported memory and succesfully
* erased, so we are all done.
*/
return BLT_TRUE;
}
else if (result == BLT_NVM_ERROR)
{
/* address was within range of the additionally supported memory and attempted to be
* erased, but an error occurred, so we can't continue.
*/
return BLT_FALSE;
}
#endif
/* still here so the internal driver should try and perform the erase operation */
return FlashErase(addr, len);
} /*** end of NvmErase ***/
/************************************************************************************//**
** \brief Verifies the checksum, which indicates that a valid user program is
** present and can be started.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool NvmVerifyChecksum(void)
{
#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)
/* check checksum using the application specific method. */
return NvmVerifyChecksumHook();
#else
/* check checksum using the interally supported method. */
return FlashVerifyChecksum();
#endif
} /*** end of NvmVerifyChecksum ***/
/************************************************************************************//**
** \brief Obtains the base address of the non-volatile memory available to the user
** program. This is typically that start of the vector table.
** \return Base address.
**
****************************************************************************************/
blt_addr NvmGetUserProgBaseAddress(void)
{
return FlashGetUserProgBaseAddress();
} /*** end of NvmGetUserProgBaseAddress ***/
/************************************************************************************//**
** \brief Once all erase and programming operations are completed, this
** function is called, so at the end of the programming session and
** right before a software reset is performed. It is used to calculate
** a checksum and program this into flash. This checksum is later used
** to determine if a valid user program is present in flash.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool NvmDone(void)
{
#if (BOOT_NVM_HOOKS_ENABLE > 0)
/* give the application's NVM driver a chance to finish up */
if (NvmDoneHook() == BLT_FALSE)
{
/* error so no need to continue */
return BLT_FALSE;
}
#endif
#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)
/* compute and write checksum, using the application specific method. */
if (NvmWriteChecksumHook() == BLT_FALSE)
{
return BLT_FALSE;
}
#else
/* compute and write checksum, which is programmed by the internal driver. */
if (FlashWriteChecksum() == BLT_FALSE)
{
return BLT_FALSE;
}
#endif
/* finish up internal driver operations */
return FlashDone();
} /*** end of NvmDone ***/
/*********************************** end of nvm.c **************************************/

96
firmware/bootloader/openblt_chibios/openblt_chibios.cpp Normal file
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#include "pch.h"
extern "C" {
#include "boot.h"
#include "flash.h"
}
void CpuInit() { }
void CopInit() { }
void TimerInit() { }
void TimerReset() { }
void CopService() { }
void TimerUpdate() { }
blt_int32u TimerGet() {
return 0;
}
void CpuMemCopy(blt_addr dest, blt_addr src, blt_int16u len)
{
memcpy((void*)dest, (void*)src, len);
}
/** \brief Pointer to the user program's reset vector. */
#define CPU_USER_PROGRAM_STARTADDR_PTR ((blt_addr)(NvmGetUserProgBaseAddress() + 0x00000004))
/** \brief Pointer to the user program's vector table. */
#define CPU_USER_PROGRAM_VECTABLE_OFFSET ((blt_int32u)NvmGetUserProgBaseAddress())
void CpuStartUserProgram(void)
{
void (*pProgResetHandler)(void);
/* check if a user program is present by verifying the checksum */
if (NvmVerifyChecksum() == BLT_FALSE)
{
#if (BOOT_COM_DEFERRED_INIT_ENABLE > 0) && (BOOT_COM_ENABLE > 0)
/* bootloader will stay active so perform deferred initialization to make sure
* the communication interface that were not yet initialized are now initialized.
* this is needed to make sure firmware updates via these communication interfaces
* will be possible.
*/
ComDeferredInit();
#endif
/* not a valid user program so it cannot be started */
return;
}
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/* invoke callback */
if (CpuUserProgramStartHook() == BLT_FALSE)
{
#if (BOOT_COM_DEFERRED_INIT_ENABLE > 0) && (BOOT_COM_ENABLE > 0)
/* bootloader will stay active so perform deferred initialization to make sure
* the communication interface that were not yet initialized are now initialized.
* this is needed to make sure firmware updates via these communication interfaces
* will be possible.
*/
ComDeferredInit();
#endif
/* callback requests the user program to not be started */
return;
}
#endif
#if (BOOT_COM_ENABLE > 0)
/* release the communication interface */
ComFree();
#endif
/* reset the HAL */
chSysDisable();
/* reset the timer */
TimerReset();
/* remap user program's vector table */
SCB->VTOR = CPU_USER_PROGRAM_VECTABLE_OFFSET & (blt_int32u)0x1FFFFF80;
/* set the address where the bootloader needs to jump to. this is the address of
* the 2nd entry in the user program's vector table. this address points to the
* user program's reset handler.
*/
pProgResetHandler = (void(*)(void))(*((blt_addr *)CPU_USER_PROGRAM_STARTADDR_PTR));
/* The Cortex-M4 core has interrupts enabled out of reset. the bootloader
* explicitly disables these for security reasons. Enable them here again, so it does
* not have to be done by the user program.
*/
/* start the user program by activating its reset interrupt service routine */
pProgResetHandler();
#if (BOOT_COM_DEFERRED_INIT_ENABLE > 0) && (BOOT_COM_ENABLE > 0)
/* theoretically, the code never gets here because the user program should now be
* running and the previous function call should not return. In case it did return
* for whatever reason, make sure all communication interfaces are initialized so that
* firmware updates can be started.
*/
ComDeferredInit();
#endif
} /*** end of CpuStartUserProgram ***/

40
firmware/bootloader/openblt_chibios/openblt_flash.cpp Normal file
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#include "pch.h"
#include "flash_int.h"
extern "C" {
#include "boot.h"
#include "flash.h"
}
void FlashInit() { }
blt_bool FlashVerifyChecksum() {
// Naive check: if the first block is blank, there's no code there
return intFlashIsErased(FlashGetUserProgBaseAddress(), 4) ? BLT_FALSE : BLT_TRUE;
}
blt_addr FlashGetUserProgBaseAddress() {
return 0x08008000;
}
blt_bool FlashWrite(blt_addr addr, blt_int32u len, blt_int8u *data) {
return (FLASH_RETURN_SUCCESS == intFlashWrite(addr, (const char*)data, len)) ? BLT_TRUE : BLT_FALSE;
return BLT_TRUE;
}
blt_bool FlashErase(blt_addr addr, blt_int32u len) {
if (!intFlashIsErased(addr, len)) {
return (FLASH_RETURN_SUCCESS == intFlashErase(addr, len)) ? BLT_TRUE : BLT_FALSE;
}
return BLT_TRUE;
}
blt_bool FlashDone() {
return BLT_TRUE;
}
blt_bool FlashWriteChecksum() {
return BLT_TRUE;
}

130
firmware/bootloader/openblt_chibios/openblt_usb.cpp Normal file
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#include "pch.h"
#include "usbcfg.h"
#include "usbconsole.h"
extern "C" {
#include "boot.h"
#include "rs232.h"
}
void Rs232Init() {
// Set up USB serial
usb_serial_start();
}
#define RS232_CTO_RX_PACKET_TIMEOUT_MS (100u)
static blt_bool Rs232ReceiveByte(blt_int8u *data);
static void Rs232TransmitByte(blt_int8u data);
/************************************************************************************//**
** \brief Transmits a packet formatted for the communication interface.
** \param data Pointer to byte array with data that it to be transmitted.
** \param len Number of bytes that are to be transmitted.
** \return none.
**
****************************************************************************************/
void Rs232TransmitPacket(blt_int8u *data, blt_int8u len)
{
blt_int16u data_index;
/* verify validity of the len-paramenter */
// ASSERT_RT(len <= BOOT_COM_RS232_TX_MAX_DATA);
/* first transmit the length of the packet */
Rs232TransmitByte(len);
/* transmit all the packet bytes one-by-one */
for (data_index = 0; data_index < len; data_index++)
{
/* keep the watchdog happy */
CopService();
/* write byte */
Rs232TransmitByte(data[data_index]);
}
} /*** end of Rs232TransmitPacket ***/
/************************************************************************************//**
** \brief Receives a communication interface packet if one is present.
** \param data Pointer to byte array where the data is to be stored.
** \param len Pointer where the length of the packet is to be stored.
** \return BLT_TRUE if a packet was received, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool Rs232ReceivePacket(blt_int8u *data, blt_int8u *len)
{
static blt_int8u xcpCtoReqPacket[BOOT_COM_RS232_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
{
/* store the message length when received */
if (Rs232ReceiveByte(&xcpCtoReqPacket[0]) == BLT_TRUE)
{
if ( (xcpCtoReqPacket[0] > 0) &&
(xcpCtoReqPacket[0] <= BOOT_COM_RS232_RX_MAX_DATA) )
{
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
else
{
/* store the next packet byte */
if (Rs232ReceiveByte(&xcpCtoReqPacket[xcpCtoRxLength+1]) == BLT_TRUE)
{
/* increment the packet data count */
xcpCtoRxLength++;
/* check to see if the entire packet was received */
if (xcpCtoRxLength == xcpCtoReqPacket[0])
{
/* copy the packet data */
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* set the packet length */
*len = xcpCtoRxLength;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + RS232_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;
} /*** end of Rs232ReceivePacket ***/
static blt_bool Rs232ReceiveByte(blt_int8u *data)
{
if (!is_usb_serial_ready()) {
return BLT_FALSE;
}
auto bytesRead = chnReadTimeout(&SDU1, data, 1, TIME_IMMEDIATE);
return bytesRead == 0 ? BLT_FALSE : BLT_TRUE;
}
static void Rs232TransmitByte(blt_int8u data)
{
chnWriteTimeout(&SDU1, &data, 1, TIME_INFINITE);
}

58
firmware/bootloader/openblt_chibios/types.h Normal file
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/************************************************************************************//**
* \file Source/ARMCM4_STM32F4/types.h
* \brief Bootloader types header file.
* \ingroup Target_ARMCM4_STM32F4
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
#ifndef TYPES_H
#define TYPES_H
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Boolean true value. */
#define BLT_TRUE (1)
/** \brief Boolean false value. */
#define BLT_FALSE (0)
/** \brief NULL pointer value. */
#define BLT_NULL ((void *)0)
/****************************************************************************************
* Type definitions
****************************************************************************************/
typedef unsigned char blt_bool; /**< boolean type */
typedef char blt_char; /**< character type */
typedef unsigned long blt_addr; /**< memory address type */
typedef unsigned char blt_int8u; /**< 8-bit unsigned integer */
typedef signed char blt_int8s; /**< 8-bit signed integer */
typedef unsigned short blt_int16u; /**< 16-bit unsigned integer */
typedef signed short blt_int16s; /**< 16-bit signed integer */
typedef unsigned int blt_int32u; /**< 32-bit unsigned integer */
typedef signed int blt_int32s; /**< 32-bit signed integer */
#endif /* TYPES_H */
/*********************************** end of types.h ************************************/

958
firmware/bootloader/prometheus/405/bootloader_generated.hxx
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@ -1,958 +0,0 @@
// This file was generated by Bin2Header
// Fri Mar 22 17:06:33 EET 2019
#ifndef BOOTLOADER_GENERATED_HXX_
#define BOOTLOADER_GENERATED_HXX_
static const volatile uint8_t bootloader_code[] BOOTLOADER_SECTION = {
0x00, 0x10, 0x00, 0x20, 0x11, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x71, 0x0f, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x61, 0x1f, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x11, 0x13, 0x00, 0x08, 0x61, 0x13, 0x00, 0x08,
0xc1, 0x13, 0x00, 0x08, 0x21, 0x14, 0x00, 0x08, 0x81, 0x14, 0x00, 0x08, 0x31, 0x19, 0x00, 0x08,
0x61, 0x19, 0x00, 0x08, 0xa1, 0x19, 0x00, 0x08, 0xe1, 0x19, 0x00, 0x08, 0x21, 0x1a, 0x00, 0x08,
0x51, 0x1a, 0x00, 0x08, 0x91, 0x1a, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0xe1, 0x14, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x01, 0x16, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0xd1, 0x1a, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x51, 0x21, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x11, 0x1b, 0x00, 0x08, 0x41, 0x1b, 0x00, 0x08, 0x81, 0x1b, 0x00, 0x08, 0xc1, 0x1b, 0x00, 0x08,
0x01, 0x1c, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x31, 0x1c, 0x00, 0x08, 0x71, 0x1c, 0x00, 0x08, 0xb1, 0x1c, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0xb1, 0x2d, 0x00, 0x08, 0x11, 0x2f, 0x00, 0x08, 0x21, 0x30, 0x00, 0x08, 0xe1, 0x35, 0x00, 0x08,
0x72, 0xb6, 0x39, 0x48, 0x80, 0xf3, 0x08, 0x88, 0x38, 0x48, 0x80, 0xf3, 0x09, 0x88, 0x38, 0x48,
0x4e, 0xf6, 0x08, 0x51, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0x40, 0xf2, 0x00, 0x00, 0xcc, 0xf2,
0x00, 0x00, 0x4e, 0xf6, 0x34, 0x71, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0xbf, 0xf3, 0x4f, 0x8f,
0xbf, 0xf3, 0x6f, 0x8f, 0x40, 0xf2, 0x00, 0x00, 0xc0, 0xf2, 0xf0, 0x00, 0x4e, 0xf6, 0x88, 0x51,
0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0xbf, 0xf3, 0x4f, 0x8f, 0xbf, 0xf3, 0x6f, 0x8f, 0x4f, 0xf0,
0x00, 0x00, 0xe1, 0xee, 0x10, 0x0a, 0x4e, 0xf6, 0x3c, 0x71, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60,
0x06, 0x20, 0x80, 0xf3, 0x14, 0x88, 0xbf, 0xf3, 0x6f, 0x8f, 0x00, 0xf0, 0x19, 0xf9, 0x02, 0xf0,
0x0f, 0xf9, 0x4f, 0xf0, 0x55, 0x30, 0x1f, 0x49, 0x1b, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8,
0x04, 0x0b, 0xfa, 0xe7, 0x1c, 0x49, 0x19, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8, 0x04, 0x0b,
0xfa, 0xe7, 0x1a, 0x49, 0x1a, 0x4a, 0x1b, 0x4b, 0x9a, 0x42, 0x3e, 0xbf, 0x51, 0xf8, 0x04, 0x0b,
0x42, 0xf8, 0x04, 0x0b, 0xf8, 0xe7, 0x00, 0x20, 0x17, 0x49, 0x18, 0x4a, 0x91, 0x42, 0x3c, 0xbf,
0x41, 0xf8, 0x04, 0x0b, 0xfa, 0xe7, 0x00, 0xf0, 0x0b, 0xf9, 0x00, 0xf0, 0xf9, 0xf8, 0x14, 0x4c,
0x14, 0x4d, 0xac, 0x42, 0x03, 0xda, 0x54, 0xf8, 0x04, 0x1b, 0x88, 0x47, 0xf9, 0xe7, 0x03, 0xf0,
0x67, 0xf9, 0x11, 0x4c, 0x11, 0x4d, 0xac, 0x42, 0x03, 0xda, 0x54, 0xf8, 0x04, 0x1b, 0x88, 0x47,
0xf9, 0xe7, 0x00, 0xf0, 0xed, 0xb8, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x16, 0x00, 0x20,
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0x00, 0x3a, 0x00, 0x08, 0x04, 0x3a, 0x00, 0x08, 0x08, 0x3a, 0x00, 0x08, 0x0c, 0x3a, 0x00, 0x08,
0x10, 0x3a, 0x00, 0x08, 0x14, 0x3a, 0x00, 0x08, 0x63, 0x31, 0x00, 0x00, 0x69, 0x31, 0x00, 0x00,
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0x6e, 0x20, 0x25, 0x73, 0x25, 0x64, 0x00, 0x00, 0x70, 0x69, 0x6e, 0x20, 0x72, 0x65, 0x70, 0x6f,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
0x00, 0x00, 0x00, 0x00, 0x21, 0x2a, 0x00, 0x08, 0x11, 0x2a, 0x00, 0x08, 0x60, 0x02, 0x00, 0x10,
0x08, 0x00, 0x00, 0x10, 0xc8, 0x00, 0x00, 0x00,
};
#endif /* BOOTLOADER_GENERATED_HXX_ */

964
firmware/bootloader/prometheus/469/bootloader_generated.hxx
View File

@ -1,964 +0,0 @@
// This file was generated by Bin2Header
// Fri Mar 22 17:01:12 EET 2019
#ifndef BOOTLOADER_GENERATED_HXX_
#define BOOTLOADER_GENERATED_HXX_
static const volatile uint8_t bootloader_code[] BOOTLOADER_SECTION = {
0x00, 0x10, 0x00, 0x20, 0x11, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x71, 0x0f, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x71, 0x1f, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x11, 0x13, 0x00, 0x08, 0x61, 0x13, 0x00, 0x08,
0xc1, 0x13, 0x00, 0x08, 0x21, 0x14, 0x00, 0x08, 0x81, 0x14, 0x00, 0x08, 0x41, 0x19, 0x00, 0x08,
0x71, 0x19, 0x00, 0x08, 0xb1, 0x19, 0x00, 0x08, 0xf1, 0x19, 0x00, 0x08, 0x31, 0x1a, 0x00, 0x08,
0x61, 0x1a, 0x00, 0x08, 0xa1, 0x1a, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0xe1, 0x14, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x01, 0x16, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0xe1, 0x1a, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x61, 0x21, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x21, 0x1b, 0x00, 0x08, 0x51, 0x1b, 0x00, 0x08, 0x91, 0x1b, 0x00, 0x08, 0xd1, 0x1b, 0x00, 0x08,
0x11, 0x1c, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x41, 0x1c, 0x00, 0x08, 0x81, 0x1c, 0x00, 0x08, 0xc1, 0x1c, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08, 0x13, 0x03, 0x00, 0x08,
0x11, 0x2e, 0x00, 0x08, 0x71, 0x2f, 0x00, 0x08, 0x81, 0x30, 0x00, 0x08, 0x41, 0x36, 0x00, 0x08,
0x72, 0xb6, 0x39, 0x48, 0x80, 0xf3, 0x08, 0x88, 0x38, 0x48, 0x80, 0xf3, 0x09, 0x88, 0x38, 0x48,
0x4e, 0xf6, 0x08, 0x51, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0x40, 0xf2, 0x00, 0x00, 0xcc, 0xf2,
0x00, 0x00, 0x4e, 0xf6, 0x34, 0x71, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0xbf, 0xf3, 0x4f, 0x8f,
0xbf, 0xf3, 0x6f, 0x8f, 0x40, 0xf2, 0x00, 0x00, 0xc0, 0xf2, 0xf0, 0x00, 0x4e, 0xf6, 0x88, 0x51,
0xce, 0xf2, 0x00, 0x01, 0x08, 0x60, 0xbf, 0xf3, 0x4f, 0x8f, 0xbf, 0xf3, 0x6f, 0x8f, 0x4f, 0xf0,
0x00, 0x00, 0xe1, 0xee, 0x10, 0x0a, 0x4e, 0xf6, 0x3c, 0x71, 0xce, 0xf2, 0x00, 0x01, 0x08, 0x60,
0x06, 0x20, 0x80, 0xf3, 0x14, 0x88, 0xbf, 0xf3, 0x6f, 0x8f, 0x00, 0xf0, 0x19, 0xf9, 0x02, 0xf0,
0x17, 0xf9, 0x4f, 0xf0, 0x55, 0x30, 0x1f, 0x49, 0x1b, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8,
0x04, 0x0b, 0xfa, 0xe7, 0x1c, 0x49, 0x19, 0x4a, 0x91, 0x42, 0x3c, 0xbf, 0x41, 0xf8, 0x04, 0x0b,
0xfa, 0xe7, 0x1a, 0x49, 0x1a, 0x4a, 0x1b, 0x4b, 0x9a, 0x42, 0x3e, 0xbf, 0x51, 0xf8, 0x04, 0x0b,
0x42, 0xf8, 0x04, 0x0b, 0xf8, 0xe7, 0x00, 0x20, 0x17, 0x49, 0x18, 0x4a, 0x91, 0x42, 0x3c, 0xbf,
0x41, 0xf8, 0x04, 0x0b, 0xfa, 0xe7, 0x00, 0xf0, 0x0b, 0xf9, 0x00, 0xf0, 0xf9, 0xf8, 0x14, 0x4c,
0x14, 0x4d, 0xac, 0x42, 0x03, 0xda, 0x54, 0xf8, 0x04, 0x1b, 0x88, 0x47, 0xf9, 0xe7, 0x03, 0xf0,
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};
#endif /* BOOTLOADER_GENERATED_HXX_ */

51
firmware/bootloader/src/Makefile
View File

@ -7,12 +7,11 @@
ifeq ($(DEBUG_LEVEL_OPT),)
# this value would be used by default. For 'debug' configuration override with '-O0 -ggdb -g' or something along these lines
DEBUG_LEVEL_OPT = -O2
DEBUG_LEVEL_OPT = -Os -ggdb -g
DDEFS += -DEFI_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_STACK_CHECK=FALSE -DCH_DBG_FILL_THREADS=FALSE -DCH_DBG_THREADS_PROFILING=FALSE
endif
# let everyone know that we are compiling bootloader
IS_RE_BOOTLOADER = yes
DDEFS += -DENABLE_AUTO_DETECT_HSE=TRUE -DSTM32_HSECLK=25000000
# disable some modules to shrink bootloader binary
DDEFS += -DEFI_BOOTLOADER
@ -22,8 +21,7 @@ DDEFS += -DHAL_USE_FLASH=FALSE
DDEFS += -DEFI_USE_UART_DMA=FALSE
# disable USB (The bootloader has currently UART support only)
DDEFS += -DEFI_USB_SERIAL=FALSE
DDEFS += -DEFI_USB_SERIAL=TRUE -DHAL_USE_USB_MSD=FALSE
# disable CAN
DDEFS += -DEFI_CAN_SUPPORT=FALSE
@ -34,6 +32,9 @@ ifeq ($(USE_OPT),)
USE_OPT = $(EXTRA_PARAMS) $(DEBUG_LEVEL_OPT) $(RFLAGS) -Wno-error=implicit-fallthrough -Wno-error=bool-operation -fomit-frame-pointer -falign-functions=16 -Werror -Wno-error=pointer-sign -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=sign-compare -Wno-error=unused-parameter -Wno-error=missing-field-initializers -Werror=type-limits -Wno-error=strict-aliasing -Wno-error=attributes
endif
# Configure the linker script to build the bootloader, not the firmware
USE_OPT += -Wl,--defsym=IS_BOOTLOADER=1
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT = -fgnu89-inline -std=gnu99 -Werror-implicit-function-declaration
@ -52,13 +53,6 @@ ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
ifeq ($(CCACHE_DIR),)
$(info No CCACHE_DIR)
else
$(info CCACHE_DIR is ${CCACHE_DIR})
CCPREFIX=ccache
endif
# Linker extra options here.
ifeq ($(USE_LDOPT),)
USE_LDOPT =
@ -107,7 +101,7 @@ endif
# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
ifeq ($(USE_FPU),)
USE_FPU = softfp
USE_FPU = hard
endif
#
@ -119,7 +113,7 @@ endif
#
# Define project name here
PROJECT = bootloader
PROJECT = fome_bl
PROJECT_DIR = ..
# Configure precompiled header
@ -175,7 +169,14 @@ CSRC = $(ALLCSRC) \
$(BOARDSRC) \
$(HW_LAYER_EMS) \
$(HW_LAYER_DRIVERS_CORE) \
$(FATFSSRC) \
$(PROJECT_DIR)/hw_layer/openblt/shared_params.c \
$(PROJECT_DIR)/hw_layer/main_hardfault.c \
$(PROJECT_DIR)/ext/openblt/Target/Source/backdoor.c \
$(PROJECT_DIR)/ext/openblt/Target/Source/boot.c \
$(PROJECT_DIR)/ext/openblt/Target/Source/com.c \
$(PROJECT_DIR)/ext/openblt/Target/Source/xcp.c \
$(PROJECT_DIR)/bootloader/openblt_chibios/nvm.c \
$(PROJECT_DIR)/hw_layer/openblt/hooks.c \
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# todo: reduce code duplication with primary Makefile!!!
@ -183,19 +184,13 @@ CSRC = $(ALLCSRC) \
CPPSRC = $(ALLCPPSRC) \
$(HW_LAYER_EMS_CPP) \
$(BOARDCPPSRC) \
$(HW_SENSORS_SRC) \
$(TUNERSTUDIO_SRC_CPP) \
$(CONSOLE_SRC_CPP) \
$(PROJECT_DIR)/console/binary/tunerstudio_io.cpp \
$(PROJECT_DIR)/console/binary/tunerstudio_io_serial.cpp \
$(PROJECT_DIR)/controllers/algo/engine_configuration.cpp \
$(PROJECT_DIR)/controllers/persistent_store.cpp \
$(PROJECT_DIR)/hw_layer/io_pins.cpp \
$(PROJECT_DIR)/util/efilib.cpp \
$(PROJECT_DIR)/hw_layer/pin_repository.cpp \
$(RUSEFI_LIB_CPP) \
$(PROJECT_DIR)/bootloader/openblt_chibios/openblt_chibios.cpp \
$(PROJECT_DIR)/bootloader/openblt_chibios/openblt_flash.cpp \
$(PROJECT_DIR)/bootloader/openblt_chibios/openblt_usb.cpp \
src/rusefi_stubs.cpp \
src/dfu.cpp \
src/main.cpp
# C sources to be compiled in ARM mode regardless of the global setting.
@ -220,7 +215,7 @@ TCPPSRC =
# List ASM source files here
# List ASM source files here
ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) $(PROJECT_DIR)/hw_layer/main_hardfault_asm.S
INCDIR = $(ALLINC) \
$(PCH_DIR) \
@ -245,6 +240,8 @@ INCDIR = $(ALLINC) \
$(PROJECT_DIR)/hw_layer/serial_over_usb \
$(PROJECT_DIR)/hw_layer/algo \
$(PROJECT_DIR)/hw_layer/sensors \
$(PROJECT_DIR)/controllers/sensors/impl \
$(PROJECT_DIR)/controllers/sensors/core \
$(PROJECT_DIR)/hw_layer/mass_storage \
$(PROJECT_DIR)/hw_layer/ports \
$(PROJECT_DIR)/console/binary/generated \
@ -258,6 +255,10 @@ INCDIR = $(ALLINC) \
$(PROJECT_DIR)/controllers/sensors \
$(PROJECT_DIR)/init \
$(RUSEFI_LIB_INC) \
$(BOARDS_DIR) \
$(PROJECT_DIR)/hw_layer/openblt \
$(PROJECT_DIR)/ext/openblt/Target/Source \
$(PROJECT_DIR)/bootloader/openblt_chibios \
config
BUILDDIR=blbuild

319
firmware/bootloader/src/dfu.cpp
View File

@ -1,319 +0,0 @@
#include "pch.h"
#include "hardware.h"
#include "flash_int.h"
#include "dfu.h"
// Communication vars
static UartTsChannel blTsChannel(TS_PRIMARY_UxART_PORT);
static uint8_t buffer[DFU_BUFFER_SIZE];
// Use short timeout for the first data packet, and normal timeout for the rest
static int sr5Timeout = DFU_SR5_TIMEOUT_FIRST;
// This big buffer is used for temporary storing of the bootloader flash page
static uint8_t bootloaderVirtualPageBuffer[BOOTLOADER_SIZE];
// needed by DFU protocol (DFU_DEVICE_ID_CMD)
static uint32_t getMcuRevision() {
// =0x413 for F407
// =0x419 for F42xxx and F43xxx
// =0x434 for F469
return DBGMCU->IDCODE & MCU_REVISION_MASK;
}
static bool getByte(uint8_t *b) {
return blTsChannel.readTimeout(b, 1, sr5Timeout) == 1;
}
static void sendByte(uint8_t b) {
blTsChannel.write(&b, 1, true);
}
static uint8_t dfuCalcChecksum(const uint8_t *buf, uint8_t size) {
uint8_t checksum = buf[0];
for (uint8_t i = 1; i < size; i++) {
checksum ^= buf[i];
}
return checksum;
}
// Used to detect writing of the current flash sector
static bool isBootloaderAddress(uint32_t addr) {
return addr >= BOOTLOADER_ADDR && addr < (BOOTLOADER_ADDR + BOOTLOADER_SIZE);
}
static bool isInVirtualPageBuffer(uint32_t addr) {
return addr >= (uint32_t)bootloaderVirtualPageBuffer && addr < (uint32_t)bootloaderVirtualPageBuffer + sizeof(bootloaderVirtualPageBuffer);
}
// Read 32-bit address and 8-bit checksum.
// Returns true if all 5 bytes are received and checksum is correct, and false otherwise.
static bool readAddress(uint32_t *addr) {
uint8_t buf[5]; // 4 bytes+checksum
if (blTsChannel.readTimeout(buf, 5, sr5Timeout) != 5)
return false;
if (dfuCalcChecksum(buf, 4) != buf[4])
return false;
*addr = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
// for bootloader flash, return a virtual buffer instead
if (isBootloaderAddress(*addr)) {
*addr = (uint32_t)bootloaderVirtualPageBuffer + (*addr - BOOTLOADER_ADDR);
}
return true;
}
// needed by DFU protocol to validate received bytes
static uint8_t complementByte(uint8_t c) {
return c ^ 0xff;
}
static uint16_t bufToInt16(uint8_t *buf) {
return (buf[0] << 8) | buf[1];
}
static void prepareInterruptsForJump() {
#ifdef STM32F4
// interrupt control
SCB->ICSR &= ~SCB_ICSR_PENDSVSET_Msk;
// set interrupt vectors
for(int i = 0; i < 8; i++)
NVIC->ICER[i] = NVIC->IABR[i];
__set_CONTROL(0);
#else
// todo: add support for other MCUs
#error "Unsupported MCU configuration!"
#endif
}
// some weird STM32 magic...
void dfuJumpToApp(uint32_t addr) {
typedef void (*pFunction)(void);
// goodbye ChibiOS, we're leaving...
chSysDisable();
// get jump addr
uint32_t jumpAddress = *((uint32_t *)(addr + 4));
pFunction jump = (pFunction) jumpAddress;
prepareInterruptsForJump();
// set stack pointer
__set_MSP(*(uint32_t *)addr);
// call
jump();
// we shouldn't get here
chSysHalt("dfuJumpToApp FAIL");
}
static void dfuHandleGetList() {
static const uint8_t cmdsInfo[] = { DFU_VERSION_NUMBER, DFU_GET_LIST_CMD, DFU_DEVICE_ID_CMD, DFU_READ_CMD, DFU_GO_CMD,
DFU_WRITE_CMD, DFU_ERASE_CMD };
size_t numBytes = sizeof(cmdsInfo);
sendByte(numBytes - 1); // number of commands
for (size_t i = 0; i < numBytes; i++)
sendByte(cmdsInfo[i]);
sendByte(DFU_ACK_BYTE);
}
static void dfuHandleDeviceId() {
uint32_t mcuRev = getMcuRevision();
sendByte(0x01); // the number of bytes to be send - 1
// send 12 bit MCU revision
sendByte((uint8_t)((mcuRev >> 8) & 0xf));
sendByte((uint8_t)(mcuRev & 0xff));
sendByte(DFU_ACK_BYTE);
}
static void dfuHandleGo() {
uint32_t addr;
if (!readAddress(&addr)) {
sendByte(DFU_NACK_BYTE);
return;
}
// todo: check if the address is valid
sendByte(DFU_ACK_BYTE);
dfuJumpToApp(addr);
}
static void dfuHandleRead() {
uint32_t addr;
if (!readAddress(&addr)) {
sendByte(DFU_NACK_BYTE);
return;
}
sendByte(DFU_ACK_BYTE);
uint8_t byte, complement;
if (!getByte(&byte))
return;
if (!getByte(&complement))
return;
// check if we have a correct byte received
if (complement != complementByte(byte)) {
sendByte(DFU_NACK_BYTE);
return;
}
int numBytes = (int)byte + 1;
sendByte(DFU_ACK_BYTE);
// read flash or virtual RAM buffer (don't transmit directly from flash)
if (isInVirtualPageBuffer(addr))
memcpy(buffer, (uint8_t *)addr, numBytes);
else
intFlashRead(addr, (char *)buffer, numBytes);
// transmit data
blTsChannel.write(buffer, numBytes, true);
}
static void dfuHandleWrite() {
uint32_t addr;
if (!readAddress(&addr)) {
sendByte(DFU_NACK_BYTE);
return;
}
sendByte(DFU_ACK_BYTE);
if (!getByte(buffer))
return;
int numBytes = buffer[0] + 1;
int numBytesAndChecksum = numBytes + 1; // +1 byte of checkSum
// receive data
if (blTsChannel.readTimeout(buffer + 1, numBytesAndChecksum, sr5Timeout) != numBytesAndChecksum)
return;
// don't write corrupted data!
if (dfuCalcChecksum(buffer, numBytesAndChecksum) != buffer[numBytesAndChecksum]) {
sendByte(DFU_NACK_BYTE);
return;
}
// now write to flash (or to the virtual RAM buffer)
if (isInVirtualPageBuffer(addr))
memcpy((uint8_t *)addr, (buffer + 1), numBytes);
else
intFlashWrite(addr, (const char *)(buffer + 1), numBytes);
// we're done!
sendByte(DFU_ACK_BYTE);
}
static void dfuHandleErase() {
int numSectors;
if (!getByte(buffer))
return;
if (!getByte(buffer + 1))
return;
numSectors = bufToInt16(buffer);
int numSectorData;
if (numSectors == 0xffff) // erase all chip
numSectorData = 1;
else
numSectorData = (numSectors + 1) * 2 + 1;
uint8_t *sectorList = buffer + 2;
// read sector data & checksum
if (blTsChannel.readTimeout(sectorList, numSectorData, sr5Timeout) != numSectorData)
return;
// verify checksum
if (dfuCalcChecksum(buffer, 2 + numSectorData - 1) != buffer[2 + numSectorData - 1]) {
sendByte(DFU_NACK_BYTE);
return;
}
// Erase the chosen sectors, sector by sector
for (int i = 0; i < numSectorData - 1; i += 2) {
int sectorIdx = bufToInt16(sectorList + i);
if (sectorIdx < BOOTLOADER_NUM_SECTORS) { // skip first sectors where our bootloader is
// imitate flash erase by writing '0xff'
memset(bootloaderVirtualPageBuffer, 0xff, BOOTLOADER_SIZE);
continue;
}
// erase sector
intFlashSectorErase(sectorIdx);
}
sendByte(DFU_ACK_BYTE);
}
bool dfuStartLoop(void) {
bool wasCommand = false;
uint8_t command, complement;
sr5Timeout = DFU_SR5_TIMEOUT_FIRST;
// We cannot afford waiting for the first handshake byte, so we have to send an answer in advance!
sendByte(DFU_ACK_BYTE);
// Fill the temporary buffer from the real flash memory
memcpy(bootloaderVirtualPageBuffer, (void *)BOOTLOADER_ADDR, BOOTLOADER_SIZE);
while (true) {
// read command & complement bytes
if (!getByte(&command)) {
// timeout, but wait more if we're in bootloader mode
if (wasCommand)
continue;
// exit if no data was received
break;
}
if (!getByte(&complement)) {
if (wasCommand) {
// something is wrong, but keep the connection
sendByte(DFU_NACK_BYTE);
continue;
}
break;
}
// check if we have a correct command received
if (complement != complementByte(command)) {
sendByte(DFU_NACK_BYTE);
continue;
}
// confirm that we've got the command
sendByte(DFU_ACK_BYTE);
wasCommand = true;
// set normal (longer) timeout, we're not in a hurry anymore
sr5Timeout = DFU_SR5_TIMEOUT_NORMAL;
// now execute it (see ST appnote "AN3155")
switch (command) {
case DFU_UART_CHECK:
break;
case DFU_GET_LIST_CMD:
dfuHandleGetList();
break;
case DFU_DEVICE_ID_CMD:
dfuHandleDeviceId();
break;
case DFU_GO_CMD:
dfuHandleGo();
break;
case DFU_READ_CMD:
dfuHandleRead();
break;
case DFU_WRITE_CMD:
dfuHandleWrite();
break;
case DFU_ERASE_CMD:
dfuHandleErase();
break;
default:
break;
} /* End switch */
}
return wasCommand;
}
SerialTsChannelBase *getTsChannel() {
return &blTsChannel;
}

51
firmware/bootloader/src/dfu.h
View File

@ -1,51 +0,0 @@
#pragma once
#include "tunerstudio_io.h"
// This is where the bootloader starts
#define BOOTLOADER_ADDR 0x08000000
// Bootloader code max. size, in bytes
#define BOOTLOADER_SIZE 0x8000
// Number of sectors for the bootloader
#define BOOTLOADER_NUM_SECTORS (BOOTLOADER_SIZE/0x4000)
// This is where the application starts
#define APPLICATION_ADDR 0x08008000
#define DFU_BUFFER_SIZE 258 // Max. 256 bytes at a time plus 2 bytes (numBytes+checksum)
// DFU/USART Protocol is described in AN3155 document "Application note. USART protocol used in the STM32 bootloader"
// http://www.st.com/resource/en/application_note/cd00264342.pdf
#define DFU_UART_CHECK 0x7F // "UART handshake" escape byte
#define DFU_GET_LIST_CMD 0x00 // "Get supported commands list" command
#define DFU_DEVICE_ID_CMD 0x02 // "Get device ID" command
#define DFU_READ_CMD 0x11 // "Read memory" command
#define DFU_GO_CMD 0x21 // "Go" command
#define DFU_WRITE_CMD 0x31 // "Write memory" command
#define DFU_ERASE_CMD 0x44 // "Erase memory" command
#define DFU_VERSION_NUMBER 0x31 // The DFU protocol version number
#define DFU_ACK_BYTE 0x79 // Acknowledge byte ID
#define DFU_NACK_BYTE 0x1F // Not-Acknowledge byte ID
#define DFU_SR5_TIMEOUT_FIRST TIME_MS2I(200)
#define DFU_SR5_TIMEOUT_NORMAL TIME_MS2I(1000)
#define MCU_REVISION_MASK 0xfff // MCU Revision ID is needed by DFU protocol
// The address in MCU system memory where the bootloader version number is stored (2 bytes)
#define DFU_BOOTLOADER_VERSION_ADDRESS 0x1FFF76DE
/**
* @brief This function waits for the command to apply (write, read etc...)
*/
bool dfuStartLoop(void);
/**
* @brief Jump to the application
*/
void dfuJumpToApp(uint32_t addr);
SerialTsChannelBase* getTsChannel();

72
firmware/bootloader/src/main.cpp
View File

@ -1,64 +1,38 @@
#include "pch.h"
#include "usbconsole.h"
#include "hardware.h"
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
#include <ch.h>
#include <hal.h>
#include <stm32f4xx.h>
#ifdef __cplusplus
}
#endif /* __cplusplus */
#include "dfu.h"
static bool wasCommand = false;
static THD_WORKING_AREA(waBootloaderSerial, 128);
static THD_FUNCTION(thBootloaderSerial, arg) {
(void)arg;
chRegSetThreadName("BootloaderSerial");
// start our DFU emulator
wasCommand = dfuStartLoop();
chThdExit(MSG_OK);
extern "C" {
#include "boot.h"
#include "shared_params.h"
}
int main(void) {
// run ChibiOS
halInit();
chSysInit();
// set base pin configuration based on the board
setDefaultBasePins();
/* at the moment SD card is not needed by bootloader
// set SD card configuration also
setDefaultSdCardParameters();
*/
// start UART
getTsChannel()->start(38400); // TODO: should bootloader serial speed be configurable?
baseMCUInit();
// start a serial port reader thread
thread_t *thrSerial = chThdCreateStatic(waBootloaderSerial, sizeof(waBootloaderSerial), NORMALPRIO, thBootloaderSerial, NULL);
// wait for the thread to finish
chThdWait(thrSerial);
#if 0
if (wasCommand) // abnormal termination of the bootloader thread
chSysHalt("Bootloader DFU FAIL");
#endif
// Init openblt shared params
SharedParamsInit();
// Run application
dfuJumpToApp(APPLICATION_ADDR);
// Init openblt itself
BootInit();
return 0;
while (true) {
BootTask();
}
}
// very basic version, supports on chip pins only (really only used for USB)
void efiSetPadMode(const char* msg, brain_pin_e brainPin, iomode_t mode) {
ioportid_t port = getHwPort(msg, brainPin);
ioportmask_t pin = getHwPin(msg, brainPin);
/* paranoid */
if (port == GPIO_NULL) {
return;
}
palSetPadMode(port, pin, mode);
}

17
firmware/bootloader/src/rusefi_stubs.cpp
View File

@ -12,20 +12,7 @@
void chDbgPanic3(const char* /*msg*/, const char* /*file*/, int /*line*/) {
}
namespace priv
{
void efiPrintfInternal(const char* /*fmt*/, ...) {
}
}
void firmwareError(ObdCode /*code*/, const char* /*fmt*/, ...) {
}
Logging::Logging(char const* /*name*/, char* /*buffer*/, int /*bufferSize*/) {
}
LoggingWithStorage::LoggingWithStorage(const char *name) : Logging(name, DEFAULT_BUFFER, sizeof(DEFAULT_BUFFER)) {
}
void logHardFault(uint32_t type, uintptr_t faultAddress, struct port_extctx* ctx, uint32_t csfr) { }
// this is supposed to be taken from chconf_common.h but it does not work? I am not sure why :(
// TODO: make this be defined by chconf_common.h?
@ -36,4 +23,4 @@ void contextSwitchHook() {}
void threadInitHook(void*) {}
void onLockHook() {}
void onUnlockHook() {}
//#endif /* ENABLE_PERF_TRACE */
//#endif /* ENABLE_PERF_TRACE */

23
firmware/config/boards/common_make.sh
View File

@ -15,8 +15,10 @@ mkdir -p .dep
make -j6 -r PROJECT_BOARD=$PROJECT_BOARD PROJECT_CPU=$PROJECT_CPU
[ -e build/fome.hex ] || { echo "FAILED to compile by $SCRIPT_NAME with $PROJECT_BOARD $DEBUG_LEVEL_OPT and $EXTRA_PARAMS"; exit 1; }
if [ "$USE_OPENBLT" = "yes" ]; then
make openblt PROJECT_BOARD=$PROJECT_BOARD PROJECT_CPU=$PROJECT_CPU
[ -e build-openblt/openblt_$PROJECT_BOARD.hex ] || { echo "FAILED to compile OpenBLT by $SCRIPT_NAME with $PROJECT_BOARD"; exit 1; }
# TODO: why is this rm necessary?
rm -f pch/pch.h.gch/*
cd bootloader; make -f src/Makefile PROJECT_BOARD=$PROJECT_BOARD PROJECT_CPU=$PROJECT_CPU -j12; cd ..
[ -e bootloader/blbuild/fome_bl.hex ] || { echo "FAILED to compile OpenBLT by $SCRIPT_NAME with $PROJECT_BOARD"; exit 1; }
fi
if uname | grep "NT"; then
@ -34,32 +36,29 @@ $HEX2DFU -i build/fome.hex -C 0x1C -o build/fome.dfu
if [ "$USE_OPENBLT" = "yes" ]; then
# this image is suitable for update through bootloader only
# do not deliver update images in any format that can confuse users
#cp build/fome.bin deliver/fome_update.bin
#cp build/fome.dfu deliver/fome_update.dfu
#cp build/fome.hex deliver/fome_update.hex
# srec is the only format used by OpenBLT host tools
cp build/fome.srec deliver/fome_update.srec
else
# standalone images (for use with no bootloader)
cp build/fome.bin deliver/
cp build/fome.dfu deliver/
# cp build/fome.hex deliver/
fi
# bootloader and composite image
if [ "$USE_OPENBLT" = "yes" ]; then
rm -f deliver/openblt.dfu
rm -f deliver/fome_bl.dfu
echo "$SCRIPT_NAME: invoking hex2dfu for OpenBLT"
$HEX2DFU -i build-openblt/openblt_$PROJECT_BOARD.hex -o build-openblt/openblt_$PROJECT_BOARD.dfu
$HEX2DFU -i bootloader/blbuild/fome_bl.hex -o bootloader/blbuild/fome_bl.dfu
# do we need all these formats?
cp build-openblt/openblt_$PROJECT_BOARD.bin deliver/openblt.bin
cp build-openblt/openblt_$PROJECT_BOARD.dfu deliver/openblt.dfu
#cp build-openblt/openblt_$PROJECT_BOARD.hex deliver/openblt.hex
cp bootloader/blbuild/fome_bl.bin deliver/fome_bl.bin
cp bootloader/blbuild/fome_bl.dfu deliver/fome_bl.dfu
#cp bootloader/blbuild/fome_bl.hex deliver/fome_bl.hex
rm -f deliver/fome_openblt.dfu
echo "$SCRIPT_NAME: invoking hex2dfu for composite rusEFI+OpenBLT image"
$HEX2DFU -i build-openblt/openblt_$PROJECT_BOARD.hex -i build/fome.hex -C 0x1C -o deliver/fome.dfu -b deliver/fome.bin
$HEX2DFU -i bootloader/blbuild/fome_bl.hex -i build/fome.hex -C 0x1C -o deliver/fome.dfu -b deliver/fome.bin
#todo: how to create 'signed' hex and srec? Do we need?
fi

4
firmware/config/boards/f407-discovery/board.mk
View File

@ -29,7 +29,3 @@ DDEFS += -DTS_SECONDARY_UxART_PORT=SD3
DDEFS += -DSTM32_I2C_USE_I2C3=TRUE
DDEFS += -DEFI_SOFTWARE_KNOCK=TRUE -DSTM32_ADC_USE_ADC3=TRUE
ifndef IS_RE_BOOTLOADER
DDEFS += -DHAL_USE_EEPROM=TRUE
endif

40
firmware/config/boards/hellen/hellen121nissan/openblt/oblt_board.mk
View File

@ -1,40 +0,0 @@
#|--------------------------------------------------------------------------------------|
#| Collect project files |
#|--------------------------------------------------------------------------------------|
# Collect all application files in the current directory and its subdirectories, but
# exclude flash-layout.c as this one is directly included in a source file, when used.
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
#|--------------------------------------------------------------------------------------|
#| Options for toolchain binaries |
#|--------------------------------------------------------------------------------------|
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
BRDFLAGS = -DSTM32F429xx
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
#TODO: check what CPU is on proteus f7
BRDFLAGS = -DSTM32F767xx
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
#TODO: check what CPU is on proteus h7
BRDFLAGS = -DSTM32H743xx
endif
#|--------------------------------------------------------------------------------------|
#| Specify library files |
#|--------------------------------------------------------------------------------------|
LIBS =
# We use HSI (internal) on proteus. We define HSE (external) only to have compiler happy.
BRDFLAGS += -DHSE_VALUE=8000000
# hellen144
BRDFLAGS += -DSTATUS_LED_PORT=GPIOG -DSTATUS_LED_PIN=GPIO_PIN_0
# Frequency of the external crystal oscillator
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=8000
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000
# Select the desired UART peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2
# \brief Select the desired CAN peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/main_internal_osc.c

296
firmware/config/boards/microrusefi/openblt/main_external_osc.c
View File

@ -1,296 +0,0 @@
/************************************************************************************//**
* \brief Bootloader application source file.
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#ifdef STM32F429xx
#include "stm32f4xx.h" /* STM32 CPU and HAL header */
#endif
#ifdef STM32F767xx
#include "stm32f7xx.h" /* STM32 CPU and HAL header */
#endif
#ifdef STM32H743xx
#include "stm32h7xx.h" /* STM32 CPU and HAL header */
#endif
/****************************************************************************************
* Function prototypes
****************************************************************************************/
static void Init(void);
static void SystemClock_Config(void);
/************************************************************************************//**
** \brief This is the entry point for the bootloader application and is called
** by the reset interrupt vector after the C-startup routines executed.
** \return Program return code.
**
****************************************************************************************/
int main(void)
{
/* initialize the microcontroller */
Init();
/* initialize the bootloader */
BootInit();
/* start the infinite program loop */
while (1)
{
/* run the bootloader task */
BootTask();
}
/* program should never get here */
return 0;
} /*** end of main ***/
/************************************************************************************//**
** \brief Interrupt service routine of the timer.
** \return none.
**
****************************************************************************************/
void SysTick_Handler(void)
{
/* Increment the tick counter. */
HAL_IncTick();
/* Invoke the system tick handler. */
HAL_SYSTICK_IRQHandler();
} /*** end of TimerISRHandler ***/
/************************************************************************************//**
** \brief Initializes the microcontroller.
** \return none.
**
****************************************************************************************/
static void Init(void)
{
/* HAL library initialization */
HAL_Init();
/* configure system clock */
SystemClock_Config();
} /*** end of Init ***/
/************************************************************************************//**
** \brief System Clock Configuration. This code was created by CubeMX and configures
** the system clock to match the configuration in the bootloader's
** configuration (blt_conf.h), specifically the macros:
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
** subsystem.
** \return none.
**
****************************************************************************************/
static void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/* Configure the main internal regulator output voltage. */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/* Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
* damage.
*/
ASSERT_RT(BLT_FALSE);
}
/* Initializes the CPU, AHB and APB buses clocks. */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
{
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
* damage.
*/
ASSERT_RT(BLT_FALSE);
}
} /*** end of SystemClock_Config ***/
/************************************************************************************//**
** \brief Initializes the Global MSP. This function is called from HAL_Init()
** function to perform system level initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Power and SYSCFG clock enable. */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* GPIO ports clock enable. */
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
/* Configure PE3 pin for the LED. */
GPIO_InitStruct.Pin = STATUS_LED_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(STATUS_LED_PORT, &GPIO_InitStruct);
HAL_GPIO_WritePin(STATUS_LED_PORT, STATUS_LED_PIN, GPIO_PIN_SET);
#if 0
/* Configure GPIO pin for (optional) backdoor entry input. */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* UART TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* UART clock enable. */
__HAL_RCC_USART3_CLK_ENABLE();
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* CAN TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* CAN clock enable. */
/* CAN1 clock needs to be enabled for CAN2 operation */
__HAL_RCC_CAN1_CLK_ENABLE();
__HAL_RCC_CAN2_CLK_ENABLE();
#endif
#if (BOOT_COM_USB_ENABLE > 0)
/* USB pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USB clock enable. */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
#endif
} /*** end of HAL_MspInit ***/
/************************************************************************************//**
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
** function to perform system level de-initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspDeInit(void)
{
/* Reset the RCC clock configuration to the default reset state. */
HAL_RCC_DeInit();
/* Reset GPIO pin for the LED to turn it off. */
HAL_GPIO_WritePin(STATUS_LED_PORT, STATUS_LED_PIN, GPIO_PIN_RESET);
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(STATUS_LED_PORT, STATUS_LED_PIN);
#if 0
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
#endif
#if (BOOT_COM_USB_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12);
/* USB clock disable. */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12);
/* CAN clock disable. */
__HAL_RCC_CAN2_CLK_DISABLE();
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10);
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11);
/* UART clock disable. */
__HAL_RCC_USART3_CLK_DISABLE();
#endif
/* GPIO ports clock disable. */
__HAL_RCC_GPIOH_CLK_DISABLE();
__HAL_RCC_GPIOE_CLK_DISABLE();
__HAL_RCC_GPIOD_CLK_DISABLE();
__HAL_RCC_GPIOC_CLK_DISABLE();
__HAL_RCC_GPIOB_CLK_DISABLE();
__HAL_RCC_GPIOA_CLK_DISABLE();
/* SYSCFG and PWR clock disable. */
__HAL_RCC_PWR_CLK_DISABLE();
__HAL_RCC_SYSCFG_CLK_DISABLE();
} /*** end of HAL_MspDeInit ***/
/*********************************** end of main.c *************************************/

28
firmware/config/boards/microrusefi/openblt/oblt_board.mk
View File

@ -1,28 +0,0 @@
#|--------------------------------------------------------------------------------------|
#| Collect project files |
#|--------------------------------------------------------------------------------------|
# Collect all application files in the current directory and its subdirectories, but
# exclude flash-layout.c as this one is directly included in a source file, when used.
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
#|--------------------------------------------------------------------------------------|
#| Options for toolchain binaries |
#|--------------------------------------------------------------------------------------|
BRDFLAGS = -DSTM32F429xx
#|--------------------------------------------------------------------------------------|
#| Specify library files |
#|--------------------------------------------------------------------------------------|
LIBS =
BRDFLAGS += -DHSE_VALUE=8000000
BRDFLAGS += -DSTATUS_LED_PORT=GPIOE -DSTATUS_LED_PIN=GPIO_PIN_3
# Frequency of the external crystal oscillator
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=8000
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000
# Select the desired UART peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2
# \brief Select the desired CAN peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=1

5
firmware/config/boards/prometheus/prometheus-common-config.mk
View File

@ -1,5 +0,0 @@
# This board uses bootloader
USE_BOOTLOADER = yes
# include Prometheus bootloader code
BOOTLOADERINC = $(PROJECT_DIR)/bootloader/prometheus/$(PROMETHEUS_BOARD)

37
firmware/config/boards/proteus/openblt/oblt_board.mk
View File

@ -1,37 +0,0 @@
#|--------------------------------------------------------------------------------------|
#| Collect project files |
#|--------------------------------------------------------------------------------------|
# Collect all application files in the current directory and its subdirectories, but
# exclude flash-layout.c as this one is directly included in a source file, when used.
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
#|--------------------------------------------------------------------------------------|
#| Options for toolchain binaries |
#|--------------------------------------------------------------------------------------|
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
BRDFLAGS = -DSTM32F429xx
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
BRDFLAGS = -DSTM32F767xx
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
BRDFLAGS = -DSTM32H743xx
endif
# We use HSI (internal) on proteus. We define HSE (external) only to have compiler happy.
BRDFLAGS += -DHSE_VALUE=8000000
#|--------------------------------------------------------------------------------------|
#| Specify library files |
#|--------------------------------------------------------------------------------------|
LIBS =
BRDFLAGS += -DSTATUS_LED_PORT=GPIOE -DSTATUS_LED_PIN=GPIO_PIN_3
# Frequency of the external crystal oscillator
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=8000
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000
# Select the desired UART peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2
# \brief Select the desired CAN peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/main_internal_osc.c

9
firmware/config/boards/subaru_eg33/board.mk
View File

@ -4,12 +4,6 @@ BOARDCPPSRC = $(BOARD_DIR)/board_configuration.cpp
# Required include directories
BOARDINC += $(BOARD_DIR)/config/controllers/algo
# Override LD script
ifeq ($(USE_BOOTLOADER),yes)
# include Prometheus bootloader code
BOOTLOADERINC = $(PROJECT_DIR)/bootloader/subaru_eg33
endif
#LED
DDEFS += -DLED_CRITICAL_ERROR_BRAIN_PIN=Gpio::G7
@ -32,9 +26,6 @@ DDEFS += -DUART_USE_WAIT=FALSE
#Mass Storage
DDEFS += -DEFI_EMBED_INI_MSD=TRUE
#Linker options, flash size
USE_OPT += -Wl,--defsym=FLASH_SIZE=1m
# Shared variables
ALLINC += $(BOARDINC)

270
firmware/config/boards/subaru_eg33/openblt/main_external_osc.c
View File

@ -1,270 +0,0 @@
/************************************************************************************//**
* \brief Bootloader application source file.
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#ifdef STM32F429xx
#include "stm32f4xx.h" /* STM32 CPU and HAL header */
#endif
#ifdef STM32F767xx
#include "stm32f7xx.h" /* STM32 CPU and HAL header */
#endif
#ifdef STM32H743xx
#include "stm32h7xx.h" /* STM32 CPU and HAL header */
#endif
/****************************************************************************************
* Function prototypes
****************************************************************************************/
static void Init(void);
static void SystemClock_Config(void);
/************************************************************************************//**
** \brief This is the entry point for the bootloader application and is called
** by the reset interrupt vector after the C-startup routines executed.
** \return Program return code.
**
****************************************************************************************/
int main(void)
{
/* initialize the microcontroller */
Init();
/* initialize the bootloader */
BootInit();
/* start the infinite program loop */
while (1)
{
/* run the bootloader task */
BootTask();
}
/* program should never get here */
return 0;
} /*** end of main ***/
/************************************************************************************//**
** \brief Initializes the microcontroller.
** \return none.
**
****************************************************************************************/
static void Init(void)
{
/* HAL library initialization */
HAL_Init();
/* configure system clock */
SystemClock_Config();
} /*** end of Init ***/
/************************************************************************************//**
** \brief System Clock Configuration. This code was created by CubeMX and configures
** the system clock to match the configuration in the bootloader's
** configuration (blt_conf.h), specifically the macros:
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
** subsystem.
** \return none.
**
****************************************************************************************/
static void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/* Configure the main internal regulator output voltage. */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/* Initializes the CPU, AHB and APB busses clocks. */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN = 432;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
* damage.
*/
ASSERT_RT(BLT_FALSE);
}
/* Activate the Over-Drive mode. */
if (HAL_PWREx_EnableOverDrive() != HAL_OK)
{
/* Clock overdrive hardware failure. Hang the system to prevent damage.
*/
ASSERT_RT(BLT_FALSE);
}
/* Initializes the CPU, AHB and APB busses clocks. */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
{
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
* damage.
*/
ASSERT_RT(BLT_FALSE);
}
} /*** end of SystemClock_Config ***/
/************************************************************************************//**
** \brief Initializes the Global MSP. This function is called from HAL_Init()
** function to perform system level initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Power and SYSCFG clock enable. */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* GPIO ports clock enable. */
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
#if (BOOT_COM_RS232_ENABLE > 0)
/* UART clock enable. */
__HAL_RCC_USART1_CLK_ENABLE();
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* CAN clock enable. */
__HAL_RCC_CAN1_CLK_ENABLE();
#endif
/* Configure GPIO pin for the Red LED. */
GPIO_InitStruct.Pin = STATUS_LED_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(STATUS_LED_PORT, &GPIO_InitStruct);
HAL_GPIO_WritePin(STATUS_LED_PORT, STATUS_LED_PIN, GPIO_PIN_RESET);
#if 0
/* Configure GPIO pin for (optional) backdoor entry input. */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* UART TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* CAN enable pin */
GPIO_InitStruct.Pin = GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_SET);
/* CAN TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
#endif
} /*** end of HAL_MspInit ***/
/************************************************************************************//**
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
** function to perform system level de-initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspDeInit(void)
{
/* Reset the RCC clock configuration to the default reset state. */
HAL_RCC_DeInit();
/* Reset GPIO pin for the LED to turn it off. */
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_SET);
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
#if (BOOT_COM_CAN_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_1);
/* CAN clock disable. */
__HAL_RCC_CAN1_CLK_DISABLE();
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
/* UART clock disable. */
__HAL_RCC_USART1_CLK_DISABLE();
#endif
/* GPIO ports clock disable. */
__HAL_RCC_GPIOG_CLK_DISABLE();
__HAL_RCC_GPIOD_CLK_DISABLE();
__HAL_RCC_GPIOC_CLK_DISABLE();
__HAL_RCC_GPIOB_CLK_DISABLE();
__HAL_RCC_GPIOA_CLK_DISABLE();
/* SYSCFG and PWR clock disable. */
__HAL_RCC_PWR_CLK_DISABLE();
__HAL_RCC_SYSCFG_CLK_DISABLE();
} /*** end of HAL_MspDeInit ***/
/*********************************** end of main.c *************************************/

25
firmware/config/boards/subaru_eg33/openblt/oblt_board.mk
View File

@ -1,25 +0,0 @@
#|--------------------------------------------------------------------------------------|
#| Collect project files |
#|--------------------------------------------------------------------------------------|
# Collect all application files in the current directory and its subdirectories, but
# exclude flash-layout.c as this one is directly included in a source file, when used.
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
#|--------------------------------------------------------------------------------------|
#| Specific options for toolchain binaries |
#|--------------------------------------------------------------------------------------|
BRDFLAGS = -DSTM32F767xx -DHSE_VALUE=25000000
#|--------------------------------------------------------------------------------------|
#| Specify library files |
#|--------------------------------------------------------------------------------------|
LIBS =
BRDFLAGS += -DSTATUS_LED_PORT=GPIOG -DSTATUS_LED_PIN=GPIO_PIN_8
# Frequency of the external crystal oscillator
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=25000
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=216000
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=0
# \brief Select the desired CAN peripheral as a zero based index.
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0

63
firmware/config/engines/custom_engine.cpp
View File

@ -267,69 +267,6 @@ void setEtbTestConfiguration() {
// see also setDefaultEtbBiasCurve
}
#if HW_FRANKENSO && EFI_PROD_CODE
// todo: page_size + 2
// todo: CC_SECTION(".nocache")
static uint8_t write_buf[EE_PAGE_SIZE + 10];
#define EEPROM_WRITE_TIME_MS 10 /* time to write one page in ms. Consult datasheet! */
/**
* https://www.onsemi.com/pdf/datasheet/cat24c32-d.pdf
* CAT24C32
*/
static const I2CEepromFileConfig i2cee = {
.barrier_low = 0,
.barrier_hi = EE_SIZE - 1,
.size = EE_SIZE,
.pagesize = EE_PAGE_SIZE,
.write_time = TIME_MS2I(EEPROM_WRITE_TIME_MS),
.i2cp = &EE_U2CD,
.addr = 0x50,
.write_buf = write_buf
};
extern EepromDevice eepdev_24xx;
static I2CEepromFileStream ifile;
/**
* set engine_type 61
*/
void setEepromTestConfiguration() {
engineConfiguration->useEeprom = true;
engineConfiguration->ignitionPins[2] = Gpio::Unassigned;
// dirty hack
brain_pin_markUnused(Gpio::C9);
efiSetPadMode("I2C", Gpio::A8, PAL_MODE_ALTERNATE(4));
efiSetPadMode("I2C", Gpio::C9, PAL_MODE_ALTERNATE(4));
addConsoleActionI("ee_read",
[](int value) {
if (ifile.vmt != eepdev_24xx.efsvmt) {
EepromFileOpen((EepromFileStream *)&ifile, (EepromFileConfig *)&i2cee, &eepdev_24xx);
}
ifile.vmt->setposition(&ifile, 0);
// chFileStreamSeek(&ifile, 0);
int v2;
streamRead(&ifile, (uint8_t *)&v2, 4);
efiPrintf("EE has %d", v2);
v2 += 3;
ifile.vmt->setposition(&ifile, 0);
streamWrite(&ifile, (uint8_t *)&v2, 4);
});
}
#endif //HW_FRANKENSO
// F407 discovery
void setL9779TestConfiguration() {
// enable_spi 3

2
firmware/config/engines/custom_engine.h
View File

@ -16,8 +16,6 @@ void setEtbTestConfiguration();
void setTle8888TestConfiguration();
void setL9779TestConfiguration();
void setEepromTestConfiguration();
void mreBoardNewTest();
void mreBCM();

5
firmware/controllers/algo/engine_configuration.cpp
View File

@ -848,11 +848,6 @@ void resetConfigurationExt(configuration_callback_t boardCallback, engine_type_e
case engine_type_e::L9779_BENCH_ENGINE:
setL9779TestConfiguration();
break;
case engine_type_e::EEPROM_BENCH_ENGINE:
#if EFI_PROD_CODE
setEepromTestConfiguration();
#endif
break;
case engine_type_e::TLE8888_BENCH_ENGINE:
setTle8888TestConfiguration();
break;

3
firmware/controllers/algo/engine_types.h
View File

@ -139,8 +139,6 @@ enum class engine_type_e : uint32_t {
L9779_BENCH_ENGINE = 60,
EEPROM_BENCH_ENGINE = 61,
MRE_VW_B6 = 62,
PROTEUS_BMW_M73 = 63,
@ -209,6 +207,7 @@ enum class engine_type_e : uint32_t {
ET_UNUSED_33 = 33,
ET_UNUSED_43 = 43,
ET_UNUSED_57 = 57,
ET_UNUSED_61 = 61,
/**
* this configuration has as few pins configured as possible

9
firmware/controllers/engine_controller.cpp
View File

@ -70,10 +70,6 @@
#include "AdcConfiguration.h"
#endif /* HAL_USE_ADC */
#if defined(EFI_BOOTLOADER_INCLUDE_CODE)
#include "bootloader/bootloader.h"
#endif /* EFI_BOOTLOADER_INCLUDE_CODE */
#include "periodic_task.h"
@ -666,11 +662,6 @@ int getRusEfiVersion(void) {
return 123; // this is here to make the compiler happy about the unused array
if (UNUSED_CCM_SIZE[0] * 0 != 0)
return 3211; // this is here to make the compiler happy about the unused array
#if defined(EFI_BOOTLOADER_INCLUDE_CODE)
// make bootloader code happy too
if (initBootloader() != 0)
return 123;
#endif /* EFI_BOOTLOADER_INCLUDE_CODE */
return VCS_DATE;
}
#endif /* EFI_UNIT_TEST */

0
firmware/main_hardfault.c → firmware/hw_layer/main_hardfault.c
View File

0
firmware/main_hardfault_asm.S → firmware/hw_layer/main_hardfault_asm.S
View File

29
firmware/hw_layer/openblt/blt_conf.h
View File

@ -44,6 +44,10 @@
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
/** \brief Frequency of the external crystal oscillator. */
#define BOOT_CPU_XTAL_SPEED_KHZ (1000)
/** \brief Desired system speed. */
#define BOOT_CPU_SYSTEM_SPEED_KHZ (1000)
/** \brief Motorola or Intel style byte ordering. */
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
/** \brief Enable/disable hook function call right before user program start. */
@ -67,7 +71,7 @@
*
*/
/** \brief Enable/disable CAN transport layer. */
#define BOOT_COM_CAN_ENABLE (1)
#define BOOT_COM_CAN_ENABLE (0)
/** \brief Configure the desired CAN baudrate. */
#define BOOT_COM_CAN_BAUDRATE (500000)
/** \brief Configure CAN message ID target->host. */
@ -92,9 +96,12 @@
/** \brief Configure the desired communication speed. */
#define BOOT_COM_RS232_BAUDRATE (115200)
/** \brief Configure number of bytes in the target->host data packet. */
#define BOOT_COM_RS232_TX_MAX_DATA (64)
#define BOOT_COM_RS232_TX_MAX_DATA (200)
/** \brief Configure number of bytes in the host->target data packet. */
#define BOOT_COM_RS232_RX_MAX_DATA (64)
#define BOOT_COM_RS232_RX_MAX_DATA (200)
/** only USB supported, this is ignored but required */
#define BOOT_COM_RS232_CHANNEL_INDEX 0
/****************************************************************************************
@ -130,22 +137,6 @@
/** \brief Enable/disable hooks functions to override the user program checksum handling. */
#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0)
/****************************************************************************************
* F L A S H M E M O R Y D R I V E R C O N F I G U R A T I O N
****************************************************************************************/
/** \brief Enable support for a custom flash layout table. It is located in
* flash_layout.c. This was done because the default flashLayout[] table
* in the bootloader's core defines flash map for single bank mode.
* RusEFI uses dual bank mode.
*/
#define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (1)
/** \brief Use one of 'reserved' IRQ vectors at the beginig on vector table.
*/
#define BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x1C)
/****************************************************************************************
* W A T C H D O G D R I V E R C O N F I G U R A T I O N
****************************************************************************************/

29
firmware/hw_layer/openblt/flash_layout.c
View File

@ -1,29 +0,0 @@
/* Define STM32F4, STM32F7 or STM32F765 flash layout in dual bank mode. Only first bank is defined */
/* This file is included in another .c file. So it is ok to have static and no users here */
static const tFlashSector flashLayout[] =
{
/* space is reserved for a bootloader configuration with all supported communication
* interfaces enabled. when for example only UART is needed, then the space required
* for the bootloader can be made a lot smaller here.
*/
/* { 0x08000000, 0x04000, 0 }, flash sector 0 - reserved for bootloader */
/* { 0x08004000, 0x04000, 1 }, flash sector 1 - reserved for bootloader */
{ 0x08008000, 0x08000, 2}, /* flash sector 2 - 16kb */
{ 0x0800c000, 0x08000, 3}, /* flash sector 3 - 16kb */
{ 0x08010000, 0x10000, 4}, /* flash sector 4 - 64kb */
{ 0x08020000, 0x20000, 5}, /* flash sector 5 - 128kb */
{ 0x08040000, 0x20000, 6}, /* flash sector 6 - 128kb */
{ 0x08060000, 0x20000, 7}, /* flash sector 7 - 128kb */
#if (BOOT_NVM_SIZE_KB > 1024)
{ 0x08080000, 0x20000, 8}, /* flash sector 8 - 128kb */
{ 0x080a0000, 0x20000, 9}, /* flash sector 9 - 128kb */
{ 0x080c0000, 0x20000, 10}, /* flash sector 10 - 128kb */
{ 0x080e0000, 0x20000, 11}, /* flash sector 11 - 128kb */
#endif
/* Bank #2 is not defined */
#if (BOOT_NVM_SIZE_KB > 2048)
#error "BOOT_NVM_SIZE_KB > 2048 is currently not supported."
#endif
};

299
firmware/hw_layer/openblt/main_internal_osc.c
View File

@ -1,299 +0,0 @@
/************************************************************************************//**
* \file Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/main.c
* \brief Bootloader application source file.
* \ingroup Boot_ARMCM4_STM32F4_Nucleo_F429ZI_GCC
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#include "shared_params.h" /* Shared parameters header */
#ifdef STM32F429xx
#include "stm32f4xx.h" /* STM32 CPU and HAL header */
#endif
#ifdef STM32F767xx
#include "stm32f7xx.h" /* STM32 CPU and HAL header */
#endif
#ifdef STM32H743xx
#include "stm32h7xx.h" /* STM32 CPU and HAL header */
#endif
/****************************************************************************************
* Function prototypes
****************************************************************************************/
static void Init(void);
static void SystemClock_Config(void);
/************************************************************************************//**
** \brief This is the entry point for the bootloader application and is called
** by the reset interrupt vector after the C-startup routines executed.
** \return Program return code.
**
****************************************************************************************/
int main(void)
{
/* initialize the microcontroller */
Init();
/* initialize the shared parameters module */
SharedParamsInit();
/* initialize the bootloader */
BootInit();
/* start the infinite program loop */
while (1)
{
/* run the bootloader task */
BootTask();
}
/* program should never get here */
return 0;
} /*** end of main ***/
/************************************************************************************//**
** \brief Interrupt service routine of the timer.
** \return none.
**
****************************************************************************************/
void SysTick_Handler(void)
{
/* Increment the tick counter. */
HAL_IncTick();
/* Invoke the system tick handler. */
HAL_SYSTICK_IRQHandler();
} /*** end of TimerISRHandler ***/
/************************************************************************************//**
** \brief Initializes the microcontroller.
** \return none.
**
****************************************************************************************/
static void Init(void)
{
/* HAL library initialization */
HAL_Init();
/* configure system clock */
SystemClock_Config();
} /*** end of Init ***/
/************************************************************************************//**
** \brief System Clock Configuration. This code was created by CubeMX and configures
** the system clock to match the configuration in the bootloader's
** configuration (blt_conf.h), specifically the macros:
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
** subsystem.
** \return none.
**
****************************************************************************************/
static void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/* Configure the main internal regulator output voltage. */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/* Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 16;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
* damage.
*/
ASSERT_RT(BLT_FALSE);
}
/* Initializes the CPU, AHB and APB buses clocks. */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
{
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
* damage.
*/
ASSERT_RT(BLT_FALSE);
}
} /*** end of SystemClock_Config ***/
/************************************************************************************//**
** \brief Initializes the Global MSP. This function is called from HAL_Init()
** function to perform system level initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Power and SYSCFG clock enable. */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* GPIO ports clock enable. */
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
/* Configure PE3 pin for the LED. */
GPIO_InitStruct.Pin = GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_SET);
#if 0
/* Configure GPIO pin for (optional) backdoor entry input. */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* UART TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_5 | GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* UART clock enable. */
__HAL_RCC_USART2_CLK_ENABLE();
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* CAN TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* CAN clock enable. */
__HAL_RCC_CAN1_CLK_ENABLE();
#endif
#if (BOOT_COM_USB_ENABLE > 0)
/* USB pin configuration. */
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USB clock enable. */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
#endif
} /*** end of HAL_MspInit ***/
/************************************************************************************//**
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
** function to perform system level de-initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspDeInit(void)
{
/* Reset the RCC clock configuration to the default reset state. */
HAL_RCC_DeInit();
/* Reset GPIO pin for the LED to turn it off. */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_3);
#if 0
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
#endif
#if (BOOT_COM_USB_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12);
/* USB clock disable. */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_1);
/* CAN clock disable. */
__HAL_RCC_CAN1_CLK_DISABLE();
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* Deinit used GPIOs. */
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
/* UART clock disable. */
__HAL_RCC_USART2_CLK_DISABLE();
#endif
/* GPIO ports clock disable. */
__HAL_RCC_GPIOH_CLK_DISABLE();
__HAL_RCC_GPIOE_CLK_DISABLE();
__HAL_RCC_GPIOD_CLK_DISABLE();
__HAL_RCC_GPIOC_CLK_DISABLE();
__HAL_RCC_GPIOB_CLK_DISABLE();
__HAL_RCC_GPIOA_CLK_DISABLE();
/* SYSCFG and PWR clock disable. */
__HAL_RCC_PWR_CLK_DISABLE();
__HAL_RCC_SYSCFG_CLK_DISABLE();
} /*** end of HAL_MspDeInit ***/
/*********************************** end of main.c *************************************/

230
firmware/hw_layer/openblt/openblt.mk
View File

@ -1,230 +0,0 @@
#****************************************************************************************
#| Description: Makefile for GNU ARM Embedded toolchain.
#| File Name: makefile
#|
#|---------------------------------------------------------------------------------------
#| C O P Y R I G H T
#|---------------------------------------------------------------------------------------
#| Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
#|
#|---------------------------------------------------------------------------------------
#| L I C E N S E
#|---------------------------------------------------------------------------------------
#| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
#| modify it under the terms of the GNU General Public License as published by the Free
#| Software Foundation, either version 3 of the License, or (at your option) any later
#| version.
#|
#| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
#| PURPOSE. See the GNU General Public License for more details.
#|
#| You have received a copy of the GNU General Public License along with OpenBLT. It
#| should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
#|
#****************************************************************************************
SHELL = sh
#|--------------------------------------------------------------------------------------|
#| Configure project name |
#|--------------------------------------------------------------------------------------|
PROJ_NAME=openblt_$(PROJECT_BOARD)
#|--------------------------------------------------------------------------------------|
#| Configure tool path |
#|--------------------------------------------------------------------------------------|
# Configure the path to where the arm-none-eabi-gcc program is located. If the program
# is available on the path, then the TOOL_PATH variable can be left empty.
# Make sure to add a fordward slash at the end. Note that on Windows it should be in the
# 8.3 short pathname format with forward slashes. To obtain the pathname in the 8.3
# format, open the directory in the Windows command prompt and run the following command:
# cmd /c for %A in ("%cd%") do @echo %~sA
TOOL_PATH=$(TRGT)
#|--------------------------------------------------------------------------------------|
#| Configure sources paths |
#|--------------------------------------------------------------------------------------|
PROJECT_DIR=.
OPENBLT_TRGT_DIR=$(PROJECT_DIR)/ext/openblt/Target
OPENBLT_BOARD_DIR=$(BOARD_DIR)/openblt
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
OPENBLT_PORT_DIR=$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/openblt
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
OPENBLT_PORT_DIR=$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/openblt
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
OPENBLT_PORT_DIR=$(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/openblt
endif
#|--------------------------------------------------------------------------------------|
#| Collect helpers |
#|--------------------------------------------------------------------------------------|
# Recursive wildcard function implementation. Example usages:
# $(call rwildcard, , *.c *.h)
# --> Returns all *.c and *.h files in the current directory and below
# $(call rwildcard, /lib/, *.c)
# --> Returns all *.c files in the /lib directory and below
rwildcard = $(strip $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)))
#|--------------------------------------------------------------------------------------|
#| Include port and board files |
#|--------------------------------------------------------------------------------------|
PROJ_FILES=
include $(OPENBLT_PORT_DIR)/port.mk
include $(OPENBLT_BOARD_DIR)/oblt_board.mk
#|--------------------------------------------------------------------------------------|
#| Collect bootloader core files |
#|--------------------------------------------------------------------------------------|
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/*.h)
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/blt_conf.h
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/hooks.c
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/led.c
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/led.h
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/shared_params.c
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/shared_params.h
# CPU-dependent sources
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
# Collect bootloader port files
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/*.h)
# Collect bootloader port compiler specific files
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/GCC/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/GCC/*.h)
# LD file
LFLAGS = -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/openblt/STM32F4xx.ld"
# Port specific options
PORTFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
# Collect bootloader port files
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/*.h)
# Collect bootloader port compiler specific files
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/GCC/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/GCC/*.h)
# LD file
LFLAGS += -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/openblt/STM32F7xx.ld"
# Port specific options
PORTFLAGS = -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
# Collect bootloader port files
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/*.h)
# Collect bootloader port compiler specific files
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/GCC/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/GCC/*.h)
# LD file
LFLAGS = -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/openblt/STM32H7xx.ld"
# Port specific options
PORTFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16
endif
OPTFLAGS = -Os
STDFLAGS = -fno-strict-aliasing
STDFLAGS += -fdata-sections -ffunction-sections -Wall -g3
CFLAGS = $(PORTFLAGS) $(BRDFLAGS) $(STDFLAGS) $(OPTFLAGS)
CFLAGS += -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER
CFLAGS += $(INC_PATH)
AFLAGS = $(CFLAGS)
LFLAGS += $(PORTFLAGS) $(BRDFLAGS) $(STDFLAGS) $(OPTFLAGS)
#|--------------------------------------------------------------------------------------|
#| Common options for toolchain binaries |
#|--------------------------------------------------------------------------------------|
LFLAGS += -Wl,-Map=$(BIN_PATH)/$(PROJ_NAME).map
LFLAGS += -specs=nano.specs -Wl,--gc-sections $(LIB_PATH)
OFLAGS = -O srec
ODFLAGS = -x
SZFLAGS = -B -d
RMFLAGS = -f
#|--------------------------------------------------------------------------------------|
#| Toolchain binaries |
#|--------------------------------------------------------------------------------------|
RM = rm
CC = $(TOOL_PATH)arm-none-eabi-gcc
LN = $(TOOL_PATH)arm-none-eabi-gcc
OC = $(TOOL_PATH)arm-none-eabi-objcopy
OD = $(TOOL_PATH)arm-none-eabi-objdump
AS = $(TOOL_PATH)arm-none-eabi-gcc
SZ = $(TOOL_PATH)arm-none-eabi-size
#|--------------------------------------------------------------------------------------|
#| Filter project files
#|--------------------------------------------------------------------------------------|
PROJ_ASRCS = $(filter %.s,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
#|--------------------------------------------------------------------------------------|
#| Set important path variables |
#|--------------------------------------------------------------------------------------|
VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :)
OBJ_PATH = $(PROJECT_DIR)/build-openblt/obj-$(PROJECT_BOARD)/
BIN_PATH = $(PROJECT_DIR)/build-openblt
INC_PATH = $(patsubst %/,%,$(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file))))))
LIB_PATH =
#|--------------------------------------------------------------------------------------|
#| Define targets |
#|--------------------------------------------------------------------------------------|
AOBJS := $(patsubst %.s,%.o,$(PROJ_ASRCS))
AOBJS := $(addprefix $(OBJ_PATH),$(AOBJS))
COBJS := $(patsubst %.c,%.o,$(PROJ_CSRCS))
COBJS := $(addprefix $(OBJ_PATH),$(COBJS))
#|--------------------------------------------------------------------------------------|
#| Make ALL |
#|--------------------------------------------------------------------------------------|
.PHONY: all
all: $(BIN_PATH)/$(PROJ_NAME).srec $(BIN_PATH)/$(PROJ_NAME).hex $(BIN_PATH)/$(PROJ_NAME).bin
$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf
@mkdir -p $(@D)
@$(OC) $< $(OFLAGS) $@
@$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map
@echo +++ Summary of memory consumption:
@$(SZ) $(SZFLAGS) $<
@echo +++ Build complete [$(notdir $@)]
$(BIN_PATH)/$(PROJ_NAME).hex : $(BIN_PATH)/$(PROJ_NAME).elf
@mkdir -p $(@D)
@$(OC) -O ihex $< $@
$(BIN_PATH)/$(PROJ_NAME).bin : $(BIN_PATH)/$(PROJ_NAME).elf
@mkdir -p $(@D)
@$(OC) -O binary $< $@
$(BIN_PATH)/$(PROJ_NAME).elf : $(OBJ_PATH) $(AOBJS) $(COBJS)
@mkdir -p $(@D)
@echo +++ Linking [$(notdir $@)]
@echo $(patsubst %.o,$(OBJ_PATH)%.o,$(^F))
@$(LN) $(LFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)%.o,$(^F)) $(LIBS)
#|--------------------------------------------------------------------------------------|
#| Compile and assemble |
#|--------------------------------------------------------------------------------------|
$(OBJ_PATH)%.o: %.s
@echo +++ Assembling [$<] to [$@]
@$(AS) $(AFLAGS) -c $< -o $@
$(OBJ_PATH)%.o: %.c
@echo +++ Compiling [$<] to [$@]
@$(CC) $(CFLAGS) -c $< -o $@
$(OBJ_PATH):
@echo AOBJS = $(AOBJS)
@echo COBJS = $(COBJS)
@mkdir -p $(OBJ_PATH)
#|--------------------------------------------------------------------------------------|
#| Make CLEAN |
#|--------------------------------------------------------------------------------------|
.PHONY: clean
clean:
@echo +++ Cleaning build environment
@$(RM) $(RMFLAGS) -r $(OBJ_PATH)
@$(RM) $(RMFLAGS) -r $(BIN_PATH)
@echo +++ Clean complete

2
firmware/hw_layer/ports/rusefi_halconf.h
View File

@ -30,7 +30,9 @@
#endif
// If USB and File logging, enable USB Mass Storage & community
#ifndef HAL_USE_USB_MSD
#define HAL_USE_USB_MSD (EFI_FILE_LOGGING && EFI_USB_SERIAL)
#endif // HAL_USE_USB_MSD
#define HAL_USE_COMMUNITY (EFI_FILE_LOGGING && EFI_USB_SERIAL) || HAL_USE_EEPROM
#define USB_MSD_LUN_COUNT 2

5
firmware/hw_layer/ports/stm32/stm32_adc_v4.cpp
View File

@ -7,6 +7,9 @@
*/
#include "pch.h"
#if HAL_USE_ADC
#include "mpu_util.h"
#include "map_averaging.h"
@ -185,3 +188,5 @@ adcsample_t getFastAdc(FastAdcToken token) {
return fastSampleBuffer[token];
}
#endif // HAL_USE_ADC

12
firmware/hw_layer/ports/stm32/stm32f4/STM32F4.ld
View File

@ -29,13 +29,19 @@ RAM3_SIZE = DEFINED(STM32F4_HAS_SRAM3) ? 64k : 0;
/* Only STM32F429I-Discovery has external SDRAM */
SDRAM_SIZE = DEFINED(STM32_HAS_SDRAM) ? 8M : 0;
/* change address & length if bootloader */
bootloader_size = 32k;
flash_start = 0x08000000 + (DEFINED(HAS_BOOTLOADER) ? bootloader_size : 0);
flash_size = DEFINED(IS_BOOTLOADER) ? bootloader_size : 768k;
image_size = DEFINED(HAS_BOOTLOADER) ? (flash_size - bootloader_size) : flash_size;
/* OpenBLT <-> main FW shared area */
_OpenBLT_Shared_Params_Size = DEFINED(BOOTLOADER) ? 16 : 0;
_OpenBLT_Shared_Params_Size = DEFINED(HAS_BOOTLOADER) || DEFINED(IS_BOOTLOADER) ? 16 : 0;
MEMORY
{
bl : org = 0x08000000, len = 16k /* bootloader section */
flash0 : org = DEFINED(BOOTLOADER) ? 0x08008000 : 0x08000000, len = DEFINED(BOOTLOADER) ? 736k : 768k /* change address & length if bootloader */
bl : org = 0x08000000, len = bootloader_size /* bootloader section */
flash0 : org = flash_start, len = image_size
flash1 : org = 0x00000000, len = 0
flash2 : org = 0x00000000, len = 0
flash3 : org = 0x00000000, len = 0

18
firmware/hw_layer/ports/stm32/stm32f7/STM32F7.ld
View File

@ -25,20 +25,20 @@
* 'bl' is related to rusefi bootloader
*/
/* TODO: 512k flash limit is a mitigation for https://github.com/rusefi/rusefi/issues/3566 and https://github.com/rusefi/rusefi/issues/3775 */
/* flash_size = DEFINED(FLASH_SIZE) ? FLASH_SIZE : 512k; */
flash_size = DEFINED(FLASH_SIZE) ? FLASH_SIZE : 768k;
/* change address & length if bootloader */
bootloader_size = 32k;
flash_start = 0x08000000 + (DEFINED(HAS_BOOTLOADER) ? bootloader_size : 0);
flash_size = DEFINED(IS_BOOTLOADER) ? bootloader_size : 768k;
image_size = DEFINED(HAS_BOOTLOADER) ? (flash_size - bootloader_size) : flash_size;
/* OpenBLT <-> main FW shared area */
_OpenBLT_Shared_Params_Size = DEFINED(BOOTLOADER) ? 16 : 0;
_OpenBLT_Shared_Params_Size = DEFINED(HAS_BOOTLOADER) || DEFINED(IS_BOOTLOADER) ? 16 : 0;
MEMORY
{
bl : org = 0x08000000, len = 16k /* bootloader section */
/* change address & length if bootloader */
flash0 (rx) : org = DEFINED(BOOTLOADER) ? 0x08008000 : 0x08000000, len = DEFINED(BOOTLOADER) ? (flash_size - 32k) : flash_size
/* TODO: should we use same flash_size for flash@ITCM? */
flash1 (rx) : org = DEFINED(BOOTLOADER) ? 0x00208000 : 0x00200000, len = DEFINED(BOOTLOADER) ? (2m - 32k) : 2m /* Flash as ITCM */
bl : org = 0x08000000, len = bootloader_size /* bootloader section */
flash0 (rx) : org = flash_start, len = image_size
flash1 (rx) : org = flash_start - 0x07e00000, len = image_size /* Flash as ITCM */
flash2 (rx) : org = 0x00000000, len = 0
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0

19
firmware/hw_layer/ports/stm32/stm32h7/STM32H743xI.ld
View File

@ -14,6 +14,15 @@
limitations under the License.
*/
/* change address & length if bootloader */
bootloader_size = 32k;
flash_start = 0x08000000 + (DEFINED(HAS_BOOTLOADER) ? bootloader_size : 0);
flash_size = DEFINED(IS_BOOTLOADER) ? bootloader_size : 1M;
image_size = DEFINED(HAS_BOOTLOADER) ? (flash_size - bootloader_size) : flash_size;
/* OpenBLT <-> main FW shared area */
_OpenBLT_Shared_Params_Size = DEFINED(HAS_BOOTLOADER) || DEFINED(IS_BOOTLOADER) ? 16 : 0;
/*
* STM32H743xI generic setup.
*
@ -27,15 +36,17 @@
*/
MEMORY
{
flash0 (rx) : org = 0x08000000, len = 2M /* Flash bank1+bank2 */
flash1 (rx) : org = 0x08000000, len = 1M /* Flash bank 1 */
flash2 (rx) : org = 0x08100000, len = 1M /* Flash bank 2 */
bl : org = 0x08000000, len = bootloader_size
flash0 (rx) : org = flash_start, len = flash_size /* Flash bank1+bank2 */
flash1 (rx) : org = flash_start, len = flash_size /* Flash bank 1 (code) */
flash2 (rx) : org = 0x08100000, len = 1M /* Flash bank 2 (engine config) */
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x24000000, len = 512k /* AXI SRAM */
shared : org = 0x24000000, len = _OpenBLT_Shared_Params_Size
ram0 (wx) : org = 0x24000000 + _OpenBLT_Shared_Params_Size, len = 512k - _OpenBLT_Shared_Params_Size /* AXI SRAM */
ram1 (wx) : org = 0x30000000, len = 256k /* AHB SRAM1+SRAM2 */
ram2 (wx) : org = 0x30000000, len = 288k /* AHB SRAM1+SRAM2+SRAM3 */
ram3 (wx) : org = 0x30040000, len = 32k /* AHB SRAM3 */

6
misc/jenkins/build_working_folder.sh
View File

@ -70,10 +70,10 @@ cp firmware/deliver/fome.dfu $FOLDER
cp firmware/deliver/fome.hex $FOLDER
# bootloader
[ -e firmware/deliver/openblt.bin ] && { cp firmware/deliver/openblt.bin $FOLDER ; }
[ -e firmware/deliver/openblt.dfu ] && { cp firmware/deliver/openblt.dfu $FOLDER ; }
[ -e firmware/deliver/fome_bl.bin ] && { cp firmware/deliver/fome_bl.bin $FOLDER ; }
[ -e firmware/deliver/fome_bl.dfu ] && { cp firmware/deliver/fome_bl.dfu $FOLDER ; }
# update srec
[ -e firmware/deliver/rusefi_update.srec ] && { cp firmware/deliver/rusefi_update.srec $FOLDER ; }
[ -e firmware/deliver/fome_update.srec ] && { cp firmware/deliver/fome_update.srec $FOLDER ; }
if [ -n "$BUNDLE_NAME" ]; then
mv $FOLDER/fome.dfu $FOLDER/fome_$BUNDLE_NAME.dfu