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Pt2001 module (#4396) 

* pt2001 uses module

* read flag0

* c

* libfirmware

* makefiles

* are unit tests happy?

* bootloader
This commit is contained in:
Matthew Kennedy 2022-08-08 05:53:08 -07:00 committed by GitHub
parent 2a225e212e
commit 5fc7000834
39 changed files with 110 additions and 2396 deletions
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2
firmware/Makefile
View File

@ -30,6 +30,7 @@ CHIBIOS_CONTRIB = ChibiOS-Contrib
# Configure libfirmware Paths/Includes
RUSEFI_LIB = $(PROJECT_DIR)/libfirmware
include $(RUSEFI_LIB)/util/util.mk
include $(RUSEFI_LIB)/pt2001/pt2001.mk
include rusefi.mk
@ -239,6 +240,7 @@ CSRC = check.c \
$(HW_LAYER_EMS) \
$(HW_LAYER_DRIVERS_CORE) \
$(HW_LAYER_DRIVERS) \
$(RUSEFI_LIB_C) \
main_hardfault.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global

1
firmware/bootloader/src/Makefile
View File

@ -133,6 +133,7 @@ CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
# Configure libfirmware Paths/Includes
RUSEFI_LIB = $(PROJECT_DIR)/libfirmware
include $(RUSEFI_LIB)/util/util.mk
include $(RUSEFI_LIB)/pt2001/pt2001.mk
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
RULESFILE = $(RULESPATH)/rules.mk

3
firmware/hw_layer/hw_layer.mk
View File

@ -37,9 +37,6 @@ ifeq ($(USE_OPENBLT),yes)
$(PROJECT_DIR)/hw_layer/openblt/shared_params.c
endif
ALLCSRC += \
$(PROJECT_DIR)/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.c
#
# '-include' is a magic kind of 'include' which would survive if file to be included is not found
#

542
firmware/hw_layer/mc33816.cpp
View File

@ -18,24 +18,9 @@
#if EFI_MC33816
#include "mc33816.h"
#include "mc33816_memory_map.h"
#include "hardware.h"
#include "mc33816/rusefi/sample_code/PT2001_LoadData.h"
#include "mpu_util.h"
static bool isInitializaed = false;
static OutputPin chipSelect;
static OutputPin resetB;
static OutputPin driven;
static bool flag0before = false;
static bool flag0after = false;
static unsigned short mcChipId;
static unsigned short mcDriverStatus;
static SPIConfig spiCfg = { .circular = false,
.end_cb = NULL,
.ssport = NULL,
@ -47,387 +32,125 @@ static SPIConfig spiCfg = { .circular = false,
SPI_CR1_CPHA | SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_BR_2 | SPI_CR1_SPE,
.cr2 = SPI_CR2_SSOE};
static SPIDriver *driver;
class Pt2001 : public Pt2001Base {
public:
void init();
void initIfNeeded();
static bool validateChipId() {
return (mcChipId >> 8) == 0x9D;
}
static void showStats() {
if (!isInitializaed) {
efiPrintf("WAITINIG FOR VBatt...");
}
// x9D is product code or something, and 43 is the revision?
efiPrintf("MC 0x%x %s", mcChipId, validateChipId() ? "hooray!" : "not hooray :(");
if (isBrainPinValid(engineConfiguration->mc33816_flag0)) {
efiPrintf("flag0 before %d after %d", flag0before, flag0after);
efiPrintf("flag0 right now %d", efiReadPin(engineConfiguration->mc33816_flag0));
} else {
efiPrintf("No flag0 pin selected");
}
efiPrintf("MC voltage %d", engineConfiguration->mc33_hvolt);
efiPrintf("MC driver status 0x%x", mcDriverStatus);
}
static void initMc33816IfNeeded();
static void mcRestart();
// Receive 16bits
unsigned short recv_16bit_spi() {
return spiPolledExchange(driver, 0xFFFF);
}
// This could be used to detect if check byte is wrong.. or use a FLAG after init
unsigned short txrx_16bit_spi(const unsigned short param) {
return spiPolledExchange(driver, param);
}
// Send 16bits
static void spi_writew(unsigned short param) {
//spiSelect(driver);
spiPolledExchange(driver, param);
//spiUnselect(driver);
}
static void setup_spi() {
protected:
void select() override {
spiSelect(driver);
// Select Channel command
spi_writew(0x7FE1);
// Common Page
spi_writew(0x0004);
}
// Configure SPI command
spi_writew(0x3901);
// Mode A + Watchdog timer full
//spi_writew(0x001F);
spi_writew(0x009F); // + fast slew rate on miso
void deselect() override {
spiUnselect(driver);
}
static unsigned short readId() {
spiSelect(driver);
spi_writew(0xBAA1);
unsigned short ID = recv_16bit_spi();
spiUnselect(driver);
return ID;
uint16_t sendRecv(uint16_t tx) override {
return spiPolledExchange(driver, tx);
}
// Read a single word in Data RAM
unsigned short mcReadDram(MC33816Mem addr) {
uint16_t addrInt = static_cast<uint16_t>(addr);
unsigned short readValue;
spiSelect(driver);
// Select Channel command, Common Page
spi_writew(0x7FE1);
spi_writew(0x0004);
// read (MSB=1) at data ram x9 (SCV_I_Hold), and 1 word
spi_writew((0x8000 | addrInt << 5) + 1);
readValue = recv_16bit_spi();
spiUnselect(driver);
return readValue;
// Send `count` number of 16 bit words from `data`
void sendLarge(const uint16_t* data, size_t count) override {
spiSend(driver, count, data);
}
// Update a single word in Data RAM
void mcUpdateDram(MC33816Mem addr, unsigned short data) {
uint16_t addrInt = static_cast<uint16_t>(addr);
spiSelect(driver);
// Select Channel command, Common Page
spi_writew(0x7FE1);
spi_writew(0x0004);
// write (MSB=0) at data ram x9 (SCV_I_Hold), and 1 word
spi_writew((addrInt << 5) + 1);
spi_writew(data);
spiUnselect(driver);
// GPIO reset and enable pins
void setResetB(bool state) override {
resetB.setValue(state);
}
static short dacEquation(unsigned short current) {
/*
Current, given in mA->A
I = (DAC_VALUE * V_DAC_LSB - V_DA_BIAS)/(G_DA_DIFF * R_SENSEx)
DAC_VALUE = ((I*G_DA_DIFF * R_SENSEx) + V_DA_BIAS) / V_DAC_LSB
V_DAC_LSB is the DAC resolution = 9.77mv
V_DA_BIAS = 250mV
G_DA_DIFF = Gain: 5.79, 8.68, [12.53], 19.25
R_SENSE = 10mOhm soldered on board
*/
return (short)(((current/1000.0f * 12.53f * 10) + 250.0f) / 9.77f);
void setDriveEN(bool state) override {
driven.setValue(state);
}
static void setTimings() {
// Convert mA to DAC values
mcUpdateDram(MC33816Mem::Iboost, dacEquation(engineConfiguration->mc33_i_boost));
mcUpdateDram(MC33816Mem::Ipeak, dacEquation(engineConfiguration->mc33_i_peak));
mcUpdateDram(MC33816Mem::Ihold, dacEquation(engineConfiguration->mc33_i_hold));
// uint16_t mc33_t_max_boost; // not yet implemented in microcode
// in micro seconds to clock cycles
mcUpdateDram(MC33816Mem::Tpeak_off, (MC_CK * engineConfiguration->mc33_t_peak_off));
mcUpdateDram(MC33816Mem::Tpeak_tot, (MC_CK * engineConfiguration->mc33_t_peak_tot));
mcUpdateDram(MC33816Mem::Tbypass, (MC_CK * engineConfiguration->mc33_t_bypass));
mcUpdateDram(MC33816Mem::Thold_off, (MC_CK * engineConfiguration->mc33_t_hold_off));
mcUpdateDram(MC33816Mem::Thold_tot, (MC_CK * engineConfiguration->mc33_t_hold_tot));
mcUpdateDram(MC33816Mem::Tboost_min, (MC_CK * engineConfiguration->mc33_t_min_boost));
mcUpdateDram(MC33816Mem::Tboost_max, (MC_CK * engineConfiguration->mc33_t_max_boost));
// HPFP solenoid settings
mcUpdateDram(MC33816Mem::HPFP_Ipeak,
dacEquation(engineConfiguration->mc33_hpfp_i_peak * 1000));
mcUpdateDram(MC33816Mem::HPFP_Ihold,
dacEquation(engineConfiguration->mc33_hpfp_i_hold * 1000));
mcUpdateDram(MC33816Mem::HPFP_Thold_off,
std::min(MC_CK * engineConfiguration->mc33_hpfp_i_hold_off,
UINT16_MAX));
// Note, if I'm reading this right, the use of the short and the given clock speed means
// the max time here is approx 10ms.
mcUpdateDram(MC33816Mem::HPFP_Thold_tot,
std::min(MC_CK * 1000 * engineConfiguration->mc33_hpfp_max_hold,
UINT16_MAX));
// GPIO inputs for various pins we need
bool readFlag0() const override {
return efiReadPin(engineConfiguration->mc33816_flag0);
}
void setBoostVoltage(float volts)
{
// Sanity checks, Datasheet says not too high, nor too low
if (volts > 65.0f) {
firmwareError(OBD_PCM_Processor_Fault, "DI Boost voltage setpoint too high: %.1f", volts);
return;
}
if (volts < 10.0f) {
firmwareError(OBD_PCM_Processor_Fault, "DI Boost voltage setpoint too low: %.1f", volts);
return;
}
// There's a 1/32 divider on the input, then the DAC's output is 9.77mV per LSB. (1 / 32) / 0.00977 = 3.199 counts per volt.
unsigned short data = volts * 3.2;
mcUpdateDram(MC33816Mem::Vboost_high, data+1);
mcUpdateDram(MC33816Mem::Vboost_low, data-1);
// Remember to strobe driven!!
// Get battery voltage - only try to init chip when powered
float getVbatt() const override {
return Sensor::get(SensorType::BatteryVoltage).value_or(VBAT_FALLBACK_VALUE);
}
static bool check_flash() {
spiSelect(driver);
// ch1
// read (MSB=1) at location, and 1 word
spi_writew((0x8000 | 0x100 << 5) + 1);
if (!(recv_16bit_spi() & (1<<5))) {
spiUnselect(driver);
return false;
// CONFIGURATIONS: currents, timings, voltages
float getBoostVoltage() const override {
return engineConfiguration->mc33_hvolt;
}
// ch2
// read (MSB=1) at location, and 1 word
spi_writew((0x8000 | 0x120 << 5) + 1);
if (!(recv_16bit_spi() & (1<<5))) {
spiUnselect(driver);
return false;
// Currents in amps
float getBoostCurrent() const override {
return engineConfiguration->mc33_i_boost;
}
spiUnselect(driver);
return true;
float getPeakCurrent() const override {
return engineConfiguration->mc33_i_peak;
}
static void mcClearDriverStatus(){
// Note: There is a config at 0x1CE & 1 that can reset this status config register on read
// otherwise the reload/recheck occurs with this write
// resetting it is necessary to clear default reset behavoir, as well as if an issue has been resolved
setup_spi(); // ensure on common page?
spiSelect(driver);
spi_writew((0x0000 | 0x1D2 << 5) + 1); // write, location, one word
spi_writew(0x0000); // anything to clear
spiUnselect(driver);
float getHoldCurrent() const override {
return engineConfiguration->mc33_i_hold;
}
static unsigned short readDriverStatus(){
unsigned short driverStatus;
setup_spi(); // ensure on common page?
spiSelect(driver);
spi_writew((0x8000 | 0x1D2 << 5) + 1);
driverStatus = recv_16bit_spi();
spiUnselect(driver);
return driverStatus;
float getPumpPeakCurrent() const override {
return engineConfiguration->mc33_hpfp_i_peak;
}
static bool checkUndervoltVccP(unsigned short driverStatus){
return (driverStatus & (1<<0));
float getPumpHoldCurrent() const override {
return engineConfiguration->mc33_hpfp_i_hold;
}
static bool checkUndervoltV5(unsigned short driverStatus){
return (driverStatus & (1<<1));
// Timings in microseconds
uint16_t getTpeakOff() const override {
return engineConfiguration->mc33_t_peak_off;
}
static bool checkOverTemp(unsigned short driverStatus){
return (driverStatus & (1<<3));
uint16_t getTpeakTot() const override {
return engineConfiguration->mc33_t_peak_tot;
}
static bool checkDrivenEnabled(unsigned short driverStatus){
return (driverStatus & (1<<4));
uint16_t getTbypass() const override {
return engineConfiguration->mc33_t_bypass;
}
static void enable_flash() {
spiSelect(driver);
spi_writew(0x2001); //ch1
spi_writew(0x0018); //enable flash
spi_writew(0x2401); //ch2
spi_writew(0x0018); // enable flash
spiUnselect(driver);
uint16_t getTholdOff() const override {
return engineConfiguration->mc33_t_hold_off;
}
static void download_RAM(int target) {
uint16_t memory_area = 0; // memory area
uint16_t start_address = 0; // start address
uint16_t codeWidthRegAddr = 0; // code width register address
uint16_t size = 0; // size of RAM data
uint16_t command = 0; // command data
const uint16_t *RAM_ptr; // pointer to array of data to be sent to the chip
//Why Again? For Every time, just in case?
setup_spi();
switch(target) // selects target
{
case CODE_RAM1:
memory_area = 0x1;
start_address = 0;
codeWidthRegAddr = 0x107;
RAM_ptr = PT2001_code_RAM1;
size = sizeof(PT2001_code_RAM1) / 2;
break;
case CODE_RAM2:
memory_area = 0x2;
start_address = 0;
codeWidthRegAddr = 0x127;
RAM_ptr = PT2001_code_RAM2;
size = sizeof(PT2001_code_RAM2) / 2;
break;
case DATA_RAM: // ch1 only?
memory_area = 0x4;
start_address = 0;
RAM_ptr = PT2001_data_RAM;
size = sizeof(PT2001_data_RAM) / 2;
break;
// optional, both data_rams with 0x3, writes same code to both
default:
break;
uint16_t getTHoldTot() const override {
return engineConfiguration->mc33_t_hold_tot;
}
// Chip-Select high
spiSelect(driver);
if (target != DATA_RAM)
{
command = codeWidthRegAddr << 5; // control width register address
command |= 1; // number of words to follow
spi_writew(command); // sends code_width command
spi_writew(size); // sends size (Code Width)
uint16_t getTBoostMin() const override {
return engineConfiguration->mc33_t_min_boost;
}
// Select Channel command
spi_writew(0x7FE1);
// RAM1, RAM2, or Common Page (Data RAM)
spi_writew(memory_area);
// "Command" of starting address
// up to 0x03FE of code ram
// up to 0x0080 of data ram
command = start_address << 5;
spi_writew(command); // sends start address command
spiSend(driver, size, RAM_ptr);
spiUnselect(driver);
uint16_t getTBoostMax() const override {
return engineConfiguration->mc33_t_max_boost;
}
static void download_register(int r_target) {
uint16_t r_start_address = 0; // start address
uint16_t r_size = 0; // size of configuration data
uint16_t r_command = 0; // command data
uint16_t remainder_size = 0; // remainder size
const uint16_t *reg_ptr; // pointer to array of data to be sent to the chip
switch(r_target) // selects target
{
case REG_CH1: // channel 1 configurations
r_start_address = 0x100;
reg_ptr = PT2001_ch1_config;
r_size = sizeof(PT2001_ch1_config) / 2; // gets number of words to be sent
break;
case REG_CH2: // channel 2 configurations
r_start_address = 0x120;
reg_ptr = PT2001_ch2_config;
r_size = sizeof(PT2001_ch2_config) / 2; // gets number of words to be sent
break;
case REG_DIAG: // diagnostic configurations
r_start_address = 0x140;
reg_ptr = PT2001_diag_config;
r_size = sizeof(PT2001_diag_config) / 2; // gets number of words to be sent
break;
case REG_IO: // IO configurations
r_start_address = 0x180;
reg_ptr = PT2001_io_config;
r_size = sizeof(PT2001_io_config) / 2; // gets number of words to be sent
break;
case REG_MAIN: // main configurations
r_start_address = 0x1C0;
reg_ptr = PT2001_main_config;
r_size = sizeof(PT2001_main_config) / 2; // gets number of words to be sent
break;
default:
break;
uint16_t getPumpTholdOff() const override {
return engineConfiguration->mc33_hpfp_i_hold_off;
}
//for location < size(remainder?)
// is location == 0? or past max xfer, send command + expected size
// if location = max xfer
//
// retrieve data, send it, increase pointer
// increase
if (r_size > MAX_SPI_MODE_A_TRANSFER_SIZE) //if size is too large, split into two sections ... MULTIPLE sections..
{
remainder_size = r_size - MAX_SPI_MODE_A_TRANSFER_SIZE; // creates remaining size
r_size = MAX_SPI_MODE_A_TRANSFER_SIZE; // sets first size
uint16_t getPumpTholdTot() const override {
return engineConfiguration->mc33_hpfp_max_hold;
}
r_command = r_start_address << 5; // start address
r_command += r_size; // number of words to follow
spiSelect(driver); // Chip
spi_writew(r_command); // sends address and number of words to be sent
spiSend(driver, r_size, reg_ptr);
if (remainder_size > 0) // if remainder size is greater than 0, download the rest
{
r_start_address += r_size; // new start address
r_command = r_start_address << 5; // start address
r_command += remainder_size; // number of words to follow
spi_writew(r_command); // sends address and number of words to be sent
spiSend(driver, remainder_size, reg_ptr + r_size);
}
spiUnselect(driver);
// Print out an error message
void onError(const char* why) override {
efiPrintf("PT2001 error: %s", why);
}
void initMc33816() {
private:
SPIDriver* driver;
OutputPin resetB;
OutputPin driven;
OutputPin chipSelect;
};
void Pt2001::init() {
//
// see setTest33816EngineConfiguration for default configuration
// Pins
@ -447,7 +170,6 @@ void initMc33816() {
// High Voltage via DRIVEN
driven.initPin("mc33 DRIVEN", engineConfiguration->mc33816_driven);
spiCfg.ssport = getHwPort("hip", engineConfiguration->mc33816_cs);
spiCfg.sspad = getHwPin("hip", engineConfiguration->mc33816_cs);
@ -462,130 +184,28 @@ void initMc33816() {
spiStart(driver, &spiCfg);
addConsoleAction("mc33_stats", showStats);
addConsoleAction("mc33_restart", mcRestart);
//addConsoleActionI("mc33_send", sendWord);
// addConsoleAction("mc33_stats", showStats);
// addConsoleAction("mc33_restart", mcRestart);
initMc33816IfNeeded();
initIfNeeded();
}
static void mcShutdown() {
driven.setValue(0); // ensure HV is off
resetB.setValue(0); // turn off the chip
}
static bool isInitializaed = false;
static void mcRestart() {
flag0before = false;
flag0after = false;
efiPrintf("MC Restart");
showStats();
driven.setValue(0); // ensure driven is off
if (Sensor::get(SensorType::BatteryVoltage).value_or(VBAT_FALLBACK_VALUE) < LOW_VBATT) {
efiPrintf("GDI not Restarting until we see VBatt");
return;
}
// Does starting turn this high to begin with??
spiUnselect(driver);
//delay/wait? .. possibly only 30us for each needed, per datasheet
resetB.setValue(0);
chThdSleepMilliseconds(10);
resetB.setValue(1);
chThdSleepMilliseconds(10);
if (isBrainPinValid(engineConfiguration->mc33816_flag0)) {
flag0before = efiReadPin(engineConfiguration->mc33816_flag0);
}
setup_spi();
mcClearDriverStatus(); // Initial clear necessary
mcDriverStatus = readDriverStatus();
if (checkUndervoltV5(mcDriverStatus)) {
firmwareError(OBD_PCM_Processor_Fault, "MC33 5V Under-Voltage!");
mcShutdown();
return;
}
mcChipId = readId();
if (!validateChipId()) {
firmwareError(OBD_PCM_Processor_Fault, "No comm with MC33");
mcShutdown();
return;
}
download_RAM(CODE_RAM1); // transfers code RAM1
download_RAM(CODE_RAM2); // transfers code RAM2
download_RAM(DATA_RAM); // transfers data RAM
/**
* current configuration of REG_MAIN would toggle flag0 from LOW to HIGH
*/
download_register(REG_MAIN); // download main register configurations
if (isBrainPinValid(engineConfiguration->mc33816_flag0)) {
flag0after = efiReadPin(engineConfiguration->mc33816_flag0);
if (flag0before || !flag0after) {
firmwareError(OBD_PCM_Processor_Fault, "MC33 flag0 transition no buena");
mcShutdown();
return;
}
}
download_register(REG_CH1); // download channel 1 register configurations
download_register(REG_CH2); // download channel 2 register configurations
download_register(REG_IO); // download IO register configurations
download_register(REG_DIAG); // download diag register configuration
setTimings();
// Finished downloading, let's run the code
enable_flash();
if (!check_flash()) {
firmwareError(OBD_PCM_Processor_Fault, "MC33 no flash");
mcShutdown();
return;
}
mcDriverStatus = readDriverStatus();
if (checkUndervoltVccP(mcDriverStatus)) {
firmwareError(OBD_PCM_Processor_Fault, "MC33 VccP (7V) Under-Voltage!");
mcShutdown();
return;
}
// Drive High Voltage if possible
setBoostVoltage(engineConfiguration->mc33_hvolt);
driven.setValue(1); // driven = HV
chThdSleepMilliseconds(10); // Give it a moment
mcDriverStatus = readDriverStatus();
if (!checkDrivenEnabled(mcDriverStatus)) {
firmwareError(OBD_PCM_Processor_Fault, "MC33 Driven did not stick!");
mcShutdown();
return;
}
mcDriverStatus = readDriverStatus();
if (checkUndervoltVccP(mcDriverStatus)) {
firmwareError(OBD_PCM_Processor_Fault, "MC33 VccP Under-Voltage After Driven"); // Likely DC-DC LS7 is dead!
mcShutdown();
return;
}
}
static void initMc33816IfNeeded() {
void Pt2001::initIfNeeded() {
if (Sensor::get(SensorType::BatteryVoltage).value_or(VBAT_FALLBACK_VALUE) < LOW_VBATT) {
isInitializaed = false;
} else {
if (!isInitializaed) {
// WARNING: 'mcRestart' current implementation works in non-irq user content only
// note all the locking SPI API usage
mcRestart();
isInitializaed = true;
isInitializaed = restart();
}
}
}
static Pt2001 pt;
void initMc33816() {
pt.init();
}
#endif /* EFI_MC33816 */

17
firmware/hw_layer/mc33816.h
View File

@ -7,21 +7,4 @@
#pragma once
const int MC_CK = 6; // PLL x24 / CLK_DIV 4 = 6Mhz
const int MAX_SPI_MODE_A_TRANSFER_SIZE = 31; //max size for register config transfer
enum {
CODE_RAM1,
CODE_RAM2,
DATA_RAM
};
enum {
REG_MAIN,
REG_CH1,
REG_CH2,
REG_IO,
REG_DIAG
};
void initMc33816();

14
firmware/hw_layer/mc33816/mc33816.md
View File

@ -1,14 +0,0 @@
https://www.nxp.com/files-static/training_pdf/FTF/2012/americas/WBNR_FTF12_AUT_F0098.pdf has many cool pictures explaining the whole thing.
https://www.nxp.com/docs/en/application-note/AN4849.pdf is literally a complete example of a four cylinder internal combustion engine (ICE) injector drive.
MC33816 has four independent microcores - four "threads" of execution.
One thread has to be controlling variable frequency modulation (VFM) DC-to-DC converter, whatever it means.
Two more threads are running two banks of two injectors each.
Each injector has it's own low-side driver.
Each bank/pair of injectors share a "boosting" - i.e. high-voltage opening high-side driver, and a "holding" - i.e normal battery voltage high-side driver. (page 59)

10
firmware/hw_layer/mc33816/rusefi/.gitignore vendored
View File

@ -1,10 +0,0 @@
bin
sample_code/*
!sample_code/PT2001_dram.h
!sample_code/PT2001_LoadData.c
!sample_code/PT2001_LoadData.h
CSV Files
Registers/*.hex
*.txt
*.vsdx
*.def.hex

16
firmware/hw_layer/mc33816/rusefi/Actuator/dcdc_current.xml
View File

@ -1,16 +0,0 @@
<Actuator name="DCDC_Current" type="DcdcConverterSolenoid">
<Resistance>10</Resistance>
<Inductance>10</Inductance>
<RSense>10</RSense>
<CurrentFeedback>CurFbk4</CurrentFeedback>
<FeedBackSource>Form</FeedBackSource>
<OutputUsed number="1">
<Output>Ls7Command</Output>
</OutputUsed>
<VoltageLoad>
<Voltage>-52</Voltage>
<Voltage>13</Voltage>
</VoltageLoad>
<LinkedActuator>DCDC_Voltage</LinkedActuator>
<BoostFeedback>None</BoostFeedback>
</Actuator>

17
firmware/hw_layer/mc33816/rusefi/Actuator/dcdc_voltage.xml
View File

@ -1,17 +0,0 @@
<Actuator name="DCDC_Voltage" type="DcdcConverterCapacitor">
<Resistance>30</Resistance>
<Inductance>1000</Inductance>
<RSense>80</RSense>
<CurrentFeedback>
</CurrentFeedback>
<FeedBackSource>Form</FeedBackSource>
<OutputUsed number="1">
<Output>Ls7Command</Output>
</OutputUsed>
<VoltageLoad>
<Voltage>-1000</Voltage>
<Voltage>13</Voltage>
</VoltageLoad>
<LinkedActuator>DCDC_Current</LinkedActuator>
<BoostFeedback>VboostDiv</BoostFeedback>
</Actuator>

23
firmware/hw_layer/mc33816/rusefi/Actuator/inj1.xml
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@ -1,23 +0,0 @@
<Actuator name="Inj1" type="BoostParallelSolenoid2">
<Resistance>1000</Resistance>
<Inductance>500</Inductance>
<RSense>10</RSense>
<CurrentFeedback>CurFbk1</CurrentFeedback>
<FeedBackSource>Form</FeedBackSource>
<OutputUsed number="3">
<Output>Hs1Command</Output>
<Output>Ls1Command</Output>
<Output>Hs2Command</Output>
</OutputUsed>
<VoltageLoad>
<Voltage>-66</Voltage>
<Voltage>-1</Voltage>
<Voltage>-1</Voltage>
<Voltage>65</Voltage>
<Voltage>-1</Voltage>
<Voltage>-1</Voltage>
<Voltage>13</Voltage>
<Voltage>65</Voltage>
</VoltageLoad>
<BoostFeedback>None</BoostFeedback>
</Actuator>

13
firmware/hw_layer/mc33816/rusefi/AutoLoad.xml
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@ -1,13 +0,0 @@
<LoadDefault xmlns="http://tempuri.org/AutoLoad.xsd">
<MicroCodesReload ch1="True" ch2="True" />
<DPRamsReload ch1="True" ch2="True" />
<ChannelParametersReload ch1="True" ch2="True" />
<MainConfigurationReload reload="True" />
<DiagnosisConfigurationReload reload="True" />
<CrossbarConfigurationReload reload="True" />
<StimulusReload reload="True" />
<ActuatorReload reload="True" />
<FeedbackReload reload="True" />
<GraphicsReload reload="True" />
<ForceFlashEnable ch1="True" ch2="True" />
</LoadDefault>

99
firmware/hw_layer/mc33816/rusefi/Feedbacks/dcdc_voltage.xml
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@ -1,99 +0,0 @@
<VoltageFeedbacks>
<Transition threshold="False" type="2">
<Input>FeedbackHs1Vds</Input>
<Output>Hs1Command</Output>
<SourceShared level="True">Hs2Command</SourceShared>
<AboveHigh>
<Value>False</Value>
<Delay>500 ns</Delay>
</AboveHigh>
<AboveLow>
<Value>True</Value>
<Delay>500 ns</Delay>
</AboveLow>
</Transition>
<Transition threshold="True" type="2">
<Input>FeedbackHs1Vsrc</Input>
<Output>Hs1Command</Output>
<SourceShared level="True">Hs2Command</SourceShared>
<ActuatorNumber>-1</ActuatorNumber>
<Current>0</Current>
<AboveHigh>
<Value>True</Value>
<Delay>500 ns</Delay>
</AboveHigh>
<AboveLow>
<Value>False</Value>
<Delay>500 ns</Delay>
</AboveLow>
<BelowHigh>
<Value>True</Value>
<Delay>500 ns</Delay>
</BelowHigh>
<BelowLow>
<Value>True</Value>
<Delay>500 ns</Delay>
</BelowLow>
</Transition>
<Transition threshold="False" type="2">
<Input>FeedbackHs2Vds</Input>
<Output>Hs2Command</Output>
<SourceShared level="False">Hs1Command</SourceShared>
<AboveHigh>
<Value>False</Value>
<Delay>500 ns</Delay>
</AboveHigh>
<AboveLow>
<Value>True</Value>
<Delay>500 ns</Delay>
</AboveLow>
</Transition>
<Transition threshold="True" type="2">
<Input>FeedbackHs2Vsrc</Input>
<Output>Hs2Command</Output>
<SourceShared level="False">Hs1Command</SourceShared>
<ActuatorNumber>-1</ActuatorNumber>
<Current>0</Current>
<AboveHigh>
<Value>True</Value>
<Delay>500 ns</Delay>
</AboveHigh>
<AboveLow>
<Value>False</Value>
<Delay>500 ns</Delay>
</AboveLow>
<BelowHigh>
<Value>True</Value>
<Delay>500 ns</Delay>
</BelowHigh>
<BelowLow>
<Value>True</Value>
<Delay>500 ns</Delay>
</BelowLow>
</Transition>
<Transition threshold="False" type="1">
<Input>FeedbackLs1Vds</Input>
<Output>Ls1Command</Output>
<AboveHigh>
<Value>False</Value>
<Delay>500 ns</Delay>
</AboveHigh>
<AboveLow>
<Value>True</Value>
<Delay>500 ns</Delay>
</AboveLow>
</Transition>
<Transition threshold="False" type="2">
<Input>FeedbackHs2VdsVbat</Input>
<Output>Hs2Command</Output>
<SourceShared level="False">Hs1Command</SourceShared>
<AboveHigh>
<Value>False</Value>
<Delay>500 ns</Delay>
</AboveHigh>
<AboveLow>
<Value>True</Value>
<Delay>500 ns</Delay>
</AboveLow>
</Transition>
</VoltageFeedbacks>

248
firmware/hw_layer/mc33816/rusefi/Logic_Wave/wave_list.do
View File

@ -1,248 +0,0 @@
<Waves>
<Wave>
<Name>Start1</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>6</Ordinal>
<Direction>Input</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Flag2Out</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>0</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Flag1Out</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>1</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Flag0Out</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>2</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Dac1</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>43</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Hs1Command</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>4</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Hs2Command</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>5</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Ls1Command</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>9</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Cnt1</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>0</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Cnt2</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>1</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Cnt3</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>2</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Cnt4</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>3</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Eoc1</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>4</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Eoc2</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>5</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Eoc3</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>6</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Eoc4</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>7</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>TerminalCount1</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>8</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>TerminalCount2</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>9</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>TerminalCount3</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>10</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>TerminalCount4</Name>
<Path>
<PathElement>PT2001</PathElement>
<PathElement>Injection Channel 1</PathElement>
<PathElement>ChSequencers</PathElement>
<PathElement>MicroMachineSeq0</PathElement>
<PathElement>Counters</PathElement>
</Path>
<Ordinal>11</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Oaout1FlagOut</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>16</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
<Wave>
<Name>Flag0Out</Name>
<Path>
<PathElement>PT2001</PathElement>
</Path>
<Ordinal>2</Ordinal>
<Direction>Output</Direction>
<Radix>Decimal</Radix>
</Wave>
</Waves>

187
firmware/hw_layer/mc33816/rusefi/MicrocodeCh1/ch1.psc
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@ -1,187 +0,0 @@
#include "dram1.def";
* ### Channel 1 - uCore0 controls the injectors 1 and 2 ###
* Note: The Thold_tot variable defines the current profile time out. The active STARTx pin is expected to toggle in is low state before this time out.
* ### Initialization phase ###
init0: stgn gain12.6 sssc; * Set the gain of the opamp of the current measure block 1
ldjr1 eoinj0; * Load the eoinj line label Code RAM address into the register jr1
ldjr2 idle0; * Load the idle line label Code RAM address into the register jr2
cwef jr1 _start row1; * If the start signal goes low, go to eoinj phase
* ### Idle phase- the uPC loops here until start signal is present ###
idle0: joslr inj1_start start1; * Perform an actuation on inj1 if start 1 (only) is active
joslr inj2_start start2; * Perform an actuation on inj2 if start 2 (only) is active
jmpf jr1; * If more than 1 start active at the same time(or none), no actuation
* ### Shortcuts definition per the injector to be actuated ###
inj1_start: dfsct hs1 hs2 ls1; * Set the 3 shortcuts: VBAT, VBOOST, LS
jmpr boost0; * Jump to launch phase
inj2_start: dfsct hs1 hs2 ls2; * Set the 3 shortcuts: VBAT, VBOOST, LS
jmpr boost0; * Jump to launch phase
* ### Launch phase enable boost ###
* Row1 - !start: injection ended
* Row2 - Overcurrent, jump to error case (threshold is reached early)
* Row3 - Overcurrent, jump to peak phase (threshold is reached on time)
* Row4 - timer1: Minimum boost time reached - switch to row3 instead of row2 to allow peak phase
* Row5 - timer2: Boost phase timeout - boost took too long, go to error phase
boost0: load Iboost dac_sssc _ofs; * Load the boost phase current threshold in the current DAC
cwer boost0_err ocur row2; * On overcurrent, go to boost error case
cwer peak0 ocur row3; * Jump to peak phase when current is over threshold
ldcd rst _ofs keep keep Tboost_min c1; * Start boost counter to switch out of error behavior if threshold reached
cwer boost0_mintime tc1 row4; * On timer timeout, go allow overcurrent without error (ie, end of boost)
ldcd rst _ofs keep keep Tboost_max c2; * Start boost counter in case Iboost never reached
cwer boost0_err tc2 row5; * Jump to boost0_err in case boost phase takes too long
stf low b0; * set flag0 low to force the DC-DC converter in idle mode
stos off on on; * Turn VBAT off, BOOST on, LS on
wait row1245; * Wait for one of the previously defined conditions
* ### Boost phase - minimum time reached ###
boost0_mintime: wait row135; * Minimum time for boost phase has been reached, now wait for !start, overcurrent or timeout
boost0_err: stos off off off; * Turn off all drivers
stf low b10; * Set ch1 error flag (OA_1) to signal MCU
stf high b0; * set flag0 high to release the DC-DC converter idle mode
wait row1; * Wait for start signal to go low for the next injection attempt
* ### Peak phase continue on Vbat ###
peak0: ldcd rst _ofs keep keep Tpeak_tot c1; * Load the length of the total peak phase in counter 1
load Ipeak dac_sssc _ofs; * Load the peak current threshold in the current DAC
cwer bypass0 tc1 row2; * Jump to bypass phase when tc1 reaches end of count
cwer peak_on0 tc2 row3; * Jump to peak_on when tc2 reaches end of count
cwer peak_off0 ocur row4; * Jump to peak_off when current is over threshold
stf high b0; * set flag0 high to release the DC-DC converter idle mode
peak_on0: stos on off on; * Turn VBAT on, BOOST off, LS on
wait row124; * Wait for one of the previously defined conditions
peak_off0: ldcd rst ofs keep keep Tpeak_off c2; * Load in the counter 2 the length of the peak_off phase
stos off off on; * Turn VBAT off, BOOST off, LS on
wait row123; * Wait for one of the previously defined conditions
* ### Bypass phase ###
bypass0: ldcd rst ofs keep keep Tbypass c3; * Load in the counter 3 the length of the off_phase phase
stos off off off; * Turn VBAT off, BOOST off, LS off
cwer hold0 tc3 row4; * Jump to hold when tc3 reaches end of count
wait row14; * Wait for one of the previously defined conditions
* ### Hold phase on Vbat ###
hold0: ldcd rst _ofs keep keep Thold_tot c1; * Load the length of the total hold phase in counter 2
load Ihold dac_sssc _ofs; * Load the hold current threshold in the DAC
cwer eoinj0 tc1 row2; * Jump to eoinj phase when tc1 reaches end of count
cwer hold_on0 tc2 row3; * Jump to hold_on when tc2 reaches end of count
cwer hold_off0 ocur row4; * Jump to hold_off when current is over threshold
hold_on0: stos on off on; * Turn VBAT on, BOOST off, LS on
wait row124; * Wait for one of the previously defined conditions
hold_off0: ldcd rst _ofs keep keep Thold_off c2; * Load the length of the hold_off phase in counter 1
stos off off on; * Turn VBAT off, BOOST off, LS on
wait row123; * Wait for one of the previously defined conditions
* ### End of injection phase ###
eoinj0: stos off off off; * Turn VBAT off, BOOST off, LS off
stf high b0; * set flag0 to high to release the DC-DC converter idle mode
jmpf jr2; * Jump back to idle phase
* ### End of Channel 1 - uCore0 code ###
*********************************************************************************
* ### Channel 1 - uCore1 controls the injectors 3 and 4 ###
* ### Initialization phase ###
init1: stgn gain12.6 sssc; * Set the gain of the opamp of the current measure block 1
ldjr1 eoinj1; * Load the eoinj line label Code RAM address into the register jr1
ldjr2 idle1; * Load the idle line label Code RAM address into the register jr2
cwef jr1 _start row1; * If the start signal goes low, go to eoinj phase
* ### Idle phase- the uPC loops here until start signal is present ###
idle1: joslr inj3_start start3; * Perform an actuation on inj1 if start 1 (only) is active
joslr inj4_start start4; * Perform an actuation on inj2 if start 2 (only) is active
jmpf jr1; * If more than 1 start active at the same time(or none), no actuation
* ### Shortcuts definition per the injector to be actuated ###
inj3_start: dfsct hs3 hs4 ls3; * Set the 3 shortcuts: VBAT, VBOOST, LS
jmpr boost1; * Jump to launch phase
inj4_start: dfsct hs3 hs4 ls4; * Set the 3 shortcuts: VBAT, VBOOST, LS
jmpr boost1; * Jump to launch phase
* ### Launch phase enable boost ###
* Row1 - !start: injection ended
* Row2 - Overcurrent, jump to error case (threshold is reached early)
* Row3 - Overcurrent, jump to peak phase (threshold is reached on time)
* Row4 - timer1: Minimum boost time reached - switch to row3 instead of row2 to allow peak phase
* Row5 - timer2: Boost phase timeout - boost took too long, go to error phase
boost1: load Iboost dac_sssc _ofs; * Load the boost phase current threshold in the current DAC
cwer boost1_err ocur row2; * On overcurrent, go to boost error case
cwer peak1 ocur row3; * Jump to peak phase when current is over threshold
ldcd rst _ofs keep keep Tboost_min c1; * Start boost counter to switch out of error behavior if threshold reached
cwer boost1_mintime tc1 row4; * On timer timeout, go allow overcurrent without error (ie, end of boost)
ldcd rst _ofs keep keep Tboost_max c2; * Start boost counter in case Iboost never reached
cwer boost1_err tc2 row5; * Jump to boost1_err in case boost phase takes too long
stf low b0; * set flag0 low to force the DC-DC converter in idle mode
stos off on on; * Turn VBAT off, BOOST on, LS on
wait row1245; * Wait for one of the previously defined conditions
* ### Boost phase - minimum time reached ###
boost1_mintime: wait row135; * Minimum time for boost phase has been reached, now wait for !start, overcurrent or timeout
boost1_err: stos off off off; * Turn off all drivers
stf low b11; * Set ch1 error flag (OA_1) to signal MCU
stf high b0; * set flag0 high to release the DC-DC converter idle mode
wait row1; * Wait for start signal to go low for the next injection attempt
* ### Peak phase continue on Vbat ###
peak1: ldcd rst _ofs keep keep Tpeak_tot c1; * Load the length of the total peak phase in counter 1
load Ipeak dac_sssc _ofs; * Load the peak current threshold in the current DAC
cwer bypass1 tc1 row2; * Jump to bypass phase when tc1 reaches end of count
cwer peak_on1 tc2 row3; * Jump to peak_on when tc2 reaches end of count
cwer peak_off1 ocur row4; * Jump to peak_off when current is over threshold
stf high b0; * set flag0 high to release the DC-DC converter idle mode
peak_on1: stos on off on; * Turn VBAT on, BOOST off, LS on
wait row124; * Wait for one of the previously defined conditions
peak_off1: ldcd rst ofs keep keep Tpeak_off c2; * Load in the counter 2 the length of the peak_off phase
stos off off on; * Turn VBAT off, BOOST off, LS on
wait row123; * Wait for one of the previously defined conditions
* ### Bypass phase ###
bypass1: ldcd rst ofs keep keep Tbypass c3; * Load in the counter 3 the length of the off_phase phase
stos off off off; * Turn VBAT off, BOOST off, LS off
cwer hold1 tc3 row4; * Jump to hold when tc3 reaches end of count
wait row14; * Wait for one of the previously defined conditions
* ### Hold phase on Vbat ###
hold1: ldcd rst _ofs keep keep Thold_tot c1; * Load the length of the total hold phase in counter 2
load Ihold dac_sssc _ofs; * Load the hold current threshold in the DAC
cwer eoinj1 tc1 row2; * Jump to eoinj phase when tc1 reaches end of count
cwer hold_on1 tc2 row3; * Jump to hold_on when tc2 reaches end of count
cwer hold_off1 ocur row4; * Jump to hold_off when current is over threshold
hold_on1: stos on off on; * Turn VBAT on, BOOST off, LS on
wait row124; * Wait for one of the previously defined conditions
hold_off1: ldcd rst _ofs keep keep Thold_off c2; * Load the length of the hold_off phase in counter 1
stos off off on; * Turn VBAT off, BOOST off, LS on
wait row123; * Wait for one of the previously defined conditions
* ### End of injection phase ###
eoinj1: stos off off off; * Turn VBAT off, BOOST off, LS off
stf high b0; * set flag0 to high to release the DC-DC converter idle mode
jmpf jr2; * Jump back to idle phase
* ### End of Channel 1 - uCore1 code ###

10
firmware/hw_layer/mc33816/rusefi/MicrocodeCh1/dram1.def
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@ -1,10 +0,0 @@
#define Iboost 0;
#define Ipeak 1;
#define Ihold 2;
#define Tpeak_off 3;
#define Tpeak_tot 4;
#define Tbypass 5;
#define Thold_off 6;
#define Thold_tot 7;
#define Tboost_max 8;
#define Tboost_min 9;

77
firmware/hw_layer/mc33816/rusefi/MicrocodeCh2/ch2.psc
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@ -1,77 +0,0 @@
#include "dram2.def";
* ### Channel 2 - uCore0 controls dc-dc ###
* ### Initialization phase ###
init0: stgn gain5.8 ossc; * Set the gain of the opamp of the current measure block 4
load Isense4_low dac_ossc _ofs; * Load Isense4_high current threshold in DAC 4L
load Isense4_high dac4h4n _ofs; * Load Isense4_high current threshold in DAC 4H
stdm null; * Set the boost voltage DAC access mode
cwer dcdc_idle _f0 row1; * Wait table entry for Vboost under Vboost_low threshold condition
cwer dcdc_on _vb row2; * Wait table entry for Vboost under Vboost_low threshold condition
cwer dcdc_off vb row3; * Wait table entry for Vboost over Vboost_high threshold condition
* ### Asynchronous phase ###
dcdc_on: load Vboost_high dac4h4n _ofs; * Load the upper Vboost threshold in vboost_dac register
stf high b1;
stdcctl async; * Enable asynchronous mode
wait row13; * Wait for one of the previously defined conditions
* ### Synchronous phase ###
dcdc_off: load Vboost_low dac4h4n _ofs; * Load the upper Vboost threshold in vboost_dac register
stf low b1;
stdcctl sync; * Enable synchronous mode
wait row12; * Wait for one of the previously defined conditions
* ### Idle phase ###
dcdc_idle: stdcctl sync; * Enable synchronous mode
stf low b1;
stf high b1;
jocr dcdc_idle _f0; * jump to previous line while flag 0 is low
jmpr dcdc_on; * force the DC-DC converter on when flag 0 goes high
* ### End of Channel 2 - uCore0 code ###
*********************************************************************************
* ### Channel 2 - uCore1 drives HPFP high pressure fuel pump pressure control valve ###
* todo: replace 'PCV' with HPFP
* Note: The Tpeak_tot variable defines the current profile time out. The active STARTx pin is expected to toggle in is low state before this time out.
* ### Initialization phase ###
init1: stgn gain19.3 ossc; * Set the gain of the opamp of the current measure block 1
ldjr1 eoact1; * Load the eoinj line label Code RAM address into the register jr1
ldjr2 idle1; * Load the idle line label Code RAM address into the register jr2
cwef jr1 _start row1; * If the start signal goes low, go to eoinj phase
* ### Idle phase- the uPC loops here until start signal is present ###
idle1: joslr act6_start start6; * Perform an actuation on act6 if start 6 (only) is active
jmpf jr1; * If more than 1 start active at the same time(or none), no actuation
act6_start: dfsct hs5 ls6 undef; * Set the 2 shortcuts: VBAT, LS
jmpr peak1; * Jump to launch phase
* ### Launch peak phase on bat ###
peak1: load PCV_Ipeak dac_ossc _ofs; * Load the boost phase current threshold in the current DAC
cwer hold1 cur3 row2; * Jump to hold phase when current is over threshold
stos on on keep; * Turn VBAT on, LS on
wait row12; * Wait for one of the previously defined conditions
* ### Hold phase on Vbat ###
hold1: ldcd rst _ofs keep keep PCV_Thold_tot c1; * Load the length of the total hold phase in counter 1
load PCV_Ihold dac_ossc _ofs; * Load the hold current threshold in the DAC
cwer eoact1 tc1 row2; * Jump to eoinj phase when tc1 reaches end of count
cwer hold_on1 tc2 row3; * Jump to hold_on when tc2 reaches end of count
cwer hold_off1 cur3 row4; * Jump to hold_off when current is over threshold
hold_on1: stos on on keep; * Turn VBAT on, LS on
wait row124; * Wait for one of the previously defined conditions
hold_off1: ldcd rst _ofs off on PCV_Thold_off c2; * Load the length of the hold_off phase in counter 2 and turn VBAT off, LS on
wait row123; * Wait for one of the previously defined conditions
* ### End of injection phase ###
eoact1: stos off off keep; * Turn VBAT off, LS off
jmpf jr2; * Jump back to idle phase
* ### End of Channel 2 - uCore1 code ###

8
firmware/hw_layer/mc33816/rusefi/MicrocodeCh2/dram2.def
View File

@ -1,8 +0,0 @@
#define Vboost_high 0;
#define Vboost_low 1;
#define Isense4_high 2;
#define Isense4_low 3;
#define PCV_Ipeak 5;
#define PCV_Ihold 6;
#define PCV_Thold_off 7;
#define PCV_Thold_tot 8;

19
firmware/hw_layer/mc33816/rusefi/Registers/ch1_config_reg.bin
View File

@ -1,19 +0,0 @@
0000000000001000
0000000000000000
0000000000000000
0000000000000000
0000101100010011
0000000000000000
0000000000000000
0000000001101100
0110101101011001
1100100010100101
0000000000000000
0000000000101100
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000

19
firmware/hw_layer/mc33816/rusefi/Registers/ch2_config_reg.bin
View File

@ -1,19 +0,0 @@
0000000000001000
0000000000000000
0000000000000000
0000000000000000
0000110000000000
0000000000000000
0000000000000000
0000000000101011
0010000110001100
1101110010110110
0000000000000000
0000000000010100
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000

44
firmware/hw_layer/mc33816/rusefi/Registers/diag_config_reg.bin
View File

@ -1,44 +0,0 @@
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000011110
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000001

64
firmware/hw_layer/mc33816/rusefi/Registers/dram1.bin
View File

@ -1,64 +0,0 @@
0000000011000000
0000000010010010
0000000001001001
0000000000111100
0001000001101000
0000000000111100
0000000101101000
1110101001100000
0000100101100000
0000001001011000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
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0000000000000000
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0000000000000000
0000000000000000
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0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000

72
firmware/hw_layer/mc33816/rusefi/Registers/dram1.hex
View File

@ -1,72 +0,0 @@
//
// Application:
// Asic ID: PT2001
// Version:
// DRAM
// Date: Thursday, July 14, 2022
// Author: makenne
//
0x00C0,
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0x0000,
0x0000,
0x0000,
0x0000,
0x0000,
0x0000

64
firmware/hw_layer/mc33816/rusefi/Registers/dram2.bin
View File

@ -1,64 +0,0 @@
0000000011000001
0000000010111111
0000000000101111
0000000000011101
0000000000000000
0000000001000110
0000000000110111
0000000000111100
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0000000000000000
0000000000000000
0000000000000000
0000000000000000
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0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000

72
firmware/hw_layer/mc33816/rusefi/Registers/dram2.hex
View File

@ -1,72 +0,0 @@
//
// Application:
// Asic ID: PT2001
// Version:
// DRAM
// Date: Wednesday, July 13, 2022
// Author: makenne
//
0x00C1,
0x00BF,
0x002F,
0x001D,
0x0000,
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0x003C,
0xEA60,
0x0000,
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0x0000,
0x0000,
0x0000,
0x0000,
0x0000,
0x0000,
0x0000

53
firmware/hw_layer/mc33816/rusefi/Registers/io_config_reg.bin
View File

@ -1,53 +0,0 @@
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000001100011
0000000110001100
0000100000000000
0000010000010000
0000000001000001
0000000010011000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
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0000000000000000
0000000000000000
0000000000000000
0000000000000000
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0000000000000000
0000000000000000
0000000000000000
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0111111101111111
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0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000

29
firmware/hw_layer/mc33816/rusefi/Registers/main_config_reg.bin
View File

@ -1,29 +0,0 @@
0000000000000011
0001001111111110
0000000000000000
0001111000000000
0000000000000000
0000000000000000
0000000000000001
0000000000000000
0000000000011111
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000001
0000000000000000
0000000000000000
0000000000000000
0000000000000000
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0000000000000000
0000000000000000
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13
firmware/hw_layer/mc33816/rusefi/Simulator/AutoLoad.xml
View File

@ -1,13 +0,0 @@
<LoadDefault xmlns="http://tempuri.org/AutoLoad.xsd">
<MicroCodesReload ch1="True" ch2="True" ch3="True" />
<DPRamsReload ch1="True" ch2="True" ch3="True" />
<ChannelParametersReload ch1="True" ch2="True" ch3="True" />
<MainConfigurationReload reload="True" />
<DiagnosisConfigurationReload reload="True" />
<CrossbarConfigurationReload reload="True" />
<StimulusReload reload="True" />
<ActuatorReload reload="True" />
<FeedbackReload reload="True" />
<GraphicsReload reload="True" />
<ForceFlashEnable ch1="True" ch2="True" ch3="True" />
</LoadDefault>

4
firmware/hw_layer/mc33816/rusefi/Stimulus/stim.xml
View File

@ -1,4 +0,0 @@
<Stimuli>
<Stimulus target="Start1" time="1 ms" period="" value="high" />
<Stimulus target="Start1" time="3 ms" period="" value="low" />
</Stimuli>

29
firmware/hw_layer/mc33816/rusefi/labels.xml
View File

@ -1,29 +0,0 @@
<AddressLabels>
<Channel1>
<uc0>
<Entrypoint>init0</Entrypoint>
<DiagRoutineAddress>init0</DiagRoutineAddress>
<DriverDisabledAddress>init0</DriverDisabledAddress>
<SwInterruptAddress>init0</SwInterruptAddress>
</uc0>
<uc1>
<DiagRoutineAddress>init0</DiagRoutineAddress>
<DriverDisabledAddress>init0</DriverDisabledAddress>
<SwInterruptAddress>init0</SwInterruptAddress>
</uc1>
</Channel1>
<Channel2>
<uc0>
<Entrypoint>init0</Entrypoint>
<DiagRoutineAddress>init0</DiagRoutineAddress>
<DriverDisabledAddress>init0</DriverDisabledAddress>
<SwInterruptAddress>init0</SwInterruptAddress>
</uc0>
<uc1>
<Entrypoint>init1</Entrypoint>
<DiagRoutineAddress>init0</DiagRoutineAddress>
<DriverDisabledAddress>init0</DriverDisabledAddress>
<SwInterruptAddress>init0</SwInterruptAddress>
</uc1>
</Channel2>
</AddressLabels>

371
firmware/hw_layer/mc33816/rusefi/project.xml
View File

@ -1,371 +0,0 @@
<Project xmlns="http://tempuri.org/project.xsd">
<Identifiers>
<Device>PT2001</Device>
<ECU>IDE Project</ECU>
<Application>%APPLICATION%</Application>
<DeviceName>%DEVICEID%</DeviceName>
<Version>rusefi</Version>
<Prefix>%PREFIX%</Prefix>
</Identifiers>
<Files>
<RegisterFile areaName="Main Configuration Registers (MCR)">Registers\main_config_reg.hex</RegisterFile>
<RegisterFile areaName="Channel 1 Configuration Registers (C1PR)">Registers\ch1_config_reg.hex</RegisterFile>
<RegisterFile areaName="Channel 2 Configuration Registers (C2PR)">Registers\ch2_config_reg.hex</RegisterFile>
<RegisterFile areaName="Diagnosis Configuration Registers (DCR)">Registers\diag_config_reg.hex</RegisterFile>
<RegisterFile areaName="Crossbar Configuration Registers (XCR)">Registers\io_config_reg.hex</RegisterFile>
<MicroCodeFile channel="1" type="source" date="133028365609622710">MicrocodeCh1\ch1.psc</MicroCodeFile>
<MicroCodeFile channel="2" type="source" date="133028364882509871">MicrocodeCh2\ch2.psc</MicroCodeFile>
<MicroCodeFile channel="1" type="binary" date="133028335142178693">bin\ch1.bin</MicroCodeFile>
<MicroCodeFile channel="2" type="binary" date="133028335144648651">bin\ch2.bin</MicroCodeFile>
<MicroCodeFile channel="1" type="hex" date="133028335142698602">bin\ch1.hex</MicroCodeFile>
<MicroCodeFile channel="2" type="hex" date="133028335145068598">bin\ch2.hex</MicroCodeFile>
<DPramFile channel="1">Registers\dram1.hex</DPramFile>
<DPramFile channel="2">Registers\dram2.hex</DPramFile>
<LabelFile>labels.xml</LabelFile>
<ActuatorFile>Actuator\inj1.xml</ActuatorFile>
<ActuatorFile>Actuator\dcdc_current.xml</ActuatorFile>
<ActuatorFile>Actuator\dcdc_voltage.xml</ActuatorFile>
<VoltageFile>Feedbacks\dcdc_voltage.xml</VoltageFile>
<StimulusFile>Stimulus\stim.xml</StimulusFile>
<WaveFile>Logic_Wave\wave_list.do</WaveFile>
<AutoLoadFile>AutoLoad.xml</AutoLoadFile>
</Files>
<General>
<Clock>1 MHz</Clock>
</General>
<Windows>
<Structure x="292" y="767" xSize="392" ySize="482" state="Normal" visible="True" />
<Signals x="698" y="177" xSize="250" ySize="1083" state="Normal" visible="True" />
<Micro x="0" y="0" xSize="936" ySize="715" state="Normal" visible="True">
<Hex8ForLine>True</Hex8ForLine>
<SeparateCompiledFolder>True</SeparateCompiledFolder>
<DPram channel="1" addressFormat="Hex">
<Entry address="0" format="Source" unit="None" indexSelected="0" />
<Entry address="1" format="Source" unit="None" indexSelected="0" />
<Entry address="2" format="Source" unit="None" indexSelected="0" />
<Entry address="3" format="Source" unit="None" indexSelected="0" />
<Entry address="4" format="Source" unit="None" indexSelected="0" />
<Entry address="5" format="Source" unit="None" indexSelected="0" />
<Entry address="6" format="Source" unit="None" indexSelected="0" />
<Entry address="7" format="Source" unit="None" indexSelected="0" />
<Entry address="8" format="Source" unit="None" indexSelected="0" />
<Entry address="9" format="Source" unit="None" indexSelected="0" />
<Entry address="10" format="Hex" unit="None" indexSelected="0" />
<Entry address="11" format="Hex" unit="None" indexSelected="0" />
<Entry address="12" format="Hex" unit="None" indexSelected="0" />
<Entry address="13" format="Hex" unit="None" indexSelected="0" />
<Entry address="14" format="Hex" unit="None" indexSelected="0" />
<Entry address="15" format="Hex" unit="None" indexSelected="0" />
<Entry address="16" format="Hex" unit="None" indexSelected="0" />
<Entry address="17" format="Hex" unit="None" indexSelected="0" />
<Entry address="18" format="Hex" unit="None" indexSelected="0" />
<Entry address="19" format="Hex" unit="None" indexSelected="0" />
<Entry address="20" format="Hex" unit="None" indexSelected="0" />
<Entry address="21" format="Hex" unit="None" indexSelected="0" />
<Entry address="22" format="Hex" unit="None" indexSelected="0" />
<Entry address="23" format="Hex" unit="None" indexSelected="0" />
<Entry address="24" format="Hex" unit="None" indexSelected="0" />
<Entry address="25" format="Hex" unit="None" indexSelected="0" />
<Entry address="26" format="Hex" unit="None" indexSelected="0" />
<Entry address="27" format="Hex" unit="None" indexSelected="0" />
<Entry address="28" format="Hex" unit="None" indexSelected="0" />
<Entry address="29" format="Hex" unit="None" indexSelected="0" />
<Entry address="30" format="Hex" unit="None" indexSelected="0" />
<Entry address="31" format="Hex" unit="None" indexSelected="0" />
<Entry address="32" format="Hex" unit="None" indexSelected="0" />
<Entry address="33" format="Hex" unit="None" indexSelected="0" />
<Entry address="34" format="Hex" unit="None" indexSelected="0" />
<Entry address="35" format="Hex" unit="None" indexSelected="0" />
<Entry address="36" format="Hex" unit="None" indexSelected="0" />
<Entry address="37" format="Hex" unit="None" indexSelected="0" />
<Entry address="38" format="Hex" unit="None" indexSelected="0" />
<Entry address="39" format="Hex" unit="None" indexSelected="0" />
<Entry address="40" format="Hex" unit="None" indexSelected="0" />
<Entry address="41" format="Hex" unit="None" indexSelected="0" />
<Entry address="42" format="Hex" unit="None" indexSelected="0" />
<Entry address="43" format="Hex" unit="None" indexSelected="0" />
<Entry address="44" format="Hex" unit="None" indexSelected="0" />
<Entry address="45" format="Hex" unit="None" indexSelected="0" />
<Entry address="46" format="Hex" unit="None" indexSelected="0" />
<Entry address="47" format="Hex" unit="None" indexSelected="0" />
<Entry address="48" format="Hex" unit="None" indexSelected="0" />
<Entry address="49" format="Hex" unit="None" indexSelected="0" />
<Entry address="50" format="Hex" unit="None" indexSelected="0" />
<Entry address="51" format="Hex" unit="None" indexSelected="0" />
<Entry address="52" format="Hex" unit="None" indexSelected="0" />
<Entry address="53" format="Hex" unit="None" indexSelected="0" />
<Entry address="54" format="Hex" unit="None" indexSelected="0" />
<Entry address="55" format="Hex" unit="None" indexSelected="0" />
<Entry address="56" format="Hex" unit="None" indexSelected="0" />
<Entry address="57" format="Hex" unit="None" indexSelected="0" />
<Entry address="58" format="Hex" unit="None" indexSelected="0" />
<Entry address="59" format="Hex" unit="None" indexSelected="0" />
<Entry address="60" format="Hex" unit="None" indexSelected="0" />
<Entry address="61" format="Hex" unit="None" indexSelected="0" />
<Entry address="62" format="Hex" unit="None" indexSelected="0" />
<Entry address="63" format="Hex" unit="None" indexSelected="0" />
</DPram>
<DPram channel="2" addressFormat="Hex">
<Entry address="0" format="Hex" unit="None" indexSelected="0" />
<Entry address="1" format="Hex" unit="None" indexSelected="0" />
<Entry address="2" format="Hex" unit="None" indexSelected="0" />
<Entry address="3" format="Hex" unit="None" indexSelected="0" />
<Entry address="4" format="Hex" unit="None" indexSelected="0" />
<Entry address="5" format="Hex" unit="None" indexSelected="0" />
<Entry address="6" format="Hex" unit="None" indexSelected="0" />
<Entry address="7" format="Hex" unit="None" indexSelected="0" />
<Entry address="8" format="Hex" unit="None" indexSelected="0" />
<Entry address="9" format="Hex" unit="None" indexSelected="0" />
<Entry address="10" format="Hex" unit="None" indexSelected="0" />
<Entry address="11" format="Hex" unit="None" indexSelected="0" />
<Entry address="12" format="Hex" unit="None" indexSelected="0" />
<Entry address="13" format="Hex" unit="None" indexSelected="0" />
<Entry address="14" format="Hex" unit="None" indexSelected="0" />
<Entry address="15" format="Hex" unit="None" indexSelected="0" />
<Entry address="16" format="Hex" unit="None" indexSelected="0" />
<Entry address="17" format="Hex" unit="None" indexSelected="0" />
<Entry address="18" format="Hex" unit="None" indexSelected="0" />
<Entry address="19" format="Hex" unit="None" indexSelected="0" />
<Entry address="20" format="Hex" unit="None" indexSelected="0" />
<Entry address="21" format="Hex" unit="None" indexSelected="0" />
<Entry address="22" format="Hex" unit="None" indexSelected="0" />
<Entry address="23" format="Hex" unit="None" indexSelected="0" />
<Entry address="24" format="Hex" unit="None" indexSelected="0" />
<Entry address="25" format="Hex" unit="None" indexSelected="0" />
<Entry address="26" format="Hex" unit="None" indexSelected="0" />
<Entry address="27" format="Hex" unit="None" indexSelected="0" />
<Entry address="28" format="Hex" unit="None" indexSelected="0" />
<Entry address="29" format="Hex" unit="None" indexSelected="0" />
<Entry address="30" format="Hex" unit="None" indexSelected="0" />
<Entry address="31" format="Hex" unit="None" indexSelected="0" />
<Entry address="32" format="Hex" unit="None" indexSelected="0" />
<Entry address="33" format="Hex" unit="None" indexSelected="0" />
<Entry address="34" format="Hex" unit="None" indexSelected="0" />
<Entry address="35" format="Hex" unit="None" indexSelected="0" />
<Entry address="36" format="Hex" unit="None" indexSelected="0" />
<Entry address="37" format="Hex" unit="None" indexSelected="0" />
<Entry address="38" format="Hex" unit="None" indexSelected="0" />
<Entry address="39" format="Hex" unit="None" indexSelected="0" />
<Entry address="40" format="Hex" unit="None" indexSelected="0" />
<Entry address="41" format="Hex" unit="None" indexSelected="0" />
<Entry address="42" format="Hex" unit="None" indexSelected="0" />
<Entry address="43" format="Hex" unit="None" indexSelected="0" />
<Entry address="44" format="Hex" unit="None" indexSelected="0" />
<Entry address="45" format="Hex" unit="None" indexSelected="0" />
<Entry address="46" format="Hex" unit="None" indexSelected="0" />
<Entry address="47" format="Hex" unit="None" indexSelected="0" />
<Entry address="48" format="Hex" unit="None" indexSelected="0" />
<Entry address="49" format="Hex" unit="None" indexSelected="0" />
<Entry address="50" format="Hex" unit="None" indexSelected="0" />
<Entry address="51" format="Hex" unit="None" indexSelected="0" />
<Entry address="52" format="Hex" unit="None" indexSelected="0" />
<Entry address="53" format="Hex" unit="None" indexSelected="0" />
<Entry address="54" format="Hex" unit="None" indexSelected="0" />
<Entry address="55" format="Hex" unit="None" indexSelected="0" />
<Entry address="56" format="Hex" unit="None" indexSelected="0" />
<Entry address="57" format="Hex" unit="None" indexSelected="0" />
<Entry address="58" format="Hex" unit="None" indexSelected="0" />
<Entry address="59" format="Hex" unit="None" indexSelected="0" />
<Entry address="60" format="Hex" unit="None" indexSelected="0" />
<Entry address="61" format="Hex" unit="None" indexSelected="0" />
<Entry address="62" format="Hex" unit="None" indexSelected="0" />
<Entry address="63" format="Hex" unit="None" indexSelected="0" />
</DPram>
<RegisterArea name="Main Configuration Registers (MCR)">
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
</RegisterArea>
<RegisterArea name="Diagnosis Configuration Registers (DCR)">
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
</RegisterArea>
<RegisterArea name="Crossbar Configuration Registers (XCR)">
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
</RegisterArea>
<RegisterArea name="Channel 1 Configuration Registers (C1PR)">
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
</RegisterArea>
<RegisterArea name="Channel 2 Configuration Registers (C2PR)">
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
</RegisterArea>
<RegisterArea name="Channel 3 Configuration Registers (C3PR)">
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
<Reg>Hex</Reg>
</RegisterArea>
</Micro>
<Log x="156" y="156" xSize="931" ySize="663" state="Normal" visible="True" />
<Wave x="957" y="5" xSize="1567" ySize="805" state="Normal" visible="True" />
<Current x="1096" y="828" xSize="1436" ySize="464" state="Normal" visible="True" />
<Stimulus x="214" y="183" xSize="540" ySize="368" state="Normal" visible="False" />
<Voltage x="0" y="0" xSize="580" ySize="357" state="Normal" visible="False" />
<Actuator x="15" y="733" xSize="601" ySize="444" state="Normal" visible="True" />
</Windows>
</Project>

22
firmware/hw_layer/mc33816/rusefi/readme.md
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@ -1,22 +0,0 @@
Source code here is different from but is heavily inspired by MC33816 example as conveniently comes with MC33816 Dev Studio.
## Workflow:
### PT2001 Studio: Compiling/Generating C/header Files
1. Open "PT2001 Developer Studio", and open project `firmware/hw_layer/mc33816/rusefi/project.xml`.
2. Press the "Build" button at the right/center of the window to assemble the microcode.
3. Use `Tools` -> `Generate PT2001 Load Data Code` to generate C/header files used by rusEFI to program the PT2001 over SPI at boot (see `mc33816/rusefi/sample_code/`).
### PSC Simulator: Simulating microcode/config changes
1. Follow "PT2001 Studio" steps to build the project first.
2. Open "PSC Simulator", add the project if not added yet (`Project` -> `Add Existing`), and open it from the tree view.
3. Press `Compile All` in the toolbar.
4. In the top bar, push `Run`, and type in the desired simulation length. `4 ms` (with a space) is a good starting point for the existing stimulus.
5. Press OK on the `Auto Load` dialog box that comes up (all boxes checked).
6. Wait for the simulation to run. There's an indication in the bottom left corner of the main window about simulation progress.
7. Inspect the simulation results!
Just in case we have a backup of tools at https://github.com/rusefi/rusefi_external_utils/tree/master/NXP-GDI

136
firmware/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.c
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@ -1,136 +0,0 @@
/*******************************************************************************
* Example Code
*
* Copyright(C) 2022 NXP Semiconductors
* NXP Semiconductors Confidential and Proprietary
*
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* NXP products. This software is supplied "AS IS" without any warranties
* of any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights
* under any patent, copyright, mask work right, or any other intellectual
* property rights in or to any products. NXP Semiconductors reserves the
* right to make changes in the software without notification. NXP
* Semiconductors also makes no representation or warranty that such
* application will be suitable for the specified use without further testing
* or modification.
*
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided
* that it is used in conjunction with NXP Semiconductors devices. This
* copyright, permission, and disclaimer notice must appear in all copies
* of this code.
*******************************************************************************/
//==============================================================================
// This file contains data arrays that are used to load the code RAM, data RAM
// and registers on the PT2001.
//==============================================================================
// ECU: IDE Project
// Project: rusefi
#include "PT2001_LoadData.h"
// Data to be loaded into the Code RAM 1 memory space
unsigned short PT2001_code_RAM1[108] =
{
0x7612, 0x6C43, 0x917F, 0xA514, 0x8DD1, 0xC289, 0x7C38, 0xA73B, 0xF359, 0x56C3,
0xEE73, 0x812F, 0xC3A9, 0xC08B, 0x4371, 0x45BB, 0x64D7, 0xB185, 0x1C57, 0x49AA,
0x40E9, 0xBF4C, 0x2F07, 0xDBCD, 0x057C, 0x8C8A, 0xD1F7, 0x3B13, 0x492C, 0x6544,
0x277D, 0x799E, 0xD6B1, 0x477E, 0x0091, 0x0103, 0x6DA0, 0xA3AE, 0xE91C, 0xAF72,
0x3DAC, 0x2230, 0xB8C0, 0x8A6B, 0x1E34, 0xDEBF, 0x0592, 0x9E7A, 0x8E2D, 0x809B,
0x4F9F, 0x85C9, 0x5119, 0x7C72, 0xF333, 0xC575, 0x8B35, 0xD254, 0xD8FA, 0x3D01,
0x1B1D, 0xDA87, 0xFE4A, 0x74B1, 0x789D, 0x2B94, 0x360D, 0x00A8, 0x8F78, 0xC909,
0x3F0C, 0x9409, 0xFDFB, 0x43E3, 0x56E1, 0x9FA5, 0xEC49, 0xDEC7, 0x3A2C, 0xD350,
0x40AC, 0x3447, 0xC1EB, 0x2D74, 0x1526, 0x7C64, 0xE7AE, 0x17AF, 0xDA5A, 0x78DB,
0x1F1B, 0x5A34, 0x6503, 0xD511, 0xF26C, 0x9461, 0x7962, 0x531A, 0xB074, 0xF3C1,
0xB55C, 0xDAC7, 0x4746, 0x3AE8, 0xDFB2, 0x04D9, 0x05F1, 0x1C88
};
// Data to be loaded into the Code RAM 2 memory space
unsigned short PT2001_code_RAM2[43] =
{
0x761B, 0x6F45, 0x838D, 0x80B4, 0x53F2, 0x0EBC, 0x8F2D, 0xA78E, 0xE8AB, 0xE3DB,
0xF477, 0x800F, 0x2336, 0x2F77, 0x267B, 0xBC19, 0x007E, 0x4E55, 0x28AA, 0x52E4,
0x40CF, 0x0AFD, 0x8B32, 0xFF03, 0x3D8E, 0x802E, 0x1340, 0x95D0, 0x1E86, 0x6591,
0xDBEB, 0x786D, 0xB2DF, 0xF4BF, 0xBEB2, 0xF1F4, 0x9E53, 0xE743, 0xE842, 0x3DD7,
0x3DA2, 0x4663, 0x03AF
};
// Data to be loaded into the Data RAM memory space
unsigned short PT2001_data_RAM[128] =
{
0x00C0, 0x0092, 0x0049, 0x003C, 0x1068, 0x003C, 0x0168, 0xEA60, 0x0960, 0x0258,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x00C1, 0x00BF, 0x002F, 0x001D, 0x0000, 0x0046,
0x0037, 0x003C, 0xEA60, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
};
// Data to be loaded into the Main register memory space
unsigned short PT2001_main_config[29] =
{
0x0003, 0x13FE, 0x0000, 0x1E00, 0x0000, 0x0000, 0x0001, 0x0000, 0x001F, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
};
// Data to be loaded into the CH1 register memory space
unsigned short PT2001_ch1_config[19] =
{
0x0008, 0x0000, 0x0000, 0x0000, 0x0B13, 0x0000, 0x0000, 0x006C, 0x6B59, 0xC8A5,
0x0000, 0x002C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
};
// Data to be loaded into the CH2 register memory space
unsigned short PT2001_ch2_config[19] =
{
0x0008, 0x0000, 0x0000, 0x0000, 0x0C00, 0x0000, 0x0000, 0x002B, 0x218C, 0xDCB6,
0x0000, 0x0014, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
};
// Data to be loaded into the IO register memory space
unsigned short PT2001_io_config[53] =
{
0x0000, 0x0000, 0x0000, 0x0000, 0x0063, 0x018C, 0x0800, 0x0410, 0x0041, 0x0098,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0041, 0x0041, 0x0041, 0x0000, 0x0004, 0x1000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x7F7F, 0x7F7F,
0x007F, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000
};
// Data to be loaded into the Diag register memory space
unsigned short PT2001_diag_config[44] =
{
0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000,
0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x001E, 0x0000,
0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000,
0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0001
};

60
firmware/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.h
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@ -1,60 +0,0 @@
/*******************************************************************************
* Example Code
*
* Copyright(C) 2022 NXP Semiconductors
* NXP Semiconductors Confidential and Proprietary
*
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* NXP products. This software is supplied "AS IS" without any warranties
* of any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights
* under any patent, copyright, mask work right, or any other intellectual
* property rights in or to any products. NXP Semiconductors reserves the
* right to make changes in the software without notification. NXP
* Semiconductors also makes no representation or warranty that such
* application will be suitable for the specified use without further testing
* or modification.
*
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided
* that it is used in conjunction with NXP Semiconductors devices. This
* copyright, permission, and disclaimer notice must appear in all copies
* of this code.
*******************************************************************************/
//==============================================================================
// This file contains data array declarations for the code RAM, data RAM and
// register arrays for the PT2001.
//==============================================================================
// ECU: IDE Project
// Project: rusefi
#ifndef PT2001_DATA_H_
#define PT2001_DATA_H_
extern unsigned short PT2001_code_RAM1[108]; // CODE RAM CH 1
extern unsigned short PT2001_code_RAM2[43]; // CODE RAM CH 2
extern unsigned short PT2001_data_RAM[128]; // DATA RAM
extern unsigned short PT2001_main_config[29]; // main configurations
extern unsigned short PT2001_ch1_config[19]; // CH 1 configurations
extern unsigned short PT2001_ch2_config[19]; // CH 2 configurations
extern unsigned short PT2001_io_config[53]; // IO configurations
extern unsigned short PT2001_diag_config[44]; // diag configurations
#endif /* PT2001_DATA_H_ */

72
firmware/hw_layer/mc33816/rusefi/sample_code/PT2001_dram.h
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@ -1,72 +0,0 @@
/*******************************************************************************
* Example Code
*
* Copyright(C) 2022 NXP Semiconductors
* NXP Semiconductors Confidential and Proprietary
*
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* NXP products. This software is supplied "AS IS" without any warranties
* of any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights
* under any patent, copyright, mask work right, or any other intellectual
* property rights in or to any products. NXP Semiconductors reserves the
* right to make changes in the software without notification. NXP
* Semiconductors also makes no representation or warranty that such
* application will be suitable for the specified use without further testing
* or modification.
*
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided
* that it is used in conjunction with NXP Semiconductors devices. This
* copyright, permission, and disclaimer notice must appear in all copies
* of this code.
*******************************************************************************/
/*
* PT2001_dram.h
*
* DRAM Header File
*
*/
#ifndef PT2001_DRAM_H_
#define PT2001_DRAM_H_
// DRAM 1 Parameter Addresses
#define PT2001_D1_Iboost 0x00
#define PT2001_D1_Ipeak 0x01
#define PT2001_D1_Ihold 0x02
#define PT2001_D1_Tpeak_off 0x03
#define PT2001_D1_Tpeak_tot 0x04
#define PT2001_D1_Tbypass 0x05
#define PT2001_D1_Thold_off 0x06
#define PT2001_D1_Thold_tot 0x07
#define PT2001_D1_Tboost_max 0x08
#define PT2001_D1_Tboost_min 0x09
// DRAM 2 Parameter Addresses
#define PT2001_D2_Vboost_high 0x40
#define PT2001_D2_Vboost_low 0x41
#define PT2001_D2_Isense4_high 0x42
#define PT2001_D2_Isense4_low 0x43
#define PT2001_D2_PCV_Ipeak 0x45
#define PT2001_D2_PCV_Ihold 0x46
#define PT2001_D2_PCV_Thold_off 0x47
#define PT2001_D2_PCV_Thold_tot 0x48
#endif /* PT2001_DRAM_H_ */

28
firmware/hw_layer/mc33816_memory_map.h
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@ -1,28 +0,0 @@
/**
* see mc33816/rusefi/readme.md
*/
#include "mc33816/rusefi/sample_code/PT2001_dram.h"
enum class MC33816Mem {
// see dram1.def values
Iboost = PT2001_D1_Iboost,
Ipeak = PT2001_D1_Ipeak,
Ihold = PT2001_D1_Ihold,
Tpeak_off = PT2001_D1_Tpeak_off,
Tpeak_tot = PT2001_D1_Tpeak_tot,
Tbypass = PT2001_D1_Tbypass,
Thold_off = PT2001_D1_Thold_off,
Thold_tot = PT2001_D1_Thold_tot,
Tboost_min = PT2001_D1_Tboost_min,
Tboost_max = PT2001_D1_Tboost_max,
// see dram2.def values, base 64 for channel 2
Vboost_high = PT2001_D2_Vboost_high,
Vboost_low = PT2001_D2_Vboost_low,
Isense4_high = PT2001_D2_Isense4_high,
Isense4_low = PT2001_D2_Isense4_low,
HPFP_Ipeak = PT2001_D2_PCV_Ipeak,
HPFP_Ihold = PT2001_D2_PCV_Ihold,
HPFP_Thold_off = PT2001_D2_PCV_Thold_off,
HPFP_Thold_tot = PT2001_D2_PCV_Thold_tot,
};

2
firmware/libfirmware

@ -1 +1 @@
Subproject commit 112b0ec76630fdcf33321262c028122feff0d1e4
Subproject commit 4e750bcacdef37eae3c12119850013fe4c83218a

1
firmware/pch/pch.h
View File

@ -23,6 +23,7 @@
#include <rusefi/interpolation.h>
#include <rusefi/isnan.h>
#include <rusefi/math.h>
#include <rusefi/pt2001.h>
#include "efifeatures.h"
#include "rusefi_generated.h"

1
simulator/Makefile
View File

@ -132,6 +132,7 @@ PROJECT_DIR = ../firmware
# Configure libfirmware Paths/Includes
RUSEFI_LIB = $(PROJECT_DIR)/libfirmware
include $(RUSEFI_LIB)/util/util.mk
include $(RUSEFI_LIB)/pt2001/pt2001.mk
# Licensing files.
include $(CHIBIOS)/os/license/license.mk

2
unit_tests/Makefile
View File

@ -16,10 +16,12 @@ include $(PROJECT_DIR)/common.mk
RUSEFI_LIB = $(PROJECT_DIR)/libfirmware
include $(RUSEFI_LIB)/util/util.mk
include $(RUSEFI_LIB)/pt2001/pt2001.mk
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC += $(ALLCSRC) \
$(RUSEFI_LIB_C) \
$(HW_LAYER_DRIVERS_CORE) \
$(TEST_SRC_C)