diff --git a/.github/workflows/build-firmware.yaml b/.github/workflows/build-firmware.yaml
index 01c7779c8b..d600461718 100644
--- a/.github/workflows/build-firmware.yaml
+++ b/.github/workflows/build-firmware.yaml
@@ -196,6 +196,10 @@ jobs:
folder: config/boards/core8
ini-file: fome_core8.ini
+ - build-target: core48
+ folder: config/boards/core48
+ ini-file: fome_core48.ini
+
# - build-target: 48way
# folder: config/boards/48way
# ini-file: fome_48way.ini
diff --git a/firmware/config/boards/48way/board_configuration.cpp b/firmware/config/boards/48way/board_configuration.cpp
deleted file mode 100755
index 757b3f3d9a..0000000000
--- a/firmware/config/boards/48way/board_configuration.cpp
+++ /dev/null
@@ -1,83 +0,0 @@
-/**
- * @file boards/48way/board_configuration.cpp
- *
- * @brief Configuration defaults for the 48way STM32 board
- *
- * @author Ben Brazdziunas, 2022
- */
-
-#include "pch.h"
-
-static void setInjectorPins() {
- engineConfiguration->injectionPins[0] = Gpio::E15;
- engineConfiguration->injectionPins[1] = Gpio::E14;
- engineConfiguration->injectionPins[2] = Gpio::E13;
- engineConfiguration->injectionPins[3] = Gpio::E12;
- engineConfiguration->injectionPins[4] = Gpio::E11;
- engineConfiguration->injectionPins[5] = Gpio::E10;
- engineConfiguration->injectionPins[6] = Gpio::E9;
- engineConfiguration->injectionPins[7] = Gpio::E8;
-}
-
-static void setIgnitionPins() {
- engineConfiguration->ignitionPins[0] = Gpio::D12;
- engineConfiguration->ignitionPins[1] = Gpio::D13;
- engineConfiguration->ignitionPins[2] = Gpio::B15;
- engineConfiguration->ignitionPins[3] = Gpio::B14;
- engineConfiguration->ignitionPins[4] = Gpio::D8;
- engineConfiguration->ignitionPins[5] = Gpio::D9;
- engineConfiguration->ignitionPins[6] = Gpio::D11;
- engineConfiguration->ignitionPins[7] = Gpio::D10;
-}
-
-static void setEtbConfig() {
-
-}
-
-static void setupVbatt() {
- // 5.6k high side/10k low side = 1.56 ratio divider
- engineConfiguration->analogInputDividerCoefficient = 1.56f;
-
- // 6.34k high side/ 1k low side
- engineConfiguration->vbattDividerCoeff = (6.34 + 1) / 1;
-
- // Battery sense on PA7
- engineConfiguration->vbattAdcChannel = EFI_ADC_0;
-
- engineConfiguration->adcVcc = 3.3f;
-}
-
-static void setStepperConfig() {
- engineConfiguration->idle.stepperDirectionPin = Gpio::C9;
- engineConfiguration->idle.stepperStepPin = Gpio::C8;
- engineConfiguration->stepperEnablePin = Gpio::A8;
-}
-
-Gpio getRunningLedPin() {
- return Gpio::C10;
-}
-
-void setBoardConfigOverrides() {
- setupVbatt();
- //setEtbConfig();
- setStepperConfig();
-
- engineConfiguration->clt.config.bias_resistor = 2490;
- engineConfiguration->iat.config.bias_resistor = 2490;
-
- //CAN 1 bus overwrites
- engineConfiguration->canRxPin = Gpio::D0;
- engineConfiguration->canTxPin = Gpio::D1;
-
- //CAN 2 bus overwrites
- engineConfiguration->can2RxPin = Gpio::B12;
- engineConfiguration->can2TxPin = Gpio::B13;
-}
-
-void setBoardDefaultConfiguration(void) {
- setInjectorPins();
- setIgnitionPins();
- engineConfiguration->isSdCardEnabled = false;
- engineConfiguration->canBaudRate = B500KBPS;
- engineConfiguration->can2BaudRate = B500KBPS;
-}
diff --git a/firmware/config/boards/48way/compile_48way.sh b/firmware/config/boards/48way/compile_48way.sh
deleted file mode 100755
index 624e0b6300..0000000000
--- a/firmware/config/boards/48way/compile_48way.sh
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/bash
-
-bash ../common_make.sh 48way ARCH_STM32F4
\ No newline at end of file
diff --git a/firmware/config/boards/48way/connectors/generated_ts_name_by_pin.cpp b/firmware/config/boards/48way/connectors/generated_ts_name_by_pin.cpp
deleted file mode 100755
index 7348143dd9..0000000000
--- a/firmware/config/boards/48way/connectors/generated_ts_name_by_pin.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-//DO NOT EDIT MANUALLY, let automation work hard.
-
-// auto-generated by PinoutLogic.java based on config/boards/48way/connectors/main.yaml
-#include "pch.h"
-
-// see comments at declaration in pin_repository.h
-const char * getBoardSpecificPinName(brain_pin_e brainPin) {
- switch(brainPin) {
- case Gpio::A1: return "TPS Reference Input (A1)";
- case Gpio::B14: return "Ignition 4 Output (B14)";
- case Gpio::B15: return "Ignition 3 Output (B15)";
- case Gpio::C13: return "CrankShaft Input (C13)";
- case Gpio::C6: return "Idle1 Output (C6)";
- case Gpio::C7: return "Boost Controller Output (C7)";
- case Gpio::D10: return "Ignition 8 Output (D10)";
- case Gpio::D11: return "Ignition 7 Output (D11)";
- case Gpio::D12: return "Ignition 1 Output (D12)";
- case Gpio::D13: return "Ignition 2 Output (D13)";
- case Gpio::D14: return "HC2 Output (D14)";
- case Gpio::D15: return "HC1 Output (D15)";
- case Gpio::D8: return "Ignition 5 Output (D8)";
- case Gpio::D9: return "Ignition 6 Output (D9)";
- case Gpio::E1: return "Clutch Input (E1)";
- case Gpio::E10: return "Injector 6 Output (E10)";
- case Gpio::E11: return "Injector 5 Output (E11)";
- case Gpio::E12: return "Injector 4 Output (E12)";
- case Gpio::E13: return "Injector 3 Output (E13)";
- case Gpio::E14: return "Injector 2 Output (E14)";
- case Gpio::E15: return "Injector 1 Output (E15)";
- case Gpio::E2: return "Fan Relay (E2)";
- case Gpio::E3: return "Fuel Relay (E3)";
- case Gpio::E4: return "Launch Control (E4)";
- case Gpio::E5: return "Tachometer (E5)";
- case Gpio::E6: return "Camshaft Input (E6)";
- case Gpio::E8: return "Injector 8 Output (E8)";
- case Gpio::E9: return "Injector 7 Output (E9)";
- default: return nullptr;
- }
- return nullptr;
-}
diff --git a/firmware/config/boards/48way/connectors/main.yaml b/firmware/config/boards/48way/connectors/main.yaml
deleted file mode 100755
index 70b68b82a7..0000000000
--- a/firmware/config/boards/48way/connectors/main.yaml
+++ /dev/null
@@ -1,112 +0,0 @@
-pins:
- - id: E2
- class: outputs
- ts_name: Fan Relay (E2)
- - id: E3
- class: outputs
- ts_name: Fuel Relay (E3)
- - id: E4
- class: switch_inputs
- ts_name: Launch Control (E4)
- - id: E5
- class: outputs
- ts_name: Tachometer (E5)
- - id: [E6, E6]
- class: [switch_inputs, event_inputs]
- ts_name: Camshaft Input (E6)
- - id: [C13, C13]
- class: [switch_inputs, event_inputs]
- ts_name: CrankShaft Input (C13)
- - id: EFI_ADC_0
- class: analog_inputs
- ts_name: Battery Reference Input (A0)
- - id: [A1, EFI_ADC_1]
- class: [switch_inputs, analog_inputs]
- ts_name: TPS Reference Input (A1)
- - id: EFI_ADC_2
- class: analog_inputs
- ts_name: CLT Reference Input (A2)
- - id: EFI_ADC_3
- class: analog_inputs
- ts_name: IAT Reference Input (A3)
- - id: EFI_ADC_4
- class: analog_inputs
- ts_name: O2 Reference Input (A4)
- - id: EFI_ADC_14
- class: analog_inputs
- ts_name: Fuel Pressure Reference Input (C4)
- - id: EFI_ADC_15
- class: analog_inputs
- ts_name: Oil Pressure Reference Input (C5)
- - id: EFI_ADC_8
- class: analog_inputs
- ts_name: MAP Pressure Reference Input (B0)
- - id: EFI_ADC_9
- class: analog_inputs
- ts_name: BARO Pressure Reference Input (B1)
- - id: E8
- class: outputs
- ts_name: Injector 8 Output (E8)
- - id: E9
- class: outputs
- ts_name: Injector 7 Output (E9)
- - id: E10
- class: outputs
- ts_name: Injector 6 Output (E10)
- - id: E11
- class: outputs
- ts_name: Injector 5 Output (E11)
- - id: E12
- class: outputs
- ts_name: Injector 4 Output (E12)
- - id: E13
- class: outputs
- ts_name: Injector 3 Output (E13)
- - id: E14
- class: outputs
- ts_name: Injector 2 Output (E14)
- - id: E15
- class: outputs
- ts_name: Injector 1 Output (E15)
- - id: E1
- class: switch_inputs
- ts_name: Clutch Input (E1)
- - id: C7
- class: outputs
- ts_name: Boost Controller Output (C7)
- - id: C6
- class: outputs
- ts_name: Idle1 Output (C6)
- - id: D15
- class: outputs
- ts_name: HC1 Output (D15)
- - id: D14
- class: outputs
- ts_name: HC2 Output (D14)
- - id: D13
- class: outputs
- ts_name: Ignition 2 Output (D13)
- - id: D12
- class: outputs
- ts_name: Ignition 1 Output (D12)
- - id: D11
- class: outputs
- ts_name: Ignition 7 Output (D11)
- - id: D10
- class: outputs
- ts_name: Ignition 8 Output (D10)
- - id: D9
- class: outputs
- ts_name: Ignition 6 Output (D9)
- - id: D8
- class: outputs
- ts_name: Ignition 5 Output (D8)
- - id: B15
- class: outputs
- ts_name: Ignition 3 Output (B15)
- - id: B14
- class: outputs
- ts_name: Ignition 4 Output (B14)
-
-info:
- directory: 48way
diff --git a/firmware/config/boards/core48/board.h b/firmware/config/boards/core48/board.h
new file mode 100644
index 0000000000..38adaa5057
--- /dev/null
+++ b/firmware/config/boards/core48/board.h
@@ -0,0 +1,1022 @@
+/**
+ * @file boards/core48/board.h
+ *
+ * @author Ben Brazdziunas, 2022
+ */
+
+#define BOARD_NAME "core48"
+
+#ifndef BOARD_IO_H
+#define BOARD_IO_H
+
+#undef EFI_RTC
+#define EFI_RTC FALSE
+
+#undef EFI_USB_SERIAL
+#define EFI_USB_SERIAL TRUE
+
+#undef EFI_USB_AF
+#define EFI_USB_AF 10U
+
+#undef EFI_USB_SERIAL_DM
+#define EFI_USB_SERIAL_DM Gpio::A11
+
+#undef EFI_USB_SERIAL_DP
+#define EFI_USB_SERIAL_DP Gpio::A12
+
+#undef STM32_SERIAL_USE_USART1
+#define STM32_SERIAL_USE_USART1 FALSE
+
+#undef STM32_UART_USE_USART1
+#define STM32_UART_USE_USART1 TRUE
+
+#undef TS_PRIMARY_UxART_PORT
+#define TS_PRIMARY_UxART_PORT UARTD1
+
+#undef SERIAL_SPEED
+#define SERIAL_SPEED 115200
+
+#undef EFI_CONSOLE_TX_BRAIN_PIN
+#define EFI_CONSOLE_TX_BRAIN_PIN Gpio::A9
+
+#undef EFI_CONSOLE_RX_BRAIN_PIN
+#define EFI_CONSOLE_RX_BRAIN_PIN Gpio::A10
+
+#undef EFI_BLUETOOTH_SETUP
+#define EFI_BLUETOOTH_SETUP FALSE
+
+#undef EFI_USE_OSC
+#define EFI_USE_OSC TRUE
+
+#undef EFI_CAN_SUPPORT
+#define EFI_CAN_SUPPORT TRUE
+
+#undef EFI_FILE_LOGGING
+#define EFI_FILE_LOGGING TRUE
+
+#undef EFI_MAX_31855
+#define EFI_MAX_31855 TRUE
+
+#undef EFI_ICU_INPUTS
+#define EFI_ICU_INPUTS FALSE
+
+#undef HAL_TRIGGER_USE_PAL
+#define HAL_TRIGGER_USE_PAL TRUE
+
+#undef EFI_LOGIC_ANALYZER
+#define EFI_LOGIC_ANALYZER FALSE
+
+#undef HAL_VSS_USE_PAL
+#define HAL_VSS_USE_PAL TRUE
+
+#undef LED_CRITICAL_ERROR_BRAIN_PIN
+#define LED_CRITICAL_ERROR_BRAIN_PIN Gpio::G12
+
+// Ignore USB VBUS pin (we're never a host, only a device)
+#define BOARD_OTG_NOVBUSSENS TRUE
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK 32768U
+#endif
+
+#define STM32_LSEDRV (3U << 3U)
+
+/*
+ * Board voltages.
+ * Required for performance limits calculation.
+ */
+#define STM32_VDD 300U
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
+#define PIN_ODR_LOW(n) (0U << (n))
+#define PIN_ODR_HIGH(n) (1U << (n))
+#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
+#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
+#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
+#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
+#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
+
+#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(0) | \
+ PIN_MODE_ANALOG(1) | \
+ PIN_MODE_ANALOG(2) | \
+ PIN_MODE_ANALOG(3) | \
+ PIN_MODE_ANALOG(4) | \
+ PIN_MODE_ANALOG(5) | \
+ PIN_MODE_ANALOG(6) | \
+ PIN_MODE_ANALOG(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_ALTERNATE(9) | \
+ PIN_MODE_ALTERNATE(10) | \
+ PIN_MODE_ALTERNATE(11) | \
+ PIN_MODE_ALTERNATE(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+
+#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(0) | \
+ PIN_PUPDR_FLOATING(1) | \
+ PIN_PUPDR_FLOATING(2) | \
+ PIN_PUPDR_FLOATING(3) | \
+ PIN_PUPDR_FLOATING(4) | \
+ PIN_PUPDR_FLOATING(5) | \
+ PIN_PUPDR_FLOATING(6) | \
+ PIN_PUPDR_FLOATING(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOA_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOA_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOA_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 7U) | \
+ PIN_AFIO_AF(10, 7U) | \
+ PIN_AFIO_AF(11, 10U) | \
+ PIN_AFIO_AF(12, 10U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOB setup:
+ */
+#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(0) | \
+ PIN_MODE_INPUT(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_ALTERNATE(5) | \
+ PIN_MODE_ALTERNATE(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_ALTERNATE(10) | \
+ PIN_MODE_ALTERNATE(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_ALTERNATE(13) | \
+ PIN_MODE_ALTERNATE(14) | \
+ PIN_MODE_ALTERNATE(15))
+#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_OPENDRAIN(10) | \
+ PIN_OTYPE_OPENDRAIN(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(0) | \
+ PIN_PUPDR_PULLDOWN(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_FLOATING(5) | \
+ PIN_PUPDR_FLOATING(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOB_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOB_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 9U) | \
+ PIN_AFIO_AF(6, 9U) | \
+ PIN_AFIO_AF(7, 0U))
+#define VAL_GPIOB_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 4U) | \
+ PIN_AFIO_AF(11, 4U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 5U) | \
+ PIN_AFIO_AF(14, 5U) | \
+ PIN_AFIO_AF(15, 5U))
+
+/*
+ * GPIOC setup:
+ */
+#define VAL_GPIOC_MODER (PIN_MODE_INPUT(0) | \
+ PIN_MODE_ANALOG(1) | \
+ PIN_MODE_ANALOG(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_ANALOG(4) | \
+ PIN_MODE_ANALOG(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_ALTERNATE(10) | \
+ PIN_MODE_ALTERNATE(11) | \
+ PIN_MODE_ALTERNATE(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN(0) | \
+ PIN_PUPDR_FLOATING(1) | \
+ PIN_PUPDR_FLOATING(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_FLOATING(8) | \
+ PIN_PUPDR_FLOATING(9) | \
+ PIN_PUPDR_FLOATING(10) | \
+ PIN_PUPDR_FLOATING(11) | \
+ PIN_PUPDR_FLOATING(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOC_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOC_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOC_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 6U) | \
+ PIN_AFIO_AF(11, 6U) | \
+ PIN_AFIO_AF(12, 6U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOD setup:
+ */
+
+#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(0) | \
+ PIN_MODE_ALTERNATE(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_INPUT(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_INPUT(10) | \
+ PIN_MODE_INPUT(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(0) | \
+ PIN_PUPDR_FLOATING(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOD_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOD_AFRL (PIN_AFIO_AF(0, 9U) | \
+ PIN_AFIO_AF(1, 9U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+#define VAL_GPIOD_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 0U) | \
+ PIN_AFIO_AF(11, 0U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOE setup:
+ */
+#define VAL_GPIOE_MODER (PIN_MODE_INPUT(0) | \
+ PIN_MODE_INPUT(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_INPUT(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_INPUT(10) | \
+ PIN_MODE_INPUT(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLDOWN(0) | \
+ PIN_PUPDR_PULLDOWN(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOE_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOE_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOE_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 0U) | \
+ PIN_AFIO_AF(11, 0U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOF setup:
+ */
+#define VAL_GPIOF_MODER (PIN_MODE_INPUT(0) | \
+ PIN_MODE_INPUT(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_INPUT(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_INPUT(10) | \
+ PIN_MODE_INPUT(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(0) | \
+ PIN_PUPDR_PULLDOWN(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOF_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOF_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOF_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 0U) | \
+ PIN_AFIO_AF(11, 0U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOG setup:
+ */
+#define VAL_GPIOG_MODER (PIN_MODE_INPUT(0) | \
+ PIN_MODE_INPUT(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_INPUT(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_ALTERNATE(9) | \
+ PIN_MODE_INPUT(10) | \
+ PIN_MODE_INPUT(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_ALTERNATE(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(0) | \
+ PIN_PUPDR_PULLDOWN(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOG_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOG_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOG_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 8U) | \
+ PIN_AFIO_AF(10, 0U) | \
+ PIN_AFIO_AF(11, 0U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 8U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOH setup:
+ */
+#define VAL_GPIOH_MODER (PIN_MODE_INPUT(0) | \
+ PIN_MODE_INPUT(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_INPUT(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_INPUT(10) | \
+ PIN_MODE_INPUT(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLDOWN(0) | \
+ PIN_PUPDR_PULLDOWN(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOH_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOH_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOH_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 0U) | \
+ PIN_AFIO_AF(11, 0U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+/*
+ * GPIOI setup:
+ */
+#define VAL_GPIOI_MODER (PIN_MODE_INPUT(0) | \
+ PIN_MODE_INPUT(1) | \
+ PIN_MODE_INPUT(2) | \
+ PIN_MODE_INPUT(3) | \
+ PIN_MODE_INPUT(4) | \
+ PIN_MODE_INPUT(5) | \
+ PIN_MODE_INPUT(6) | \
+ PIN_MODE_INPUT(7) | \
+ PIN_MODE_INPUT(8) | \
+ PIN_MODE_INPUT(9) | \
+ PIN_MODE_INPUT(10) | \
+ PIN_MODE_INPUT(11) | \
+ PIN_MODE_INPUT(12) | \
+ PIN_MODE_INPUT(13) | \
+ PIN_MODE_INPUT(14) | \
+ PIN_MODE_INPUT(15))
+#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(0) | \
+ PIN_OTYPE_PUSHPULL(1) | \
+ PIN_OTYPE_PUSHPULL(2) | \
+ PIN_OTYPE_PUSHPULL(3) | \
+ PIN_OTYPE_PUSHPULL(4) | \
+ PIN_OTYPE_PUSHPULL(5) | \
+ PIN_OTYPE_PUSHPULL(6) | \
+ PIN_OTYPE_PUSHPULL(7) | \
+ PIN_OTYPE_PUSHPULL(8) | \
+ PIN_OTYPE_PUSHPULL(9) | \
+ PIN_OTYPE_PUSHPULL(10) | \
+ PIN_OTYPE_PUSHPULL(11) | \
+ PIN_OTYPE_PUSHPULL(12) | \
+ PIN_OTYPE_PUSHPULL(13) | \
+ PIN_OTYPE_PUSHPULL(14) | \
+ PIN_OTYPE_PUSHPULL(15))
+#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(0) | \
+ PIN_OSPEED_HIGH(1) | \
+ PIN_OSPEED_HIGH(2) | \
+ PIN_OSPEED_HIGH(3) | \
+ PIN_OSPEED_HIGH(4) | \
+ PIN_OSPEED_HIGH(5) | \
+ PIN_OSPEED_HIGH(6) | \
+ PIN_OSPEED_HIGH(7) | \
+ PIN_OSPEED_HIGH(8) | \
+ PIN_OSPEED_HIGH(9) | \
+ PIN_OSPEED_HIGH(10) | \
+ PIN_OSPEED_HIGH(11) | \
+ PIN_OSPEED_HIGH(12) | \
+ PIN_OSPEED_HIGH(13) | \
+ PIN_OSPEED_HIGH(14) | \
+ PIN_OSPEED_HIGH(15))
+#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(0) | \
+ PIN_PUPDR_PULLDOWN(1) | \
+ PIN_PUPDR_PULLDOWN(2) | \
+ PIN_PUPDR_PULLDOWN(3) | \
+ PIN_PUPDR_PULLDOWN(4) | \
+ PIN_PUPDR_PULLDOWN(5) | \
+ PIN_PUPDR_PULLDOWN(6) | \
+ PIN_PUPDR_PULLDOWN(7) | \
+ PIN_PUPDR_PULLDOWN(8) | \
+ PIN_PUPDR_PULLDOWN(9) | \
+ PIN_PUPDR_PULLDOWN(10) | \
+ PIN_PUPDR_PULLDOWN(11) | \
+ PIN_PUPDR_PULLDOWN(12) | \
+ PIN_PUPDR_PULLDOWN(13) | \
+ PIN_PUPDR_PULLDOWN(14) | \
+ PIN_PUPDR_PULLDOWN(15))
+#define VAL_GPIOI_ODR (PIN_ODR_LOW(0) | \
+ PIN_ODR_LOW(1) | \
+ PIN_ODR_LOW(2) | \
+ PIN_ODR_LOW(3) | \
+ PIN_ODR_LOW(4) | \
+ PIN_ODR_LOW(5) | \
+ PIN_ODR_LOW(6) | \
+ PIN_ODR_LOW(7) | \
+ PIN_ODR_LOW(8) | \
+ PIN_ODR_LOW(9) | \
+ PIN_ODR_LOW(10) | \
+ PIN_ODR_LOW(11) | \
+ PIN_ODR_LOW(12) | \
+ PIN_ODR_LOW(13) | \
+ PIN_ODR_LOW(14) | \
+ PIN_ODR_LOW(15))
+#define VAL_GPIOI_AFRL (PIN_AFIO_AF(0, 0U) | \
+ PIN_AFIO_AF(1, 0U) | \
+ PIN_AFIO_AF(2, 0U) | \
+ PIN_AFIO_AF(3, 0U) | \
+ PIN_AFIO_AF(4, 0U) | \
+ PIN_AFIO_AF(5, 0U) | \
+ PIN_AFIO_AF(6, 0U) | \
+ PIN_AFIO_AF(7, 0U))
+
+#define VAL_GPIOI_AFRH (PIN_AFIO_AF(8, 0U) | \
+ PIN_AFIO_AF(9, 0U) | \
+ PIN_AFIO_AF(10, 0U) | \
+ PIN_AFIO_AF(11, 0U) | \
+ PIN_AFIO_AF(12, 0U) | \
+ PIN_AFIO_AF(13, 0U) | \
+ PIN_AFIO_AF(14, 0U) | \
+ PIN_AFIO_AF(15, 0U))
+
+#endif /* BOARD_IO_H */
\ No newline at end of file
diff --git a/firmware/config/boards/48way/board.mk b/firmware/config/boards/core48/board.mk
old mode 100755
new mode 100644
similarity index 56%
rename from firmware/config/boards/48way/board.mk
rename to firmware/config/boards/core48/board.mk
index 6ed79b7f18..e81bab2aea
--- a/firmware/config/boards/48way/board.mk
+++ b/firmware/config/boards/core48/board.mk
@@ -2,6 +2,7 @@
BOARDCPPSRC = $(BOARD_DIR)/board_configuration.cpp
# Override DEFAULT_ENGINE_TYPE
-DDEFS += -DSHORT_BOARD_NAME=48way
-DDEFS += -DFIRMWARE_ID=\"48way\"
+DDEFS += -DSHORT_BOARD_NAME=core48
+DDEFS += -DFIRMWARE_ID=\"core48\"
DDEFS += -DDEFAULT_ENGINE_TYPE=MINIMAL_PINS
+DDEFS += -DEFI_SOFTWARE_KNOCK=TRUE -DSTM32_ADC_USE_ADC3=TRUE
diff --git a/firmware/config/boards/core48/board_configuration.cpp b/firmware/config/boards/core48/board_configuration.cpp
new file mode 100644
index 0000000000..27162b0a3c
--- /dev/null
+++ b/firmware/config/boards/core48/board_configuration.cpp
@@ -0,0 +1,196 @@
+/**
+ * @file boards/core48/board_configuration.cpp
+ *
+ * @brief Configuration defaults for the core48 board
+ *
+ * @author Ben Brazdziunas, 2022
+ */
+
+#include "pch.h"
+
+static void setInjectorPins() {
+ engineConfiguration->injectionPinMode = OM_DEFAULT;
+
+ engineConfiguration->injectionPins[0] = Gpio::D6;
+ engineConfiguration->injectionPins[1] = Gpio::D7;
+ engineConfiguration->injectionPins[2] = Gpio::D8;
+ engineConfiguration->injectionPins[3] = Gpio::D9;
+ engineConfiguration->injectionPins[4] = Gpio::D10;
+ engineConfiguration->injectionPins[5] = Gpio::D11;
+ engineConfiguration->injectionPins[6] = Gpio::D12;
+ engineConfiguration->injectionPins[7] = Gpio::D13;
+}
+
+static void setIgnitionPins() {
+ engineConfiguration->ignitionPinMode = OM_DEFAULT;
+
+ engineConfiguration->ignitionPins[0] = Gpio::E15;
+ engineConfiguration->ignitionPins[1] = Gpio::E14;
+ engineConfiguration->ignitionPins[2] = Gpio::E13;
+ engineConfiguration->ignitionPins[3] = Gpio::E12;
+ engineConfiguration->ignitionPins[4] = Gpio::E11;
+ engineConfiguration->ignitionPins[5] = Gpio::E10;
+ engineConfiguration->ignitionPins[6] = Gpio::G8;
+ engineConfiguration->ignitionPins[7] = Gpio::G15;
+}
+
+
+// PE3 is error LED, configured in board.mk
+Gpio getCommsLedPin() {
+ return Gpio::G13;
+}
+
+Gpio getRunningLedPin() {
+ return Gpio::G10;
+}
+
+Gpio getWarningLedPin() {
+ return Gpio::G11;
+}
+
+static void setEtbConfig() {
+ // TLE9201 driver
+ // This chip has three control pins:
+ // DIR - sets direction of the motor
+ // PWM - pwm control (enable high, coast low)
+ // DIS - disables motor (enable low)
+
+ // Throttle #1
+ // PWM pin
+ engineConfiguration->etbIo[0].controlPin = Gpio::B8;
+ // DIR pin
+ engineConfiguration->etbIo[0].directionPin1 = Gpio::B9;
+ // Disable pin
+ engineConfiguration->etbIo[0].disablePin = Gpio::B7;
+ // Unused
+ engineConfiguration->etbIo[0].directionPin2 = Gpio::Unassigned;
+
+ // Throttle #2
+ // PWM pin
+ engineConfiguration->etbIo[1].controlPin = Gpio::Unassigned;
+ // DIR pin
+ engineConfiguration->etbIo[1].directionPin1 = Gpio::Unassigned;
+ // Disable pin
+ engineConfiguration->etbIo[1].disablePin = Gpio::Unassigned;
+ // Unused
+ engineConfiguration->etbIo[1].directionPin2 = Gpio::Unassigned;
+
+ // we only have pwm/dir, no dira/dirb
+ engineConfiguration->etb_use_two_wires = false;
+}
+
+static void
+setupVbatt() {
+ // 5.6k high side/10k low side = 1.56 ratio divider
+ engineConfiguration->analogInputDividerCoefficient = 1.56f;
+
+ // 6.34k high side/ 1k low side
+ engineConfiguration->vbattDividerCoeff = (6.34 + 1) / 1;
+
+ // Battery sense on PA7
+ engineConfiguration->vbattAdcChannel = EFI_ADC_9;
+
+ engineConfiguration->adcVcc = 3.3f;
+}
+
+static void setStepperConfig() {
+ engineConfiguration->idle.stepperDirectionPin = Gpio::A8;
+ engineConfiguration->idle.stepperStepPin = Gpio::C6;
+ engineConfiguration->stepperEnablePin = Gpio::C7;
+}
+
+static void setupSdCard() {
+
+ //SD CARD overwrites
+ engineConfiguration->sdCardSpiDevice = SPI_DEVICE_3;
+
+ engineConfiguration->is_enabled_spi_3 = true;
+ engineConfiguration->spi3sckPin = Gpio::C10;
+ engineConfiguration->spi3misoPin = Gpio::C11;
+ engineConfiguration->spi3mosiPin = Gpio::C12;
+}
+
+static void setupEGT() {
+
+ //EGT overwrites
+
+ engineConfiguration->spi2sckPin = Gpio::B13;
+ engineConfiguration->spi2misoPin = Gpio::B14;
+ engineConfiguration->spi2mosiPin = Gpio::B15;
+ engineConfiguration->is_enabled_spi_2 = true;
+
+ engineConfiguration->max31855spiDevice = SPI_DEVICE_2;
+ engineConfiguration->max31855_cs[0] = Gpio::C8;
+ engineConfiguration->max31855_cs[1] = Gpio::C9;
+}
+
+
+void setBoardConfigOverrides() {
+ setupVbatt();
+ setupSdCard();
+ setEtbConfig();
+ setStepperConfig();
+ setupEGT();
+
+ engineConfiguration->clt.config.bias_resistor = 2490;
+ engineConfiguration->iat.config.bias_resistor = 2490;
+
+ //SERIAL
+ engineConfiguration->binarySerialTxPin = Gpio::A9;
+ engineConfiguration->binarySerialRxPin = Gpio::A10;
+ engineConfiguration->tunerStudioSerialSpeed = SERIAL_SPEED;
+ engineConfiguration->uartConsoleSerialSpeed = SERIAL_SPEED;
+
+
+
+ //CAN 1 bus overwrites
+ engineConfiguration->canRxPin = Gpio::D0;
+ engineConfiguration->canTxPin = Gpio::D1;
+
+ //CAN 2 bus overwrites
+ engineConfiguration->can2RxPin = Gpio::B5;
+ engineConfiguration->can2TxPin = Gpio::B6;
+
+ //onboard lps22 barometer
+ engineConfiguration->lps25BaroSensorScl = Gpio::B10;
+ engineConfiguration->lps25BaroSensorSda = Gpio::B11;
+}
+
+static void setupDefaultSensorInputs() {
+
+ engineConfiguration->afr.hwChannel = EFI_ADC_13; //PC3
+ engineConfiguration->afr.hwChannel2 = EFI_ADC_0; //PA0
+ setEgoSensor(ES_14Point7_Free);
+
+ engineConfiguration->map.sensor.hwChannel = EFI_ADC_2; //PB0
+ engineConfiguration->map.sensor.type = MT_MPXH6400;
+
+ engineConfiguration->baroSensor.hwChannel = EFI_ADC_NONE;
+
+}
+
+
+void setBoardDefaultConfiguration(void) {
+ setInjectorPins();
+ setIgnitionPins();
+ setupDefaultSensorInputs();
+
+
+ engineConfiguration->canWriteEnabled = true;
+ engineConfiguration->canReadEnabled = true;
+ engineConfiguration->canSleepPeriodMs = 50;
+
+ engineConfiguration->canBaudRate = B500KBPS;
+ engineConfiguration->can2BaudRate = B500KBPS;
+
+ //ECU has two SD cards one fixed ine removable
+ engineConfiguration->sdCardCsPin = Gpio::B3;
+
+ strncpy(config->luaScript, R"(
+
+ function onTick()
+
+ end
+
+ )", efi::size(config->luaScript));
+}
\ No newline at end of file
diff --git a/firmware/config/boards/core48/compile_core48.bat b/firmware/config/boards/core48/compile_core48.bat
new file mode 100644
index 0000000000..849f21acb2
--- /dev/null
+++ b/firmware/config/boards/core48/compile_core48.bat
@@ -0,0 +1,3 @@
+@echo off
+
+bash.exe compile_core48.sh
diff --git a/firmware/config/boards/core48/compile_core48.sh b/firmware/config/boards/core48/compile_core48.sh
new file mode 100644
index 0000000000..1e3d8ca82d
--- /dev/null
+++ b/firmware/config/boards/core48/compile_core48.sh
@@ -0,0 +1,5 @@
+#!/bin/bash
+
+export USE_OPENBLT=yes
+
+bash ../common_make.sh core48 ARCH_STM32F4
diff --git a/firmware/config/boards/core48/connectors/black.yaml b/firmware/config/boards/core48/connectors/black.yaml
new file mode 100644
index 0000000000..b6405a3790
--- /dev/null
+++ b/firmware/config/boards/core48/connectors/black.yaml
@@ -0,0 +1,251 @@
+pins:
+ - pin: A1
+ function: FUEL PUMP
+ type: out_low
+ ts_name: Low Side 12 (G3)
+ pin_name: PG3
+
+ - pin: A2
+ function: FAN RELAY
+ type: out_low
+ ts_name: Low Side 13 (G4)
+ pin_name: PG4
+
+ - pin: A3
+ function: BOOST
+ type: out_low
+ ts_name: Low Side 14 (G5)
+ pin_name: PG5
+
+ - pin: A4
+ function: IDLE
+ type: out_low
+ ts_name: Low Side 15 (G6)
+ pin_name: PG6
+
+ - pin: A5
+ function: LSU HEATER-
+ alternative1: LSU 4.9 CONNECTOR PIN 3
+ alternative2: WHITE WIRE
+ type: lsu_heater-
+
+ - pin: A6
+ function: LSU IA
+ alternative1: LSU 4.9 CONNECTOR PIN 5
+ alternative2: GREEN WIRE
+ type: lsu_ia
+
+ - pin: A7
+ function: LSU VGND
+ alternative1: LSU 4.9 CONNECTOR PIN 2
+ alternative2: YELLOW WIRE
+ type: lsu_vgnd
+
+ - pin: A8
+ function: LSU HEATER+
+ alternative1: LSU 4.9 CONNECTOR PIN 4
+ alternative2: GREY WIRE
+ type: lsu_heater+
+
+ - pin: B1
+ function: DBW+
+ alternative1: Low Side 11 (G2)
+ type: switch
+ ts_name: Switch SW5
+
+ - pin: B2
+ function: CAN LOW
+ alternative1: Digital Input 1 (D5)
+ alternative2: USB D+
+ type: switch
+ ts_name: Switch SW4
+
+ - pin: B3
+ function: CAN HIGH
+ alternative1: Digital Input 2 (D4)
+ alternative2: USB D-
+ type: switch
+ ts_name: Switch SW3
+
+ - pin: B4
+ function: Digital Input 4 (D2)
+ alternative1: Analogue Input 8 (A4)
+ alternative2: Knock 1 (C0)
+ type: switch
+ ts_name: Switch SW2
+
+ - pin: B5
+ function: Digital Input 3 (D3)
+ alternative1: Analogue Input 9 (A1)
+ alternative2: Knock 2 (C1)
+ type: switch
+ ts_name: Switch SW1
+
+ - pin: B6
+ function: LSU NERMEST
+ alternative1: LSU 4.9 CONNECTOR PIN 6
+ alternative2: BLACK WIRE
+ type: lsu_nermest
+
+ - pin: B7
+ function: LSU IP
+ alternative1: LSU 4.9 CONNECTOR PIN 1
+ alternative2: RED WIRE
+ type: lsu_ip
+
+ - pin: B8
+ function: +12V Battery
+ type: 12v
+ ts_name: +12V from Battery
+
+ - pin: C1
+ function: DBW-
+ alternative1: Low Side 10 (D15)
+ type: switch
+ ts_name: Switch SW6
+
+ - pin: C2
+ function: VR1+
+ alternative1: HALL 1 (PG1)
+ type: in_trigger
+ ts_name: VR1+
+ pin_name: PE2
+
+ - pin: C3
+ function: VR1-
+ alternative1: HALL 2 (PE7)
+ type: in_trigger
+ ts_name: VR1-
+
+
+ - pin: C4
+ function: VR2-
+ alternative1: HALL 4 (PE8)
+ type: in_trigger
+ ts_name: VR2-
+
+
+ - pin: C5
+ function: VR2+
+ alternative1: HALL 3 (PE9)
+ type: in_trigger
+ ts_name: VR2+
+ pin_name: PE3
+
+ - pin: C6
+ function: VVTI
+ type: out_low
+ ts_name: Low Side 16 (G7)
+ pin_name: PG7
+
+ - pin: C7
+ function: Sensor +5v
+ type: 5v
+ ts_name: Sensor +5v Supply
+
+ - pin: C8
+ function: Ground
+ type: gnd
+ ts_name: Ground
+
+info:
+ title: pinout
+ name: BLACK CONNECTOR
+ image:
+ file: main.jpg
+ pins:
+ - pin: A1
+ x: 560
+ y: 182
+
+ - pin: A2
+ x: 584
+ y: 182
+
+ - pin: A3
+ x: 608
+ y: 182
+
+ - pin: A4
+ x: 632
+ y: 182
+
+ - pin: A5
+ x: 656
+ y: 182
+
+ - pin: A6
+ x: 680
+ y: 182
+
+ - pin: A7
+ x: 704
+ y: 182
+
+ - pin: A8
+ x: 728
+ y: 182
+
+ - pin: B1
+ x: 560
+ y: 146
+
+ - pin: B2
+ x: 584
+ y: 146
+
+ - pin: B3
+ x: 608
+ y: 146
+
+ - pin: B4
+ x: 632
+ y: 146
+
+ - pin: B5
+ x: 656
+ y: 146
+
+ - pin: B6
+ x: 680
+ y: 146
+
+ - pin: B7
+ x: 704
+ y: 146
+
+ - pin: B8
+ x: 728
+ y: 146
+
+ - pin: C1
+ x: 560
+ y: 110
+
+ - pin: C2
+ x: 584
+ y: 110
+
+ - pin: C3
+ x: 608
+ y: 110
+
+ - pin: C4
+ x: 632
+ y: 110
+
+ - pin: C5
+ x: 656
+ y: 110
+
+ - pin: C6
+ x: 680
+ y: 110
+
+ - pin: C7
+ x: 704
+ y: 110
+
+ - pin: C8
+ x: 728
+ y: 110
\ No newline at end of file
diff --git a/firmware/config/boards/core48/connectors/grey.yaml b/firmware/config/boards/core48/connectors/grey.yaml
new file mode 100644
index 0000000000..93285a2d85
--- /dev/null
+++ b/firmware/config/boards/core48/connectors/grey.yaml
@@ -0,0 +1,257 @@
+pins:
+ - pin: A1
+ function: INJECTOR 1
+ type: out_low
+ ts_name: Low Side 1 (D6)
+ pin_name: PD6
+
+ - pin: A2
+ function: INJECTOR 2
+ type: out_low
+ ts_name: Low Side 2 (D7)
+ pin_name: PD7
+
+ - pin: A3
+ function: INJECTOR 3
+ type: out_low
+ ts_name: Low Side 3 (D8)
+ pin_name: PD8
+
+ - pin: A4
+ function: INJECTOR 4
+ type: out_low
+ ts_name: Low Side 4 (D9)
+ pin_name: PD9
+
+ - pin: A5
+ function: INJECTOR 5
+ type: out_low
+ ts_name: Low Side 5 (D10)
+ pin_name: PD10
+
+ - pin: A6
+ function: INJECTOR 6
+ type: out_low
+ ts_name: Low Side 6 (D11)
+ pin_name: PD11
+
+ - pin: A7
+ function: INJECTOR 7
+ type: out_low
+ ts_name: Low Side 7 (D12)
+ pin_name: PD12
+
+ - pin: A8
+ function: INJECTOR 8
+ type: out_low
+ ts_name: Low Side 8 (D13)
+ pin_name: PD13
+
+ - pin: B1
+ function: COIL 1
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 1 (G15)
+ pin_name: PG15
+
+ - pin: B2
+ function: COIL 2
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 2 (G8)
+ pin_name: PG8
+
+ - pin: B3
+ function: COIL 3
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 3 (E10)
+ pin_name: PE10
+
+ - pin: B4
+ function: COIL 4
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 4 (E11)
+ pin_name: PE11
+
+ - pin: B5
+ function: COIL 5
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 5 (E12)
+ pin_name: PE12
+
+ - pin: B6
+ function: COIL 6
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 6 (E13)
+ pin_name: PE13
+
+ - pin: B7
+ function: COIL 7
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 7 (E14)
+ pin_name: PE14
+
+ - pin: B8
+ function: COIL 8
+ alternative1: +5v or +12v signal depends on selection
+ type: out_high
+ ts_name: High Side 8 (E15)
+ pin_name: PE15
+
+ - pin: C1
+ function: TPS
+ type: in_adc
+ ts_name: Analog Inputs 1 (C5)
+ pin_name: PC5
+
+ - pin: C2
+ function: CLT
+ alternative1: turn SW10 B0 ON to enable 2.49k PULL UP
+ type: in_adc
+ ts_name: Analog Inputs 2 (B0)
+ pin_name: PB0
+
+ - pin: C3
+ function: IAT
+ alternative1: turn SW10 A7 ON to enable 2.49k PULL UP
+ type: in_adc
+ ts_name: Analog Inputs 3 (A7)
+ pin_name: PA7
+
+ - pin: C4
+ function: OIL PRESSURE
+ type: in_adc
+ ts_name: Analog Inputs 4 (C4)
+ pin_name: PC4
+
+ - pin: C5
+ function: FUEL PRESSURE
+ type: in_adc
+ ts_name: Analog Inputs 5 (A5)
+ pin_name: PA5
+
+ - pin: C6
+ function: SPARE ANALOG INPUT
+ type: in_adc
+ ts_name: Analog Inputs 6 (A6)
+ pin_name: PA6
+
+ - pin: C7
+ function: SPARE ANALOG INPUT
+ type: in_adc
+ ts_name: Analog Inputs 7 (A3)
+ pin_name: PA3
+
+ - pin: C8
+ function: TACHO
+ alternative1: PULL UP to +5v or +12v depends on selection
+ type: out_low
+ ts_name: High Side 9 (D14)
+ pin_name: PD14
+
+info:
+ title: pinout
+ name: GREY CONNECTOR
+ image:
+ file: main.jpg
+ pins:
+ - pin: A1
+ x: 192
+ y: 182
+
+ - pin: A2
+ x: 216
+ y: 182
+
+ - pin: A3
+ x: 240
+ y: 182
+
+ - pin: A4
+ x: 264
+ y: 182
+
+ - pin: A5
+ x: 288
+ y: 182
+
+ - pin: A6
+ x: 312
+ y: 182
+
+ - pin: A7
+ x: 336
+ y: 182
+
+ - pin: A8
+ x: 360
+ y: 182
+
+ - pin: B1
+ x: 192
+ y: 146
+
+ - pin: B2
+ x: 216
+ y: 146
+
+ - pin: B3
+ x: 240
+ y: 146
+
+ - pin: B4
+ x: 264
+ y: 146
+
+ - pin: B5
+ x: 288
+ y: 146
+
+ - pin: B6
+ x: 312
+ y: 146
+
+ - pin: B7
+ x: 336
+ y: 146
+
+ - pin: B8
+ x: 360
+ y: 146
+
+ - pin: C1
+ x: 192
+ y: 110
+
+ - pin: C2
+ x: 216
+ y: 110
+
+ - pin: C3
+ x: 240
+ y: 110
+
+ - pin: C4
+ x: 264
+ y: 110
+
+ - pin: C5
+ x: 288
+ y: 110
+
+ - pin: C6
+ x: 312
+ y: 110
+
+ - pin: C7
+ x: 336
+ y: 110
+
+ - pin: C8
+ x: 360
+ y: 110
\ No newline at end of file
diff --git a/firmware/config/boards/core48/connectors/main.jpg b/firmware/config/boards/core48/connectors/main.jpg
new file mode 100644
index 0000000000..27ccb20fa2
Binary files /dev/null and b/firmware/config/boards/core48/connectors/main.jpg differ
diff --git a/firmware/config/boards/core48/connectors/main.yaml b/firmware/config/boards/core48/connectors/main.yaml
new file mode 100644
index 0000000000..e30c8c8054
--- /dev/null
+++ b/firmware/config/boards/core48/connectors/main.yaml
@@ -0,0 +1,360 @@
+pins:
+ - function: Power Ground
+ type: gnd
+ color: black
+
+ - function: +12V
+ type: 12v
+ color: red
+
+ - id: D6
+ class: outputs
+ ts_name: Low Side 1 (D6)
+
+ - id: D7
+ class: outputs
+ ts_name: Low Side 2 (D7)
+
+ - id: D8
+ class: outputs
+ ts_name: Low Side 3 (D8)
+
+ - id: D9
+ class: outputs
+ ts_name: Low Side 4 (D9)
+
+ - id: D10
+ class: outputs
+ ts_name: Low Side 5 (D10)
+
+ - id: D11
+ class: outputs
+ ts_name: Low Side 6 (D11)
+
+ - id: D12
+ class: outputs
+ ts_name: Low Side 7 (D12)
+
+ - id: D13
+ class: outputs
+ ts_name: Low Side 8 (D13)
+
+ - id: D14
+ class: outputs
+ function: Tachometer Output
+ ts_name: Low Side 9 (D14)
+
+ - id: D15
+ class: outputs
+ ts_name: Low Side 10 (D15)
+
+ - id: G2
+ class: outputs
+ ts_name: Low Side 11 (G2)
+
+ - id: G3
+ class: outputs
+ ts_name: Low Side 12 (G3)
+
+ - id: G4
+ class: outputs
+ ts_name: Low Side 13 (G4)
+
+ - id: G5
+ class: outputs
+ ts_name: Low Side 14 (G5)
+
+ - id: G6
+ class: outputs
+ ts_name: Low Side 15 (G6)
+
+ - id: G7
+ class: outputs
+ ts_name: Low Side 16 (G7)
+
+ - id: E15
+ class: outputs
+ type: ign
+ ts_name: High Side 1 (E15)
+
+ - id: E14
+ class: outputs
+ type: ign
+ ts_name: High Side 2 (E14)
+
+ - id: E13
+ class: outputs
+ type: ign
+ ts_name: High Side 3 (E13)
+
+ - id: E12
+ class: outputs
+ type: ign
+ ts_name: High Side 4 (E12)
+
+ - id: E11
+ class: outputs
+ type: ign
+ ts_name: High Side 5 (E11)
+
+ - id: E10
+ class: outputs
+ type: ign
+ ts_name: High Side 6 (E10)
+
+ - id: G8
+ class: outputs
+ type: ign
+ ts_name: High Side 7 (G8)
+
+ - id: G15
+ class: outputs
+ type: ign
+ ts_name: High Side 8 (G15)
+
+ - id: A8
+ class: outputs
+ ts_name: Stepper Direction (A8)
+
+ - id: C6
+ class: outputs
+ ts_name: Stepper Control (C6)
+
+ - id: C7
+ class: outputs
+ ts_name: Stepper Disable (C7)
+
+ - id: B7
+ class: outputs
+ ts_name: DBW Disable (B7)
+
+ - id: B8
+ class: outputs
+ ts_name: DBW Control (B8)
+
+ - id: B9
+ class: outputs
+ ts_name: DBW Direction (B9)
+
+ - id: EFI_ADC_9
+ class: analog_inputs
+ ts_name: On-board Battery Sense (B1)
+
+ - id: EFI_ADC_15
+ class: analog_inputs
+ ts_name: Analog Inputs 1 (C5)
+
+ - id: EFI_ADC_8
+ class: analog_inputs
+ ts_name: Analog Inputs 2 (B0)
+
+ - id: EFI_ADC_7
+ class: analog_inputs
+ ts_name: Analog Inputs 3 (A7)
+
+ - id: EFI_ADC_14
+ class: analog_inputs
+ ts_name: Analog Inputs 4 (C4)
+
+ - id: EFI_ADC_5
+ class: analog_inputs
+ ts_name: Analog Inputs 5 (A5)
+
+ - id: EFI_ADC_6
+ class: analog_inputs
+ ts_name: Analog Inputs 6 (A6)
+
+ - id: EFI_ADC_3
+ class: analog_inputs
+ ts_name: Analog Inputs 7 (A3)
+
+ - id: EFI_ADC_2
+ class: analog_inputs
+ function: MAP Sensor Input
+ ts_name: On-board MAP (A2)
+
+ - id: EFI_ADC_13
+ class: analog_inputs
+ function: O2 Sensor Input
+ ts_name: Primary On-board O2 (C3)
+
+ - id: EFI_ADC_0
+ class: analog_inputs
+ function: O2 Sensor Input
+ ts_name: Secondary On-board O2 (A0)
+
+ - id: EFI_ADC_4
+ class: analog_inputs
+ ts_name: Analog Inputs 8 (A4)
+
+ - id: EFI_ADC_1
+ class: analog_inputs
+ ts_name: Analog Inputs 9 (A1)
+
+ - id: EFI_ADC_10
+ class: analog_inputs
+ ts_name: Analog Inputs Knock 1 (C0)
+
+ - id: EFI_ADC_11
+ class: analog_inputs
+ ts_name: Analog Inputs Knock 2 (C1)
+
+ - id: [E2, E2]
+ class: [switch_inputs, event_inputs]
+ ts_name: VR1 (E2)
+
+ - id: [E3, E3]
+ class: [switch_inputs, event_inputs]
+ ts_name: VR2 (E3)
+
+ - id: [E4, E4]
+ class: [switch_inputs, event_inputs]
+ ts_name: VR3 (E4)
+
+ - id: [E5, E5]
+ class: [switch_inputs, event_inputs]
+ ts_name: VR4 (E5)
+
+ - id: [G1, G1]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall1 (G1)
+
+ - id: [E7, E7]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall2 (E7)
+
+ - id: [E9, E9]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall3 (E9)
+
+ - id: [E8, E8]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall4 (E8)
+
+ - id: [F13, F13]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall5 (F13)
+
+ - id: [F14, F14]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall6 (F14)
+
+ - id: [G0, G0]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall7 (G0)
+
+ - id: [F15, F15]
+ class: [switch_inputs, event_inputs]
+ ts_name: Hall8 (F15)
+
+ - id: [D4, D4]
+ class: [switch_inputs, event_inputs]
+ ts_name: Digital Input 1 (D4)
+
+ - id: [D5, D5]
+ class: [switch_inputs, event_inputs]
+ ts_name: Digital Input 2 (D5)
+
+ - id: [D2, D2]
+ class: [switch_inputs, event_inputs]
+ ts_name: Digital Input 3 (D2)
+
+ - id: [D3, D3]
+ class: [switch_inputs, event_inputs]
+ ts_name: Digital Input 4 (D3)
+
+ - id: G10
+ class: outputs
+ ts_name: Running LED (G10)
+
+ - id: G11
+ class: outputs
+ ts_name: Warning LED (G11)
+
+ - id: G12
+ class: outputs
+ ts_name: Error LED (G12)
+
+ - id: G13
+ class: outputs
+ ts_name: Communication LED (G13)
+
+ - id: C8
+ class: outputs
+ ts_name: EGT1 CS (C8)
+
+ - id: C9
+ class: outputs
+ ts_name: EGT2 CS (C9)
+
+ - id: C10
+ class: outputs
+ ts_name: SPI3 SCK (C10)
+
+ - id: C11
+ class: outputs
+ ts_name: SPI3 MISO (C11)
+
+ - id: C12
+ class: outputs
+ ts_name: SPI3 MOSI (C12)
+
+ - id: B13
+ class: outputs
+ ts_name: SPI2 SCK (B13)
+
+ - id: B14
+ class: outputs
+ ts_name: SPI2 MISO (B14)
+
+ - id: B15
+ class: outputs
+ ts_name: SPI2 MOSI (B15)
+
+ - id: B10
+ class: outputs
+ ts_name: BARO SCL (B10)
+
+ - id: B11
+ class: outputs
+ ts_name: BARO SDA (B11)
+
+ - id: B3
+ class: outputs
+ ts_name: SD CS1 (B3)
+
+ - id: B4
+ class: outputs
+ ts_name: SD CS2 (B4)
+
+ - id: A9
+ class: outputs
+ ts_name: USART1 TX (A9)
+
+ - id: A10
+ class: outputs
+ ts_name: USART1 RX (A10)
+
+ - id: G9
+ class: outputs
+ ts_name: USART6 RX (G9)
+
+ - id: G14
+ class: outputs
+ ts_name: USART6 TX (G14)
+
+ - id: D0
+ class: outputs
+ ts_name: CAN 1 RX (D0)
+
+ - id: D1
+ class: outputs
+ ts_name: CAN 1 TX (D1)
+
+ - id: B5
+ class: outputs
+ ts_name: CAN 2 RX (B5)
+
+ - id: B6
+ class: outputs
+ ts_name: CAN 2 TX (B6)
\ No newline at end of file
diff --git a/firmware/config/boards/core48/connectors/readme.md b/firmware/config/boards/core48/connectors/readme.md
new file mode 100644
index 0000000000..0494aa0247
--- /dev/null
+++ b/firmware/config/boards/core48/connectors/readme.md
@@ -0,0 +1,256 @@
+
+
+# CORE 48 v2.1
+
+
+
+## Features
+
+- 8 Injectors
+- 8 Coils
+- 8 Low Side Switch
+- 4 VR / 8 Hall Triggers
+- 4 Digital Inputs
+- 8 Analogue 0-5v inputs (all can be used as temperature inputs via 2.49k pull up resistor SW10 and SW11)
+- DBW
+- 2 Wideband (14point7)
+- 2 Canbus
+- 2 EGT
+- 4bar map
+- Onboard Barometer
+- Onboard SD card/Removable SD Card
+- Bluetooth
+
+## Firmware
+
+
+
+
+ 
+
+
+
GPL open-source ECU
+
+