diff --git a/firmware/hw_layer/ports/kinetis/kinetis_common.cpp b/firmware/hw_layer/ports/kinetis/kinetis_common.cpp
index 54c3ac0df9..a7e14c629e 100644
--- a/firmware/hw_layer/ports/kinetis/kinetis_common.cpp
+++ b/firmware/hw_layer/ports/kinetis/kinetis_common.cpp
@@ -10,10 +10,6 @@
 #include "engine.h"
 #include "pin_repository.h"
 
-extern ioportid_t PORTS[];
-
-ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE};
-
 #if HAL_USE_ADC || defined(__DOXYGEN__)
 
 // ADC_CHANNEL_IN0 // PA2   (def=VIGN)
diff --git a/firmware/hw_layer/ports/kinetis/kinetis_pins.cpp b/firmware/hw_layer/ports/kinetis/kinetis_pins.cpp
index 4748a63445..b9bfce2d37 100644
--- a/firmware/hw_layer/ports/kinetis/kinetis_pins.cpp
+++ b/firmware/hw_layer/ports/kinetis/kinetis_pins.cpp
@@ -20,10 +20,7 @@ static ioportid_t ports[] = {GPIOA,
 		GPIOB,
 		GPIOC,
 		GPIOD,
-		GPIOE,
-		nullptr,
-		nullptr,
-		nullptr,
+		GPIOE
 };
 
 #define PIN_REPO_SIZE (sizeof(ports) / sizeof(ports[0])) * PORT_SIZE
@@ -33,8 +30,6 @@ static const char *PIN_USED[PIN_REPO_SIZE + BOARD_EXT_PINREPOPINS];
 #include "pin_repository.h"
 #include "io_pins.h"
 
-extern ioportid_t PORTS[];
-
 /**
  * @deprecated - use hwPortname() instead
  */
@@ -88,7 +83,7 @@ ioportid_t getHwPort(const char *msg, brain_pin_e brainPin) {
 		firmwareError(CUSTOM_ERR_INVALID_PIN, "%s: Invalid brain_pin_e: %d", msg, brainPin);
 		return GPIO_NULL;
 	}
-	return PORTS[(brainPin - GPIOA_0) / PORT_SIZE];
+	return ports[(brainPin - GPIOA_0) / PORT_SIZE];
 }
 
 /**
diff --git a/firmware/hw_layer/ports/stm32/stm32_common.cpp b/firmware/hw_layer/ports/stm32/stm32_common.cpp
index dd7f93af9e..6f9439ab2f 100644
--- a/firmware/hw_layer/ports/stm32/stm32_common.cpp
+++ b/firmware/hw_layer/ports/stm32/stm32_common.cpp
@@ -17,12 +17,6 @@
 #if EFI_PROD_CODE
 #include "mpu_util.h"
 #include "backup_ram.h"
-extern ioportid_t PORTS[];
-#if defined(STM32F4XX) || defined(STM32F7XX)
-ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH };
-#else
-ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOF};
-#endif /* defined(STM32F4XX) || defined(STM32F7XX) */
 #endif /* EFI_PROD_CODE */
 
 #if HAL_USE_ADC
diff --git a/firmware/hw_layer/ports/stm32/stm32_pins.cpp b/firmware/hw_layer/ports/stm32/stm32_pins.cpp
index a93e4c42c8..4c3ac89a71 100644
--- a/firmware/hw_layer/ports/stm32/stm32_pins.cpp
+++ b/firmware/hw_layer/ports/stm32/stm32_pins.cpp
@@ -47,9 +47,6 @@ static ioportid_t ports[] = {GPIOA,
 // todo: move this into PinRepository class
 static const char *PIN_USED[PIN_REPO_SIZE + BOARD_EXT_PINREPOPINS];
 
-
-extern ioportid_t PORTS[];
-
 /**
  * @deprecated - use hwPortname() instead
  */
@@ -131,7 +128,7 @@ ioportid_t getHwPort(const char *msg, brain_pin_e brainPin) {
 		firmwareError(CUSTOM_ERR_INVALID_PIN, "%s: Invalid brain_pin_e: %d", msg, brainPin);
 		return GPIO_NULL;
 	}
-	return PORTS[(brainPin - GPIOA_0) / PORT_SIZE];
+	return ports[(brainPin - GPIOA_0) / PORT_SIZE];
 }
 
 /**