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qspi flash updates (#3169) 

* ChibiOS QSPI updates

* board: subaru: speed up NOR flash

* QSPI: add fast read commands
This commit is contained in:
Andrey G 2021-08-17 11:06:37 +03:00 committed by GitHub
parent 8f82e94801
commit bd7c73c109
6 changed files with 18 additions and 3 deletions
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2
firmware/ChibiOS

@ -1 +1 @@
Subproject commit 948b015c9c491295d088d0db4b209b3a37b1a524
Subproject commit 8c8b39d8ac972a18bfbb330cd6637fe040721a39

4
firmware/config/boards/subaru_eg33/halconf.h
View File

@ -15,6 +15,10 @@
#define HAL_USE_WSPI TRUE
#define SNOR_SHARED_BUS FALSE
#define WSPI_USE_MUTUAL_EXCLUSION FALSE
#include "../../../hw_layer/ports/stm32/stm32f7/cfg/halconf.h"
#endif /* _HALCONF_SUBARUEG33_H_ */

6
firmware/config/boards/subaru_eg33/mcuconf.h
View File

@ -82,6 +82,10 @@
#define STM32_WSPI_USE_QUADSPI1 TRUE
#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define JEDEC_BUS_MODE JEDEC_BUS_MODE_WSPI4L
#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 40
/* QSPI is clocked from AHB clock, which is 216 MHz max
* Maximum CLK rate for SST26VF is 104/80MHz for Fast Read and
* Page program
* 216 / 3 = 72 MHz */
#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 3
#endif /* _MCUCONF_SUBARUEG33_H_ */

4
firmware/controllers/flash_main.cpp
View File

@ -334,6 +334,10 @@ void initFlash() {
#if EFI_STORAGE_EXT_SNOR == TRUE
mfs_error_t err;
#if SNOR_SHARED_BUS == FALSE
wspiStart(&WSPID1, &WSPIcfg1);
#endif
/* Initializing and starting snor1 driver.*/
snorObjectInit(&snor1);
snorStart(&snor1, &snorcfg1);

2
firmware/hw_layer/drivers/flash/hal_flash_device.c
View File

@ -379,7 +379,7 @@ void snor_device_init(SNORDriver *devp) {
WSPI_CFG_CMD_MODE_ONE_LINE | WSPI_CFG_CMD_SIZE_8 |
WSPI_CFG_ADDR_MODE_ONE_LINE |
WSPI_CFG_DATA_MODE_ONE_LINE,
JEDEC_CMD_READ, 0, 0);
JEDEC_CMD_FAST_READ, 0, 0);
}
/* TODO: get from SFDP */

3
firmware/hw_layer/drivers/flash/hal_flash_device.h
View File

@ -51,10 +51,13 @@
#define JEDEC_CMD_WRITE_DISABLE 0x04
#define JEDEC_CMD_READ_STATUS_REGISTER 0x05
#define JEDEC_CMD_WRITE_ENABLE 0x06
#define JEDEC_CMD_FAST_READ 0x0B
#define JEDEC_CMD_SUBSECTOR_ERASE 0x20
#define JEDEC_CMD_READ_CONFIGURATION_REGISTER 0x35
#define JEDEC_CMD_READ_DUAL 0x3B
#define JEDEC_CMD_BULK_ERASE 0xC7
#define JEDEC_CMD_RESET_ENABLE 0x66
#define JEDEC_CMD_READ_QUAD 0x6B
#define JEDEC_CMD_GLOBAL_BLOCK_PROTECTION_UNLOCK 0x98
#define JEDEC_CMD_RESET_MEMORY 0x99
/** @} */