From d218b4e8e6ed3f541630120cee56fcebaba96aed Mon Sep 17 00:00:00 2001 From: dron0gus Date: Mon, 6 Jan 2020 16:44:23 +0300 Subject: [PATCH] Spi fixes (#1083) * spi: add support for SPI4 * mpu_util: spi: add 8BIT mode definitions for F4, F7 and kineris (?) --- firmware/controllers/settings.cpp | 7 ++++-- firmware/hw_layer/hardware.cpp | 6 +++++ firmware/hw_layer/hip9011.cpp | 23 ++++++++++++------- firmware/hw_layer/ports/kinetis/mpu_util.h | 3 +++ .../hw_layer/ports/stm32/stm32f4/mpu_util.cpp | 7 ++++++ .../hw_layer/ports/stm32/stm32f4/mpu_util.h | 3 +++ .../hw_layer/ports/stm32/stm32f7/mpu_util.cpp | 7 ++++++ .../hw_layer/ports/stm32/stm32f7/mpu_util.h | 5 +++- firmware/hw_layer/sensors/accelerometer.cpp | 12 ++++++---- firmware/hw_layer/sensors/cj125.cpp | 12 ++++++++-- firmware/hw_layer/smart_gpio.cpp | 1 + 11 files changed, 68 insertions(+), 18 deletions(-) diff --git a/firmware/controllers/settings.cpp b/firmware/controllers/settings.cpp index 065272b2ea..1d748171b1 100644 --- a/firmware/controllers/settings.cpp +++ b/firmware/controllers/settings.cpp @@ -82,8 +82,11 @@ void printFloatArray(const char *prefix, float array[], int size) { } void printSpiState(Logging *logger, const engine_configuration_s *engineConfiguration) { - scheduleMsg(logger, "spi 1=%s/2=%s/3=%s", boolToString(engineConfiguration->is_enabled_spi_1), - boolToString(engineConfiguration->is_enabled_spi_2), boolToString(engineConfiguration->is_enabled_spi_3)); + scheduleMsg(logger, "spi 1=%s/2=%s/3=%s/4=%s", + boolToString(engineConfiguration->is_enabled_spi_1), + boolToString(engineConfiguration->is_enabled_spi_2), + boolToString(engineConfiguration->is_enabled_spi_3), + boolToString(engineConfiguration->is_enabled_spi_4)); } extern engine_configuration_s *engineConfiguration; diff --git a/firmware/hw_layer/hardware.cpp b/firmware/hw_layer/hardware.cpp index ef80e22b3f..5263c00f61 100644 --- a/firmware/hw_layer/hardware.cpp +++ b/firmware/hw_layer/hardware.cpp @@ -113,6 +113,9 @@ static void initSpiModules(engine_configuration_s *engineConfiguration) { if (CONFIG(is_enabled_spi_3)) { turnOnSpi(SPI_DEVICE_3); } + if (CONFIG(is_enabled_spi_4)) { + turnOnSpi(SPI_DEVICE_4); + } } /** @@ -335,6 +338,9 @@ void applyNewHardwareSettings(void) { if (isConfigurationChanged(is_enabled_spi_3)) stopSpi(SPI_DEVICE_3); + if (isConfigurationChanged(is_enabled_spi_4)) + stopSpi(SPI_DEVICE_4); + #if EFI_HD44780_LCD stopHD44780_pins(); #endif /* #if EFI_HD44780_LCD */ diff --git a/firmware/hw_layer/hip9011.cpp b/firmware/hw_layer/hip9011.cpp index 9b11a5f7a0..516ca72997 100644 --- a/firmware/hw_layer/hip9011.cpp +++ b/firmware/hw_layer/hip9011.cpp @@ -47,6 +47,7 @@ #if EFI_PROD_CODE #include "pin_repository.h" +#include "mpu_util.h" #endif #if EFI_HIP_9011 @@ -84,14 +85,20 @@ static Logging *logger; // todo: nicer method which would mention SPI speed explicitly? #if EFI_PROD_CODE -static SPIConfig hipSpiCfg = { .circular = false, - .end_cb = NULL, - .ssport = NULL, - .sspad = 0, - .cr1 = SPI_CR1_MSTR | -//SPI_CR1_BR_1 // 5MHz - SPI_CR1_CPHA | SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_BR_2, - .cr2 = 0}; +static SPIConfig hipSpiCfg = { + .circular = false, + .end_cb = NULL, + .ssport = NULL, + .sspad = 0, + .cr1 = + SPI_CR1_MSTR | + SPI_CR1_CPHA | + //SPI_CR1_BR_1 // 5MHz + SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_BR_2 | + SPI_CR1_8BIT_MODE, + .cr2 = + SPI_CR2_8BIT_MODE +}; #endif /* EFI_PROD_CODE */ static void checkResponse(void) { diff --git a/firmware/hw_layer/ports/kinetis/mpu_util.h b/firmware/hw_layer/ports/kinetis/mpu_util.h index b45699877c..94aa716716 100644 --- a/firmware/hw_layer/ports/kinetis/mpu_util.h +++ b/firmware/hw_layer/ports/kinetis/mpu_util.h @@ -41,6 +41,9 @@ BOR_Result_t BOR_Set(BOR_Level_t BORValue); #define ADC_CR2_SWSTART ((uint32_t)0x40000000) #endif +#define SPI_CR1_8BIT_MODE 0 +#define SPI_CR2_8BIT_MODE 0 + #define SPI_CR1_16BIT_MODE SPI_CR1_DFF #define SPI_CR2_16BIT_MODE 0 diff --git a/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.cpp b/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.cpp index bdb52cc2c9..ed1635bb8d 100644 --- a/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.cpp +++ b/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.cpp @@ -318,6 +318,13 @@ void turnOnSpi(spi_device_e device) { engineConfiguration->spi3MisoMode); #endif /* STM32_SPI_USE_SPI3 */ } + if (device == SPI_DEVICE_4) { +#if STM32_SPI_USE_SPI4 +// scheduleMsg(&logging, "Turning on SPI4 pins"); + /* there is no cofiguration fields for SPI4 in engineConfiguration, rely on board init code + * it should set proper functions for SPI4 pins */ +#endif /* STM32_SPI_USE_SPI4 */ + } } void initSpiModule(SPIDriver *driver, brain_pin_e sck, brain_pin_e miso, diff --git a/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h b/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h index cecc89e295..a69eb8784b 100644 --- a/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h +++ b/firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h @@ -54,6 +54,9 @@ #define ADC_CR2_SWSTART ((uint32_t)0x40000000) #endif +#define SPI_CR1_8BIT_MODE 0 +#define SPI_CR2_8BIT_MODE 0 + #define SPI_CR1_16BIT_MODE SPI_CR1_DFF #define SPI_CR2_16BIT_MODE 0 diff --git a/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.cpp b/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.cpp index aa4f9203b9..057f2f4ae0 100644 --- a/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.cpp +++ b/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.cpp @@ -313,6 +313,13 @@ void turnOnSpi(spi_device_e device) { engineConfiguration->spi3MisoMode); #endif /* STM32_SPI_USE_SPI3 */ } + if (device == SPI_DEVICE_4) { +#if STM32_SPI_USE_SPI4 +// scheduleMsg(&logging, "Turning on SPI4 pins"); + /* there is no cofiguration fields for SPI4 in engineConfiguration, rely on board init code + * it should set proper functions for SPI4 pins */ +#endif /* STM32_SPI_USE_SPI4 */ + } } void initSpiModule(SPIDriver *driver, brain_pin_e sck, brain_pin_e miso, diff --git a/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h b/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h index 347548d08e..937b4aba3f 100644 --- a/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h +++ b/firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h @@ -55,11 +55,14 @@ #define ADC_CR2_SWSTART ((uint32_t)0x40000000) #endif +#define SPI_CR1_8BIT_MODE 0 +#define SPI_CR2_8BIT_MODE (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) + #define SPI_CR1_16BIT_MODE 0 #define SPI_CR2_16BIT_MODE SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 -#define SPI_CR1_24BIT_MODE 0 /* 3 x 8-bit transfer */ +#define SPI_CR1_24BIT_MODE 0 #define SPI_CR2_24BIT_MODE SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 diff --git a/firmware/hw_layer/sensors/accelerometer.cpp b/firmware/hw_layer/sensors/accelerometer.cpp index f4c1bac5de..d2c1749560 100644 --- a/firmware/hw_layer/sensors/accelerometer.cpp +++ b/firmware/hw_layer/sensors/accelerometer.cpp @@ -34,11 +34,13 @@ static SPIDriver *driver; * The slave select line is the pin GPIOE_CS_SPI on the port GPIOE. */ static const SPIConfig accelerometerCfg = { - NULL, - /* HW dependent part.*/ - GPIOE, - GPIOE_PIN3, - SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_CPOL | SPI_CR1_CPHA + .spi_bus = NULL, + /* HW dependent part.*/ + .ssport = GPIOE, + .sspad = GPIOE_PIN3, + .cr1 = SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_CPOL | SPI_CR1_CPHA | + SPI_CR1_8BIT_MODE, + .cr2 = SPI_CR2_8BIT_MODE }; #endif /* EFI_MEMS */ diff --git a/firmware/hw_layer/sensors/cj125.cpp b/firmware/hw_layer/sensors/cj125.cpp index 226b67d56c..daf309b804 100644 --- a/firmware/hw_layer/sensors/cj125.cpp +++ b/firmware/hw_layer/sensors/cj125.cpp @@ -15,6 +15,10 @@ #include "adc_inputs.h" +#if EFI_PROD_CODE +#include "mpu_util.h" +#endif + //#define CJ125_DEBUG //#define CJ125_DEBUG_SPI @@ -39,8 +43,12 @@ static SPIConfig cj125spicfg = { .end_cb = NULL, .ssport = NULL, .sspad = 0, - .cr1 = SPI_CR1_MSTR | SPI_CR1_CPHA, - .cr2 = 0 }; + .cr1 = + SPI_CR1_MSTR | SPI_CR1_CPHA | + SPI_CR1_8BIT_MODE, + .cr2 = + SPI_CR2_8BIT_MODE +}; static volatile int lastSlowAdcCounter = 0; diff --git a/firmware/hw_layer/smart_gpio.cpp b/firmware/hw_layer/smart_gpio.cpp index 26ab59f0c4..3668a11793 100644 --- a/firmware/hw_layer/smart_gpio.cpp +++ b/firmware/hw_layer/smart_gpio.cpp @@ -85,6 +85,7 @@ struct mc33972_config mc33972 = { .ssport = NULL, .sspad = 0, .cr1 = + SPI_CR1_24BIT_MODE | SPI_CR1_SSM | SPI_CR1_SSI | /* SPI_CR1_LSBFIRST | */