Bunch of small fixes related to EG33 board (#3188)

* Typo fix

* flash_main: always allow to write settings to ext NOR while running

* mc33810: do not enable outputs right after undervoltage

Wait for next active signal

* QSPI flash: set correct dummy cycles for fast read command

* board subaru: fix connector pinout. again.

* board subaru: fix SDMMC pin configuration

* board subaru: fix DMA conflict SPI4_RX vs SDMMC2
This commit is contained in:
Andrey G 2021-08-24 07:39:03 +03:00 committed by GitHub
parent 7bdeeac531
commit fc17c63d51
6 changed files with 24 additions and 18 deletions

View File

@ -435,7 +435,7 @@
PIN_PUPDR_FLOATING( 4) | \
PIN_PUPDR_FLOATING( 5) | \
PIN_PUPDR_FLOATING( 6) | \
PIN_PUPDR_FLOATING( 7) | \
PIN_PUPDR_PULLUP( 7) | \
PIN_PUPDR_FLOATING( 8) | \
PIN_PUPDR_PULLUP( 9) | \
PIN_PUPDR_FLOATING(10) | \
@ -744,10 +744,10 @@
DEFAULT_GPIO_SPEED( 6) | \
DEFAULT_GPIO_SPEED( 7) | \
DEFAULT_GPIO_SPEED( 8) | \
DEFAULT_GPIO_SPEED( 9) | \
DEFAULT_GPIO_SPEED(10) | \
DEFAULT_GPIO_SPEED(11) | \
DEFAULT_GPIO_SPEED(12) | \
PIN_OSPEED_HIGH( 9) | \
PIN_OSPEED_HIGH(10) | \
PIN_OSPEED_HIGH(11) | \
PIN_OSPEED_HIGH(12) | \
DEFAULT_GPIO_SPEED(13) | \
DEFAULT_GPIO_SPEED(14) | \
DEFAULT_GPIO_SPEED(15))

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@ -54,8 +54,8 @@ pins:
- pin: 8
id: MC33810_1_GD_2
class: outputs
function: Ignition 2
ts_name: D08 - Ignition Cyl 2
function: Ignition 6
ts_name: D08 - Ignition Cyl 6
type: ign
- pin: 9
@ -68,8 +68,8 @@ pins:
- pin: 10
id: MC33810_1_GD_3
class: outputs
function: Ignition 1
ts_name: D10 - Ignition Cyl 1
function: Ignition 2
ts_name: D10 - Ignition Cyl 2
type: ign
- pin: 11
@ -104,8 +104,8 @@ pins:
- pin: 16
id: MC33810_1_GD_1
class: outputs
function: Ignition 6
ts_name: D16 - Ignition Cyl 6
function: Ignition 1
ts_name: D16 - Ignition Cyl 1
type: ign
- pin: 17

View File

@ -64,6 +64,10 @@
#undef STM32_SPI_SPI5_TX_DMA_STREAM
#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
/* STM32_DMA_STREAM_ID(2, 0) is used by SPI4_RX */
#undef STM32_SDC_SDMMC2_DMA_STREAM
#define STM32_SDC_SDMMC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
/* To remove futher possible conflict */
#undef STM32_SPI_SPI6_RX_DMA_STREAM

View File

@ -64,7 +64,7 @@ const MFSConfig mfsd_nor_config = {
.bank1_sectors = 128U
};
#define EFI_MSF_SETTINGS_RECORD_ID 1
#define EFI_MFS_SETTINGS_RECORD_ID 1
#endif
@ -101,7 +101,7 @@ void setNeedToWriteConfiguration(void) {
needToWriteConfiguration = true;
#if EFI_FLASH_WRITE_THREAD
if (allowFlashWhileRunning()) {
if (allowFlashWhileRunning() || (EFI_STORAGE_EXT_SNOR == TRUE)) {
// Signal the flash writer thread to wake up and write at its leisure
flashWriteSemaphore.signal();
}
@ -171,7 +171,7 @@ void writeToFlashNow(void) {
* do we need to have two copies?
* do we need to protect it with CRC? */
err = mfsWriteRecord(&mfsd, EFI_MSF_SETTINGS_RECORD_ID,
err = mfsWriteRecord(&mfsd, EFI_MFS_SETTINGS_RECORD_ID,
sizeof(persistentState), (uint8_t *)&persistentState);
if (err == MFS_NO_ERROR)
@ -249,7 +249,7 @@ static persisted_configuration_state_e readConfiguration() {
#if EFI_STORAGE_EXT_SNOR == TRUE
mfs_error_t err;
size_t settings_size = sizeof(persistentState);
err = mfsReadRecord(&mfsd, EFI_MSF_SETTINGS_RECORD_ID,
err = mfsReadRecord(&mfsd, EFI_MFS_SETTINGS_RECORD_ID,
&settings_size, (uint8_t *)&persistentState);
if ((err == MFS_NO_ERROR) && (sizeof(persistentState) == settings_size))

View File

@ -379,7 +379,7 @@ void snor_device_init(SNORDriver *devp) {
WSPI_CFG_CMD_MODE_ONE_LINE | WSPI_CFG_CMD_SIZE_8 |
WSPI_CFG_ADDR_MODE_ONE_LINE |
WSPI_CFG_DATA_MODE_ONE_LINE,
JEDEC_CMD_FAST_READ, 0, 0);
JEDEC_CMD_FAST_READ, 0, 8);
}
/* TODO: get from SFDP */

View File

@ -339,10 +339,12 @@ int Mc33810::chip_init()
goto err_gpios;
}
ret = spi_rw(MC_CMD_MODE_SELECT(0xf << 8), NULL);
/* set IGN/GP outputs to GP mode - to be fixed!
* disable retry after recovering from under/overvoltage */
ret = spi_rw(MC_CMD_MODE_SELECT((0xf << 8) | (1 << 6)) , NULL);
if (ret) {
goto err_gpios;
}
}
}
/* n. set EN pin low - active */