Commit Graph

4 Commits

Author SHA1 Message Date
Andrey G 27905c6817 Chibi os 20 (#2212)
* Update ChibiOS

* Fix Makefiles includes paths

* halconf.h: remove flash hack

* mcuconf: fix EXTI ptiorityes

* Digital Input: ICU: use designated initializers, initialize 'arr'

* ChibiOS: lis302dl fix

* ADC: update to new API

* UARTConfig: timeout_cb field, formating

* ChibiOS: remove _exit, _kill, _getpid

* Fix lis302dl

* Bump config versions

* chconfig_common: cosmetic changes

* stm32f4ems: commulative config update

* Update Simulator

* ALLCSRC already contain all needed ChibiOS files.

Same for ALLINC and ALLCPPSRC

* ChibiOS fix for Simulator

* ChibiOS: port lock/unlock hook and MMC over SPI timeout

* STM32F7: update configs

* STM32F7: update linker file

* Cypress: port ADC lld to ChibiOS-20

* Cypress: port SPI lld to ChibiOS-20

* Cypress: port CAN lld to ChibiOS-20

* Cypress: fix include path for rules.ld

* Cypress: update chconf.h and halconf.h for ChibiOS-20

* Kinetis: update ADC lld to ChibiOS-20

* Kinetis: update SPI lld to ChibiOS-20

* Kinetis: update UART lld driver for ChibiOS-20

* Kinetis: update chconf.h and halconf.h for ChibiOS-20

* Kinetis: fix include path for rules.ld

* Nucleo F746: update ld script

* Nucleo F746: fix compile

* Bootloader: fix compilation with ChibiOS-20, cleanup

* Bootloader: add way to pass crosscompiler using CROSS_COMPILE

* Debug build arguments

* Simulator: fix windows compilation

Exclude syscalls_cpp.cpp from compilation
2021-01-19 15:20:35 -05:00
rusefi 250994a0ca UART DMA for "primary" connector #1528 2020-06-22 11:32:47 -04:00
rusefi b6de8c78a1 refactoring connectivity 2020-06-21 19:48:55 -04:00
rusefi af82d63112 refactoring connectivity 2020-06-21 16:37:33 -04:00