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60 Commits

Author SHA1 Message Date
rusefi c2c98fbccd tle8888 output fix 2020-02-12 08:04:33 -05:00
dron0gus 919034ca3e Tle8888 wd (#1143) 
* tle8888: watchdog: debug over TS: remove tailing register address

* tle8888: ann console command to dump all regs
 2020-02-11 17:49:14 -05:00
rusefi a222ecdfe1 happy new year unification 2020-01-13 21:57:43 -05:00
dron0gus 406703b1b5 Gpio diagnostic (#1100) 
* enums: add brain_pin_diag_e enum for pin diagnostic

* gpio core: add pin diagnostic call

* gpio: mc33810: add diagnostic support

* gpio: mc33972: add diagnostic support

* gpio: tle6240: add diagnostic

* pin_repository: output diagnostic data for gpio chips

* enums: kinetis: add brain_pin_diag_e enum for pin diagnostic
 2020-01-12 10:20:10 -05:00
dron0gus ddc071f611 Gpio fixes (#1086) 
* drivers: gpio: add MC33810 driver (skeleton)

* pin_repository: debug: do not show absent chips
 2020-01-07 07:55:50 -05:00
rusefi 349eac34de better state validation, better error codes 2019-11-29 23:41:26 -05:00
rusefi 1e1d2939ed refactoring 2019-11-29 22:09:08 -05:00
rusefi 815589825c extracing constant & more information for HW CI 2019-11-29 21:57:59 -05:00
rusEfi 4c39a207a9 s/NULL/nullptr/ 2019-09-22 08:22:35 -04:00
rusefi 0952b84aad unit tests progress 2019-09-19 21:41:52 -04:00
rusEfi db8975f346 minor fix: NONE pin UI representation 2019-07-14 22:47:11 -04:00
rusefi 89557373e9 order of includes consistency 2019-07-05 20:03:32 -04:00
rusefi bad507558a Refactoring: OS access should be explicit #867 2019-07-04 03:25:35 -04:00
rusefi 777eb532dc Refactoring: OS access should be explicit #867 2019-07-03 21:48:04 -04:00
andreika-git e9c383ce7e STM32-specific GPIO refactor (stm32_pins.cpp) (#817) 
* stm32_pins.cpp

* PIN_USED & other
 2019-06-02 16:48:38 -04:00
rusefi 2901d9f902 nicer pin names for messages while same short names for engine sniffer 2019-05-15 04:26:41 -04:00
dron0gus 1b19a36b9e Smart gpios fixes 3 (#795) 
* pin_repository: provide readable pin names in error cases

* io_pins: remove getBrain_pin_eExt

We have getBrain_pin_eExt in io_pins.cpp and hwPortname in
pin_repository.cpp.
First uses auto-generated enums, second one uses runtime data to
provide name of hw pin.
Removing first saves us about 2K of flash couse big auto-generated
switch with pin names no more used by anyone and gets optimized out.

* gpios: mc33972: CS pin is now requested at smart_gpios.pcc

* getSpiDevice: support SPI4

* smart_gpios.cpp: startSmartCsPins set CSs to inactive state

OutputPin:initPin initializes pin with false value. This is active
state for SPI Chip Selects. Set to 1 to deselect all chips.
 2019-05-09 18:09:24 -04:00
dron0gus d0945b9449 Smart gpios (#752) 
* efi_gpio: update cached pin value for ext gpios to

* tle6240: update and fix

* gpiochips_init should be called after all gpio chips are added

or we can lost calls to _init of chips

* smart_gpio.c: fix for tle6240 and mc33972

now config structs are not const. waste of ram...
 2019-04-14 01:32:46 +02:00
rusefi fb1dd5a3ca steps towards smarter gpio 2019-04-13 11:22:40 -04:00
rusefi c53433801c 'pins' fix 2019-04-13 10:59:29 -04:00
dron0gus 551f2f5883 Gpiochips integration (#740) 
* gpio-chips core function renames

* efi_gpio, pin_repository: add support for external gpios

* gpio-chips update

* gpio-chips: add api to name each pin of gpiochip

* tle6240: provide individual names for each pin
 2019-04-10 14:43:54 +02:00
dron0gus 69df5d4b50 gpios rework (#739) 
* Some more include fixes for linux

* Pass cross-compile path through CROSS_COMPILE

* Lower-upper case conversion fixes for linux

* Rename unmarkPin to brain_pin_markUnused

This is part of external gpiochip integration

* Add gpio_pin prefix to markUsed and markUnused

To distinguish from similar functions using brain_pin

* pin_repository: add helpers

this is part of gpio chips integration

* efi_gpio: simplify getHwPin using brain_pin_is_onchip
 2019-04-10 01:31:10 +02:00
dron0gus ea1f2527cb Extgpios integration 1 (#734) 
* pin repository: add brain_pin_markUsed and brain_pin_markUnused

This is part of external gpio chips integration

* pin repository: simplify getPinFunction()

* pin repository: add brain_pin_is_onchip()

This is part of external gpio chips integration

* pin repository: kill signed vs unsigned warning
 2019-04-05 00:53:27 +02:00
andreika-git a3f33f3f0d More compatibility for ADC_inputs, etc. (#716) 
* Move STM32-specific ADC pinouts to ports/stm32/stm32_common.cpp

* Move STM32-specific files to ports/*

* setAdcChannelOverrides()

* Add #ifdefs for adc_inputs (PWM_FREQ_*, PWM_PERIOD_*, ADC_*_DEVICE)

* addChannel(), removeChannel()

* fix tle6240 compilation

* Add stm32_common.cpp to Makefile

* More ports/stm32/* paths

* More ports/stm32/* paths

* More flexible GPIO ports

* Add #ifdef for GPTDEVICE

* EFI_BOARD_TEST and EFI_JOYSTICK

* EFI_TLE8888

* Fix HIP9011_logic compilation

* ADC_CHANNEL_SENSOR

* Move ioportid_t PORTS[] to ports/*

* Fix simulator
 2019-03-28 22:46:10 -04:00
dron0gus 19cdfab5f5 Cleanup fixes (#700) 
* Kill some more warnings

* pin_repository: add markUnused, allow use from plain C

* ehiGpio.cpp: add forgotten GPIOG port
 2019-03-08 07:01:15 -05:00
rusefi e1ba29febd 688 brainpins (#694) 
* GPIOF, GPIOG and GPIOH ports are not available #688
 2019-02-22 22:10:41 -05:00
rusefi 9917458125 better conditional compilation 2019-01-04 00:16:08 -05:00
andreika-git 96dfebc542 STM32 Nucleo144-F767ZI board: Initial support (#620) 
* More EFI_ #ifdefs for config flexibility

* Even more config flexibility

* New firmware/config/stm32f7ems/* files

* New firmware/config/boards/NUCLEO_F767/* files

* New firmware/hw_layer/stm32f7/* files

* Fix for EFI_USB_SERIAL

* Adding #if defined(STM32F7XX)

* SPI flags changed in F7: SPI_CR1_DFF --> SPI_CR1_CRCL

* I2Cv2 config changed in F7

* More versatile CCM defines

* Makefiles

* Double #ifs cleanup

* docs
 2018-11-16 07:40:06 -05:00
rusefi 8af9751beb #616 idle into simulator 2018-10-30 08:21:50 -04:00
rusefi 553969dc72 refactoring 2018-09-16 22:26:57 -04:00
rusefi 2f95cd1e0d step towards more unique codes 2018-07-25 23:30:00 -04:00
rusefi f5a4376036 happy new year 2018-01-20 20:55:31 -05:00
rusefi 201b3a3491 better error handling 2017-07-28 14:27:37 -04:00
rusefi 3be80a6a32 refactoring - reducing GPIO complexity 2017-04-21 16:33:51 -04:00
rusefi a99f7bf7da refactoring - reducing GPIO complexity 2017-04-21 16:30:14 -04:00
rusefi ae17c650a6 refactoring - reducing GPIO complexity 2017-04-21 16:27:15 -04:00
rusefi eb91eca772 refactoring - reducing GPIO complexity 2017-04-21 15:28:47 -04:00
rusefi aea1a687f8 fixed #336 2017-03-26 23:26:50 -04:00
rusEfi 552c664a23 auto-sync 2017-01-03 06:05:22 -05:00
rusEfi 4e5a870f7f auto-sync 2016-10-10 16:02:39 -04:00
rusEfi fb5f7fc282 auto-sync 2016-10-10 15:02:10 -04:00
rusEfi e4bad0d9d0 auto-sync 2016-10-10 14:02:17 -04:00
rusEfi 8d2ea7454c auto-sync 2016-09-14 01:01:57 -04:00
rusEfi f0f35543fc auto-sync 2016-09-14 00:03:14 -04:00
rusEfi b1846be06a auto-sync 2016-04-03 11:02:57 -04:00
rusEfi 8bbea9e638 auto-sync 2016-02-04 11:02:13 -05:00
rusEfi 59c61e38e4 auto-sync 2016-01-15 23:01:43 -05:00
rusEfi 42069e51ac auto-sync 2015-12-31 16:02:30 -05:00
rusEfi 0f385498d9 auto-sync 2015-07-13 20:02:18 -04:00
rusEfi 41e7abdd6f auto-sync 2015-07-10 09:01:56 -04:00