fome-fw/firmware/hw_layer/ports/stm32
Andrey G 51f53aa3fc Openblt (#3430)
* Makefile: define BOOTLOADER=1 for linker in case of OpenBLT too

This will reserve first 32K of flash for bootloader.

* OpenBLT: include into build

* board: subaru eg33: add OpenBLT board code

* board: subaru eg33: use OpenBLT

* Board: Subaru EG33: OpenBLT: reuse HAL and CMSIS from OpenBLT submodule

* Board: Subaru EG33: OpenBLT: reuse linker file from OpenBLT too

* OpenBLT for MRE

* OpenBLT: MRE: adjust LD memory map for smallest variat of MCU on MRE

* OpenBLT: enable for MRE

* OpenBLT: disable CRC check of user application

This allows us to use DFU tool to flash main application too.

* hex2dfu: fresh binary for linux

* OpenBLT: extract common part of OpenBLT makefiles to openblt.mk

* OpenBLT: enable CRC check of user application for MRE and EG33

CRC (actually just a summ) of few first vectors is stored at 0x1c
offset. This is reserved vector for Cortex-M3, M4 and M7

* common_make: append OpenBLT CRC to dfu files

This should allow to use DFU to do main application update when
when OpenBLT is used as bootloader. hex2dfu will store same
styled CRC as OpenBLT expects to see in user app.

* OpenBLT reorganization

Move common stuff to hw_layer/ports/

* OpenBLT: proteus

* Proteus: enable OpenBLT for F4 and F7

Compilation tested only
2021-11-05 19:28:55 -04:00
..
cfg
serial_over_usb
stm32f4 Openblt (#3430) 2021-11-05 19:28:55 -04:00
stm32f7 Openblt (#3430) 2021-11-05 19:28:55 -04:00
stm32h7 misc ethernet config parameters (#3343) 2021-10-11 15:35:09 -04:00
backup_ram.cpp
flash_int.c
mcuconf_common_f4_f7.h ethernet (#3342) 2021-10-10 01:15:49 -04:00
microsecond_timer_stm32.cpp
osc_detector.cpp even more pch (#3112) 2021-08-04 19:30:52 -04:00
port_mpu_util.h
rusEfiStartup.S
stm32_adc_v2.cpp Fast adc API (#3327) 2021-10-07 08:29:01 -04:00
stm32_adc_v4.cpp faster uniform adc cleanup (#3334) 2021-10-10 22:59:25 -04:00
stm32_common.cpp etb pwm limit (#3408) 2021-10-25 15:35:23 -04:00
stm32_common.mk
stm32_pins.cpp