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Refs #311. Reworked compiler specific parts in the STM32F0 port. 

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@293 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2017-07-13 10:20:00 +00:00
parent 58483a7333
commit 4e6bc0ea53
25 changed files with 3507 additions and 2609 deletions
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BIN
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/bin/openblt_stm32f051.elf
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474
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/bin/openblt_stm32f051.map
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@ -3210,6 +3210,8 @@ Discarded input sections
.debug_macro 0x00000000 0x353 .\..\obj\main.o
.debug_macro 0x00000000 0x34 .\..\obj\main.o
.debug_macro 0x00000000 0x3a .\..\obj\main.o
.data 0x00000000 0x0 .\..\obj\startup_stm32f0xx.o
.bss 0x00000000 0x0 .\..\obj\startup_stm32f0xx.o
.group 0x00000000 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.group 0x00000000 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.group 0x00000000 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
@ -3407,8 +3409,6 @@ Discarded input sections
.debug_macro 0x00000000 0x1c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_macro 0x00000000 0x9f .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_macro 0x00000000 0x28 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.data 0x00000000 0x0 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.bss 0x00000000 0x0 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.group 0x00000000 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.group 0x00000000 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.group 0x00000000 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
@ -3859,7 +3859,7 @@ Memory Configuration
Name Origin Length Attributes
ROM 0x08000000 0x00002000 xr
RAM 0x200000c0 0x00000f40 xrw
RAM 0x200000c0 0x00001f40 xrw
*default* 0x00000000 0xffffffff
Linker script and memory map
@ -3870,9 +3870,9 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x00000000 __HEAP_SIZE = 0x0
0x00000100 __STACK_SIZE = 0x100
.text 0x08000000 0x17c8
.text 0x08000000 0x17c0
*(.isr_vector)
.isr_vector 0x08000000 0xc0 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.isr_vector 0x08000000 0xc0 .\..\obj\startup_stm32f0xx.o
0x08000000 __isr_vector
*(.text*)
.text 0x080000c0 0x60 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
@ -3971,206 +3971,206 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x08000760 SystemInit
.text.main 0x0800081c 0x98 .\..\obj\main.o
0x0800081c main
.text.CpuInit 0x080008b4 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x080008b4 CpuInit
.text 0x080008b4 0xa0 .\..\obj\startup_stm32f0xx.o
0x080008b4 Reset_Handler
0x080008fe NMI_Handler
0x08000900 HardFault_Handler
0x08000902 SVC_Handler
0x08000904 PendSV_Handler
0x08000906 SysTick_Handler
0x08000908 Default_Handler
0x0800090a WWDG_IRQHandler
0x0800090c PVD_IRQHandler
0x0800090e RTC_IRQHandler
0x08000910 FLASH_IRQHandler
0x08000912 RCC_IRQHandler
0x08000914 EXTI0_1_IRQHandler
0x08000916 EXTI2_3_IRQHandler
0x08000918 EXTI4_15_IRQHandler
0x0800091a TS_IRQHandler
0x0800091c DMA1_Channel1_IRQHandler
0x0800091e DMA1_Channel2_3_IRQHandler
0x08000920 DMA1_Channel4_5_IRQHandler
0x08000922 ADC1_COMP_IRQHandler
0x08000924 TIM1_BRK_UP_TRG_COM_IRQHandler
0x08000926 TIM1_CC_IRQHandler
0x08000928 TIM2_IRQHandler
0x0800092a TIM3_IRQHandler
0x0800092c TIM6_DAC_IRQHandler
0x0800092e TIM7_IRQHandler
0x08000930 TIM14_IRQHandler
0x08000932 TIM15_IRQHandler
0x08000934 TIM16_IRQHandler
0x08000936 TIM17_IRQHandler
0x08000938 I2C1_IRQHandler
0x0800093a I2C2_IRQHandler
0x0800093c SPI1_IRQHandler
0x0800093e SPI2_IRQHandler
0x08000940 USART1_IRQHandler
0x08000942 USART2_IRQHandler
0x08000944 USART3_4_IRQHandler
0x08000946 CEC_IRQHandler
0x08000948 USB_IRQHandler
.text.CpuInit 0x08000954 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000954 CpuInit
.text.CpuMemCopy
0x080008bc 0x24 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x080008bc CpuMemCopy
0x0800095c 0x24 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x0800095c CpuMemCopy
.text.CpuStartUserProgram
0x080008e0 0x48 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x080008e0 CpuStartUserProgram
0x08000980 0x48 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000980 CpuStartUserProgram
.text.FlashGetSector
0x08000928 0x3c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x080009c8 0x3c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashWriteBlock
0x08000964 0x84 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000a04 0x84 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashSwitchBlock
0x080009e8 0x54 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000a88 0x54 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashAddToBlock
0x08000a3c 0x98 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000adc 0x98 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashInit
0x08000ad4 0x18 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000ad4 FlashInit
0x08000b74 0x18 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000b74 FlashInit
.text.FlashWrite
0x08000aec 0x5c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000aec FlashWrite
0x08000b8c 0x5c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000b8c FlashWrite
.text.FlashErase
0x08000b48 0x110 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000b48 FlashErase
0x08000be8 0x110 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000be8 FlashErase
.text.FlashWriteChecksum
0x08000c58 0x50 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000c58 FlashWriteChecksum
0x08000cf8 0x50 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000cf8 FlashWriteChecksum
.text.FlashVerifyChecksum
0x08000ca8 0x58 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000ca8 FlashVerifyChecksum
0x08000d48 0x58 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000d48 FlashVerifyChecksum
.text.FlashDone
0x08000d00 0x34 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000d00 FlashDone
0x08000da0 0x34 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000da0 FlashDone
.text.FlashGetUserProgBaseAddress
0x08000d34 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000d34 FlashGetUserProgBaseAddress
0x08000dd4 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08000dd4 FlashGetUserProgBaseAddress
.text.CpuIrqDisable
0x08000d3c 0x4 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x08000d3c CpuIrqDisable
0x08000ddc 0x4 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x08000ddc CpuIrqDisable
.text.CpuIrqEnable
0x08000d40 0x4 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x08000d40 CpuIrqEnable
.text 0x08000d44 0xa8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x08000d44 Reset_Handler
0x08000d96 NMI_Handler
0x08000d98 HardFault_Handler
0x08000d9a SVC_Handler
0x08000d9c PendSV_Handler
0x08000d9e SysTick_Handler
0x08000da0 Default_Handler
0x08000da2 WWDG_IRQHandler
0x08000da4 PVD_IRQHandler
0x08000da6 RTC_IRQHandler
0x08000da8 FLASH_IRQHandler
0x08000daa RCC_IRQHandler
0x08000dac EXTI0_1_IRQHandler
0x08000dae EXTI2_3_IRQHandler
0x08000db0 EXTI4_15_IRQHandler
0x08000db2 TS_IRQHandler
0x08000db4 DMA1_Channel1_IRQHandler
0x08000db6 DMA1_Channel2_3_IRQHandler
0x08000db8 DMA1_Channel4_5_IRQHandler
0x08000dba ADC1_COMP_IRQHandler
0x08000dbc TIM1_BRK_UP_TRG_COM_IRQHandler
0x08000dbe TIM1_CC_IRQHandler
0x08000dc0 TIM2_IRQHandler
0x08000dc2 TIM3_IRQHandler
0x08000dc4 TIM6_DAC_IRQHandler
0x08000dc6 TIM7_IRQHandler
0x08000dc8 TIM14_IRQHandler
0x08000dca TIM15_IRQHandler
0x08000dcc TIM16_IRQHandler
0x08000dce TIM17_IRQHandler
0x08000dd0 I2C1_IRQHandler
0x08000dd2 I2C2_IRQHandler
0x08000dd4 SPI1_IRQHandler
0x08000dd6 SPI2_IRQHandler
0x08000dd8 USART1_IRQHandler
0x08000dda USART2_IRQHandler
0x08000ddc USART3_4_IRQHandler
0x08000dde CEC_IRQHandler
0x08000de0 USB_IRQHandler
.text.NvmInit 0x08000dec 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000dec NvmInit
0x08000de0 0x4 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x08000de0 CpuIrqEnable
.text.NvmInit 0x08000de4 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000de4 NvmInit
.text.NvmWrite
0x08000df4 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000df4 NvmWrite
0x08000dec 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000dec NvmWrite
.text.NvmErase
0x08000dfc 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000dfc NvmErase
0x08000df4 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000df4 NvmErase
.text.NvmVerifyChecksum
0x08000e04 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000e04 NvmVerifyChecksum
0x08000dfc 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000dfc NvmVerifyChecksum
.text.NvmGetUserProgBaseAddress
0x08000e0c 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000e0c NvmGetUserProgBaseAddress
.text.NvmDone 0x08000e14 0x10 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000e14 NvmDone
0x08000e04 0x8 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000e04 NvmGetUserProgBaseAddress
.text.NvmDone 0x08000e0c 0x10 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08000e0c NvmDone
.text.TimerInit
0x08000e24 0x24 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e24 TimerInit
0x08000e1c 0x24 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e1c TimerInit
.text.TimerReset
0x08000e48 0xc .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e48 TimerReset
0x08000e40 0xc .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e40 TimerReset
.text.TimerUpdate
0x08000e54 0x1c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e54 TimerUpdate
0x08000e4c 0x1c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e4c TimerUpdate
.text.TimerGet
0x08000e70 0x10 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e70 TimerGet
0x08000e68 0x10 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08000e68 TimerGet
.text.UartTransmitByte
0x08000e80 0x34 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000e78 0x34 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.text.UartReceiveByte
0x08000eb4 0x24 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000eac 0x24 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.text.UartInit
0x08000ed8 0x3c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000ed8 UartInit
0x08000ed0 0x3c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000ed0 UartInit
.text.UartTransmitPacket
0x08000f14 0x58 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000f14 UartTransmitPacket
0x08000f0c 0x58 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000f0c UartTransmitPacket
.text.UartReceivePacket
0x08000f6c 0xa0 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000f6c UartReceivePacket
0x08000f64 0xa0 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08000f64 UartReceivePacket
.text.AssertFailure
0x0800100c 0x8 .\..\obj\~#\~#\~#\source\assert.o
0x0800100c AssertFailure
0x08001004 0x8 .\..\obj\~#\~#\~#\source\assert.o
0x08001004 AssertFailure
.text.BackDoorCheck
0x08001014 0x38 .\..\obj\~#\~#\~#\source\backdoor.o
0x08001014 BackDoorCheck
0x0800100c 0x38 .\..\obj\~#\~#\~#\source\backdoor.o
0x0800100c BackDoorCheck
.text.BackDoorInit
0x0800104c 0x20 .\..\obj\~#\~#\~#\source\backdoor.o
0x0800104c BackDoorInit
0x08001044 0x20 .\..\obj\~#\~#\~#\source\backdoor.o
0x08001044 BackDoorInit
.text.BootInit
0x0800106c 0x1c .\..\obj\~#\~#\~#\source\boot.o
0x0800106c BootInit
0x08001064 0x1c .\..\obj\~#\~#\~#\source\boot.o
0x08001064 BootInit
.text.BootTask
0x08001088 0x14 .\..\obj\~#\~#\~#\source\boot.o
0x08001088 BootTask
.text.ComInit 0x0800109c 0x18 .\..\obj\~#\~#\~#\source\com.o
0x0800109c ComInit
.text.ComTask 0x080010b4 0x24 .\..\obj\~#\~#\~#\source\com.o
0x080010b4 ComTask
.text.ComFree 0x080010d8 0x4 .\..\obj\~#\~#\~#\source\com.o
0x080010d8 ComFree
0x08001080 0x14 .\..\obj\~#\~#\~#\source\boot.o
0x08001080 BootTask
.text.ComInit 0x08001094 0x18 .\..\obj\~#\~#\~#\source\com.o
0x08001094 ComInit
.text.ComTask 0x080010ac 0x24 .\..\obj\~#\~#\~#\source\com.o
0x080010ac ComTask
.text.ComFree 0x080010d0 0x4 .\..\obj\~#\~#\~#\source\com.o
0x080010d0 ComFree
.text.ComTransmitPacket
0x080010dc 0x1c .\..\obj\~#\~#\~#\source\com.o
0x080010dc ComTransmitPacket
0x080010d4 0x1c .\..\obj\~#\~#\~#\source\com.o
0x080010d4 ComTransmitPacket
.text.ComGetActiveInterfaceMaxRxLen
0x080010f8 0x18 .\..\obj\~#\~#\~#\source\com.o
0x080010f8 ComGetActiveInterfaceMaxRxLen
0x080010f0 0x18 .\..\obj\~#\~#\~#\source\com.o
0x080010f0 ComGetActiveInterfaceMaxRxLen
.text.ComGetActiveInterfaceMaxTxLen
0x08001110 0x18 .\..\obj\~#\~#\~#\source\com.o
0x08001110 ComGetActiveInterfaceMaxTxLen
0x08001108 0x18 .\..\obj\~#\~#\~#\source\com.o
0x08001108 ComGetActiveInterfaceMaxTxLen
.text.ComIsConnected
0x08001128 0x8 .\..\obj\~#\~#\~#\source\com.o
0x08001128 ComIsConnected
.text.CopInit 0x08001130 0x8 .\..\obj\~#\~#\~#\source\cop.o
0x08001130 CopInit
0x08001120 0x8 .\..\obj\~#\~#\~#\source\com.o
0x08001120 ComIsConnected
.text.CopInit 0x08001128 0x8 .\..\obj\~#\~#\~#\source\cop.o
0x08001128 CopInit
.text.CopService
0x08001138 0x8 .\..\obj\~#\~#\~#\source\cop.o
0x08001138 CopService
0x08001130 0x8 .\..\obj\~#\~#\~#\source\cop.o
0x08001130 CopService
.text.XcpSetCtoError
0x08001140 0x14 .\..\obj\~#\~#\~#\source\xcp.o
.text.XcpInit 0x08001154 0x1c .\..\obj\~#\~#\~#\source\xcp.o
0x08001154 XcpInit
0x08001138 0x14 .\..\obj\~#\~#\~#\source\xcp.o
.text.XcpInit 0x0800114c 0x1c .\..\obj\~#\~#\~#\source\xcp.o
0x0800114c XcpInit
.text.XcpIsConnected
0x08001170 0x10 .\..\obj\~#\~#\~#\source\xcp.o
0x08001170 XcpIsConnected
0x08001168 0x10 .\..\obj\~#\~#\~#\source\xcp.o
0x08001168 XcpIsConnected
.text.XcpPacketTransmitted
0x08001180 0x10 .\..\obj\~#\~#\~#\source\xcp.o
0x08001180 XcpPacketTransmitted
0x08001178 0x10 .\..\obj\~#\~#\~#\source\xcp.o
0x08001178 XcpPacketTransmitted
.text.XcpPacketReceived
0x08001190 0x2c8 .\..\obj\~#\~#\~#\source\xcp.o
0x08001190 XcpPacketReceived
.text 0x08001458 0x114 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_udivsi3.o)
0x08001458 __aeabi_uidiv
0x08001458 __udivsi3
0x08001564 __aeabi_uidivmod
.text 0x0800156c 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_dvmd_tls.o)
0x0800156c __aeabi_idiv0
0x0800156c __aeabi_ldiv0
.text.exit 0x08001570 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-exit.o)
0x08001570 exit
0x08001188 0x2c8 .\..\obj\~#\~#\~#\source\xcp.o
0x08001188 XcpPacketReceived
.text 0x08001450 0x114 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_udivsi3.o)
0x08001450 __aeabi_uidiv
0x08001450 __udivsi3
0x0800155c __aeabi_uidivmod
.text 0x08001564 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_dvmd_tls.o)
0x08001564 __aeabi_idiv0
0x08001564 __aeabi_ldiv0
.text.exit 0x08001568 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-exit.o)
0x08001568 exit
.text.__libc_init_array
0x0800159c 0x4c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-init.o)
0x0800159c __libc_init_array
.text.memset 0x080015e8 0x10 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-memset.o)
0x080015e8 memset
.text._exit 0x080015f8 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libnosys_s.a(_exit.o)
0x080015f8 _exit
0x08001594 0x4c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-init.o)
0x08001594 __libc_init_array
.text.memset 0x080015e0 0x10 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-memset.o)
0x080015e0 memset
.text._exit 0x080015f0 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libnosys_s.a(_exit.o)
0x080015f0 _exit
*(.init)
*fill* 0x080015fa 0x2
.init 0x080015fc 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x080015fc _init
.init 0x08001600 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
*fill* 0x080015f2 0x2
.init 0x080015f4 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x080015f4 _init
.init 0x080015f8 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
*(.fini)
.fini 0x08001608 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x08001608 _fini
.fini 0x0800160c 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
.fini 0x08001600 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x08001600 _fini
.fini 0x08001604 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend.o *crtend?.o) .ctors)
@ -4183,53 +4183,53 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
*(.dtors)
*(.rodata*)
.rodata.flashLayout
0x08001614 0x9c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0800160c 0x9c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.rodata.str1.4
0x080016b0 0x2c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x080016a8 0x2c .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x29 (size before relaxing)
.rodata.XcpPacketReceived
0x080016dc 0xd8 .\..\obj\~#\~#\~#\source\xcp.o
0x080016d4 0xd8 .\..\obj\~#\~#\~#\source\xcp.o
.rodata.xcpStationId
0x080017b4 0x8 .\..\obj\~#\~#\~#\source\xcp.o
0x080017ac 0x8 .\..\obj\~#\~#\~#\source\xcp.o
.rodata.str1.1
0x080017bc 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
*fill* 0x080017be 0x2
0x080017b4 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
*fill* 0x080017b6 0x2
.rodata._global_impure_ptr
0x080017c0 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
0x080017c0 _global_impure_ptr
0x080017b8 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
0x080017b8 _global_impure_ptr
*(.eh_frame*)
.eh_frame 0x080017c4 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.eh_frame 0x080017c4 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtend.o
.eh_frame 0x080017bc 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.eh_frame 0x080017bc 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtend.o
.glue_7 0x080017c8 0x0
.glue_7 0x080017c8 0x0 linker stubs
.glue_7 0x080017c0 0x0
.glue_7 0x080017c0 0x0 linker stubs
.glue_7t 0x080017c8 0x0
.glue_7t 0x080017c8 0x0 linker stubs
.glue_7t 0x080017c0 0x0
.glue_7t 0x080017c0 0x0 linker stubs
.vfp11_veneer 0x080017c8 0x0
.vfp11_veneer 0x080017c8 0x0 linker stubs
.vfp11_veneer 0x080017c0 0x0
.vfp11_veneer 0x080017c0 0x0 linker stubs
.v4_bx 0x080017c8 0x0
.v4_bx 0x080017c8 0x0 linker stubs
.v4_bx 0x080017c0 0x0
.v4_bx 0x080017c0 0x0 linker stubs
.iplt 0x080017c8 0x0
.iplt 0x080017c8 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.iplt 0x080017c0 0x0
.iplt 0x080017c0 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.ARM.extab
*(.ARM.extab* .gnu.linkonce.armextab.*)
0x080017c8 __exidx_start = .
0x080017c0 __exidx_start = .
.ARM.exidx 0x080017c8 0x8
.ARM.exidx 0x080017c0 0x8
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
.ARM.exidx 0x080017c8 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o
0x080017d0 __exidx_end = .
0x080017d0 __etext = .
.ARM.exidx 0x080017c0 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o
0x080017c8 __exidx_end = .
0x080017c8 __etext = .
.rel.dyn 0x080017d0 0x0
.rel.iplt 0x080017d0 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.rel.dyn 0x080017c8 0x0
.rel.iplt 0x080017c8 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.data 0x200000c0 0x7c load address 0x080017d0
.data 0x200000c0 0x7c load address 0x080017c8
0x200000c0 __data_start__ = .
*(vtable)
*(.data*)
@ -4259,13 +4259,13 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x2000013c . = ALIGN (0x4)
0x2000013c __data_end__ = .
.jcr 0x2000013c 0x0 load address 0x0800184c
.jcr 0x2000013c 0x0 load address 0x08001844
.jcr 0x2000013c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.igot.plt 0x2000013c 0x0 load address 0x0800184c
.igot.plt 0x2000013c 0x0 load address 0x08001844
.igot.plt 0x2000013c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.bss 0x2000013c 0x50c load address 0x0800184c
.bss 0x2000013c 0x50c load address 0x08001844
0x2000013c __bss_start__ = .
*(.bss*)
.bss 0x2000013c 0x1c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
@ -4306,15 +4306,15 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x20000648 __end__ = .
0x20000648 end = __end__
*(.heap*)
.heap 0x20000648 0x0 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.heap 0x20000648 0x0 .\..\obj\startup_stm32f0xx.o
0x20000648 __HeapLimit = .
.stack_dummy 0x20000648 0x100
*(.stack)
.stack 0x20000648 0x100 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x20001000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM))
0x20000f00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
0x20001000 PROVIDE (__stack, __StackTop)
.stack 0x20000648 0x100 .\..\obj\startup_stm32f0xx.o
0x20002000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM))
0x20001f00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
0x20002000 PROVIDE (__stack, __StackTop)
0x00000001 ASSERT ((__StackLimit >= __HeapLimit), region RAM overflowed with stack)
LOAD .\..\obj\hooks.o
LOAD .\..\obj\led.o
@ -4343,10 +4343,10 @@ LOAD .\..\obj\lib\spl\src\stm32f0xx_usart.o
LOAD .\..\obj\lib\spl\src\stm32f0xx_wwdg.o
LOAD .\..\obj\lib\system_stm32f0xx.o
LOAD .\..\obj\main.o
LOAD .\..\obj\startup_stm32f0xx.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
LOAD .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
@ -4399,13 +4399,13 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.ARM.attributes
0x000001ed 0x31 .\..\obj\main.o
.ARM.attributes
0x0000021e 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x0000021e 0x1b .\..\obj\startup_stm32f0xx.o
.ARM.attributes
0x0000024f 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x00000239 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.ARM.attributes
0x00000280 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x0000026a 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.ARM.attributes
0x000002b1 0x1b .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x0000029b 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.ARM.attributes
0x000002cc 0x31 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.ARM.attributes
@ -4467,7 +4467,7 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.comment 0x0000006e 0x6f .\..\obj\~#\~#\~#\source\cop.o
.comment 0x0000006e 0x6f .\..\obj\~#\~#\~#\source\xcp.o
.debug_info 0x00000000 0x6075
.debug_info 0x00000000 0x605d
.debug_info 0x00000000 0x264 .\..\obj\hooks.o
.debug_info 0x00000264 0x2c3 .\..\obj\led.o
.debug_info 0x00000527 0xb48 .\..\obj\lib\spl\src\stm32f0xx_flash.o
@ -4477,19 +4477,19 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.debug_info 0x000024d1 0xf42 .\..\obj\lib\spl\src\stm32f0xx_usart.o
.debug_info 0x00003413 0x2e5 .\..\obj\lib\system_stm32f0xx.o
.debug_info 0x000036f8 0x46e .\..\obj\main.o
.debug_info 0x00003b66 0x2a6 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_info 0x00003e0c 0x955 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_info 0x00004761 0x84 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_info 0x000047e5 0xac .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.debug_info 0x00004891 0x252 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_info 0x00004ae3 0x174 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_info 0x00004c57 0x5a7 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_info 0x000051fe 0xc6 .\..\obj\~#\~#\~#\source\assert.o
.debug_info 0x000052c4 0x114 .\..\obj\~#\~#\~#\source\backdoor.o
.debug_info 0x000053d8 0x156 .\..\obj\~#\~#\~#\source\boot.o
.debug_info 0x0000552e 0x289 .\..\obj\~#\~#\~#\source\com.o
.debug_info 0x000057b7 0xb6 .\..\obj\~#\~#\~#\source\cop.o
.debug_info 0x0000586d 0x808 .\..\obj\~#\~#\~#\source\xcp.o
.debug_info 0x00003b66 0x94 .\..\obj\startup_stm32f0xx.o
.debug_info 0x00003bfa 0x2a6 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_info 0x00003ea0 0x955 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_info 0x000047f5 0x84 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_info 0x00004879 0x252 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_info 0x00004acb 0x174 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_info 0x00004c3f 0x5a7 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_info 0x000051e6 0xc6 .\..\obj\~#\~#\~#\source\assert.o
.debug_info 0x000052ac 0x114 .\..\obj\~#\~#\~#\source\backdoor.o
.debug_info 0x000053c0 0x156 .\..\obj\~#\~#\~#\source\boot.o
.debug_info 0x00005516 0x289 .\..\obj\~#\~#\~#\source\com.o
.debug_info 0x0000579f 0xb6 .\..\obj\~#\~#\~#\source\cop.o
.debug_info 0x00005855 0x808 .\..\obj\~#\~#\~#\source\xcp.o
.debug_abbrev 0x00000000 0x1a4f
.debug_abbrev 0x00000000 0x11d .\..\obj\hooks.o
@ -4501,10 +4501,10 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.debug_abbrev 0x000009a8 0x1b8 .\..\obj\lib\spl\src\stm32f0xx_usart.o
.debug_abbrev 0x00000b60 0x124 .\..\obj\lib\system_stm32f0xx.o
.debug_abbrev 0x00000c84 0x17f .\..\obj\main.o
.debug_abbrev 0x00000e03 0x10a .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_abbrev 0x00000f0d 0x231 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_abbrev 0x0000113e 0x45 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_abbrev 0x00001183 0x14 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.debug_abbrev 0x00000e03 0x14 .\..\obj\startup_stm32f0xx.o
.debug_abbrev 0x00000e17 0x10a .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_abbrev 0x00000f21 0x231 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_abbrev 0x00001152 0x45 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_abbrev 0x00001197 0xca .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_abbrev 0x00001261 0x118 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_abbrev 0x00001379 0x1ae .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
@ -4535,13 +4535,13 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.debug_aranges
0x00000570 0x20 .\..\obj\main.o
.debug_aranges
0x00000590 0x30 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x00000590 0x20 .\..\obj\startup_stm32f0xx.o
.debug_aranges
0x000005c0 0x78 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x000005b0 0x30 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_aranges
0x00000638 0x28 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x000005e0 0x78 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_aranges
0x00000660 0x20 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x00000658 0x28 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_aranges
0x00000680 0x50 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_aranges
@ -4654,7 +4654,7 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.debug_macro 0x0000c862 0x91 .\..\obj\~#\~#\~#\source\cop.o
.debug_macro 0x0000c8f3 0x157 .\..\obj\~#\~#\~#\source\xcp.o
.debug_line 0x00000000 0x58dc
.debug_line 0x00000000 0x58bf
.debug_line 0x00000000 0x53e .\..\obj\hooks.o
.debug_line 0x0000053e 0x53d .\..\obj\led.o
.debug_line 0x00000a7b 0x740 .\..\obj\lib\spl\src\stm32f0xx_flash.o
@ -4664,19 +4664,19 @@ OUTPUT(.\..\bin\openblt_stm32f051.elf elf32-littlearm)
.debug_line 0x000023e5 0x848 .\..\obj\lib\spl\src\stm32f0xx_usart.o
.debug_line 0x00002c2d 0x493 .\..\obj\lib\system_stm32f0xx.o
.debug_line 0x000030c0 0x527 .\..\obj\main.o
.debug_line 0x000035e7 0x558 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_line 0x00003b3f 0x6d3 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_line 0x00004212 0x142 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_line 0x00004354 0xb4 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.debug_line 0x00004408 0x1aa .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_line 0x000045b2 0x569 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_line 0x00004b1b 0x5c7 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_line 0x000050e2 0x10a .\..\obj\~#\~#\~#\source\assert.o
.debug_line 0x000051ec 0x128 .\..\obj\~#\~#\~#\source\backdoor.o
.debug_line 0x00005314 0x11f .\..\obj\~#\~#\~#\source\boot.o
.debug_line 0x00005433 0x191 .\..\obj\~#\~#\~#\source\com.o
.debug_line 0x000055c4 0x115 .\..\obj\~#\~#\~#\source\cop.o
.debug_line 0x000056d9 0x203 .\..\obj\~#\~#\~#\source\xcp.o
.debug_line 0x000035e7 0x97 .\..\obj\startup_stm32f0xx.o
.debug_line 0x0000367e 0x558 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_line 0x00003bd6 0x6d3 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_line 0x000042a9 0x142 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_line 0x000043eb 0x1aa .\..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_line 0x00004595 0x569 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_line 0x00004afe 0x5c7 .\..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_line 0x000050c5 0x10a .\..\obj\~#\~#\~#\source\assert.o
.debug_line 0x000051cf 0x128 .\..\obj\~#\~#\~#\source\backdoor.o
.debug_line 0x000052f7 0x11f .\..\obj\~#\~#\~#\source\boot.o
.debug_line 0x00005416 0x191 .\..\obj\~#\~#\~#\source\com.o
.debug_line 0x000055a7 0x115 .\..\obj\~#\~#\~#\source\cop.o
.debug_line 0x000056bc 0x203 .\..\obj\~#\~#\~#\source\xcp.o
.debug_str 0x00000000 0x4207e
.debug_str 0x00000000 0x3fb4d .\..\obj\hooks.o

547
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/bin/openblt_stm32f051.srec
View File

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297
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/ide/stm32f0.depend
View File

@ -617,7 +617,7 @@
"led.h"
"stm32f0xx.h"
1456845505 c:\work\software\openblt\target\source\boot.h
1499159026 c:\work\software\openblt\target\source\boot.h
"types.h"
"assert.h"
"blt_conf.h"
@ -632,29 +632,29 @@
1461858281 c:\work\software\openblt\target\source\armcm0_stm32\types.h
1456845505 c:\work\software\openblt\target\source\assert.h
1495810634 c:\work\software\openblt\target\source\assert.h
1461928291 c:\work\software\openblt\target\demo\armcm0_stm32_discovery_stm32f051_gcc\boot\\blt_conf.h
1456845505 c:\work\software\openblt\target\source\plausibility.h
1495810634 c:\work\software\openblt\target\source\plausibility.h
1456845505 c:\work\software\openblt\target\source\cpu.h
1495810632 c:\work\software\openblt\target\source\cpu.h
1456845505 c:\work\software\openblt\target\source\cop.h
1495810633 c:\work\software\openblt\target\source\cop.h
1456845505 c:\work\software\openblt\target\source\nvm.h
1495810632 c:\work\software\openblt\target\source\nvm.h
1456845505 c:\work\software\openblt\target\source\timer.h
1495810633 c:\work\software\openblt\target\source\timer.h
1456845505 c:\work\software\openblt\target\source\backdoor.h
1495810633 c:\work\software\openblt\target\source\backdoor.h
1456845505 c:\work\software\openblt\target\source\file.h
1495810634 c:\work\software\openblt\target\source\file.h
"ff.h"
1456845505 c:\work\software\openblt\target\source\com.h
1495810633 c:\work\software\openblt\target\source\com.h
"xcp.h"
1456845506 c:\work\software\openblt\target\source\xcp.h
1495810633 c:\work\software\openblt\target\source\xcp.h
1461925958 source:c:\work\software\openblt\target\source\armcm0_stm32\cpu.c
"boot.h"
@ -674,34 +674,34 @@
"boot.h"
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1456845497 source:c:\work\software\openblt\target\source\assert.c
1495810634 source:c:\work\software\openblt\target\source\assert.c
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1456845497 source:c:\work\software\openblt\target\source\backdoor.c
1495810633 source:c:\work\software\openblt\target\source\backdoor.c
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1456845497 source:c:\work\software\openblt\target\source\boot.c
1495810634 source:c:\work\software\openblt\target\source\boot.c
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1456845497 source:c:\work\software\openblt\target\source\com.c
1495810633 source:c:\work\software\openblt\target\source\com.c
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1456845505 c:\work\software\openblt\target\source\can.h
1495810632 c:\work\software\openblt\target\source\can.h
1456845505 c:\work\software\openblt\target\source\uart.h
1495810634 c:\work\software\openblt\target\source\uart.h
1456845506 c:\work\software\openblt\target\source\usb.h
1495810633 c:\work\software\openblt\target\source\usb.h
1456845505 c:\work\software\openblt\target\source\net.h
1495810633 c:\work\software\openblt\target\source\net.h
1456845497 source:c:\work\software\openblt\target\source\cop.c
1495810633 source:c:\work\software\openblt\target\source\cop.c
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1456845497 source:c:\work\software\openblt\target\source\xcp.c
1495810633 source:c:\work\software\openblt\target\source\xcp.c
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1461910205 source:c:\work\software\openblt\target\source\armcm0_stm32\uart.c
@ -715,3 +715,258 @@
"led.h"
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1495810643 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\hooks.c
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1495810634 c:\work\software\openblt\target\source\armcm0_stm32f0\types.h
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1495810643 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\led.h
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\stm32f0xx.h
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<stdint.h>
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1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\cmsis\core_cm0.h
<stdint.h>
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1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\cmsis\core_cminstr.h
<cmsis_iar.h>
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\cmsis\core_cmfunc.h
<cmsis_iar.h>
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\system_stm32f0xx.h
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\stm32f0xx_conf.h
"stm32f0xx_adc.h"
"stm32f0xx_can.h"
"stm32f0xx_cec.h"
"stm32f0xx_crc.h"
"stm32f0xx_crs.h"
"stm32f0xx_comp.h"
"stm32f0xx_dac.h"
"stm32f0xx_dbgmcu.h"
"stm32f0xx_dma.h"
"stm32f0xx_exti.h"
"stm32f0xx_flash.h"
"stm32f0xx_gpio.h"
"stm32f0xx_syscfg.h"
"stm32f0xx_i2c.h"
"stm32f0xx_iwdg.h"
"stm32f0xx_pwr.h"
"stm32f0xx_rcc.h"
"stm32f0xx_rtc.h"
"stm32f0xx_spi.h"
"stm32f0xx_tim.h"
"stm32f0xx_usart.h"
"stm32f0xx_wwdg.h"
"stm32f0xx_misc.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_adc.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_can.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_cec.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_crc.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_crs.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_comp.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_dac.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_dbgmcu.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_dma.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_exti.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_flash.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_gpio.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_syscfg.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_i2c.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_iwdg.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_pwr.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_rcc.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_rtc.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_spi.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_tim.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_usart.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_wwdg.h
"stm32f0xx.h"
1495810644 c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\inc\stm32f0xx_misc.h
"stm32f0xx.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\led.c
"boot.h"
"led.h"
"stm32f0xx.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_adc.c
"stm32f0xx_adc.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_can.c
"stm32f0xx_can.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_cec.c
"stm32f0xx_cec.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_comp.c
"stm32f0xx_comp.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_crc.c
"stm32f0xx_crc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_crs.c
"stm32f0xx_crs.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_dac.c
"stm32f0xx_dac.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_dbgmcu.c
"stm32f0xx_dbgmcu.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_dma.c
"stm32f0xx_dma.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_exti.c
"stm32f0xx_exti.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_flash.c
"stm32f0xx_flash.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_gpio.c
"stm32f0xx_gpio.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_i2c.c
"stm32f0xx_i2c.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_iwdg.c
"stm32f0xx_iwdg.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_misc.c
"stm32f0xx_misc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_pwr.c
"stm32f0xx_pwr.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_rcc.c
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_rtc.c
"stm32f0xx_rtc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_spi.c
"stm32f0xx_spi.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_syscfg.c
"stm32f0xx_syscfg.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_tim.c
"stm32f0xx_tim.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_usart.c
"stm32f0xx_usart.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\spl\src\stm32f0xx_wwdg.c
"stm32f0xx_wwdg.h"
"stm32f0xx_rcc.h"
1495810644 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\lib\system_stm32f0xx.c
"stm32f0xx.h"
1495810643 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\main.c
"boot.h"
"stm32f0xx.h"
1499944079 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_discovery_stm32f051_gcc\boot\startup_stm32f0xx.s
1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\cpu.c
"boot.h"
"stm32f0xx.h"
1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\flash.c
"boot.h"
"stm32f0xx.h"
"flash_layout.c"
1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\gcc\cpu_comp.c
"boot.h"
1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\nvm.c
"boot.h"
"flash.h"
1495810634 c:\work\software\openblt\target\source\armcm0_stm32f0\flash.h
1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\timer.c
"boot.h"
"stm32f0xx.h"
1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\uart.c
"boot.h"
"stm32f0xx.h"
1495810634 source:c:\work\software\openblt\target\source\file.c
"boot.h"
<string.h>
<ctype.h>
1495810633 source:c:\work\software\openblt\target\source\net.c
"boot.h"
"netdev.h"
"uip.h"
"uip_arp.h"

10
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/ide/stm32f0.ebp
View File

@ -31,7 +31,7 @@
</Build>
<Device>
<Add option="$device=cortex-m0" />
<Add option="$lscript=./../../../../Source/ARMCM0_STM32F0/GCC/memory.x" />
<Add option="$lscript=./../stm32f051r8_flash.ld" />
<Add option="$stack=0x0100" />
<Add option="$heap=0x0000" />
</Device>
@ -267,6 +267,10 @@
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\" />
</Unit>
<Unit filename="..\startup_stm32f0xx.S">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\" />
</Unit>
<Unit filename="..\..\..\..\Source\ARMCM0_STM32F0\cpu.c">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\" />
@ -282,10 +286,6 @@
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\GCC\" />
</Unit>
<Unit filename="..\..\..\..\Source\ARMCM0_STM32F0\GCC\cstart.S">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\GCC\" />
</Unit>
<Unit filename="..\..\..\..\Source\ARMCM0_STM32F0\nvm.c">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\" />

2
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/ide/stm32f0.elay
View File

@ -3,7 +3,7 @@
<ActiveTarget name="Debug" />
<File name="..\main.c" open="1" top="1" tabpos="1" split="0" active="1" splitpos="0" zoom_1="0" zoom_2="0">
<Cursor>
<Cursor1 position="0" topLine="0" />
<Cursor1 position="2703" topLine="2" />
</Cursor>
</File>
</EmBitz_layout_file>

8
Target/Source/ARMCM0_STM32F0/GCC/cstart.S → Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/startup_stm32f0xx.S
View File

@ -1,4 +1,4 @@
/* File: cstart.s
/* File: startup_ARMCM0.S
* Purpose: startup file for Cortex-M0 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V1.3
@ -128,12 +128,6 @@ __isr_vector:
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Initialize the stackpointer. this is done automatically after a reset event.
* the bootloader performs a software reset by calling this reset handler, in
* which case the stackpointer is not yet initialized. */
ldr r1, =__StackTop
mov sp, r1
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.

34
Target/Source/ARMCM0_STM32F0/GCC/memory.x → Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_GCC/Boot/stm32f051r8_flash.ld
View File

@ -1,6 +1,35 @@
/* ---------------------------------------------------------------------------- */
/* Em::Blocks embedded development Support */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, EmBlocks */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* EmBlocks's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY EBLOCKS "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL EMBLOCKS BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*------------------------------------------------------------------------------
* Linker script for running OpenBLT in internal FLASH on the STM32F0xx
* Linker script for running in internal FLASH on the STM32F051R8
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
@ -8,12 +37,13 @@ SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
/* The first part in flash is reserved for OpenBLT */
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 8K
/* do not use the first 192 bytes because this is where
* the bootloader copies the user program vector table
* right before it starts the user program.
*/
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 4K - 192
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 8K - 192
}
/* Linker script to place sections and symbol values. Should be used together

BIN
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/bin/openblt_stm32f051.out
View File

Binary file not shown.

37
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/bin/openblt_stm32f051.srec
View File

@ -1,16 +1,16 @@
S01900006F70656E626C745F73746D3332663035312E7372656303
S31508000000D80400208D180008E3050008DF10000852
S31508000000D8040020A5180008E3050008DF1000083A
S3150800001000000000000000000000000000000000D2
S315080000200000000000000000000000001F13000888
S3150800003000000000000000005B1400086B180008B0
S3150800004077180008C5180008D1180008D318000842
S31508000050D5180008D7180008D9180008DB180008B2
S31508000060DD180008DF180008E1180008E318000882
S31508000070E5180008E7180008E9180008EB18000852
S31508000080ED180008EF18000800000000F118000835
S31508000090F3180008F5180008F7180008F9180008FA
S315080000A0FB180008FD180008FF18000801190008C9
S315080000B003190008000000000519000800000000E8
S3150800004077180008A1180008C9180008CB18000876
S31508000050CD180008CF180008D1180008D3180008D2
S31508000060D5180008D7180008D9180008DB180008A2
S31508000070DD180008DF180008E1180008E318000872
S31508000080E5180008E718000800000000E91800084D
S31508000090EB180008ED180008EF180008F11800081A
S315080000A0F3180008F5180008F7180008F9180008EA
S315080000B0FB18000800000000FD18000800000000FA
S315080000C00020C043834908600020C0438249086075
S315080000D0704770B504000D001600200000F0DAF92C
S315080000E0FF2805D06019401E00F0D4F9FF2801D179
@ -267,7 +267,7 @@ S31508001080886410BD80B541681148806CFFF75BFB2A
S31508001090002803D13120FFF79BFE05E0FF200C490D
S315080010A0C87001200949088001BD80B5FFF75CFAC0
S315080010B0FF200749C87001200449088001BD0000C7
S315080010C0C8180008E4080020E708002024090020C2
S315080010C0C0180008E4080020E708002024090020CA
S315080010D0E008002080B53120FFF77AFE01BDFEE763
S315080010E000B587B0E12000020090002001900020A2
S315080010F0029000200390002005900C200490694679
@ -386,18 +386,17 @@ S315080017F0ECD0F8E730BC704710B507497944183182
S31508001800064C7C44163404E0081D0A688918884783
S315080018100100A142F8D110BD080000002800000010
S315080018206DFFFFFFF0040000D80400200000000050
S3150800183099FFFFFF140000006C000000C0000020A4
S3150800183099FFFFFF1400000054000000C0000020BC
S315080018400000000000F00BF8002801D0FFF7D4FFD5
S31508001850002000BF00BFFFF78BFE00F002F8012052
S31508001860704780B500F002F801BDFEE70746384626
S3150800187000F002F8FBE7FEE780B500BF00BF024AAA
S3150800188011001820ABBEFBE7260002000248854679
S315080018900248804702480047D80400205D14000823
S315080018A0B91800080000000001020304010203043D
S315080018B0060708090400000000BF00BF00BF00BFFC
S315080018C0FFF7C0FFFEE700004F70656E424C5400FC
S3150800188011001820ABBEFBE726000200000000008E
S315080018900102030401020304060708090400000004
S315080018A0FEE7000001488047014800475D1400082C
S315080018B0B518000800BF00BF00BF00BFFFF7C2FF92
S315080018C04F70656E424C5400FEE7FEE7FEE7FEE702
S315080018D0FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE7D2
S315080018E0FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE7C2
S315080018F0FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE7B2
S30B08001900FEE7FEE7FEE724
S705080018B921
S313080018F0FEE7FEE7FEE7FEE7FEE7FEE7FEE799
S705080018B525

12
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/ide/settings/stm32f0.dbgdt
View File

@ -39,7 +39,7 @@
<Wnd0>
<Wnd3>
<Tabs>
<Tab>
<Identity>TabID-10419-31860</Identity>
@ -55,7 +55,7 @@
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<SelectedTab>0</SelectedTab></Wnd3><Wnd4>
<Tabs>
<Tab>
<Identity>TabID-21167-31863</Identity>
@ -67,7 +67,7 @@
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd1><Wnd2>
<SelectedTab>0</SelectedTab></Wnd4><Wnd5>
<Tabs>
<Tab>
<Identity>TabID-31916-31867</Identity>
@ -77,20 +77,20 @@
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2></Windows>
<SelectedTab>0</SelectedTab></Wnd5></Windows>
<Editor>
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4
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/ide/settings/stm32f0.dni
View File

@ -21,7 +21,7 @@ ActionState=1
Enabled=0
ShowSource=1
[DebugChecksum]
Checksum=1948492560
Checksum=1230359385
[Exceptions]
StopOnUncaught=_ 0
StopOnThrow=_ 0
@ -92,7 +92,7 @@ LogFile=_ ""
[CallStackLog]
Enabled=0
[CallStackStripe]
ShowTiming=66
ShowTiming=1
[Disassemble mode]
mode=0
[Breakpoints2]

10
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/ide/settings/stm32f0.wsdt
View File

@ -17,7 +17,7 @@
<Build><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1395</ColumnWidth1><ColumnWidth2>372</ColumnWidth2><ColumnWidth3>93</ColumnWidth3></Build><TerminalIO/><Debug-Log><ColumnWidth0>17</ColumnWidth0><ColumnWidth1>415</ColumnWidth1></Debug-Log></Static>
<Windows>
<Wnd0>
<Wnd2>
<Tabs>
<Tab>
<Identity>TabID-25663-28709</Identity>
@ -25,24 +25,24 @@
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>stm32f0</ExpandedNode><ExpandedNode>stm32f0/EWARM</ExpandedNode><ExpandedNode>stm32f0/STM32F0-Discovery</ExpandedNode><ExpandedNode>stm32f0/src</ExpandedNode><ExpandedNode>stm32f0/src/app</ExpandedNode><ExpandedNode>stm32f0/src/core</ExpandedNode></NodeDict></Session>
<NodeDict><ExpandedNode>stm32f0</ExpandedNode><ExpandedNode>stm32f0/EWARM</ExpandedNode><ExpandedNode>stm32f0/Output</ExpandedNode><ExpandedNode>stm32f0/STM32F0-Discovery</ExpandedNode><ExpandedNode>stm32f0/src</ExpandedNode><ExpandedNode>stm32f0/src/app</ExpandedNode><ExpandedNode>stm32f0/src/core</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-4061-29728</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-8567-27473</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1></Windows>
<SelectedTab>0</SelectedTab></Wnd2><Wnd3><Tabs><Tab><Identity>TabID-4061-29728</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-8567-27473</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
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3091
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/ide/stm32f0.dep
View File

File diff suppressed because it is too large Load Diff

8
Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/ide/stm32f0.ewp
View File

@ -733,7 +733,7 @@
</option>
<option>
<name>IlinkIcfFile</name>
<state>$PROJ_DIR$\..\..\..\..\Source\ARMCM0_STM32F0\IAR\memory.x</state>
<state>$PROJ_DIR$\..\stm32f0xx_flash.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
@ -1193,9 +1193,6 @@
<file>
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM0_STM32F0\IAR\cpu_comp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM0_STM32F0\IAR\cstart.s</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\Source\file.c</name>
</file>
@ -1263,6 +1260,9 @@
<file>
<name>$PROJ_DIR$\..\main.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\startup_stm32f0xx.s</name>
</file>
</group>
</project>

7
Target/Source/ARMCM0_STM32F0/IAR/cstart.s → Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/startup_stm32f0xx.s
View File

@ -115,15 +115,8 @@ __vector_table
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
;; Initialize the stackpointer. this is done automatically after a reset event.
;; the bootloader performs a software reset by calling this reset handler, in
;; which case the stackpointer is not yet initialized.
LDR R0, =sfe(CSTACK)
MOV SP, R0
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start

2
Target/Source/ARMCM0_STM32F0/IAR/memory.x → Target/Demo/ARMCM0_STM32F0_Discovery_STM32F051_IAR/Boot/stm32f0xx_flash.icf
View File

@ -8,7 +8,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x08001FFF;
* right before it starts the user program.
*/
define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF;
define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;

BIN
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/bin/openblt_stm32f091.elf
View File

Binary file not shown.

501
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/bin/openblt_stm32f091.map
View File

@ -3234,6 +3234,8 @@ Discarded input sections
.debug_macro 0x00000000 0x356 ..\obj\main.o
.debug_macro 0x00000000 0x34 ..\obj\main.o
.debug_macro 0x00000000 0x3a ..\obj\main.o
.data 0x00000000 0x0 ..\obj\startup_stm32f0xx.o
.bss 0x00000000 0x0 ..\obj\startup_stm32f0xx.o
.group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
@ -3524,8 +3526,6 @@ Discarded input sections
.debug_macro 0x00000000 0x1c ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_macro 0x00000000 0x9f ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_macro 0x00000000 0x40 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.data 0x00000000 0x0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.bss 0x00000000 0x0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
@ -3980,7 +3980,7 @@ Memory Configuration
Name Origin Length Attributes
ROM 0x08000000 0x00002000 xr
RAM 0x200000c0 0x00000f40 xrw
RAM 0x200000c0 0x00007f40 xrw
*default* 0x00000000 0xffffffff
Linker script and memory map
@ -3991,9 +3991,9 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x00000000 __HEAP_SIZE = 0x0
0x00000100 __STACK_SIZE = 0x100
.text 0x08000000 0x1f38
.text 0x08000000 0x1f30
*(.isr_vector)
.isr_vector 0x08000000 0xc0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.isr_vector 0x08000000 0xc0 ..\obj\startup_stm32f0xx.o
0x08000000 __isr_vector
*(.text*)
.text 0x080000c0 0x60 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
@ -4119,214 +4119,215 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x08000c00 SystemInit
.text.main 0x08000cbc 0xf4 ..\obj\main.o
0x08000cbc main
.text.CanInit 0x08000db0 0xe0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08000db0 CanInit
.text 0x08000db0 0xa0 ..\obj\startup_stm32f0xx.o
0x08000db0 Reset_Handler
0x08000dfa NMI_Handler
0x08000dfc HardFault_Handler
0x08000dfe SVC_Handler
0x08000e00 PendSV_Handler
0x08000e02 SysTick_Handler
0x08000e04 Default_Handler
0x08000e06 WWDG_IRQHandler
0x08000e08 PVD_IRQHandler
0x08000e0a RTC_IRQHandler
0x08000e0c FLASH_IRQHandler
0x08000e0e RCC_IRQHandler
0x08000e10 EXTI0_1_IRQHandler
0x08000e12 EXTI2_3_IRQHandler
0x08000e14 EXTI4_15_IRQHandler
0x08000e16 TS_IRQHandler
0x08000e18 DMA1_Channel1_IRQHandler
0x08000e1a DMA1_Channel2_3_IRQHandler
0x08000e1c DMA1_Channel4_5_IRQHandler
0x08000e1e ADC1_COMP_IRQHandler
0x08000e20 TIM1_BRK_UP_TRG_COM_IRQHandler
0x08000e22 TIM1_CC_IRQHandler
0x08000e24 TIM2_IRQHandler
0x08000e26 TIM3_IRQHandler
0x08000e28 TIM6_DAC_IRQHandler
0x08000e2a TIM7_IRQHandler
0x08000e2c TIM14_IRQHandler
0x08000e2e TIM15_IRQHandler
0x08000e30 TIM16_IRQHandler
0x08000e32 TIM17_IRQHandler
0x08000e34 I2C1_IRQHandler
0x08000e36 I2C2_IRQHandler
0x08000e38 SPI1_IRQHandler
0x08000e3a SPI2_IRQHandler
0x08000e3c USART1_IRQHandler
0x08000e3e USART2_IRQHandler
0x08000e40 USART3_4_IRQHandler
0x08000e42 CEC_IRQHandler
0x08000e44 USB_IRQHandler
0x08000e46 BootRAM
.text.CanInit 0x08000e50 0xe0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08000e50 CanInit
.text.CanTransmitPacket
0x08000e90 0x54 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08000e90 CanTransmitPacket
0x08000f30 0x54 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08000f30 CanTransmitPacket
.text.CanReceivePacket
0x08000ee4 0x64 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08000ee4 CanReceivePacket
.text.CpuInit 0x08000f48 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000f48 CpuInit
0x08000f84 0x64 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08000f84 CanReceivePacket
.text.CpuInit 0x08000fe8 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000fe8 CpuInit
.text.CpuMemCopy
0x08000f50 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000f50 CpuMemCopy
0x08000ff0 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000ff0 CpuMemCopy
.text.CpuStartUserProgram
0x08000f74 0x48 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08000f74 CpuStartUserProgram
0x08001014 0x48 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x08001014 CpuStartUserProgram
.text.FlashGetSector
0x08000fbc 0x3c ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0800105c 0x3c ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashWriteBlock
0x08000ff8 0x84 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001098 0x84 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashSwitchBlock
0x0800107c 0x54 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0800111c 0x54 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashAddToBlock
0x080010d0 0x98 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001170 0x98 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.text.FlashInit
0x08001168 0x18 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001168 FlashInit
0x08001208 0x18 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001208 FlashInit
.text.FlashWrite
0x08001180 0x5c ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001180 FlashWrite
0x08001220 0x5c ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001220 FlashWrite
.text.FlashErase
0x080011dc 0x110 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x080011dc FlashErase
0x0800127c 0x110 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0800127c FlashErase
.text.FlashWriteChecksum
0x080012ec 0x50 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x080012ec FlashWriteChecksum
0x0800138c 0x50 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0800138c FlashWriteChecksum
.text.FlashVerifyChecksum
0x0800133c 0x58 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0800133c FlashVerifyChecksum
0x080013dc 0x58 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x080013dc FlashVerifyChecksum
.text.FlashDone
0x08001394 0x34 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001394 FlashDone
0x08001434 0x34 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001434 FlashDone
.text.FlashGetUserProgBaseAddress
0x080013c8 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x080013c8 FlashGetUserProgBaseAddress
0x08001468 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001468 FlashGetUserProgBaseAddress
.text.CpuIrqDisable
0x080013d0 0x4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x080013d0 CpuIrqDisable
0x08001470 0x4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x08001470 CpuIrqDisable
.text.CpuIrqEnable
0x080013d4 0x4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x080013d4 CpuIrqEnable
.text 0x080013d8 0xa8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x080013d8 Reset_Handler
0x0800142a NMI_Handler
0x0800142c HardFault_Handler
0x0800142e SVC_Handler
0x08001430 PendSV_Handler
0x08001432 SysTick_Handler
0x08001434 Default_Handler
0x08001436 WWDG_IRQHandler
0x08001438 PVD_IRQHandler
0x0800143a RTC_IRQHandler
0x0800143c FLASH_IRQHandler
0x0800143e RCC_IRQHandler
0x08001440 EXTI0_1_IRQHandler
0x08001442 EXTI2_3_IRQHandler
0x08001444 EXTI4_15_IRQHandler
0x08001446 TS_IRQHandler
0x08001448 DMA1_Channel1_IRQHandler
0x0800144a DMA1_Channel2_3_IRQHandler
0x0800144c DMA1_Channel4_5_IRQHandler
0x0800144e ADC1_COMP_IRQHandler
0x08001450 TIM1_BRK_UP_TRG_COM_IRQHandler
0x08001452 TIM1_CC_IRQHandler
0x08001454 TIM2_IRQHandler
0x08001456 TIM3_IRQHandler
0x08001458 TIM6_DAC_IRQHandler
0x0800145a TIM7_IRQHandler
0x0800145c TIM14_IRQHandler
0x0800145e TIM15_IRQHandler
0x08001460 TIM16_IRQHandler
0x08001462 TIM17_IRQHandler
0x08001464 I2C1_IRQHandler
0x08001466 I2C2_IRQHandler
0x08001468 SPI1_IRQHandler
0x0800146a SPI2_IRQHandler
0x0800146c USART1_IRQHandler
0x0800146e USART2_IRQHandler
0x08001470 USART3_4_IRQHandler
0x08001472 CEC_IRQHandler
0x08001474 USB_IRQHandler
.text.NvmInit 0x08001480 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001480 NvmInit
0x08001474 0x4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x08001474 CpuIrqEnable
.text.NvmInit 0x08001478 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001478 NvmInit
.text.NvmWrite
0x08001488 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001488 NvmWrite
0x08001480 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001480 NvmWrite
.text.NvmErase
0x08001490 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001490 NvmErase
0x08001488 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001488 NvmErase
.text.NvmVerifyChecksum
0x08001498 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001498 NvmVerifyChecksum
0x08001490 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001490 NvmVerifyChecksum
.text.NvmGetUserProgBaseAddress
0x080014a0 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x080014a0 NvmGetUserProgBaseAddress
.text.NvmDone 0x080014a8 0x10 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x080014a8 NvmDone
0x08001498 0x8 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x08001498 NvmGetUserProgBaseAddress
.text.NvmDone 0x080014a0 0x10 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
0x080014a0 NvmDone
.text.TimerInit
0x080014b8 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014b8 TimerInit
0x080014b0 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014b0 TimerInit
.text.TimerReset
0x080014dc 0xc ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014dc TimerReset
0x080014d4 0xc ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014d4 TimerReset
.text.TimerUpdate
0x080014e8 0x1c ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014e8 TimerUpdate
0x080014e0 0x1c ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014e0 TimerUpdate
.text.TimerGet
0x08001504 0x10 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x08001504 TimerGet
0x080014fc 0x10 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
0x080014fc TimerGet
.text.UartTransmitByte
0x08001514 0x34 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x0800150c 0x34 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.text.UartReceiveByte
0x08001548 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08001540 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.text.UartInit
0x0800156c 0x3c ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x0800156c UartInit
0x08001564 0x3c ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08001564 UartInit
.text.UartTransmitPacket
0x080015a8 0x58 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x080015a8 UartTransmitPacket
0x080015a0 0x58 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x080015a0 UartTransmitPacket
.text.UartReceivePacket
0x08001600 0xa0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08001600 UartReceivePacket
0x080015f8 0xa0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x080015f8 UartReceivePacket
.text.AssertFailure
0x080016a0 0x8 ..\obj\~#\~#\~#\source\assert.o
0x080016a0 AssertFailure
0x08001698 0x8 ..\obj\~#\~#\~#\source\assert.o
0x08001698 AssertFailure
.text.BackDoorCheck
0x080016a8 0x38 ..\obj\~#\~#\~#\source\backdoor.o
0x080016a8 BackDoorCheck
0x080016a0 0x38 ..\obj\~#\~#\~#\source\backdoor.o
0x080016a0 BackDoorCheck
.text.BackDoorInit
0x080016e0 0x20 ..\obj\~#\~#\~#\source\backdoor.o
0x080016e0 BackDoorInit
0x080016d8 0x20 ..\obj\~#\~#\~#\source\backdoor.o
0x080016d8 BackDoorInit
.text.BootInit
0x08001700 0x1c ..\obj\~#\~#\~#\source\boot.o
0x08001700 BootInit
0x080016f8 0x1c ..\obj\~#\~#\~#\source\boot.o
0x080016f8 BootInit
.text.BootTask
0x0800171c 0x14 ..\obj\~#\~#\~#\source\boot.o
0x0800171c BootTask
.text.ComInit 0x08001730 0x20 ..\obj\~#\~#\~#\source\com.o
0x08001730 ComInit
.text.ComTask 0x08001750 0x38 ..\obj\~#\~#\~#\source\com.o
0x08001750 ComTask
.text.ComFree 0x08001788 0x4 ..\obj\~#\~#\~#\source\com.o
0x08001788 ComFree
0x08001714 0x14 ..\obj\~#\~#\~#\source\boot.o
0x08001714 BootTask
.text.ComInit 0x08001728 0x20 ..\obj\~#\~#\~#\source\com.o
0x08001728 ComInit
.text.ComTask 0x08001748 0x38 ..\obj\~#\~#\~#\source\com.o
0x08001748 ComTask
.text.ComFree 0x08001780 0x4 ..\obj\~#\~#\~#\source\com.o
0x08001780 ComFree
.text.ComTransmitPacket
0x0800178c 0x30 ..\obj\~#\~#\~#\source\com.o
0x0800178c ComTransmitPacket
0x08001784 0x30 ..\obj\~#\~#\~#\source\com.o
0x08001784 ComTransmitPacket
.text.ComGetActiveInterfaceMaxRxLen
0x080017bc 0x24 ..\obj\~#\~#\~#\source\com.o
0x080017bc ComGetActiveInterfaceMaxRxLen
0x080017b4 0x24 ..\obj\~#\~#\~#\source\com.o
0x080017b4 ComGetActiveInterfaceMaxRxLen
.text.ComGetActiveInterfaceMaxTxLen
0x080017e0 0x24 ..\obj\~#\~#\~#\source\com.o
0x080017e0 ComGetActiveInterfaceMaxTxLen
0x080017d8 0x24 ..\obj\~#\~#\~#\source\com.o
0x080017d8 ComGetActiveInterfaceMaxTxLen
.text.ComIsConnected
0x08001804 0x8 ..\obj\~#\~#\~#\source\com.o
0x08001804 ComIsConnected
.text.CopInit 0x0800180c 0x8 ..\obj\~#\~#\~#\source\cop.o
0x0800180c CopInit
0x080017fc 0x8 ..\obj\~#\~#\~#\source\com.o
0x080017fc ComIsConnected
.text.CopInit 0x08001804 0x8 ..\obj\~#\~#\~#\source\cop.o
0x08001804 CopInit
.text.CopService
0x08001814 0x8 ..\obj\~#\~#\~#\source\cop.o
0x08001814 CopService
0x0800180c 0x8 ..\obj\~#\~#\~#\source\cop.o
0x0800180c CopService
.text.XcpSetCtoError
0x0800181c 0x14 ..\obj\~#\~#\~#\source\xcp.o
.text.XcpInit 0x08001830 0x1c ..\obj\~#\~#\~#\source\xcp.o
0x08001830 XcpInit
0x08001814 0x14 ..\obj\~#\~#\~#\source\xcp.o
.text.XcpInit 0x08001828 0x1c ..\obj\~#\~#\~#\source\xcp.o
0x08001828 XcpInit
.text.XcpIsConnected
0x0800184c 0x10 ..\obj\~#\~#\~#\source\xcp.o
0x0800184c XcpIsConnected
0x08001844 0x10 ..\obj\~#\~#\~#\source\xcp.o
0x08001844 XcpIsConnected
.text.XcpPacketTransmitted
0x0800185c 0x10 ..\obj\~#\~#\~#\source\xcp.o
0x0800185c XcpPacketTransmitted
0x08001854 0x10 ..\obj\~#\~#\~#\source\xcp.o
0x08001854 XcpPacketTransmitted
.text.XcpPacketReceived
0x0800186c 0x2c8 ..\obj\~#\~#\~#\source\xcp.o
0x0800186c XcpPacketReceived
.text 0x08001b34 0x114 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_udivsi3.o)
0x08001b34 __aeabi_uidiv
0x08001b34 __udivsi3
0x08001c40 __aeabi_uidivmod
.text 0x08001c48 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_dvmd_tls.o)
0x08001c48 __aeabi_idiv0
0x08001c48 __aeabi_ldiv0
.text.exit 0x08001c4c 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-exit.o)
0x08001c4c exit
0x08001864 0x2c8 ..\obj\~#\~#\~#\source\xcp.o
0x08001864 XcpPacketReceived
.text 0x08001b2c 0x114 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_udivsi3.o)
0x08001b2c __aeabi_uidiv
0x08001b2c __udivsi3
0x08001c38 __aeabi_uidivmod
.text 0x08001c40 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a(_dvmd_tls.o)
0x08001c40 __aeabi_idiv0
0x08001c40 __aeabi_ldiv0
.text.exit 0x08001c44 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-exit.o)
0x08001c44 exit
.text.__libc_init_array
0x08001c78 0x4c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-init.o)
0x08001c78 __libc_init_array
.text.memset 0x08001cc4 0x10 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-memset.o)
0x08001cc4 memset
.text._exit 0x08001cd4 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libnosys_s.a(_exit.o)
0x08001cd4 _exit
0x08001c70 0x4c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-init.o)
0x08001c70 __libc_init_array
.text.memset 0x08001cbc 0x10 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-memset.o)
0x08001cbc memset
.text._exit 0x08001ccc 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libnosys_s.a(_exit.o)
0x08001ccc _exit
*(.init)
*fill* 0x08001cd6 0x2
.init 0x08001cd8 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x08001cd8 _init
.init 0x08001cdc 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
*fill* 0x08001cce 0x2
.init 0x08001cd0 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x08001cd0 _init
.init 0x08001cd4 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
*(.fini)
.fini 0x08001ce4 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x08001ce4 _fini
.fini 0x08001ce8 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
.fini 0x08001cdc 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o
0x08001cdc _fini
.fini 0x08001ce0 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend.o *crtend?.o) .ctors)
@ -4339,57 +4340,57 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
*(.dtors)
*(.rodata*)
.rodata.str1.4
0x08001cf0 0x28 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08001ce8 0x28 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.rodata.canTiming
0x08001d18 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x08001d10 0x24 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.rodata.flashLayout
0x08001d3c 0xe4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x08001d34 0xe4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.rodata.str1.4
0x08001e20 0x2c ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x08001e18 0x2c ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
0x29 (size before relaxing)
.rodata.XcpPacketReceived
0x08001e4c 0xd8 ..\obj\~#\~#\~#\source\xcp.o
0x08001e44 0xd8 ..\obj\~#\~#\~#\source\xcp.o
.rodata.xcpStationId
0x08001f24 0x8 ..\obj\~#\~#\~#\source\xcp.o
0x08001f1c 0x8 ..\obj\~#\~#\~#\source\xcp.o
.rodata.str1.1
0x08001f2c 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
*fill* 0x08001f2e 0x2
0x08001f24 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
*fill* 0x08001f26 0x2
.rodata._global_impure_ptr
0x08001f30 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
0x08001f30 _global_impure_ptr
0x08001f28 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-impure.o)
0x08001f28 _global_impure_ptr
*(.eh_frame*)
.eh_frame 0x08001f34 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.eh_frame 0x08001f34 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtend.o
.eh_frame 0x08001f2c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.eh_frame 0x08001f2c 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtend.o
.glue_7 0x08001f38 0x0
.glue_7 0x08001f38 0x0 linker stubs
.glue_7 0x08001f30 0x0
.glue_7 0x08001f30 0x0 linker stubs
.glue_7t 0x08001f38 0x0
.glue_7t 0x08001f38 0x0 linker stubs
.glue_7t 0x08001f30 0x0
.glue_7t 0x08001f30 0x0 linker stubs
.vfp11_veneer 0x08001f38 0x0
.vfp11_veneer 0x08001f38 0x0 linker stubs
.vfp11_veneer 0x08001f30 0x0
.vfp11_veneer 0x08001f30 0x0 linker stubs
.v4_bx 0x08001f38 0x0
.v4_bx 0x08001f38 0x0 linker stubs
.v4_bx 0x08001f30 0x0
.v4_bx 0x08001f30 0x0 linker stubs
.iplt 0x08001f38 0x0
.iplt 0x08001f38 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.iplt 0x08001f30 0x0
.iplt 0x08001f30 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.ARM.extab
*(.ARM.extab* .gnu.linkonce.armextab.*)
0x08001f38 __exidx_start = .
0x08001f30 __exidx_start = .
.ARM.exidx 0x08001f38 0x8
.ARM.exidx 0x08001f30 0x8
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
.ARM.exidx 0x08001f38 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o
0x08001f40 __exidx_end = .
0x08001f40 __etext = .
.ARM.exidx 0x08001f30 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o
0x08001f38 __exidx_end = .
0x08001f38 __etext = .
.rel.dyn 0x08001f40 0x0
.rel.iplt 0x08001f40 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.rel.dyn 0x08001f38 0x0
.rel.iplt 0x08001f38 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.data 0x200000c0 0x7c load address 0x08001f40
.data 0x200000c0 0x7c load address 0x08001f38
0x200000c0 __data_start__ = .
*(vtable)
*(.data*)
@ -4419,13 +4420,13 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x2000013c . = ALIGN (0x4)
0x2000013c __data_end__ = .
.jcr 0x2000013c 0x0 load address 0x08001fbc
.jcr 0x2000013c 0x0 load address 0x08001fb4
.jcr 0x2000013c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.igot.plt 0x2000013c 0x0 load address 0x08001fbc
.igot.plt 0x2000013c 0x0 load address 0x08001fb4
.igot.plt 0x2000013c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
.bss 0x2000013c 0x50c load address 0x08001fbc
.bss 0x2000013c 0x50c load address 0x08001fb4
0x2000013c __bss_start__ = .
*(.bss*)
.bss 0x2000013c 0x1c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o
@ -4466,15 +4467,15 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-
0x20000648 __end__ = .
0x20000648 end = __end__
*(.heap*)
.heap 0x20000648 0x0 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.heap 0x20000648 0x0 ..\obj\startup_stm32f0xx.o
0x20000648 __HeapLimit = .
.stack_dummy 0x20000648 0x100
*(.stack)
.stack 0x20000648 0x100 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x20001000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM))
0x20000f00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
0x20001000 PROVIDE (__stack, __StackTop)
.stack 0x20000648 0x100 ..\obj\startup_stm32f0xx.o
0x20008000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM))
0x20007f00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
0x20008000 PROVIDE (__stack, __StackTop)
0x00000001 ASSERT ((__StackLimit >= __HeapLimit), region RAM overflowed with stack)
LOAD ..\obj\hooks.o
LOAD ..\obj\led.o
@ -4503,11 +4504,11 @@ LOAD ..\obj\lib\spl\src\stm32f0xx_usart.o
LOAD ..\obj\lib\spl\src\stm32f0xx_wwdg.o
LOAD ..\obj\lib\system_stm32f0xx.o
LOAD ..\obj\main.o
LOAD ..\obj\startup_stm32f0xx.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
@ -4562,15 +4563,15 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.ARM.attributes
0x0000021e 0x31 ..\obj\main.o
.ARM.attributes
0x0000024f 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x0000024f 0x1b ..\obj\startup_stm32f0xx.o
.ARM.attributes
0x00000280 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x0000026a 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.ARM.attributes
0x000002b1 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x0000029b 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.ARM.attributes
0x000002e2 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x000002cc 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.ARM.attributes
0x00000313 0x1b ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x000002fd 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.ARM.attributes
0x0000032e 0x31 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.ARM.attributes
@ -4634,7 +4635,7 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.comment 0x0000006e 0x6f ..\obj\~#\~#\~#\source\cop.o
.comment 0x0000006e 0x6f ..\obj\~#\~#\~#\source\xcp.o
.debug_info 0x00000000 0x78cb
.debug_info 0x00000000 0x78b3
.debug_info 0x00000000 0x268 ..\obj\hooks.o
.debug_info 0x00000268 0x2ba ..\obj\led.o
.debug_info 0x00000522 0xc2d ..\obj\lib\spl\src\stm32f0xx_can.o
@ -4645,20 +4646,20 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.debug_info 0x000031b9 0x1016 ..\obj\lib\spl\src\stm32f0xx_usart.o
.debug_info 0x000041cf 0x2c1 ..\obj\lib\system_stm32f0xx.o
.debug_info 0x00004490 0x513 ..\obj\main.o
.debug_info 0x000049a3 0x9a9 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_info 0x0000534c 0x2a7 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_info 0x000055f3 0x955 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_info 0x00005f48 0x84 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_info 0x00005fcc 0xa6 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.debug_info 0x00006072 0x252 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_info 0x000062c4 0x174 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_info 0x00006438 0x5a7 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_info 0x000069df 0xc6 ..\obj\~#\~#\~#\source\assert.o
.debug_info 0x00006aa5 0x114 ..\obj\~#\~#\~#\source\backdoor.o
.debug_info 0x00006bb9 0x156 ..\obj\~#\~#\~#\source\boot.o
.debug_info 0x00006d0f 0x2fe ..\obj\~#\~#\~#\source\com.o
.debug_info 0x0000700d 0xb6 ..\obj\~#\~#\~#\source\cop.o
.debug_info 0x000070c3 0x808 ..\obj\~#\~#\~#\source\xcp.o
.debug_info 0x000049a3 0x8e ..\obj\startup_stm32f0xx.o
.debug_info 0x00004a31 0x9a9 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_info 0x000053da 0x2a7 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_info 0x00005681 0x955 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_info 0x00005fd6 0x84 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_info 0x0000605a 0x252 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_info 0x000062ac 0x174 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_info 0x00006420 0x5a7 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_info 0x000069c7 0xc6 ..\obj\~#\~#\~#\source\assert.o
.debug_info 0x00006a8d 0x114 ..\obj\~#\~#\~#\source\backdoor.o
.debug_info 0x00006ba1 0x156 ..\obj\~#\~#\~#\source\boot.o
.debug_info 0x00006cf7 0x2fe ..\obj\~#\~#\~#\source\com.o
.debug_info 0x00006ff5 0xb6 ..\obj\~#\~#\~#\source\cop.o
.debug_info 0x000070ab 0x808 ..\obj\~#\~#\~#\source\xcp.o
.debug_abbrev 0x00000000 0x1f2f
.debug_abbrev 0x00000000 0x11d ..\obj\hooks.o
@ -4671,11 +4672,11 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.debug_abbrev 0x00000c28 0x1b8 ..\obj\lib\spl\src\stm32f0xx_usart.o
.debug_abbrev 0x00000de0 0x113 ..\obj\lib\system_stm32f0xx.o
.debug_abbrev 0x00000ef3 0x17f ..\obj\main.o
.debug_abbrev 0x00001072 0x262 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_abbrev 0x000012d4 0x10a ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_abbrev 0x000013de 0x231 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_abbrev 0x0000160f 0x45 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_abbrev 0x00001654 0x14 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.debug_abbrev 0x00001072 0x14 ..\obj\startup_stm32f0xx.o
.debug_abbrev 0x00001086 0x262 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_abbrev 0x000012e8 0x10a ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_abbrev 0x000013f2 0x231 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_abbrev 0x00001623 0x45 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_abbrev 0x00001668 0xca ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_abbrev 0x00001732 0x118 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_abbrev 0x0000184a 0x1ae ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
@ -4708,15 +4709,15 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.debug_aranges
0x00000658 0x20 ..\obj\main.o
.debug_aranges
0x00000678 0x30 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
0x00000678 0x20 ..\obj\startup_stm32f0xx.o
.debug_aranges
0x000006a8 0x30 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
0x00000698 0x30 ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_aranges
0x000006d8 0x78 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
0x000006c8 0x30 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_aranges
0x00000750 0x28 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
0x000006f8 0x78 ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_aranges
0x00000778 0x20 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
0x00000770 0x28 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_aranges
0x00000798 0x50 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_aranges
@ -4834,7 +4835,7 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.debug_macro 0x0000e0b9 0x91 ..\obj\~#\~#\~#\source\cop.o
.debug_macro 0x0000e14a 0x157 ..\obj\~#\~#\~#\source\xcp.o
.debug_line 0x00000000 0x65b0
.debug_line 0x00000000 0x6594
.debug_line 0x00000000 0x53a ..\obj\hooks.o
.debug_line 0x0000053a 0x539 ..\obj\led.o
.debug_line 0x00000a73 0x7a4 ..\obj\lib\spl\src\stm32f0xx_can.o
@ -4845,20 +4846,20 @@ OUTPUT(..\bin\openblt_stm32f091.elf elf32-littlearm)
.debug_line 0x00002b99 0x84f ..\obj\lib\spl\src\stm32f0xx_usart.o
.debug_line 0x000033e8 0x486 ..\obj\lib\system_stm32f0xx.o
.debug_line 0x0000386e 0x52f ..\obj\main.o
.debug_line 0x00003d9d 0x59a ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_line 0x00004337 0x532 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_line 0x00004869 0x6ad ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_line 0x00004f16 0x144 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_line 0x0000505a 0xb4 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cstart.o
.debug_line 0x0000510e 0x18a ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_line 0x00005298 0x543 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_line 0x000057db 0x5a1 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_line 0x00005d7c 0x10e ..\obj\~#\~#\~#\source\assert.o
.debug_line 0x00005e8a 0x12c ..\obj\~#\~#\~#\source\backdoor.o
.debug_line 0x00005fb6 0x123 ..\obj\~#\~#\~#\source\boot.o
.debug_line 0x000060d9 0x1b7 ..\obj\~#\~#\~#\source\com.o
.debug_line 0x00006290 0x119 ..\obj\~#\~#\~#\source\cop.o
.debug_line 0x000063a9 0x207 ..\obj\~#\~#\~#\source\xcp.o
.debug_line 0x00003d9d 0x98 ..\obj\startup_stm32f0xx.o
.debug_line 0x00003e35 0x59a ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o
.debug_line 0x000043cf 0x532 ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o
.debug_line 0x00004901 0x6ad ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o
.debug_line 0x00004fae 0x144 ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o
.debug_line 0x000050f2 0x18a ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o
.debug_line 0x0000527c 0x543 ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o
.debug_line 0x000057bf 0x5a1 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o
.debug_line 0x00005d60 0x10e ..\obj\~#\~#\~#\source\assert.o
.debug_line 0x00005e6e 0x12c ..\obj\~#\~#\~#\source\backdoor.o
.debug_line 0x00005f9a 0x123 ..\obj\~#\~#\~#\source\boot.o
.debug_line 0x000060bd 0x1b7 ..\obj\~#\~#\~#\source\com.o
.debug_line 0x00006274 0x119 ..\obj\~#\~#\~#\source\cop.o
.debug_line 0x0000638d 0x207 ..\obj\~#\~#\~#\source\xcp.o
.debug_str 0x00000000 0x4d6ac
.debug_str 0x00000000 0x4a910 ..\obj\hooks.o

625
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/bin/openblt_stm32f091.srec
View File

@ -1,37 +1,37 @@
S02000002E2E5C62696E5C6F70656E626C745F73746D3332663039312E73726563AB
S3150800000000100020D91300082B1400082D1400082E
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S315080000200000000000000000000000002F14000877
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S315080000300000000000000000010E0008030E000882
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S315080001D05C01002010B501F091F9104B1B6898429C
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S315080001F020219020C00500F023FB07E00022084BD1
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S3150800023000F008FB10BDC04610B58024A4040121B7
@ -139,7 +139,7 @@ S3150800088005D028E0082B0AD00C2B20D023E06B4B90
S315080008900360002022E0694B036000201EE0664BDF
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S315080008E01B061B0F584DEB5CDBB226683200DA405C
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@ -179,9 +179,9 @@ S31508000B0029690B43134303608268254B13406A69BE
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185
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/cfg/stm32f091rc_flash.ld Normal file
View File

@ -0,0 +1,185 @@
/* ---------------------------------------------------------------------------- */
/* Em::Blocks embedded development Support */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, EmBlocks */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* EmBlocks's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY EBLOCKS "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL EMBLOCKS BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*------------------------------------------------------------------------------
* Linker script for running in internal FLASH on the STM32F091RC
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
/* The first part in flash is reserved for OpenBLT */
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 8K
/* do not use the first 192 bytes because this is where
* the bootloader copies the user program vector table
* right before it starts the user program.
*/
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 32K - 192
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > ROM
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > ROM
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > ROM
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss (NOLOAD):
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

2
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.depend
View File

@ -565,3 +565,5 @@
"boot.h"
"stm32f0xx.h"
1499943437 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\boot\startup_stm32f0xx.s

10
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.ebp
View File

@ -31,7 +31,7 @@
</Build>
<Device>
<Add option="$device=cortex-m0" />
<Add option="$lscript=./../../../../Source/ARMCM0_STM32F0/GCC/memory.x" />
<Add option="$lscript=./../cfg/stm32f091rc_flash.ld" />
<Add option="$stack=0x0100" />
<Add option="$heap=0x0000" />
</Device>
@ -267,6 +267,10 @@
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\" />
</Unit>
<Unit filename="..\startup_stm32f0xx.S">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\" />
</Unit>
<Unit filename="..\..\..\..\Source\ARMCM0_STM32F0\can.c">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\" />
@ -286,10 +290,6 @@
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\GCC\" />
</Unit>
<Unit filename="..\..\..\..\Source\ARMCM0_STM32F0\GCC\cstart.S">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\GCC\" />
</Unit>
<Unit filename="..\..\..\..\Source\ARMCM0_STM32F0\nvm.c">
<Option compilerVar="CC" />
<Option virtualFolder="Srcs\Core\ARMCM0_STM32F0\" />

5
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.elay
View File

@ -61,11 +61,6 @@
<Cursor1 position="1854" topLine="0" />
</Cursor>
</File>
<File name="..\..\..\..\Source\ARMCM0_STM32F0\GCC\cstart.S" open="0" top="0" tabpos="4" split="0" active="1" splitpos="0" zoom_1="0" zoom_2="0">
<Cursor>
<Cursor1 position="7756" topLine="161" />
</Cursor>
</File>
<File name="..\..\..\..\Source\ARMCM0_STM32F0\nvm.c" open="0" top="0" tabpos="0" split="0" active="1" splitpos="0" zoom_1="0" zoom_2="0">
<Cursor>
<Cursor1 position="2035" topLine="24" />

245
Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/startup_stm32f0xx.S Normal file
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@ -0,0 +1,245 @@
/* File: startup_ARMCM0.S
* Purpose: startup file for Cortex-M0 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V1.3
* Date: 08 Feb 2012
*
* Copyright (c) 2012, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the ARM Limited nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
.arch armv6-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x400
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0xC00
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
// External Interrupts
.long WWDG_IRQHandler // Window Watchdog
.long PVD_IRQHandler // PVD through EXTI Line detect
.long RTC_IRQHandler // RTC through EXTI Line
.long FLASH_IRQHandler // FLASH
.long RCC_IRQHandler // RCC
.long EXTI0_1_IRQHandler // EXTI Line 0 and 1
.long EXTI2_3_IRQHandler // EXTI Line 2 and 3
.long EXTI4_15_IRQHandler // EXTI Line 4 to 15
.long TS_IRQHandler // TS
.long DMA1_Channel1_IRQHandler // DMA1 Channel 1
.long DMA1_Channel2_3_IRQHandler // DMA1 Channel 2 and Channel 3
.long DMA1_Channel4_5_IRQHandler // DMA1 Channel 4 and Channel 5
.long ADC1_COMP_IRQHandler // ADC1, COMP1 and COMP2
.long TIM1_BRK_UP_TRG_COM_IRQHandler // TIM1 Break, Update, Trigger and Commutation
.long TIM1_CC_IRQHandler // TIM1 Capture Compare
.long TIM2_IRQHandler // TIM2
.long TIM3_IRQHandler // TIM3
.long TIM6_DAC_IRQHandler // TIM6 and DAC
.long TIM7_IRQHandler // Not all devices!!
.long TIM14_IRQHandler // TIM14
.long TIM15_IRQHandler // TIM15
.long TIM16_IRQHandler // TIM16
.long TIM17_IRQHandler // TIM17
.long I2C1_IRQHandler // I2C1
.long I2C2_IRQHandler // I2C2
.long SPI1_IRQHandler // SPI1
.long SPI2_IRQHandler // SPI2
.long USART1_IRQHandler // USART1
.long USART2_IRQHandler // USART2
.long USART3_4_IRQHandler // Not all devices!!
.long CEC_IRQHandler // CEC
.long USB_IRQHandler // Not all devices!!
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* __etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
subs r3, r2
ble .flash_to_ram_loop_end
movs r4, 0
.flash_to_ram_loop:
ldr r0, [r1,r4]
str r0, [r2,r4]
adds r4, 4
cmp r4, r3
blt .flash_to_ram_loop
.flash_to_ram_loop_end:
#ifndef __NO_SYSTEM_INIT
ldr r0, =SystemInit
blx r0
#endif
ldr r0, =_start
bx r0
.pool
.size Reset_Handler, . - Reset_Handler
/* Our weak _start alternative if we don't use the library _start
* The zero init section must be cleared, otherwise the librtary is
* doing that */
.align 1
.thumb_func
.weak _start
.type _start, %function
_start:
/* Zero fill the bss segment. */
ldr r1, = __bss_start__
ldr r2, = __bss_end__
movs r3, #0
b .fill_zero_bss
.loop_zero_bss:
str r3, [r1]
adds r1, 4
.fill_zero_bss:
cmp r1, r2
bcc .loop_zero_bss
/* Jump to our main */
bl main
b .
.size _start, . - _start
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_irq_handler handler_name
.align 1
.thumb_func
.weak \handler_name
.type \handler_name, %function
\handler_name :
b .
.size \handler_name, . - \handler_name
.endm
def_irq_handler NMI_Handler
def_irq_handler HardFault_Handler
def_irq_handler SVC_Handler
def_irq_handler PendSV_Handler
def_irq_handler SysTick_Handler
def_irq_handler Default_Handler
// External Interrupts
def_irq_handler WWDG_IRQHandler // Window Watchdog
def_irq_handler PVD_IRQHandler // PVD through EXTI Line detect
def_irq_handler RTC_IRQHandler // RTC through EXTI Line
def_irq_handler FLASH_IRQHandler // FLASH
def_irq_handler RCC_IRQHandler // RCC
def_irq_handler EXTI0_1_IRQHandler // EXTI Line 0 and 1
def_irq_handler EXTI2_3_IRQHandler // EXTI Line 2 and 3
def_irq_handler EXTI4_15_IRQHandler // EXTI Line 4 to 15
def_irq_handler TS_IRQHandler // TS
def_irq_handler DMA1_Channel1_IRQHandler // DMA1 Channel 1
def_irq_handler DMA1_Channel2_3_IRQHandler // DMA1 Channel 2 and Channel 3
def_irq_handler DMA1_Channel4_5_IRQHandler // DMA1 Channel 4 and Channel 5
def_irq_handler ADC1_COMP_IRQHandler // ADC1, COMP1 and COMP2
def_irq_handler TIM1_BRK_UP_TRG_COM_IRQHandler // TIM1 Break, Update, Trigger and Commutation
def_irq_handler TIM1_CC_IRQHandler // TIM1 Capture Compare
def_irq_handler TIM2_IRQHandler // TIM2
def_irq_handler TIM3_IRQHandler // TIM3
def_irq_handler TIM6_DAC_IRQHandler // TIM6 and DAC
def_irq_handler TIM7_IRQHandler // Not all devices!!
def_irq_handler TIM14_IRQHandler // TIM14
def_irq_handler TIM15_IRQHandler // TIM15
def_irq_handler TIM16_IRQHandler // TIM16
def_irq_handler TIM17_IRQHandler // TIM17
def_irq_handler I2C1_IRQHandler // I2C1
def_irq_handler I2C2_IRQHandler // I2C2
def_irq_handler SPI1_IRQHandler // SPI1
def_irq_handler SPI2_IRQHandler // SPI2
def_irq_handler USART1_IRQHandler // USART1
def_irq_handler USART2_IRQHandler // USART2
def_irq_handler USART3_4_IRQHandler // Not all devices!!
def_irq_handler CEC_IRQHandler // CEC
def_irq_handler USB_IRQHandler // Not all devices!!
def_irq_handler BootRAM // Not all devices!!
.end