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- Added support for firmware updates from a FATFS mounted file system 

- Supported firmware updates from SD-card for EK-LM3S6965 demo
- Added CpuUserProgramStartHook() hook function
- Improved timer module so it can be used by all other modules, not just the backdoor


git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@42 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2013-05-22 13:37:47 +00:00
parent 4c72a2b0f9
commit f6830b5864
473 changed files with 242635 additions and 30970 deletions
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2
Host/openblt_uart.ini
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@ -1,5 +1,5 @@
[sci]
port=3
port=6
baudrate=8
[xcp]
seedkey=

BIN
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/bin/openbtl_olimex_lpc_l2294_20mhz.elf
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Binary file not shown.

622
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/bin/openbtl_olimex_lpc_l2294_20mhz.map
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@ -50,6 +50,8 @@ Discarded input sections
.text 0x00000000 0x0 ARM Flash Debug/../../obj/com.o
.data 0x00000000 0x0 ARM Flash Debug/../../obj/com.o
.bss 0x00000000 0x0 ARM Flash Debug/../../obj/com.o
.text.ComSetDisconnectEntryState
0x00000000 0x14 ARM Flash Debug/../../obj/com.o
.text.ComIsConnectEntryState
0x00000000 0x10 ARM Flash Debug/../../obj/com.o
.text 0x00000000 0x0 ARM Flash Debug/../../obj/cop.o
@ -180,7 +182,7 @@ Linker script and memory map
0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .init is too large to fit in FLASH memory segment)
0x00000370 __text_load_start__ = ALIGN (__init_end__, 0x4)
.text 0x00000370 0x110c
.text 0x00000370 0x1130
0x00000370 __text_start__ = .
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
.glue_7 0x00000000 0x0 linker stubs
@ -206,115 +208,114 @@ Linker script and memory map
.text.FlashErase
0x00000788 0x130 ARM Flash Debug/../../obj/flash.o
0x00000788 FlashErase
.text.FlashVerifyChecksum
0x000008b8 0x48 ARM Flash Debug/../../obj/flash.o
0x000008b8 FlashVerifyChecksum
.text.FlashWriteChecksum
0x00000900 0x74 ARM Flash Debug/../../obj/flash.o
0x00000900 FlashWriteChecksum
0x000008b8 0x80 ARM Flash Debug/../../obj/flash.o
0x000008b8 FlashWriteChecksum
.text.FlashVerifyChecksum
0x00000938 0x48 ARM Flash Debug/../../obj/flash.o
0x00000938 FlashVerifyChecksum
.text.FlashDone
0x00000974 0x5c ARM Flash Debug/../../obj/flash.o
0x00000974 FlashDone
0x00000980 0x5c ARM Flash Debug/../../obj/flash.o
0x00000980 FlashDone
.text.CpuMemCopy
0x000009d0 0x44 ARM Flash Debug/../../obj/cpu.o
0x000009d0 CpuMemCopy
0x000009dc 0x44 ARM Flash Debug/../../obj/cpu.o
0x000009dc CpuMemCopy
.text.CpuStartUserProgram
0x00000a14 0x44 ARM Flash Debug/../../obj/cpu.o
0x00000a14 CpuStartUserProgram
0x00000a20 0x4c ARM Flash Debug/../../obj/cpu.o
0x00000a20 CpuStartUserProgram
.text.CpuReset
0x00000a58 0x10 ARM Flash Debug/../../obj/cpu.o
0x00000a58 CpuReset
.text.NvmInit 0x00000a68 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a68 NvmInit
0x00000a6c 0x10 ARM Flash Debug/../../obj/cpu.o
0x00000a6c CpuReset
.text.NvmInit 0x00000a7c 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a7c NvmInit
.text.NvmWrite
0x00000a78 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a78 NvmWrite
0x00000a8c 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a8c NvmWrite
.text.NvmErase
0x00000a88 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a88 NvmErase
0x00000a9c 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a9c NvmErase
.text.NvmVerifyChecksum
0x00000a98 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000a98 NvmVerifyChecksum
.text.NvmDone 0x00000aa8 0x1c ARM Flash Debug/../../obj/nvm.o
0x00000aa8 NvmDone
.text.TimerReset
0x00000ac4 0x20 ARM Flash Debug/../../obj/timer.o
0x00000ac4 TimerReset
.text.TimerUpdate
0x00000ae4 0x38 ARM Flash Debug/../../obj/timer.o
0x00000ae4 TimerUpdate
.text.TimerSet
0x00000b1c 0x10 ARM Flash Debug/../../obj/timer.o
0x00000b1c TimerSet
0x00000aac 0x10 ARM Flash Debug/../../obj/nvm.o
0x00000aac NvmVerifyChecksum
.text.NvmDone 0x00000abc 0x1c ARM Flash Debug/../../obj/nvm.o
0x00000abc NvmDone
.text.TimerInit
0x00000b2c 0x48 ARM Flash Debug/../../obj/timer.o
0x00000b2c TimerInit
0x00000ad8 0x48 ARM Flash Debug/../../obj/timer.o
0x00000ad8 TimerInit
.text.TimerReset
0x00000b20 0x20 ARM Flash Debug/../../obj/timer.o
0x00000b20 TimerReset
.text.TimerUpdate
0x00000b40 0x38 ARM Flash Debug/../../obj/timer.o
0x00000b40 TimerUpdate
.text.TimerGet
0x00000b74 0x1c ARM Flash Debug/../../obj/timer.o
0x00000b74 TimerGet
0x00000b78 0x1c ARM Flash Debug/../../obj/timer.o
0x00000b78 TimerGet
.text.UartReceiveByte
0x00000b90 0x28 ARM Flash Debug/../../obj/uart.o
0x00000b94 0x28 ARM Flash Debug/../../obj/uart.o
.text.UartTransmitByte
0x00000bb8 0x54 ARM Flash Debug/../../obj/uart.o
0x00000bbc 0x54 ARM Flash Debug/../../obj/uart.o
.text.UartInit
0x00000c0c 0x40 ARM Flash Debug/../../obj/uart.o
0x00000c0c UartInit
0x00000c10 0x40 ARM Flash Debug/../../obj/uart.o
0x00000c10 UartInit
.text.UartTransmitPacket
0x00000c4c 0x84 ARM Flash Debug/../../obj/uart.o
0x00000c4c UartTransmitPacket
0x00000c50 0x84 ARM Flash Debug/../../obj/uart.o
0x00000c50 UartTransmitPacket
.text.UartReceivePacket
0x00000cd0 0xc0 ARM Flash Debug/../../obj/uart.o
0x00000cd0 UartReceivePacket
0x00000cd4 0xc0 ARM Flash Debug/../../obj/uart.o
0x00000cd4 UartReceivePacket
.text.AssertFailure
0x00000d90 0x24 ARM Flash Debug/../../obj/assert.o
0x00000d90 AssertFailure
0x00000d94 0x24 ARM Flash Debug/../../obj/assert.o
0x00000d94 AssertFailure
.text.BackDoorCheck
0x00000db4 0x4c ARM Flash Debug/../../obj/backdoor.o
0x00000db4 BackDoorCheck
0x00000db8 0x54 ARM Flash Debug/../../obj/backdoor.o
0x00000db8 BackDoorCheck
.text.BackDoorInit
0x00000e00 0x24 ARM Flash Debug/../../obj/backdoor.o
0x00000e00 BackDoorInit
0x00000e0c 0x30 ARM Flash Debug/../../obj/backdoor.o
0x00000e0c BackDoorInit
.text.BootInit
0x00000e24 0x1c ARM Flash Debug/../../obj/boot.o
0x00000e24 BootInit
0x00000e3c 0x20 ARM Flash Debug/../../obj/boot.o
0x00000e3c BootInit
.text.BootTask
0x00000e40 0x18 ARM Flash Debug/../../obj/boot.o
0x00000e40 BootTask
.text.ComInit 0x00000e58 0x44 ARM Flash Debug/../../obj/com.o
0x00000e58 ComInit
.text.ComTask 0x00000e9c 0x24 ARM Flash Debug/../../obj/com.o
0x00000e9c ComTask
0x00000e5c 0x1c ARM Flash Debug/../../obj/boot.o
0x00000e5c BootTask
.text.ComInit 0x00000e78 0x44 ARM Flash Debug/../../obj/com.o
0x00000e78 ComInit
.text.ComTask 0x00000ebc 0x24 ARM Flash Debug/../../obj/com.o
0x00000ebc ComTask
.text.ComFree 0x00000ee0 0x4 ARM Flash Debug/../../obj/com.o
0x00000ee0 ComFree
.text.ComTransmitPacket
0x00000ec0 0x18 ARM Flash Debug/../../obj/com.o
0x00000ec0 ComTransmitPacket
0x00000ee4 0x18 ARM Flash Debug/../../obj/com.o
0x00000ee4 ComTransmitPacket
.text.ComSetConnectEntryState
0x00000ed8 0x14 ARM Flash Debug/../../obj/com.o
0x00000ed8 ComSetConnectEntryState
0x00000efc 0x14 ARM Flash Debug/../../obj/com.o
0x00000efc ComSetConnectEntryState
.text.ComIsConnected
0x00000eec 0x10 ARM Flash Debug/../../obj/com.o
0x00000eec ComIsConnected
.text.CopInit 0x00000efc 0x4 ARM Flash Debug/../../obj/cop.o
0x00000efc CopInit
0x00000f10 0x10 ARM Flash Debug/../../obj/com.o
0x00000f10 ComIsConnected
.text.CopInit 0x00000f20 0x4 ARM Flash Debug/../../obj/cop.o
0x00000f20 CopInit
.text.CopService
0x00000f00 0x4 ARM Flash Debug/../../obj/cop.o
0x00000f00 CopService
0x00000f24 0x4 ARM Flash Debug/../../obj/cop.o
0x00000f24 CopService
.text.XcpProtectResources
0x00000f04 0x14 ARM Flash Debug/../../obj/xcp.o
0x00000f28 0x14 ARM Flash Debug/../../obj/xcp.o
.text.XcpSetCtoError
0x00000f18 0x20 ARM Flash Debug/../../obj/xcp.o
.text.XcpInit 0x00000f38 0x28 ARM Flash Debug/../../obj/xcp.o
0x00000f38 XcpInit
0x00000f3c 0x20 ARM Flash Debug/../../obj/xcp.o
.text.XcpInit 0x00000f5c 0x28 ARM Flash Debug/../../obj/xcp.o
0x00000f5c XcpInit
.text.XcpIsConnected
0x00000f60 0x18 ARM Flash Debug/../../obj/xcp.o
0x00000f60 XcpIsConnected
0x00000f84 0x18 ARM Flash Debug/../../obj/xcp.o
0x00000f84 XcpIsConnected
.text.XcpPacketTransmitted
0x00000f78 0x14 ARM Flash Debug/../../obj/xcp.o
0x00000f78 XcpPacketTransmitted
0x00000f9c 0x14 ARM Flash Debug/../../obj/xcp.o
0x00000f9c XcpPacketTransmitted
.text.XcpPacketReceived
0x00000f8c 0x4f0 ARM Flash Debug/../../obj/xcp.o
0x00000f8c XcpPacketReceived
0x0000147c __text_end__ = (__text_start__ + SIZEOF (.text))
0x0000147c __text_load_end__ = __text_end__
0x00000fb0 0x4f0 ARM Flash Debug/../../obj/xcp.o
0x00000fb0 XcpPacketReceived
0x000014a0 __text_end__ = (__text_start__ + SIZEOF (.text))
0x000014a0 __text_load_end__ = __text_end__
.vfp11_veneer 0x00000000 0x0
.vfp11_veneer 0x00000000 0x0 linker stubs
@ -322,45 +323,45 @@ Linker script and memory map
.v4_bx 0x00000000 0x0
.v4_bx 0x00000000 0x0 linker stubs
0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .text is too large to fit in FLASH memory segment)
0x0000147c __dtors_load_start__ = ALIGN (__text_end__, 0x4)
0x000014a0 __dtors_load_start__ = ALIGN (__text_end__, 0x4)
.dtors 0x0000147c 0x0
0x0000147c __dtors_start__ = .
.dtors 0x000014a0 0x0
0x000014a0 __dtors_start__ = .
*(SORT(.dtors.*))
*(.dtors)
0x0000147c __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
0x0000147c __dtors_load_end__ = __dtors_end__
0x000014a0 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
0x000014a0 __dtors_load_end__ = __dtors_end__
0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .dtors is too large to fit in FLASH memory segment)
0x0000147c __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
0x000014a0 __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
.ctors 0x0000147c 0x0
0x0000147c __ctors_start__ = .
.ctors 0x000014a0 0x0
0x000014a0 __ctors_start__ = .
*(SORT(.ctors.*))
*(.ctors)
0x0000147c __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
0x0000147c __ctors_load_end__ = __ctors_end__
0x000014a0 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
0x000014a0 __ctors_load_end__ = __ctors_end__
0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .ctors is too large to fit in FLASH memory segment)
0x0000147c __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
0x000014a0 __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
.rodata 0x0000147c 0x14c
0x0000147c __rodata_start__ = .
.rodata 0x000014a0 0x148
0x000014a0 __rodata_start__ = .
*(.rodata .rodata.* .gnu.linkonce.r.*)
.rodata.flashLayout
0x0000147c 0xc0 ARM Flash Debug/../../obj/flash.o
0x000014a0 0xc0 ARM Flash Debug/../../obj/flash.o
.rodata.str1.4
0x0000153c 0x84 ARM Flash Debug/../../obj/uart.o
0x00001560 0x80 ARM Flash Debug/../../obj/uart.o
.rodata.xcpStationId
0x000015c0 0x8 ARM Flash Debug/../../obj/xcp.o
0x000015c8 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
0x000015c8 __rodata_load_end__ = __rodata_end__
0x000015e0 0x8 ARM Flash Debug/../../obj/xcp.o
0x000015e8 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
0x000015e8 __rodata_load_end__ = __rodata_end__
0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .rodata is too large to fit in FLASH memory segment)
0x000015c8 __data_load_start__ = ALIGN (__rodata_end__, 0x4)
0x000015e8 __data_load_start__ = ALIGN (__rodata_end__, 0x4)
.data 0x4000023c 0x0 load address 0x000015c8
.data 0x4000023c 0x0 load address 0x000015e8
0x4000023c __data_start__ = .
*(.data .data.* .gnu.linkonce.d.*)
0x4000023c __data_end__ = (__data_start__ + SIZEOF (.data))
0x000015c8 __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
0x000015e8 __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
0x00000001 . = ASSERT ((((__data_load_start__ + SIZEOF (.data)) >= __FLASH_segment_start__) && ((__data_load_start__ + SIZEOF (.data)) <= (__FLASH_segment_start__ + 0x40000))), error: .data is too large to fit in FLASH memory segment)
.data_run 0x4000023c 0x0
@ -371,7 +372,7 @@ Linker script and memory map
0x00000001 . = ASSERT (((__data_run_end__ >= __SRAM_segment_start__) && (__data_run_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .data_run is too large to fit in SRAM memory segment)
0x4000023c __bss_load_start__ = ALIGN (__data_run_end__, 0x4)
.bss 0x4000023c 0x4f4
.bss 0x4000023c 0x4fc
0x4000023c __bss_start__ = .
*(.bss .bss.* .gnu.linkonce.b.*)
.bss.bootBlockInfo
@ -382,12 +383,12 @@ Linker script and memory map
0x40000644 0x4 ARM Flash Debug/../../obj/timer.o
.bss.free_running_counter_last
0x40000648 0x4 ARM Flash Debug/../../obj/timer.o
.bss.xcpCtoRxLength.866
.bss.xcpCtoRxLength.900
0x4000064c 0x1 ARM Flash Debug/../../obj/uart.o
*fill* 0x4000064d 0x3 00
.bss.xcpCtoReqPacket.865
.bss.xcpCtoReqPacket.899
0x40000650 0x44 ARM Flash Debug/../../obj/uart.o
.bss.xcpCtoRxInProgress.867
.bss.xcpCtoRxInProgress.901
0x40000694 0x1 ARM Flash Debug/../../obj/uart.o
*fill* 0x40000695 0x3 00
.bss.assert_failure_file
@ -396,107 +397,110 @@ Linker script and memory map
0x4000069c 0x4 ARM Flash Debug/../../obj/assert.o
.bss.backdoorOpen
0x400006a0 0x1 ARM Flash Debug/../../obj/backdoor.o
*fill* 0x400006a1 0x3 00
.bss.backdoorOpenTime
0x400006a4 0x4 ARM Flash Debug/../../obj/backdoor.o
.bss.comEntryStateConnect
0x400006a1 0x1 ARM Flash Debug/../../obj/com.o
*fill* 0x400006a2 0x2 00
.bss.xcpCtoReqPacket.855
0x400006a4 0x40 ARM Flash Debug/../../obj/com.o
.bss.xcpInfo 0x400006e4 0x4c ARM Flash Debug/../../obj/xcp.o
0x400006a8 0x1 ARM Flash Debug/../../obj/com.o
*fill* 0x400006a9 0x3 00
.bss.xcpCtoReqPacket.889
0x400006ac 0x40 ARM Flash Debug/../../obj/com.o
.bss.xcpInfo 0x400006ec 0x4c ARM Flash Debug/../../obj/xcp.o
*(COMMON)
0x40000730 __bss_end__ = (__bss_start__ + SIZEOF (.bss))
0x40000730 __bss_load_end__ = __bss_end__
0x40000738 __bss_end__ = (__bss_start__ + SIZEOF (.bss))
0x40000738 __bss_load_end__ = __bss_end__
0x00000001 . = ASSERT (((__bss_end__ >= __SRAM_segment_start__) && (__bss_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .bss is too large to fit in SRAM memory segment)
0x40000730 __non_init_load_start__ = ALIGN (__bss_end__, 0x4)
0x40000738 __non_init_load_start__ = ALIGN (__bss_end__, 0x4)
.non_init 0x40000730 0x0
0x40000730 __non_init_start__ = .
.non_init 0x40000738 0x0
0x40000738 __non_init_start__ = .
*(.non_init .non_init.*)
0x40000730 __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init))
0x40000730 __non_init_load_end__ = __non_init_end__
0x40000738 __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init))
0x40000738 __non_init_load_end__ = __non_init_end__
0x00000001 . = ASSERT (((__non_init_end__ >= __SRAM_segment_start__) && (__non_init_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .non_init is too large to fit in SRAM memory segment)
0x40000730 __heap_load_start__ = ALIGN (__non_init_end__, 0x4)
0x40000738 __heap_load_start__ = ALIGN (__non_init_end__, 0x4)
.heap 0x40000730 0x400
0x40000730 __heap_start__ = .
.heap 0x40000738 0x400
0x40000738 __heap_start__ = .
*(.heap .heap.*)
0x40000b30 . = ALIGN (MAX ((__heap_start__ + __HEAPSIZE__), .), 0x4)
*fill* 0x40000730 0x400 00
0x40000b30 __heap_end__ = (__heap_start__ + SIZEOF (.heap))
0x40000b30 __heap_load_end__ = __heap_end__
0x40000b38 . = ALIGN (MAX ((__heap_start__ + __HEAPSIZE__), .), 0x4)
*fill* 0x40000738 0x400 00
0x40000b38 __heap_end__ = (__heap_start__ + SIZEOF (.heap))
0x40000b38 __heap_load_end__ = __heap_end__
0x00000001 . = ASSERT (((__heap_end__ >= __SRAM_segment_start__) && (__heap_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .heap is too large to fit in SRAM memory segment)
0x40000b30 __stack_load_start__ = ALIGN (__heap_end__, 0x4)
0x40000b38 __stack_load_start__ = ALIGN (__heap_end__, 0x4)
.stack 0x40000b30 0x400
0x40000b30 __stack_start__ = .
.stack 0x40000b38 0x400
0x40000b38 __stack_start__ = .
*(.stack .stack.*)
0x40000f30 . = ALIGN (MAX ((__stack_start__ + __STACKSIZE__), .), 0x4)
*fill* 0x40000b30 0x400 00
0x40000f30 __stack_end__ = (__stack_start__ + SIZEOF (.stack))
0x40000f30 __stack_load_end__ = __stack_end__
0x40000f38 . = ALIGN (MAX ((__stack_start__ + __STACKSIZE__), .), 0x4)
*fill* 0x40000b38 0x400 00
0x40000f38 __stack_end__ = (__stack_start__ + SIZEOF (.stack))
0x40000f38 __stack_load_end__ = __stack_end__
0x00000001 . = ASSERT (((__stack_end__ >= __SRAM_segment_start__) && (__stack_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack is too large to fit in SRAM memory segment)
0x40000f30 __stack_irq_load_start__ = ALIGN (__stack_end__, 0x4)
0x40000f38 __stack_irq_load_start__ = ALIGN (__stack_end__, 0x4)
.stack_irq 0x40000f30 0x100
0x40000f30 __stack_irq_start__ = .
.stack_irq 0x40000f38 0x100
0x40000f38 __stack_irq_start__ = .
*(.stack_irq .stack_irq.*)
0x40001030 . = ALIGN (MAX ((__stack_irq_start__ + __STACKSIZE_IRQ__), .), 0x4)
*fill* 0x40000f30 0x100 00
0x40001030 __stack_irq_end__ = (__stack_irq_start__ + SIZEOF (.stack_irq))
0x40001030 __stack_irq_load_end__ = __stack_irq_end__
0x40001038 . = ALIGN (MAX ((__stack_irq_start__ + __STACKSIZE_IRQ__), .), 0x4)
*fill* 0x40000f38 0x100 00
0x40001038 __stack_irq_end__ = (__stack_irq_start__ + SIZEOF (.stack_irq))
0x40001038 __stack_irq_load_end__ = __stack_irq_end__
0x00000001 . = ASSERT (((__stack_irq_end__ >= __SRAM_segment_start__) && (__stack_irq_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_irq is too large to fit in SRAM memory segment)
0x40001030 __stack_fiq_load_start__ = ALIGN (__stack_irq_end__, 0x4)
0x40001038 __stack_fiq_load_start__ = ALIGN (__stack_irq_end__, 0x4)
.stack_fiq 0x40001030 0x100
0x40001030 __stack_fiq_start__ = .
.stack_fiq 0x40001038 0x100
0x40001038 __stack_fiq_start__ = .
*(.stack_fiq .stack_fiq.*)
0x40001130 . = ALIGN (MAX ((__stack_fiq_start__ + __STACKSIZE_FIQ__), .), 0x4)
*fill* 0x40001030 0x100 00
0x40001130 __stack_fiq_end__ = (__stack_fiq_start__ + SIZEOF (.stack_fiq))
0x40001130 __stack_fiq_load_end__ = __stack_fiq_end__
0x40001138 . = ALIGN (MAX ((__stack_fiq_start__ + __STACKSIZE_FIQ__), .), 0x4)
*fill* 0x40001038 0x100 00
0x40001138 __stack_fiq_end__ = (__stack_fiq_start__ + SIZEOF (.stack_fiq))
0x40001138 __stack_fiq_load_end__ = __stack_fiq_end__
0x00000001 . = ASSERT (((__stack_fiq_end__ >= __SRAM_segment_start__) && (__stack_fiq_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_fiq is too large to fit in SRAM memory segment)
0x40001130 __stack_svc_load_start__ = ALIGN (__stack_fiq_end__, 0x4)
0x40001138 __stack_svc_load_start__ = ALIGN (__stack_fiq_end__, 0x4)
.stack_svc 0x40001130 0x0
0x40001130 __stack_svc_start__ = .
.stack_svc 0x40001138 0x0
0x40001138 __stack_svc_start__ = .
*(.stack_svc .stack_svc.*)
0x40001130 . = ALIGN (MAX ((__stack_svc_start__ + __STACKSIZE_SVC__), .), 0x4)
0x40001130 __stack_svc_end__ = (__stack_svc_start__ + SIZEOF (.stack_svc))
0x40001130 __stack_svc_load_end__ = __stack_svc_end__
0x40001138 . = ALIGN (MAX ((__stack_svc_start__ + __STACKSIZE_SVC__), .), 0x4)
0x40001138 __stack_svc_end__ = (__stack_svc_start__ + SIZEOF (.stack_svc))
0x40001138 __stack_svc_load_end__ = __stack_svc_end__
0x00000001 . = ASSERT (((__stack_svc_end__ >= __SRAM_segment_start__) && (__stack_svc_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_svc is too large to fit in SRAM memory segment)
0x40001130 __stack_abt_load_start__ = ALIGN (__stack_svc_end__, 0x4)
0x40001138 __stack_abt_load_start__ = ALIGN (__stack_svc_end__, 0x4)
.stack_abt 0x40001130 0x0
0x40001130 __stack_abt_start__ = .
.stack_abt 0x40001138 0x0
0x40001138 __stack_abt_start__ = .
*(.stack_abt .stack_abt.*)
0x40001130 . = ALIGN (MAX ((__stack_abt_start__ + __STACKSIZE_ABT__), .), 0x4)
0x40001130 __stack_abt_end__ = (__stack_abt_start__ + SIZEOF (.stack_abt))
0x40001130 __stack_abt_load_end__ = __stack_abt_end__
0x40001138 . = ALIGN (MAX ((__stack_abt_start__ + __STACKSIZE_ABT__), .), 0x4)
0x40001138 __stack_abt_end__ = (__stack_abt_start__ + SIZEOF (.stack_abt))
0x40001138 __stack_abt_load_end__ = __stack_abt_end__
0x00000001 . = ASSERT (((__stack_abt_end__ >= __SRAM_segment_start__) && (__stack_abt_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_abt is too large to fit in SRAM memory segment)
0x40001130 __stack_und_load_start__ = ALIGN (__stack_abt_end__, 0x4)
0x40001138 __stack_und_load_start__ = ALIGN (__stack_abt_end__, 0x4)
.stack_und 0x40001130 0x0
0x40001130 __stack_und_start__ = .
.stack_und 0x40001138 0x0
0x40001138 __stack_und_start__ = .
*(.stack_und .stack_und.*)
0x40001130 . = ALIGN (MAX ((__stack_und_start__ + __STACKSIZE_UND__), .), 0x4)
0x40001130 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und))
0x40001130 __stack_und_load_end__ = __stack_und_end__
0x40001138 . = ALIGN (MAX ((__stack_und_start__ + __STACKSIZE_UND__), .), 0x4)
0x40001138 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und))
0x40001138 __stack_und_load_end__ = __stack_und_end__
0x00000001 . = ASSERT (((__stack_und_end__ >= __SRAM_segment_start__) && (__stack_und_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_und is too large to fit in SRAM memory segment)
0x000015c8 __fast_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
0x000015e8 __fast_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
.fast 0x40001130 0x0 load address 0x000015c8
0x40001130 __fast_start__ = .
.fast 0x40001138 0x0 load address 0x000015e8
0x40001138 __fast_start__ = .
*(.fast .fast.*)
0x40001130 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
0x000015c8 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
0x000015c8 __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.fast))
0x40001138 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
0x000015e8 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
0x000015e8 __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.fast))
0x00000001 . = ASSERT ((((__fast_load_start__ + SIZEOF (.fast)) >= __FLASH_segment_start__) && ((__fast_load_start__ + SIZEOF (.fast)) <= (__FLASH_segment_start__ + 0x40000))), error: .fast is too large to fit in FLASH memory segment)
.fast_run 0x40001130 0x0
0x40001130 __fast_run_start__ = .
0x40001130 . = MAX ((__fast_run_start__ + SIZEOF (.fast)), .)
0x40001130 __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
0x40001130 __fast_run_load_end__ = __fast_run_end__
0x40001130 __SRAM_segment_used_end__ = (ALIGN (__stack_und_end__, 0x4) + SIZEOF (.fast_run))
.fast_run 0x40001138 0x0
0x40001138 __fast_run_start__ = .
0x40001138 . = MAX ((__fast_run_start__ + SIZEOF (.fast)), .)
0x40001138 __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
0x40001138 __fast_run_load_end__ = __fast_run_end__
0x40001138 __SRAM_segment_used_end__ = (ALIGN (__stack_und_end__, 0x4) + SIZEOF (.fast_run))
0x00000001 . = ASSERT (((__fast_run_end__ >= __SRAM_segment_start__) && (__fast_run_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .fast_run is too large to fit in SRAM memory segment)
START GROUP
LOAD ARM Flash Debug/../../obj/hooks.o
@ -516,35 +520,35 @@ LOAD ARM Flash Debug/../../obj/com.o
LOAD ARM Flash Debug/../../obj/cop.o
LOAD ARM Flash Debug/../../obj/xcp.o
LOAD C:/Users/voorburg/AppData/Local/Rowley Associates Limited/CrossWorks for ARM/packages/lib/liblpc2000_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libm_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libcpp_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_targetio_impl_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libarm_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libm_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libcpp_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_targetio_impl_v4t_a_le.a
LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v4t_a_le.a
END GROUP
OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/ide/../bin/openbtl_olimex_lpc_l2294_20mhz.elf elf32-littlearm)
OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/ide/../bin/openbtl_olimex_lpc_l2294_20mhz.elf elf32-littlearm)
.debug_info 0x00000000 0x1809
.debug_info 0x00000000 0x181c
.debug_info 0x00000000 0x5a ARM Flash Debug/../../obj/hooks.o
.debug_info 0x0000005a 0x116 ARM Flash Debug/../../obj/main.o
.debug_info 0x00000170 0x5a ARM Flash Debug/../../obj/extflash.o
.debug_info 0x000001ca 0x110 ARM Flash Debug/../../obj/cstart.o
.debug_info 0x000002da 0x539 ARM Flash Debug/../../obj/flash.o
.debug_info 0x00000813 0x5a ARM Flash Debug/../../obj/can.o
.debug_info 0x0000086d 0x13a ARM Flash Debug/../../obj/cpu.o
.debug_info 0x000009a7 0x15e ARM Flash Debug/../../obj/nvm.o
.debug_info 0x00000b05 0x119 ARM Flash Debug/../../obj/timer.o
.debug_info 0x00000c1e 0x1bf ARM Flash Debug/../../obj/uart.o
.debug_info 0x00000ddd 0xe4 ARM Flash Debug/../../obj/assert.o
.debug_info 0x00000ec1 0xa4 ARM Flash Debug/../../obj/backdoor.o
.debug_info 0x00000f65 0x88 ARM Flash Debug/../../obj/boot.o
.debug_info 0x00000fed 0x18b ARM Flash Debug/../../obj/com.o
.debug_info 0x00001178 0x86 ARM Flash Debug/../../obj/cop.o
.debug_info 0x000011fe 0x60b ARM Flash Debug/../../obj/xcp.o
.debug_info 0x000001ca 0x106 ARM Flash Debug/../../obj/cstart.o
.debug_info 0x000002d0 0x538 ARM Flash Debug/../../obj/flash.o
.debug_info 0x00000808 0x5a ARM Flash Debug/../../obj/can.o
.debug_info 0x00000862 0x13a ARM Flash Debug/../../obj/cpu.o
.debug_info 0x0000099c 0x15e ARM Flash Debug/../../obj/nvm.o
.debug_info 0x00000afa 0xf2 ARM Flash Debug/../../obj/timer.o
.debug_info 0x00000bec 0x1bf ARM Flash Debug/../../obj/uart.o
.debug_info 0x00000dab 0xe4 ARM Flash Debug/../../obj/assert.o
.debug_info 0x00000e8f 0xc0 ARM Flash Debug/../../obj/backdoor.o
.debug_info 0x00000f4f 0x88 ARM Flash Debug/../../obj/boot.o
.debug_info 0x00000fd7 0x1b4 ARM Flash Debug/../../obj/com.o
.debug_info 0x0000118b 0x86 ARM Flash Debug/../../obj/cop.o
.debug_info 0x00001211 0x60b ARM Flash Debug/../../obj/xcp.o
.debug_abbrev 0x00000000 0xa6c
.debug_abbrev 0x00000000 0xa48
.debug_abbrev 0x00000000 0x28 ARM Flash Debug/../../obj/hooks.o
.debug_abbrev 0x00000028 0xc5 ARM Flash Debug/../../obj/main.o
.debug_abbrev 0x000000ed 0x28 ARM Flash Debug/../../obj/extflash.o
@ -553,82 +557,82 @@ OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_
.debug_abbrev 0x00000346 0x28 ARM Flash Debug/../../obj/can.o
.debug_abbrev 0x0000036e 0xaf ARM Flash Debug/../../obj/cpu.o
.debug_abbrev 0x0000041d 0xa3 ARM Flash Debug/../../obj/nvm.o
.debug_abbrev 0x000004c0 0xad ARM Flash Debug/../../obj/timer.o
.debug_abbrev 0x0000056d 0x110 ARM Flash Debug/../../obj/uart.o
.debug_abbrev 0x0000067d 0x7c ARM Flash Debug/../../obj/assert.o
.debug_abbrev 0x000006f9 0x5b ARM Flash Debug/../../obj/backdoor.o
.debug_abbrev 0x00000754 0x3f ARM Flash Debug/../../obj/boot.o
.debug_abbrev 0x00000793 0xe0 ARM Flash Debug/../../obj/com.o
.debug_abbrev 0x00000873 0x3f ARM Flash Debug/../../obj/cop.o
.debug_abbrev 0x000008b2 0x1ba ARM Flash Debug/../../obj/xcp.o
.debug_abbrev 0x000004c0 0x89 ARM Flash Debug/../../obj/timer.o
.debug_abbrev 0x00000549 0x110 ARM Flash Debug/../../obj/uart.o
.debug_abbrev 0x00000659 0x7c ARM Flash Debug/../../obj/assert.o
.debug_abbrev 0x000006d5 0x5b ARM Flash Debug/../../obj/backdoor.o
.debug_abbrev 0x00000730 0x3f ARM Flash Debug/../../obj/boot.o
.debug_abbrev 0x0000076f 0xe0 ARM Flash Debug/../../obj/com.o
.debug_abbrev 0x0000084f 0x3f ARM Flash Debug/../../obj/cop.o
.debug_abbrev 0x0000088e 0x1ba ARM Flash Debug/../../obj/xcp.o
.debug_line 0x00000000 0x1245
.debug_line 0x00000000 0x11ef
.debug_line 0x00000000 0x1d ARM Flash Debug/../../obj/hooks.o
.debug_line 0x0000001d 0x13a ARM Flash Debug/../../obj/main.o
.debug_line 0x00000157 0x1d ARM Flash Debug/../../obj/extflash.o
.debug_line 0x00000174 0x19e ARM Flash Debug/../../obj/cstart.o
.debug_line 0x00000312 0x2db ARM Flash Debug/../../obj/flash.o
.debug_line 0x000005ed 0x1d ARM Flash Debug/../../obj/can.o
.debug_line 0x0000060a 0xf6 ARM Flash Debug/../../obj/cpu.o
.debug_line 0x00000700 0x112 ARM Flash Debug/../../obj/nvm.o
.debug_line 0x00000812 0x113 ARM Flash Debug/../../obj/timer.o
.debug_line 0x00000925 0x15e ARM Flash Debug/../../obj/uart.o
.debug_line 0x00000a83 0x137 ARM Flash Debug/../../obj/assert.o
.debug_line 0x00000bba 0x150 ARM Flash Debug/../../obj/backdoor.o
.debug_line 0x00000d0a 0xbf ARM Flash Debug/../../obj/boot.o
.debug_line 0x00000dc9 0x192 ARM Flash Debug/../../obj/com.o
.debug_line 0x00000f5b 0xb7 ARM Flash Debug/../../obj/cop.o
.debug_line 0x00001012 0x233 ARM Flash Debug/../../obj/xcp.o
.debug_line 0x0000001d 0x12e ARM Flash Debug/../../obj/main.o
.debug_line 0x0000014b 0x1d ARM Flash Debug/../../obj/extflash.o
.debug_line 0x00000168 0x198 ARM Flash Debug/../../obj/cstart.o
.debug_line 0x00000300 0x2d1 ARM Flash Debug/../../obj/flash.o
.debug_line 0x000005d1 0x1d ARM Flash Debug/../../obj/can.o
.debug_line 0x000005ee 0xf4 ARM Flash Debug/../../obj/cpu.o
.debug_line 0x000006e2 0x10c ARM Flash Debug/../../obj/nvm.o
.debug_line 0x000007ee 0xfb ARM Flash Debug/../../obj/timer.o
.debug_line 0x000008e9 0x158 ARM Flash Debug/../../obj/uart.o
.debug_line 0x00000a41 0x12b ARM Flash Debug/../../obj/assert.o
.debug_line 0x00000b6c 0x145 ARM Flash Debug/../../obj/backdoor.o
.debug_line 0x00000cb1 0xbb ARM Flash Debug/../../obj/boot.o
.debug_line 0x00000d6c 0x1ab ARM Flash Debug/../../obj/com.o
.debug_line 0x00000f17 0xb1 ARM Flash Debug/../../obj/cop.o
.debug_line 0x00000fc8 0x227 ARM Flash Debug/../../obj/xcp.o
.debug_str 0x00000000 0xe15
.debug_str 0x00000000 0xb1 ARM Flash Debug/../../obj/hooks.o
0xcf (size before relaxing)
.debug_str 0x000000b1 0xa4 ARM Flash Debug/../../obj/main.o
0x110 (size before relaxing)
.debug_str 0x00000155 0x6b ARM Flash Debug/../../obj/extflash.o
0xd2 (size before relaxing)
.debug_str 0x000001c0 0x24d ARM Flash Debug/../../obj/flash.o
0x2d8 (size before relaxing)
.debug_str 0x0000040d 0x83 ARM Flash Debug/../../obj/can.o
0xea (size before relaxing)
.debug_str 0x00000490 0xc7 ARM Flash Debug/../../obj/cpu.o
0x157 (size before relaxing)
.debug_str 0x00000557 0xb7 ARM Flash Debug/../../obj/nvm.o
0x14f (size before relaxing)
.debug_str 0x0000060e 0x10b ARM Flash Debug/../../obj/timer.o
0x17d (size before relaxing)
.debug_str 0x00000719 0x11f ARM Flash Debug/../../obj/uart.o
0x1b4 (size before relaxing)
.debug_str 0x00000838 0xb8 ARM Flash Debug/../../obj/assert.o
0x134 (size before relaxing)
.debug_str 0x000008f0 0xa3 ARM Flash Debug/../../obj/backdoor.o
0x113 (size before relaxing)
.debug_str 0x00000993 0x89 ARM Flash Debug/../../obj/boot.o
0xf0 (size before relaxing)
.debug_str 0x00000a1c 0x102 ARM Flash Debug/../../obj/com.o
0x19c (size before relaxing)
.debug_str 0x00000b1e 0x89 ARM Flash Debug/../../obj/cop.o
0xf0 (size before relaxing)
.debug_str 0x00000ba7 0x26e ARM Flash Debug/../../obj/xcp.o
0x312 (size before relaxing)
.debug_str 0x00000000 0xe17
.debug_str 0x00000000 0xe8 ARM Flash Debug/../../obj/hooks.o
0x106 (size before relaxing)
.debug_str 0x000000e8 0x9e ARM Flash Debug/../../obj/main.o
0x147 (size before relaxing)
.debug_str 0x00000186 0x65 ARM Flash Debug/../../obj/extflash.o
0x109 (size before relaxing)
.debug_str 0x000001eb 0x247 ARM Flash Debug/../../obj/flash.o
0x30f (size before relaxing)
.debug_str 0x00000432 0x7d ARM Flash Debug/../../obj/can.o
0x121 (size before relaxing)
.debug_str 0x000004af 0xc1 ARM Flash Debug/../../obj/cpu.o
0x18e (size before relaxing)
.debug_str 0x00000570 0xb1 ARM Flash Debug/../../obj/nvm.o
0x186 (size before relaxing)
.debug_str 0x00000621 0xf0 ARM Flash Debug/../../obj/timer.o
0x19f (size before relaxing)
.debug_str 0x00000711 0x119 ARM Flash Debug/../../obj/uart.o
0x1eb (size before relaxing)
.debug_str 0x0000082a 0xb2 ARM Flash Debug/../../obj/assert.o
0x16b (size before relaxing)
.debug_str 0x000008dc 0xae ARM Flash Debug/../../obj/backdoor.o
0x166 (size before relaxing)
.debug_str 0x0000098a 0x83 ARM Flash Debug/../../obj/boot.o
0x127 (size before relaxing)
.debug_str 0x00000a0d 0x11f ARM Flash Debug/../../obj/com.o
0x1f6 (size before relaxing)
.debug_str 0x00000b2c 0x83 ARM Flash Debug/../../obj/cop.o
0x127 (size before relaxing)
.debug_str 0x00000baf 0x268 ARM Flash Debug/../../obj/xcp.o
0x349 (size before relaxing)
.comment 0x00000000 0x11
.comment 0x00000000 0x11 ARM Flash Debug/../../obj/hooks.o
0x12 (size before relaxing)
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/main.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/extflash.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/flash.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/can.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/cpu.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/nvm.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/timer.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/uart.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/assert.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/backdoor.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/boot.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/com.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/cop.o
.comment 0x00000000 0x12 ARM Flash Debug/../../obj/xcp.o
.comment 0x00000000 0x4e
.comment 0x00000000 0x4e ARM Flash Debug/../../obj/hooks.o
0x4f (size before relaxing)
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/main.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/extflash.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/flash.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/can.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/cpu.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/nvm.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/timer.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/uart.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/assert.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/backdoor.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/boot.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/com.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/cop.o
.comment 0x00000000 0x4f ARM Flash Debug/../../obj/xcp.o
.ARM.attributes
0x00000000 0x10
@ -667,32 +671,32 @@ OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_
.debug_frame 0x00000000 0x5a8
.debug_frame 0x00000000 0x2c ARM Flash Debug/../../obj/main.o
.debug_frame 0x0000002c 0x160 ARM Flash Debug/../../obj/flash.o
.debug_frame 0x0000018c 0x68 ARM Flash Debug/../../obj/cpu.o
.debug_frame 0x000001f4 0x9c ARM Flash Debug/../../obj/nvm.o
.debug_frame 0x00000290 0x78 ARM Flash Debug/../../obj/timer.o
.debug_frame 0x00000308 0x90 ARM Flash Debug/../../obj/uart.o
.debug_frame 0x00000398 0x2c ARM Flash Debug/../../obj/assert.o
.debug_frame 0x000003c4 0x48 ARM Flash Debug/../../obj/backdoor.o
.debug_frame 0x0000040c 0x48 ARM Flash Debug/../../obj/boot.o
.debug_frame 0x00000454 0xa4 ARM Flash Debug/../../obj/com.o
.debug_frame 0x0000002c 0x15c ARM Flash Debug/../../obj/flash.o
.debug_frame 0x00000188 0x68 ARM Flash Debug/../../obj/cpu.o
.debug_frame 0x000001f0 0x9c ARM Flash Debug/../../obj/nvm.o
.debug_frame 0x0000028c 0x5c ARM Flash Debug/../../obj/timer.o
.debug_frame 0x000002e8 0x90 ARM Flash Debug/../../obj/uart.o
.debug_frame 0x00000378 0x2c ARM Flash Debug/../../obj/assert.o
.debug_frame 0x000003a4 0x48 ARM Flash Debug/../../obj/backdoor.o
.debug_frame 0x000003ec 0x48 ARM Flash Debug/../../obj/boot.o
.debug_frame 0x00000434 0xc4 ARM Flash Debug/../../obj/com.o
.debug_frame 0x000004f8 0x30 ARM Flash Debug/../../obj/cop.o
.debug_frame 0x00000528 0x80 ARM Flash Debug/../../obj/xcp.o
.debug_loc 0x00000000 0xb16
.debug_loc 0x00000000 0xae3
.debug_loc 0x00000000 0x20 ARM Flash Debug/../../obj/main.o
.debug_loc 0x00000020 0x4a6 ARM Flash Debug/../../obj/flash.o
.debug_loc 0x000004c6 0x109 ARM Flash Debug/../../obj/cpu.o
.debug_loc 0x000005cf 0xff ARM Flash Debug/../../obj/nvm.o
.debug_loc 0x000006ce 0x40 ARM Flash Debug/../../obj/timer.o
.debug_loc 0x0000070e 0xe9 ARM Flash Debug/../../obj/uart.o
.debug_loc 0x000007f7 0x46 ARM Flash Debug/../../obj/assert.o
.debug_loc 0x0000083d 0x40 ARM Flash Debug/../../obj/backdoor.o
.debug_loc 0x0000087d 0x40 ARM Flash Debug/../../obj/boot.o
.debug_loc 0x000008bd 0xb2 ARM Flash Debug/../../obj/com.o
.debug_loc 0x0000096f 0x1a7 ARM Flash Debug/../../obj/xcp.o
.debug_loc 0x00000020 0x493 ARM Flash Debug/../../obj/flash.o
.debug_loc 0x000004b3 0x109 ARM Flash Debug/../../obj/cpu.o
.debug_loc 0x000005bc 0xff ARM Flash Debug/../../obj/nvm.o
.debug_loc 0x000006bb 0x20 ARM Flash Debug/../../obj/timer.o
.debug_loc 0x000006db 0xe9 ARM Flash Debug/../../obj/uart.o
.debug_loc 0x000007c4 0x46 ARM Flash Debug/../../obj/assert.o
.debug_loc 0x0000080a 0x40 ARM Flash Debug/../../obj/backdoor.o
.debug_loc 0x0000084a 0x40 ARM Flash Debug/../../obj/boot.o
.debug_loc 0x0000088a 0xb2 ARM Flash Debug/../../obj/com.o
.debug_loc 0x0000093c 0x1a7 ARM Flash Debug/../../obj/xcp.o
.debug_aranges 0x00000000 0x2d0
.debug_aranges 0x00000000 0x2d8
.debug_aranges
0x00000000 0x20 ARM Flash Debug/../../obj/main.o
.debug_aranges
@ -704,33 +708,33 @@ OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_
.debug_aranges
0x000000e8 0x40 ARM Flash Debug/../../obj/nvm.o
.debug_aranges
0x00000128 0x40 ARM Flash Debug/../../obj/timer.o
0x00000128 0x38 ARM Flash Debug/../../obj/timer.o
.debug_aranges
0x00000168 0x40 ARM Flash Debug/../../obj/uart.o
0x00000160 0x40 ARM Flash Debug/../../obj/uart.o
.debug_aranges
0x000001a8 0x20 ARM Flash Debug/../../obj/assert.o
0x000001a0 0x20 ARM Flash Debug/../../obj/assert.o
.debug_aranges
0x000001c8 0x28 ARM Flash Debug/../../obj/backdoor.o
0x000001c0 0x28 ARM Flash Debug/../../obj/backdoor.o
.debug_aranges
0x000001f0 0x28 ARM Flash Debug/../../obj/boot.o
0x000001e8 0x28 ARM Flash Debug/../../obj/boot.o
.debug_aranges
0x00000218 0x48 ARM Flash Debug/../../obj/com.o
0x00000210 0x58 ARM Flash Debug/../../obj/com.o
.debug_aranges
0x00000260 0x28 ARM Flash Debug/../../obj/cop.o
0x00000268 0x28 ARM Flash Debug/../../obj/cop.o
.debug_aranges
0x00000288 0x48 ARM Flash Debug/../../obj/xcp.o
0x00000290 0x48 ARM Flash Debug/../../obj/xcp.o
.debug_ranges 0x00000000 0x208
.debug_ranges 0x00000000 0x210
.debug_ranges 0x00000000 0x10 ARM Flash Debug/../../obj/main.o
.debug_ranges 0x00000010 0x20 ARM Flash Debug/../../obj/cstart.o
.debug_ranges 0x00000030 0x60 ARM Flash Debug/../../obj/flash.o
.debug_ranges 0x00000090 0x20 ARM Flash Debug/../../obj/cpu.o
.debug_ranges 0x000000b0 0x30 ARM Flash Debug/../../obj/nvm.o
.debug_ranges 0x000000e0 0x30 ARM Flash Debug/../../obj/timer.o
.debug_ranges 0x00000110 0x30 ARM Flash Debug/../../obj/uart.o
.debug_ranges 0x00000140 0x10 ARM Flash Debug/../../obj/assert.o
.debug_ranges 0x00000150 0x18 ARM Flash Debug/../../obj/backdoor.o
.debug_ranges 0x00000168 0x18 ARM Flash Debug/../../obj/boot.o
.debug_ranges 0x00000180 0x38 ARM Flash Debug/../../obj/com.o
.debug_ranges 0x000001b8 0x18 ARM Flash Debug/../../obj/cop.o
.debug_ranges 0x000001d0 0x38 ARM Flash Debug/../../obj/xcp.o
.debug_ranges 0x000000e0 0x28 ARM Flash Debug/../../obj/timer.o
.debug_ranges 0x00000108 0x30 ARM Flash Debug/../../obj/uart.o
.debug_ranges 0x00000138 0x10 ARM Flash Debug/../../obj/assert.o
.debug_ranges 0x00000148 0x18 ARM Flash Debug/../../obj/backdoor.o
.debug_ranges 0x00000160 0x18 ARM Flash Debug/../../obj/boot.o
.debug_ranges 0x00000178 0x48 ARM Flash Debug/../../obj/com.o
.debug_ranges 0x000001c0 0x18 ARM Flash Debug/../../obj/cop.o
.debug_ranges 0x000001d8 0x38 ARM Flash Debug/../../obj/xcp.o

462
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/bin/openbtl_olimex_lpc_l2294_20mhz.srec
View File

@ -1,4 +1,4 @@
S02B0000443A2F7573722F6665617365722F736F6674776172652F4F70656E424C542F5461726765742F44657D
S02B0000433A2F576F726B2F736F6674776172652F4F70656E424C542F5461726765742F44656D6F2F41524DEF
S113000018F09FE518F09FE518F09FE518F09FE5BC
S113001018F09FE5885F20B9F0FF1FE510F09FE519
S113002050000000E00200006C010000E402000047
@ -38,7 +38,7 @@ S1130228280000EB2C019FE52C119FE5001041E00C
S1130238080051E30020A0A3042080A4001080A596
S1130248E8009FE5E8109FE5010050E1BEFFFF0AC2
S1130258042090E403002DE90FE0A0E112FF2FE150
S11302680300BDE8B0FFFFEA180300EB0000A0E3B9
S11302680300BDE8B0FFFFEA210300EB0000A0E3B0
S11302780010A0E3E4209FE50FE0A0E112FF2FE1C6
S1130288010050E10EF0A001012052E00EF0A0019F
S1130298013080E1023083E1030013E30400001A13
@ -47,13 +47,13 @@ S11302B80EF0A0E10130D0E40130C1E4012052E2A3
S11302C8FBFFFF1A0EF0A0E1010050E10EF0A001BF
S11302D80120C0E4FBFFFFEAFEFFFFEAFEFFFFEA9E
S11302E8FEFFFFEAFEFFFFEAFEFFFFEA40C01FE051
S11302F830110040301100403010004030110040EF
S113030830110040300F0040C81500003C02004086
S11303183C02004070030000700300007C140000DD
S1130328C815000030110040301100407C14000052
S11303387C1400007C1400007C1400007C14000071
S11303487C1400007C1400007C140000C815000014
S11303583C0200403007004030070040300B0040AA
S11302F838110040381100403810004038110040CF
S113030838110040380F0040E81500003C02004056
S11303183C0200407003000070030000A0140000B9
S1130328E81500003811004038110040A0140000FE
S1130338A0140000A0140000A0140000A0140000E1
S1130348A0140000A0140000A0140000E815000088
S11303583C0200403807004038070040380B004092
S10B0368700300000000A0E195
S113037004E02DE588309FE52220A0E38420C3E536
S11303805510E0E38C10C3E55520A0E38C20C3E5B1
@ -63,34 +63,34 @@ S11303B00320A0E38020C3E55520E0E38C20C3E5BF
S11303C05520A0E38C20C3E50020A0E30020C3E572
S11303D00420A0E30420C3E50220A0E30020C3E539
S11303E00120A0E30021C3E51D3843E2002093E58A
S11303F0052082E3002083E5890200EB8F0200EBF5
S11303F0052082E3002083E58F0200EB960200EBE8
S1130400FDFFFFEA00C01FE070402DE90060A0E19D
S113041050509FE50040A0E3B80200EB003095E5A2
S113041050509FE50040A0E3C10200EB003095E599
S1130420060053E10800008A041095E5013083E0DA
S1130430030056E10400002A842084E024309FE570
S1130440022183E00800D2E5040000EA014084E2CE
S11304500C5085E2100054E3EEFFFF1AFF00A0E306
S11304607040BDE81EFF2FE17C14000030402DE9F0
S11304607040BDE81EFF2FE1A014000030402DE9CC
S113047020D04DE20040A0E1000090E5E1FFFFEB59
S1130480FF0050E30000A0033700000A3230A0E36D
S11304900C308DE510008DE514008DE50130A0E3EE
S11304A000308DE5950200EB0C008DE20D10A0E10B
S11304A000308DE59E0200EB0C008DE20D10A0E102
S11304B03A31E0E30FE0A0E113FF2FE100309DE5C6
S11304C0000053E30000A0132700001A3330A0E318
S11304D00C308DE50450A0E1043095E410308DE536
S11304E014508DE5023CA0E318308DE584309FE57F
S11304F01C308DE50130A0E300308DE57F0200EB78
S11304F01C308DE50130A0E300308DE5880200EB6F
S11305000C008DE20D10A0E13A31E0E30FE0A0E130
S113051013FF2FE100309DE5000053E30000A0131A
S11305201100001A3830A0E30C308DE5003094E55A
S113053010308DE514508DE5023CA0E318308DE5B4
S11305400130A0E300308DE56C0200EB0C008DE27D
S11305400130A0E300308DE5750200EB0C008DE274
S11305500D10A0E13A31E0E30FE0A0E113FF2FE139
S113056000009DE5010070E20000A03320D08DE280
S11305703040BDE81EFF2FE160EA000004E02DE5F5
S1130580813BB0E10000A0130700001A003090E5A1
S1130590010053E10100A0030300000A041080E4F9
S11305A0022CA0E3090100EB0100A0E304E09DE4B8
S11305A0022CA0E30C0100EB0100A0E304E09DE4B5
S11305B01EFF2FE130402DE90040A0E10150A0E1F1
S11305C050309FE5030050E10500000A020A51E3A0
S11305D00500000AA4FFFFEB000050E30300001A2B
@ -106,7 +106,7 @@ S11306600A0053E10500000A0500A0E10A10A0E118
S1130670CFFFFFEB005050E20000A0031B00000A74
S1130680003095E5044063E0044084E2044085E0E2
S1130690013086E2018047E20888A0E1288883E0EF
S11306A050709FE502AC8AE2140200EB043085E24C
S11306A050709FE502AC8AE21D0200EB043085E243
S11306B0043063E0070053E10500009A0500A0E15F
S11306C00A10A0E1BAFFFFEB005050E20600000A56
S11306D0044085E20130D6E40130C4E4080056E168
@ -127,226 +127,228 @@ S11307B0FF0050E3FF0054130000A0033900000AB7
S11307C0050054E10000A0833600008A000054E3D1
S11307D00000A0033300000A100055E30000A083CA
S11307E03000008A3230A0E300308DE504408DE50E
S11307F008508DE50130A0E314308DE5BF0100EB16
S11307F008508DE50130A0E314308DE5C80100EB0D
S11308000D00A0E114108DE23A31E0E30FE0A0E125
S113081013FF2FE114309DE5000053E30000A01303
S11308202000001A3430A0E300308DE504408DE54B
S113083008508DE578309FE50C308DE50130A0E35C
S113084014308DE5AD0100EB0D00A0E114108DE234
S113084014308DE5B60100EB0D00A0E114108DE22B
S11308503A31E0E30FE0A0E113FF2FE114309DE50E
S1130860000053E30000A0130E00001A3530A0E38B
S113087000308DE504408DE508508DE50130A0E39E
S113088014308DE59D0100EB0D00A0E114108DE204
S113088014308DE5A60100EB0D00A0E114108DE2FB
S11308903A31E0E30FE0A0E113FF2FE114009DE5FE
S11308A0010070E20000A03320D08DE27040BDE86A
S11308B01EFF2FE160EA0000023AA0E3050093E87E
S11308C0000082E0082093E5020080E00C2093E51C
S11308D0020080E0102093E5020080E0142093E5FC
S11308E0020080E0182093E5020080E01C3093E5CC
S11308F0030080E0010070E20000A0331EFF2FE13E
S113090010402DE904D04DE25C309FE5140093E9DA
S1130910024084E00C2093E5024084E0102093E53B
S1130920024084E0142093E5024084E01C2093E517
S1130930024084E0203093E5034084E0004064E218
S113094000408DE5DBFFFFEB000054E10100A00354
S113095018009F150410A0130D20A0116EFFFF1B9B
S113096004D08DE21040BDE81EFF2FE13C020040A0
S11309701420000004E02DE548309FE5003093E5A5
S1130980010073E30400000A38009FE5B6FEFFEBA4
S1130990000050E30000A0030800000A28309FE58F
S11309A0003093E5010073E30100A0030300000A93
S11309B014009FE5ACFEFFEB000090E20100A013E1
S11309C004E09DE41EFF2FE13C020040400400408F
S11309D070402DE90160A0E10228A0E12228B0E1E5
S11309E00900000A0040A0E1010080E2012042E287
S11309F00258A0E1255880E00130D6E40130C4E477
S1130A003E0100EB050054E1FAFFFF1A7040BDE817
S1130A101EFF2FE104E02DE51E0000EB000050E373
S1130A200900000A0101A0E3021AA0E34020A0E3A8
S1130A30E6FFFFEB0220A0E314309FE5402083E5AE
S1130A400131A0E30FE0A0E113FF2FE104E09DE4F6
S1130A501EFF2FE100C01FE004E02DE57BFDFFEB4E
S1130A6004E09DE41EFF2FE104E02DE522FFFFEBEF
S1130A7004E09DE41EFF2FE104E02DE526FFFFEBDB
S1130A8004E09DE41EFF2FE104E02DE53DFFFFEBB4
S1130A9004E09DE41EFF2FE104E02DE585FFFFEB5C
S1130AA004E09DE41EFF2FE104E02DE593FFFFEB3E
S1130AB0000050E30000A003ADFFFF1B04E09DE431
S1130AC01EFF2FE114309FE50020A0E3042083E5FE
S1130AD00C2083E5082083E5102083E51EFF2FE129
S1130AE0004000E024309FE5082093E520109FE5B6
S1130AF0000091E5000082E018309FE500C093E516
S1130B0000006CE0000081E5002083E51EFF2FE17A
S1130B10004000E0440600404806004004309FE5E1
S1130B20000083E51EFF2FE14406004004E02DE5AC
S1130B3030309FE50000A0E3140083E5280083E53E
S1130B4024209FE50C2083E50120A0E3042083E515
S1130B50082093E514309FE5002083E5EEFFFFEBCA
S1130B6004E09DE41EFF2FE1004000E05FEA000086
S1130B704806004004E02DE5D9FFFFEB08309FE56F
S1130B80000093E504E09DE41EFF2FE144060040CD
S1130B901C309FE51430D3E5010013E310309F159A
S1130BA00030D3150030C0150100A0130000A003CD
S1130BB01EFF2FE100C000E010402DE944309FE506
S1130BC01430D3E5200013E30000A0030B00000A57
S1130BD030309FE50000C3E51430D3E5200013E373
S1130BE00100A0130500001A18409FE5C30000EBA4
S1130BF01430D4E5200013E3FBFFFF0A0100A0E357
S1130C001040BDE81EFF2FE100C000E034309FE536
S1130C100020A0E30420C3E50820C3E51420C3E5B5
S1130C207F10E0E30C10C3E54110A0E30010C3E51E
S1130C300420C3E50320A0E30C20C3E50720A0E3C0
S1130C400820C3E51EFF2FE100C000E0F0412DE9BC
S1130C500050A0E1FF4001E2400054E368009F859A
S1130C608310A0834900008B0400A0E1D1FFFFEBB7
S1130C70010050E350009F158610A0134300001B91
S1130C800460A0E1000054E30D00000A0040A0E36A
S1130C9034709FE58E80A0E3980000EB0400D5E754
S1130CA0C4FFFFEB010050E30700A0110810A011DE
S1130CB03600001B014084E20438A0E1230856E119
S1130CC0F4FFFF8AF041BDE81EFF2FE13C15000050
S1130CD030402DE90050A0E1A0309FE50030D3E57D
S1130CE0000053E30B00001A94009FE5A7FFFFEBFD
S1130CF0010050E30000A0131E00001A0120A0E32D
S1130D0078309FE50020C3E50000A0E374309FE540
S1130D100000C3E5170000EA68309FE50040D3E512
S1130D2064009FE5000084E098FFFFEB010050E3BE
S1130D300000A0130F00001A014084E2FF2004E227
S1130D4040309FE50020C3E534309FE50030D3E513
S1130D50020053E10000A0130600001A0500A0E100
S1130D6024109FE519FFFFEB0020A0E30C309FE562
S1130D700020C3E50100A0E33040BDE81EFF2FE1E1
S1130D8094060040500600404C06004051060040C6
S1130D9004E02DE510309FE5000083E50C309FE56D
S1130DA0001083E5550000EBFDFFFFEA98060040C4
S1130DB09C06004004E02DE54B0000EB010050E3ED
S1130DC00B00000A30309FE50030D3E5010053E307
S1130DD00700001A66FFFFEB310050E30400009A9D
S1130DE00020A0E310309FE50020C3E534FFFFEBB3
S1130DF007FFFFEB04E09DE41EFF2FE1A006004087
S1130E0004E02DE50120A0E310309FE50020C3E5B8
S1130E1045FFFFEBE6FFFFEB04E09DE41EFF2FE13F
S1130E20A006004004E02DE5330000EBF3FFFFEBE8
S1130E300CFFFFEB070000EB04E09DE41EFF2FE135
S1130E4004E02DE52D0000EB130000EBD8FFFFEBD1
S1130E5004E09DE41EFF2FE104E02DE504D04DE203
S1130E600030E0E30030CDE50030A0E30130CDE513
S1130E70300000EB64FFFFEB18309FE50030D3E552
S1130E80010053E30D00A0013F00000B04D08DE2EC
S1130E9004E09DE41EFF2FE1A106004004E02DE5DF
S1130EA014009FE589FFFFEB010050E308009F0554
S1130EB03500000B04E09DE41EFF2FE1A406004072
S1130EC004E02DE5FF1001E25FFFFFEB290000EBDA
S1130ED004E09DE41EFF2FE10120A0E304309FE520
S1130EE00020C3E51EFF2FE1A106004004E02DE52C
S1130EF01A0000EB04E09DE41EFF2FE11EFF2FE12A
S1130F001EFF2FE10020A0E304309FE50120C3E58C
S1130F101EFF2FE1E406004014309FE50120E0E3CA
S1130F200320C3E50400C3E50220A0E3B424C3E125
S1130F301EFF2FE1E40600401C309FE50020A0E3E3
S1130F400020C3E5482083E54320C3E5B424C3E17E
S1130F500220C3E50120C3E51EFF2FE1E4060040A3
S1130F600C309FE50000D3E5000090E20100A013DF
S1130F701EFF2FE1E40600400020A0E304309FE5BB
S1130F804320C3E51EFF2FE1E406004030402DE975
S1130F900040A0E10030D0E5FF0053E31200001A46
S1130FA0D7FFFFEBC8349FE50120A0E30020C3E591
S1130FB00010E0E30310C3E51010A0E30410C3E540
S1130FC00010A0E30510C3E54000A0E30600C3E55C
S1130FD00700C3E50810C3E50920C3E50A20C3E5FB
S1130FE00820A0E3B424C3E1140100EA80249FE5AF
S1130FF00020D2E5010052E31B01001AC93043E28C
S1131000350053E303F19F970A0100EAC41200007C
S113101038140000381400002C14000038140000A8
S1131020381400001014000010130000D413000042
S11310309C13000038140000381400003814000019
S1131040381400003814000038140000381400006C
S1131050381400003814000038140000381400005C
S1131060381400003814000038140000381400004C
S1131070381400003814000038140000381400003C
S1131080381400003814000038140000381400002C
S1131090381400003814000038140000381400001C
S11310A0381400003814000038140000381400000C
S11310B038140000AC11000034110000E4100000EA
S11310C08C1100003814000038140000381400009B
S11310D01C12000038140000601200006C120000A2
S11310E0A01200000120D0E53F0052E30200009A64
S11310F02200A0E387FFFFEBD00000EA70539FE5D6
S1131100040085E2481095E530FEFFEB0030E0E393
S11311100330C5E50120D4E5483095E5033082E08D
S1131120483085E50130D4E5013083E2B434C5E1CB
S1131130C20000EA0130D0E53F0053E30200009A08
S11311402200A0E373FFFFEBBC0000EA041090E56B
S11311501C539FE5481085E5040085E20120D4E591
S11311601AFEFFEB0030E0E30330C5E50120D4E5CF
S1131170483095E5033082E0483085E50130D4E518
S1131180013083E2B434C5E1AC0000EAE0329FE50B
S11311900020E0E30320C3E5042090E5482083E534
S11311A00120A0E3B424C3E1A40000EAC0329FE517
S11311B00020E0E30320C3E5481093E5043090E504
S11311C0000053E30020A0030500000A0020A0E370
S11311D00100D1E4002082E0FF2002E2013053E26A
S11311E0FAFFFF1A88329FE50010A0E30720C3E549
S11311F00810C3E50910C3E5222CA0E10A20C3E5C9
S11312000120A0E30420C3E50510C3E50610C3E5EF
S11312100820A0E3B424C3E1880000EA50329FE52B
S11312200020E0E30320C3E548229FE5482083E54E
S11312300020A0E30420C3E50520C3E50620C3E5A0
S11312400710A0E30710C3E50820C3E50920C3E5A0
S11312500A20C3E50820A0E3B424C3E1770000EA30
S11312600000A0E32BFFFFEB740000EA00329FE5CF
S11312700020E0E30320C3E50020A0E30420C3E54D
S11312800110D3E50510C3E50620C3E50720C3E537
S11312900820C3E50620A0E3B424C3E1670000EA04
S11312A0CC419FE50030A0E30030C4E514FFFFEB20
S11312B00030E0E30330C4E50130A0E3B434C4E11A
S11312C05E0000EAA8319FE5480093E53F10A0E3E3
S11312D0012084E2E7FDFFEB000050E30200001A66
S11312E03100A0E30BFFFFEB540000EA80319FE5DF
S11312F00020E0E30320C3E5482093E53F2082E299
S1131300482083E50120A0E3B424C3E14B0000EAB4
S11313100130D0E53E0053E30200009A2200A0E32E
S1131320FCFEFFEB450000EA44319FE50020E0E3CA
S11313300320C3E50120A0E3B424C3E10110D0E5F8
S1131340000051E30500001AD6FDFFEB000050E356
S11313503A00001A3100A0E3EEFEFFEB370000EA8A
S11313600C319FE5480093E5022084E2C1FDFFEBC8
S1131370000050E30200001A3100A0E3E5FEFFEB99
S11313802E0000EAE8309FE50110D4E5482093E5FB
S1131390022081E0482083E5280000EAD0309FE560
S11313A00020E0E30320C3E50020A0E30420C3E51C
S11313B00520C3E54010A0E30610C3E50720C3E5FC
S11313C00820C3E50920C3E50720A0E3B424C3E152
S11313D01A0000EA98309FE5480093E5041094E56C
S11313E0A8FDFFEB000050E30200001A3100A0E367
S11313F0C8FEFFEB110000EA74309FE50020E0E333
S11314000320C3E50120A0E3B424C3E10B0000EAF8
S113141090FDFFEB58309FE50020E0E30320C3E597
S11314200120A0E3B424C3E1040000EA3100A0E3F6
S1131430B8FEFFEB010000EA2000A0E3B5FEFFEBDD
S11314402C309FE54330D3E5010053E31000A003A3
S1131450B0FEFF0B18309FE50120A0E34320C3E555
S1131460030083E2B414D3E194FEFFEB3040BDE803
S10F14701EFF2FE1E4060040C015000040
S113147C00200000002000000100000000400000DB
S113148C00200000020000000060000000200000AA
S113149C0300000000800000002000000400000095
S11314AC00A00000002000000500000000C00000A7
S11314BC002000000600000000E0000000200000F6
S11314CC07000000000001000000010008000000FB
S11314DC00000200000001000900000000000300ED
S11314EC002000000A00000000200300002000007F
S11314FC0B00000000400300002000000C00000062
S113150C00600300002000000D00000000800300B8
S113151C002000000E00000000A0030000200000CA
S113152C0F00000000C003000020000010000000A9
S113153C443A2F7573722F6665617365722F736FDE
S113154C6674776172652F4F70656E424C542F54DC
S113155C61726765742F44656D6F2F41524D375F0F
S113156C4C5043323030305F4F6C696D65785F4C52
S113157C50435F4C323239345F43726F7373776FFD
S113158C726B732F426F6F742F6964652F2E2E2F1D
S113159C2E2E2F2E2E2F2E2E2F536F757263652FFA
S11315AC41524D375F4C5043323030302F7561729D
S10F15BC742E63004F70656E424C5400A6
S11308B01EFF2FE160EA000004E02DE504D04DE2C4
S11308C068309FE5003093E5010073E30100A00365
S11308D01300000A54309FE5060093E9011082E0FA
S11308E00C2093E5021081E0102093E5021081E0D2
S11308F0142093E5021081E01C2093E5021081E0AE
S1130900202093E5023081E0003063E204208DE290
S1130910043022E518009FE50410A0E30D20A0E1B7
S11309207DFFFFEB04D08DE204E09DE41EFF2FE188
S11309303C02004014200000023AA0E3050093E8C2
S1130940000082E0082093E5020080E00C2093E59B
S1130950020080E0102093E5020080E0142093E57B
S1130960020080E0182093E5020080E01C3093E54B
S1130970030080E0010070E20000A0331EFF2FE1BD
S113098004E02DE548309FE5003093E5010073E372
S11309900400000A38009FE5B3FEFFEB000050E3BB
S11309A00000A0030800000A28309FE5003093E50A
S11309B0010073E30100A0030300000A14009FE593
S11309C0A9FEFFEB000090E20100A01304E09DE407
S11309D01EFF2FE13C0200404004004070402DE91E
S11309E00160A0E10228A0E12228B0E10900000A88
S11309F00040A0E1010080E2012042E20258A0E1AF
S1130A00255880E00130D6E40130C4E4440100EB11
S1130A10050054E1FAFFFF1A7040BDE81EFF2FE104
S1130A2004E02DE5200000EB000050E30B00000A79
S1130A302A0100EB390000EB0101A0E3021AA0E354
S1130A404020A0E3E4FFFFEB0220A0E314309FE585
S1130A50402083E50131A0E30FE0A0E113FF2FE183
S1130A6004E09DE41EFF2FE100C01FE004E02DE53B
S1130A7076FDFFEB04E09DE41EFF2FE104E02DE58D
S1130A801DFFFFEB04E09DE41EFF2FE104E02DE5D4
S1130A9021FFFFEB04E09DE41EFF2FE104E02DE5C0
S1130AA038FFFFEB04E09DE41EFF2FE104E02DE599
S1130AB0A0FFFFEB04E09DE41EFF2FE104E02DE521
S1130AC07CFFFFEB000050E30000A003ABFFFF1B23
S1130AD004E09DE41EFF2FE130309FE50020A0E3F9
S1130AE0142083E5282083E524109FE50C1083E57A
S1130AF00110A0E3041083E5081093E514309FE58A
S1130B00001083E510309FE5002083E51EFF2FE1F0
S1130B10004000E05FEA0000480600404406004050
S1130B2014309FE50020A0E3042083E50C2083E536
S1130B30082083E5102083E51EFF2FE1004000E03C
S1130B4024309FE5082093E520109FE5000091E5FF
S1130B50000082E018309FE500C093E500006CE0DF
S1130B60000081E5002083E51EFF2FE1004000E046
S1130B70440600404806004004E02DE5EFFFFFEB8B
S1130B8008309FE5000093E504E09DE41EFF2FE19B
S1130B90440600401C309FE51430D3E5010013E304
S1130BA010309F150030D3150030C0150100A0137C
S1130BB00000A0031EFF2FE100C000E010402DE95B
S1130BC044309FE51430D3E5200013E30000A00374
S1130BD00B00000A30309FE50000C3E51430D3E574
S1130BE0200013E30100A0130500001A18409FE53C
S1130BF0CB0000EB1430D4E5200013E3FBFFFF0A25
S1130C000100A0E31040BDE81EFF2FE100C000E09A
S1130C1034309FE50020A0E30420C3E50820C3E5A9
S1130C201420C3E57F10E0E30C10C3E54110A0E3FA
S1130C300010C3E50420C3E50320A0E30C20C3E5B2
S1130C400720A0E30820C3E51EFF2FE100C000E059
S1130C50F0412DE90050A0E1FF4001E2400054E3DF
S1130C6068009F858310A0834900008B0400A0E1E5
S1130C70D1FFFFEB010050E350009F158610A01335
S1130C804300001B0460A0E1000054E30D00000ACF
S1130C900040A0E334709FE58E80A0E3A00000EB49
S1130CA00400D5E7C4FFFFEB010050E30700A011E7
S1130CB00810A0113600001B014084E20438A0E1B2
S1130CC0230856E1F4FFFF8AF041BDE81EFF2FE13F
S1130CD06015000030402DE90050A0E1A0309FE5F0
S1130CE00030D3E5000053E30B00001A94009FE5A5
S1130CF0A7FFFFEB010050E30000A0131E00001A41
S1130D000120A0E378309FE50020C3E50000A0E3C4
S1130D1074309FE50000C3E5170000EA68309FE5E2
S1130D200040D3E564009FE5000084E098FFFFEBFA
S1130D30010050E30000A0130F00001A014084E2F8
S1130D40FF2004E240309FE50020C3E534309FE5F6
S1130D500030D3E5020053E10000A0130600001A9E
S1130D600500A0E124109FE51BFFFFEB0020A0E39A
S1130D700C309FE50020C3E50100A0E33040BDE84E
S1130D801EFF2FE194060040500600404C06004030
S1130D905106004004E02DE510309FE5000083E596
S1130DA00C309FE5001083E55D0000EBFDFFFFEADA
S1130DB0980600409C06004004E02DE5530000EB3B
S1130DC0010050E30C00000A34309FE50030D3E505
S1130DD0010053E30800001A66FFFFEB24309FE58F
S1130DE0003093E5323083E2030050E10020A02379
S1130DF00C309F250020C32508FFFF2B04E09DE451
S1130E001EFF2FE1A0060040A406004004E02DE5EB
S1130E100120A0E318309FE50020C3E555FFFFEB58
S1130E2010309FE5000083E5E2FFFFEB04E09DE462
S1130E301EFF2FE1A0060040A406004004E02DE5BB
S1130E40360000EB23FFFFEB0BFFFFEB090000EB89
S1130E50EDFFFFEB04E09DE41EFF2FE104E02DE530
S1130E602F0000EB35FFFFEB130000EBD1FFFFEB8E
S1130E7004E09DE41EFF2FE104E02DE504D04DE2E3
S1130E800030E0E30030CDE50030A0E30130CDE5F3
S1130E90310000EB5DFFFFEB18309FE50030D3E538
S1130EA0010053E30D00A0014000000B04D08DE2CB
S1130EB004E09DE41EFF2FE1A806004004E02DE5B8
S1130EC014009FE582FFFFEB010050E308009F053B
S1130ED03600000B04E09DE41EFF2FE1AC06004049
S1130EE01EFF2FE104E02DE5FF1001E257FFFFEBA9
S1130EF0290000EB04E09DE41EFF2FE10120A0E3A4
S1130F0004309FE50020C3E51EFF2FE1A806004042
S1130F1004E02DE51A0000EB04E09DE41EFF2FE140
S1130F201EFF2FE11EFF2FE10020A0E304309FE508
S1130F300120C3E51EFF2FE1EC06004014309FE5BD
S1130F400120E0E30320C3E50400C3E50220A0E39D
S1130F50B424C3E11EFF2FE1EC0600401C309FE5E2
S1130F600020A0E30020C3E5482083E54320C3E537
S1130F70B424C3E10220C3E50120C3E51EFF2FE131
S1130F80EC0600400C309FE50000D3E5000090E241
S1130F900100A0131EFF2FE1EC0600400020A0E397
S1130FA004309FE54320C3E51EFF2FE1EC0600401B
S1130FB030402DE90040A0E10030D0E5FF0053E3CC
S1130FC01200001AD7FFFFEBC8349FE50120A0E30D
S1130FD00020C3E50010E0E30310C3E51010A0E314
S1130FE00410C3E50010A0E30510C3E54000A0E32E
S1130FF00600C3E50700C3E50810C3E50920C3E5FF
S11310000A20C3E50820A0E3B424C3E1140100EAE4
S113101080249FE50020D2E5010052E31B01001A61
S1131020C93043E2350053E303F19F970A0100EA14
S1131030E81200005C1400005C140000501400006E
S11310405C1400005C14000034140000341300002D
S1131050F8130000C01300005C1400005C140000CE
S11310605C1400005C1400005C1400005C140000BC
S11310705C1400005C1400005C1400005C140000AC
S11310805C1400005C1400005C1400005C1400009C
S11310905C1400005C1400005C1400005C1400008C
S11310A05C1400005C1400005C1400005C1400007C
S11310B05C1400005C1400005C1400005C1400006C
S11310C05C1400005C1400005C1400005C1400005C
S11310D05C1400005C140000D011000058110000E2
S11310E008110000B01100005C1400005C14000042
S11310F05C140000401200005C1400008412000024
S113110090120000C41200000120D0E53F0052E319
S11311100200009A2200A0E387FFFFEBD00000EA60
S113112070539FE5040085E2481095E52AFEFFEB25
S11311300030E0E30330C5E50120D4E5483095E50F
S1131140033082E0483085E50130D4E5013083E2A4
S1131150B434C5E1C20000EA0130D0E53F0053E3F6
S11311600200009A2200A0E373FFFFEBBC0000EA38
S1131170041090E51C539FE5481085E5040085E2C2
S11311800120D4E514FEFFEB0030E0E30330C5E5B5
S11311900120D4E5483095E5033082E0483085E508
S11311A00130D4E5013083E2B434C5E1AC0000EA97
S11311B0E0329FE50020E0E30320C3E5042090E54E
S11311C0482083E50120A0E3B424C3E1A40000EA9D
S11311D0C0329FE50020E0E30320C3E5481093E517
S11311E0043090E5000053E30020A0030500000A4A
S11311F00020A0E30100D1E4002082E0FF2002E20D
S1131200013053E2FAFFFF1A88329FE50010A0E391
S11312100720C3E50810C3E50910C3E5222CA0E1AB
S11312200A20C3E50120A0E30420C3E50510C3E5BB
S11312300610C3E50820A0E3B424C3E1880000EA53
S113124050329FE50020E0E30320C3E548229FE5F8
S1131250482083E50020A0E30420C3E50520C3E57E
S11312600620C3E50710A0E30710C3E50820C3E583
S11312700920C3E50A20C3E50820A0E3B424C3E1A0
S1131280770000EA0000A0E32BFFFFEB740000EA04
S113129000329FE50020E0E30320C3E50020A0E343
S11312A00420C3E50110D3E50510C3E50620C3E51A
S11312B00720C3E50820C3E50620A0E3B424C3E166
S11312C0670000EACC419FE50030A0E30030C4E5AC
S11312D014FFFFEB0030E0E30330C4E50130A0E38A
S11312E0B434C4E15E0000EAA8319FE5480093E508
S11312F03F10A0E3012084E2E3FDFFEB000050E394
S11313000200001A3100A0E30BFFFFEB540000EAD7
S113131080319FE50020E0E30320C3E5482093E506
S11313203F2082E2482083E50120A0E3B424C3E106
S11313304B0000EA0130D0E53E0053E30200009A7E
S11313402200A0E3FCFEFFEB450000EA44319FE5E8
S11313500020E0E30320C3E50120A0E3B424C3E1BB
S11313600110D0E5000051E30500001AD2FDFFEBA7
S1131370000050E33A00001A3100A0E3EEFEFFEB58
S1131380370000EA0C319FE5480093E5022084E22F
S1131390BDFDFFEB000050E30200001A3100A0E3A2
S11313A0E5FEFFEB2E0000EAE8309FE50110D4E5EE
S11313B0482093E5022081E0482083E5280000EAE4
S11313C0D0309FE50020E0E30320C3E50020A0E344
S11313D00420C3E50520C3E54010A0E30610C3E5DF
S11313E00720C3E50820C3E50920C3E50720A0E3DF
S11313F0B424C3E11A0000EA98309FE5480093E55D
S1131400041094E5A4FDFFEB000050E30200001A71
S11314103100A0E3C8FEFFEB110000EA74309FE541
S11314200020E0E30320C3E50120A0E3B424C3E1EA
S11314300B0000EA8CFDFFEB58309FE50020E0E351
S11314400320C3E50120A0E3B424C3E1040000EABF
S11314503100A0E3B8FEFFEB010000EA2000A0E3A6
S1131460B5FEFFEB2C309FE54330D3E5010053E399
S11314701000A003B0FEFF0B18309FE50120A0E38D
S11314804320C3E5030083E2B414D3E194FEFFEBED
S11314903040BDE81EFF2FE1EC060040E0150000DF
S11314A000200000002000000100000000400000B7
S11314B00020000002000000006000000020000086
S11314C00300000000800000002000000400000071
S11314D000A00000002000000500000000C0000083
S11314E0002000000600000000E0000000200000D2
S11314F007000000000001000000010008000000D7
S113150000000200000001000900000000000300C8
S1131510002000000A00000000200300002000005A
S11315200B00000000400300002000000C0000003D
S113153000600300002000000D0000000080030094
S1131540002000000E00000000A0030000200000A6
S11315500F00000000C00300002000001000000085
S1131560433A2F576F726B2F736F6674776172658E
S11315702F4F70656E424C542F5461726765742FFF
S113158044656D6F2F41524D375F4C5043323030BC
S1131590305F4F6C696D65785F4C50435F4C3232FD
S11315A039345F43726F7373776F726B732F426F4B
S11315B06F742F6964652F2E2E2F2E2E2F2E2E2F13
S11315C02E2E2F536F757263652F41524D375F4C2A
S11315D05043323030302F756172742E6300000036
S10B15E04F70656E424C54008B
S9030050AC

5
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/config.h
View File

@ -41,10 +41,15 @@
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
* big endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
#define BOOT_CPU_XTAL_SPEED_KHZ (20000)
#define BOOT_CPU_SYSTEM_SPEED_KHZ (60000)
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
/****************************************************************************************

24
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/hooks.c
View File

@ -75,6 +75,30 @@ blt_bool BackDoorEntryHook(void)
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
/****************************************************************************************
* C P U D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/****************************************************************************************
** NAME: CpuUserProgramStartHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
** keep the bootloader active.
** DESCRIPTION: Callback that gets called when the bootloader is about to exit and
** hand over control to the user program. This is the last moment that
** some final checking can be performed and if necessary prevent the
** bootloader from activiting the user program.
**
****************************************************************************************/
blt_bool CpuUserProgramStartHook(void)
{
/* okay to start the user program */
return BLT_TRUE;
} /*** end of CpuUserProgramStartHook ***/
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
****************************************************************************************/

26
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/ide/lpc2294_crossworks.hzs
View File

@ -2,23 +2,18 @@
<session>
<Bookmarks/>
<Breakpoints/>
<ETMWindow>
<ETMRegister number="0" value="800" />
<ETMRegister number="8" value="6f" />
<ETMRegister number="9" value="1000000" />
</ETMWindow>
<ExecutionCountWindow/>
<ExecutionProfileWindow/>
<Memory1>
<MemoryWindow autoEvaluate="0" addressText="0x80000200" numColumns="8" sizeText="32" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="0x80000200" numColumns="8" sizeText="32" dataSize="1" radix="16" name="" addressSpace="" />
</Memory1>
<Memory2>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory2>
<Memory3>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory3>
<Memory4>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory4>
<Project>
<ProjectSessionItem path="lpc2294_crossworks" name="unnamed" />
@ -28,16 +23,16 @@
<ProjectSessionItem path="lpc2294_crossworks;openbtl_olimex_lpc_l2294_20mhz;Source Files;Demo;Boot" name="unnamed" />
</Project>
<Register1>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register1>
<Register2>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register2>
<Register3>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register3>
<Register4>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register4>
<TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
<TraceWindow>
@ -56,8 +51,7 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot\main.c" y="53" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="47" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="12" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot\config.h" y="76" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot\config.h" left="0" selected="1" name="unnamed" top="72" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot\main.c" y="0" path="C:\Work\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="0" />
</Files>
<ARMCrossStudioWindow activeProject="openbtl_olimex_lpc_l2294_20mhz" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Boot" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388479" debugSearchPath="" buildConfiguration="ARM Flash Debug" />
</session>

2
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Boot/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
Rowleys CrossWorks was used as the editor during the development of this software program. This directory contains
Rowleys CrossWorks (version 2.3.1) was used as the editor during the development of this software program. This directory contains
the CrossWorks project and solution files. More info is available at: http://www.rowley.co.uk/

BIN
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Prog/bin/demoprog_olimex_lpc_l2294_20mhz.elf
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Binary file not shown.

1263
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Prog/bin/demoprog_olimex_lpc_l2294_20mhz.map
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File diff suppressed because it is too large Load Diff

582
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Prog/bin/demoprog_olimex_lpc_l2294_20mhz.srec
View File

@ -1,4 +1,4 @@
S02B0000443A2F7573722F6665617365722F736F6674776172652F4F70656E424C542F5461726765742F44657D
S02B0000433A2F576F726B2F736F6674776172652F4F70656E424C542F5461726765742F44656D6F2F41524DEF
S113200018F09FE518F09FE518F09FE518F09FE59C
S113201018F09FE5885F20B9F0FF1FE510F09FE5F9
S11320206020000040200000442000004820000000
@ -30,11 +30,11 @@ S11321A8FBFFFF1A0EF0A0E10130D0E40130C1E4D6
S11321B8012052E2FBFFFF1A0EF0A0E1010050E1FA
S11321C80EF0A0010120C0E4FBFFFFEA982D0040B7
S11321D8982C004098290040982A0040982B0040E9
S11321E898280040DC3F00003C2000403C20004090
S11321F85022000050220000B83F0000DC3F0000DD
S1132208982D0040982D0040B83F0000B83F0000CA
S1132218B83F0000B83F0000B83F0000B83F0000D6
S1132228B83F0000B83F0000DC3F00003C200040FD
S11321E898280040044000003C2000403C20004067
S11321F85022000050220000D83F00000440000094
S1132208982D0040982D0040D83F0000D83F00008A
S1132218D83F0000D83F0000D83F0000D83F000056
S1132228D83F0000D83F0000044000003C20004094
S1132238982000409820004098240040242600005C
S10B22480000A0E10000A0E188
S113225000482DE904B08DE204D04DE24030A0E303
@ -133,7 +133,7 @@ S11328100020C3E55C309FE50120A0E30020C3E570
S113282054309FE50FE0A0E113FF2FE14C309FE50A
S11328300FE0A0E113FF2FE144309FE50FE0A0E19A
S113284013FF2FE104D04BE20048BDE81EFF2FE147
S1132850B83F0000E02900005F61020000E20400CC
S1132850D83F0000E02900005F61020000E20400AC
S113286084C01FE08CC01FE080C01FE088C01FE050
S113287000C01FE004C01FE000C11FE034250000B9
S113288088280000EC24000000482DE904B08DE203
@ -174,10 +174,10 @@ S1132AA0F9FFFFEA040040E27000BDE80120D0E431
S1132AB0000052E3FCFFFF1A010040E01EFF2FE17B
S1132AC001010101808080800000A0E10000A0E1FC
S1132AD0F04F2DE918D04DE20070A0E10140A0E1D3
S1132AE008208DE50030A0E3003080E584B89FE540
S1132AF00150A0E10E0200EA015085E2250051E3F5
S1132AE008208DE50030A0E3003080E598B89FE52C
S1132AF00150A0E1130200EA015085E2250051E3F0
S1132B000530A0010060A0030200000A0700A0E154
S1132B101D0400EB060200EA0310A0E10100D3E467
S1132B10230400EB0B0200EA0310A0E10100D3E45C
S1132B200350A0E1202040E2100052E302F19F97FD
S1132B301C0000EA782B0000A82B0000A82B000042
S1132B40802B0000A82B0000A82B0000A82B00005D
@ -204,7 +204,7 @@ S1132C80090052E3F7FFFF9A000058E3000000BA7E
S1132C90016C86E3680050E30600001A0000D5E5E5
S1132CA0680050E3086086030100D50502508502E0
S1132CB00150851204608613780050E300F19F9759
S1132CC0780000EA68330000A82E0000A82E000057
S1132CC0780000EA7C330000A82E0000A82E000043
S1132CD0A82E0000A82E0000A82E0000A82E000098
S1132CE0A82E0000A82E0000A82E0000A82E000088
S1132CF0A82E0000A82E0000A82E0000A82E000078
@ -226,289 +226,291 @@ S1132DE0A82E0000A82E0000A82E0000A82E000087
S1132DF0A82E0000A82E0000A82E0000A82E000077
S1132E00A82E0000A82E0000A82E0000A82E000066
S1132E10A82E0000A82E0000A82E0000A82E000056
S1132E20A82E0000F82F0000A82E0000A82E0000F5
S1132E20A82E00000C300000A82E0000A82E0000E0
S1132E30A82E0000A82E0000A82E0000A82E000036
S1132E40A82E0000A82E0000A82E0000A82E000026
S1132E50EC2E000054300000A82E0000A82E000024
S1132E60A82E0000A82E000054300000A82E000058
S1132E50EC2E000068300000A82E0000A82E000010
S1132E60A82E0000A82E000068300000A82E000044
S1132E70A82E0000A82E0000A82E0000382F000065
S1132E8024300000CC2F0000A82E0000A82E000043
S1132E905C2F0000A82E000040300000A82E000087
S1132EA0A82E0000FC2F0000CC149FE500C091E583
S1132EB000005CE31E01000A00808DE508308DE20D
S1132E8038300000E02F0000A82E0000A82E00001B
S1132E905C2F0000A82E000054300000A82E000073
S1132EA0A82E000010300000E0349FE500C093E538
S1132EB000005CE32301000A00808DE508308DE208
S1132EC004308DE50710A0E10620A0E10930A0E15F
S1132ED00FE0A0E11CFF2FE1150100EA0700A0E1CB
S1132EE02510A0E3280300EB110100EA08309DE55A
S1132ED00FE0A0E11CFF2FE11A0100EA0700A0E1C6
S1132EE02510A0E32E0300EB160100EA08309DE54F
S1132EF0042083E208208DE50040D3E5019049E2F7
S1132F000600A0E10910A0E10720A0E1480300EBBE
S1132F100700A0E10410A0E11B0300EB100016E37E
S1132F200301000A2000A0E30910A0E10720A0E1AA
S1132F30300300EBFE0000EA080016E308309DE5CC
S1132F000600A0E10910A0E10720A0E14E0300EBB8
S1132F100700A0E10410A0E1210300EB100016E378
S1132F200801000A2000A0E30910A0E10720A0E1A5
S1132F30360300EB030100EA080016E308309DE5C0
S1132F40042083E208208DE5003093E5002097E516
S1132F500020C31500208305F50000EA08309DE534
S1132F60042083E208208DE500A093E50A00A0E197
S1132F70B2FEFFEB0040A0E1010C16E30030A00319
S1132F800130A013000058E10030A0A3013003B2C7
S1132F90000053E30840A011099064E00600A0E19A
S1132FA00910A0E10720A0E1210300EB000054E395
S1132FB0D9FFFF0A0700A0E10110DAE4F20200EBF6
S1132FC0014054E2FAFFFF1AD3FFFFEA08309DE5FF
S1132FD0042083E208208DE5003093E580A006E21A
S1132FE000005AE323A0A01300A0A003016C86E311
S1132FF00880A0E33E0000EA026A86E3800016E34C
S113300000A0A0030300000A70339FE570A39FE5AE
S1133010780050E303A0A001010C16E3026CC61370
S11330200F0000EA80A006E200005AE330A0A013DB
S113303000A0A003010C16E3026CC613080000EA0A
S1133040010C16E3026CC61300A0A0130400001ABE
S1133050020000EA016986E300A0A0E3000000EAA0
S113306000A0A0E3010916E31400000A08309DE55E
S1133070042083E208208DE5003093E5040016E384
S11330800338A0114338A0110100001A080016E308
S1133090FF300312000053E3003063B22DA0A0B34D
S11330A0100000BA200016E32BA0A0130D00001A94
S11330B0402006E2000052E320A0A013090000EA29
S11330C008309DE5042083E208208DE5003093E577
S11330D0040016E30338A0112338A0110100001ADC
S11330E0080016E3FF300312010C16E30200000A85
S11330F0026CC6E3010C16E30000001A0180A0E391
S1133100580040E2200050E300F19F97590000EA84
S1133110B4310000783200007832000078320000C8
S113312078320000783200007832000078320000F3
S113313078320000783200007832000078320000E3
S1133140A4310000783200007832000078320000A8
S113315078320000A4310000783200007832000098
S11331607832000078320000783200009431000098
S1133170B431000078320000783200007832000068
S113318078320000A4310000783200007832000068
S1133190B4310000000053E30040A0031500001AFE
S11331A0350000EA000053E30040A0031A00001AAF
S11331B0310000EA000053E30040A0032E00000A9F
S11331C00040A0E3022A06E2000052E30F1003E2EB
S11331D0B0C19F150100DC17ACE19F050100DE07BB
S11331E00C108DE20100C4E7014084E22332B0E117
S11331F0F4FFFF1A200000EA0040A0E3071003E2F6
S1133200301081E20C208DE20210C4E7014084E218
S1133210A331B0E1F8FFFF1A170000EA0040A0E371
S1133220020906E22CC0A0E3000050E30500000AF6
S1133230032004E2030052E318108D0204208100ED
S11332400CC042050140840218208DE2041082E083
S11332509BE382E0A221A0E102E182E08E3043E020
S1133260303083E20C3041E5014084E2003052E228
S1133270ECFFFF1A000000EA0040A0E3088064E0CD
S1133280C88FC8E1099068E0099064E0FF005AE340
S11332900190498200005AE301904912020C16E39E
S11332A00400001A0600A0E10910A0E10720A0E133
S11332B05F0200EB0090A0E3FF005AE32A14A08110
S11332C00700A081FF1001822F02008B00005AE347
S11332D0FF100A120700A0112B02001B0600A0E138
S11332E00910A0E10720A0E1510200EB3000A0E3A7
S11332F00810A0E10720A0E13E0200EB010054E326
S11333000600004A0C808DE2044088E00700A0E13A
S1133310011074E51C0200EB080054E1FAFFFF1AE7
S1133320100016E32000A0130910A0110720A0111B
S11333303002001B0010D5E5000051E3EDFDFF1A3B
S1133340083097E5000053E30400000A002097E5E5
S1133350041097E5010052E10010A0330210C337B6
S1133360000097E5000000EA0000E0E318D08DE2D9
S1133370F04FBDE81EFF2FE1CDCCCCCC9420004013
S11333807830000058300000CC3F0000BC3F000003
S113339010402DE90040A0E10030D1E5000053E3E6
S11333A00400000A010070E3043091150130431257
S11333B004308115020000EA08C091E50FE0A0E1A5
S11333C01CFF2FE10400A0E11040BDE81EFF2FE127
S11333D0F04F2DE90090A0E101B0A0E10280A0E14E
S11333E003A0A0E124609DE50050E0E3000000EAB2
S11333F00450A0E1014085E20900A0E1CF0100EB07
S11334000070A0E1380200EB000050E3F7FFFF1A60
S11334100730A0E1010077E30040E0035900000A0F
S1133420068CC8E3000056E32B0000DA800018E3A2
S11334300900000A2B0057E30200000A2D0057E39D
S11334400500001A018B88E3024085E20900A0E12F
S1133450BA0100EB0070A0E1016046E2000056E30F
S11334600030A0D30130A0C3300057E30030A013D4
S1133470000053E31800000A028C88E3016046E26E
S1133480015084E20900A0E1AC0100EB0070A0E16E
S1133490000056E30D0000DA580050E378005013A2
S11334A00A00001A10005AE300005A130700001A19
S11334B0028CC8E3016046E2025084E20900A0E104
S11334C09E0100EB0070A0E110A0A0E3300000EA30
S11334D000005AE308A0A0032D0000EA00005AE30C
S11334E00AA0A003000056E30050A0D30A0000CABB
S11334F00F0000EA028C88E3016046E29A0525E0A9
S1133500014084E20900A0E18C0100EB0070A0E11D
S1133510000056E30100001A050000EA0050A0E391
S11335200700A0E10A10A0E1DA0100EB000050E37B
S1133530EFFFFFAA0700A0E10910A0E193FFFFEB52
S1133540020C18E30140E0030E00000A010018E336
S11335500C00001A00309BE5042083E200208BE578
S1133560003093E5122D08E2120D52E3005065027B
S1133570100018E30050C3150200001A080018E3F5
S1133580B050C311005083050400A0E1F04FBDE822
S11335901EFF2FE10540A0E1D1FFFFEAF04F2DE926
S11335A014D04DE204008DE501A0A0E110208DE5CA
S11335B00090A0E308908DE57CB59FE50A60A0E14A
S11335C00140D6E4000054E35701000A250054E307
S11335D02900000A0400A0E1C30100EB000050E34D
S11335E00100001A120000EA0460A0E1014086E232
S11335F00000D6E5BC0100EB000050E3F9FFFF1A20
S1133600000000EA019089E204009DE54B0100EB13
S11336100040A0E1B40100EB000050E3F8FFFF1A02
S11336200400A0E104109DE558FFFFEB06A0A0E113
S1133630E1FFFFEA04009DE5400100EB0050A0E13A
S1133640040050E10190890206A0A001DAFFFF0AFC
S113365004109DE54DFFFFEB08209DE5000052E3BB
S1133660010075030050A0130150A003000055E3AE
S11336700020E01308208DE52B0100EA0130DAE593
S11336802A0053E302608A020180A0030080A01391
S11336900640A0E10050A0E3060000EA0B0055E15B
S11336A0210100CA055185E0306046E2855096E06C
S11336B01D01004A208088E30470A0E1014084E2F7
S11336C00060D7E504A0A0E10600A0E16C0100EBD6
S11336D0000050E3F0FFFF1A0810A0E1202008E2E8
S11336E0000052E30251E0034C0056E30160D705A9
S11336F002A08702448088030800000A680056E399
S11337000600001A0160D7E5680056E310808803BC
S11337100260D70503A0870202A0871208808113E4
S1133720256046E2530056E306F19F97FE0000EA47
S1133730803800002C3B00002C3B00002C3B000098
S11337402C3B00002C3B00002C3B00002C3B0000D9
S11337502C3B00002C3B00002C3B00002C3B0000C9
S11337602C3B00002C3B00002C3B00002C3B0000B9
S11337702C3B00002C3B00002C3B00002C3B0000A9
S11337802C3B00002C3B00002C3B00002C3B000099
S11337902C3B00002C3B00002C3B00002C3B000089
S11337A02C3B00002C3B00002C3B00002C3B000079
S11337B02C3B00002C3B00002C3B00002C3B000069
S11337C02C3B00002C3B00002C3B00002C3B000059
S11337D02C3B00002C3B00002C3B00002C3B000049
S11337E02C3B00002C3B00002C3B00002C3B000039
S11337F02C3B00002C3B00002C3B0000CC3A00008A
S11338002C3B00002C3B00002C3B00002C3B000018
S11338102C3B00002C3B00002C3B00002C3B000008
S11338202C3B00002C3B0000C43800004039000051
S11338302C3B00002C3B00002C3B00002C3B0000E8
S1133840603900002C3B00002C3B00002C3B0000A6
S11338502C3B000080390000B4390000D43900004A
S11338602C3B00002C3B0000F43900002C3B0000F2
S1133870AC3A00002C3B00002C3B0000CC3A00008A
S113388004009DE5AD0000EB0040A0E1250050E3FD
S11338900190890248FFFF0A04109DE5BBFEFFEB7F
S11338A008309DE5010074E3000053030040A003C9
S11338B00140A013000054E30030E00308308DE51C
S11338C0990000EA203008E2000053E30150A0030D
S11338D0018018E210309D050420830210208D051C
S11338E0004093050040A013000055E38E00000A39
S11338F00D0000DA04009DE5900000EB010070E388
S11339000400001A08209DE5000052E30020E003B3
S113391008208DE5840000EA000058E30100C40497
S1133920019089E2015055E2F1FFFF1A000058E3CB
S113393008309D050130830208308D051EFFFFEA23
S113394000508DE504009DE510108DE2802088E391
S11339500A30A0E39DFEFFEB0040A0E1610000EA15
S113396000508DE504009DE510108DE2802088E371
S11339700030A0E395FEFFEB0040A0E1590000EA0F
S1133980010018E30CFFFF1A10309DE5042083E2C8
S113399010208DE5003093E5100018E30090C31566
S11339A005FFFF1A080018E3B090C31100908305C7
S11339B001FFFFEA00508DE504009DE510108DE243
S11339C0802088E30830A0E380FEFFEB0040A0E104
S11339D0440000EA00508DE504009DE510108DE2DE
S11339E01E20C8E31030A0E378FEFFEB0040A0E106
S11339F03C0000EA0040E0E3014084E204009DE56D
S1133A004E0000EB0060A0E1B70000EB000050E3C3
S1133A10F8FFFF1A010076E30040E0033100000ADA
S1133A20017018E210309D050420830210208D05DA
S1133A30003093050C308D050020A0130C208D154B
S1133A40000055E30C0000CA0F0000EA015045E2F3
S1133A50000057E30C309D050160C3040C308D0554
S1133A60014084E204009DE5340000EB0060A0E125
S1133A70010070E300005513030000DA0600A0E122
S1133A80990000EB000050E3EFFFFF0A0600A0E1FD
S1133A9004109DE53DFEFFEB000057E30020A0036A
S1133AA00C309D050020C3050E0000EA00508DE592
S1133AB004009DE510108DE2802088E30A30A0E325
S1133AC042FEFFEB0040A0E1060000EA00508DE555
S1133AD004009DE510108DE2802088E31030A0E3FF
S1133AE03AFEFFEB0040A0E1000054E3080000AA06
S1133AF008209DE5010074E3000052030040A00388
S1133B000140A013000054E30020E00308208DE5E9
S1133B10050000EA010018E308309D050130830226
S1133B2008308D05049089E0A3FEFFEA08009DE5B6
S1133B3014D08DE2F04FBDE81EFF2FE1CCCCCC0CAD
S1133B4004E02DE50030A0E10020D0E5000052E3C0
S1133B500600000A042090E50000D2E5000050E3CE
S1133B6001208212042083150500001A030000EAD4
S1133B7004C090E50FE0A0E11CFF2FE1000000EA83
S1133B800000E0E304E09DE41EFF2FE110402DE976
S1133B900040A0E1FF0001E2081094E5000051E3B9
S1133BA00600000A003094E5042094E501C083E295
S1133BB002005CE10000A003020053E10300C137EE
S1133BC00C3094E5000053E30500000A001094E56E
S1133BD0042094E5020051E10410A0310FE0A0316B
S1133BE013FF2F31003094E5013083E2003084E587
S1133BF01040BDE81EFF2FE1F0402DE90250A0E186
S1133C00010051E30800004A0160A0E10040A0E384
S1133C10FF7000E20500A0E10710A0E1DAFFFFEB6E
S1133C20014084E2060054E1F9FFFF1AF040BDE8C8
S1133C301EFF2FE104E02DE5100010E30400001A3C
S1133C40020C00E2000050E32000A0033000A013A7
S1133C50E8FFFFEB04E09DE41EFF2FE1410040E29A
S1133C60190050E30000A0830100A0931EFF2FE180
S1133C70610040E2190050E30000A0830100A0931A
S1133C801EFF2FE1300040E2090050E30000A08352
S1133C900100A0931EFF2FE130402DE90040A0E178
S1133CA00150A0E1F6FFFFEB000050E330004412A6
S1133CB00900001A0400A0E1ECFFFFEB000050E350
S1133CC0570044120400001A0400A0E1E2FFFFEBD5
S1133CD0000050E3370044120000E003050050E107
S1133CE00000E0A33040BDE81EFF2FE1093040E2B0
S1133CF0200050E3040053130000A0830100A093AC
S1133D001EFF2FE130402DE904D04DE20050A0E128
S1133D1004408DE2041024E5090000EB0500A0E155
S1133D20120000EB0D00A0E1100000EB170000EB07
S1133D30040000EB00009DE504D08DE23040BDE8B6
S1133D401EFF2FE11EFF2FE11EFF2FE100000000E8
S1133D50100E10EE010010E3FCFFFF0A100E11EE2E
S1133D601EFF2FE10000A0E10000A0E10000A0E19F
S1133D7002002DE9101E10EE020011E3FCFFFF1AF1
S1133D80100E01EE0200BDE81EFF2FE10000A0E1CD
S1133D90F0472DE90480A0E30870A0E10090A0E3BF
S1133DA0EAFFFFEB2042A0E10F0000E20A0050E32B
S1133DB000F19F97F9FFFFEAE43D0000383E000060
S1133DC0F43E0000203F0000303F0000803F000030
S1133DD0903E0000A03D0000A03D00003C3F0000DC
S1133DE0B03F0000D9FFFFEB000054E36600001A67
S1133DF00D0000EAD5FFFFEB0730A0E10100C5E4A8
S1133E00014054E20020A0030120A013013053E23A
S1133E100010A00301100212000051E32004A011BD
S1133E20F5FFFF1A000052E3F1FFFF1A0100A0E3BF
S1133E30CEFFFFEBD9FFFFEAC4FFFFEB000054E322
S1133E400060A0110950A0110B00001A0C0000EA38
S1133E502554A0E1000054E30120D614025C85112E
S1133E6001404412013053E2F8FFFF1A0500A0E1BB
S1133E70BEFFFFEB000054E30100000A0730A0E19D
S1133E80F2FFFFEA0100A0E3B8FFFFEBC3FFFFEA84
S1133E90AEFFFFEB000054E30150A0033E00001A04
S1133EA0100000EAA9FFFFEB0730A0E10110D6E4FF
S1133EB0FF2000E2020051E10050A013014054E24F
S1133EC00020A0030120A013013053E20010A0033E
S1133ED001100212000051E32004A011F2FFFF1AA6
S1133EE0000052E3EEFFFF1A0500A0E19FFFFFEB85
S1133EF0AAFFFFEA95FFFFEB0050A0E193FFFFEB61
S1133F00000054E30200000A0100C5E4014054E249
S1133F10FCFFFF1A0100A0E394FFFFEB9FFFFFEA01
S1133F208AFFFFEB0100A0E390FFFFEB9BFFFFEA9A
S1133F300100A0E38DFFFFEB98FFFFEA83FFFFEB97
S1133F400040A0E181FFFFEB0050A0E17FFFFFEB09
S1133F500060A0E17DFFFFEB00A0A0E17BFFFFEB91
S1133F600030A0E10500A0E10610A0E10A20A0E1D4
S1133F700FE0A0E114FF2FE17CFFFFEB87FFFFEAD6
S1133F800100A0E379FFFFEB080000EA0050A0E184
S1133F906EFFFFEB0830A0E197FFFFEA0060A0E1AD
S1133FA06AFFFFEB0150A0E30830A0E1BEFFFFEA87
S10B3FB0F047BDE81EFF2FE1FC
S1133FB80102040830313233343536373839616216
S1133FC863646566303132333435363738394142C3
S1073FD843444546CF
S1132F500020C31500208305FA0000EA08309DE52F
S1132F60042083E208208DE5004093E520149FE5CA
S1132F70000054E30140A001026CC6E30400A0E198
S1132F80AEFEFFEB00A0A0E1010C16E30030A003AD
S1132F900130A013000058E10030A0A3013003B2B7
S1132FA0000053E308A0A01109906AE00600A0E124
S1132FB00910A0E10720A0E1230300EB00005AE37D
S1132FC0D5FFFF0A0A80A0E10700A0E10110D4E4C4
S1132FD0F30200EB018058E2FAFFFF1ACEFFFFEA8A
S1132FE008309DE5042083E208208DE5003093E558
S1132FF080A006E200005AE323A0A01300A0A003CF
S1133000016C86E30880A0E33E0000EA026A86E3DE
S1133010800016E300A0A0030300000A74339FE5B8
S113302074A39FE5780050E303A0A001010C16E30C
S1133030026CC6130F0000EA80A006E200005AE307
S113304030A0A01300A0A003010C16E3026CC61369
S1133050080000EA010C16E3026CC61300A0A013DA
S11330600400001A020000EA016986E300A0A0E35C
S1133070000000EA00A0A0E3010916E31400000A1E
S113308008309DE5042083E208208DE5003093E5B7
S1133090040016E30338A0114338A0110100001AFC
S11330A0080016E3FF300312000053E3003063B25C
S11330B02DA0A0B3100000BA200016E32BA0A0138B
S11330C00D00001A402006E2000052E320A0A013E5
S11330D0090000EA08309DE5042083E208208DE51C
S11330E0003093E5040016E30338A0112338A0113F
S11330F00100001A080016E3FF300312010C16E366
S11331000200000A026CC6E3010C16E30000001A78
S11331100180A0E3580040E2200050E300F19F97B3
S1133120590000EAC83100008C3200008C320000E3
S11331308C3200008C3200008C3200008C32000093
S11331408C3200008C3200008C3200008C32000083
S11331508C320000B83100008C3200008C32000048
S11331608C3200008C320000B83100008C32000038
S11331708C3200008C3200008C3200008C32000053
S1133180A8310000C83100008C3200008C320000ED
S11331908C3200008C320000B83100008C32000008
S11331A08C320000C8310000000053E30040A0034B
S11331B01500001A350000EA000053E30040A003A4
S11331C01A00001A310000EA000053E30040A00393
S11331D02E00000A0040A0E3022A06E2000052E3A7
S11331E00F1003E2B4C19F150100DC17B0E19F0585
S11331F00100DE070C108DE20100C4E7014084E207
S11332002332B0E1F4FFFF1A200000EA0040A0E3FB
S1133210071003E2301081E20C208DE20210C4E7B3
S1133220014084E2A331B0E1F8FFFF1A170000EA7D
S11332300040A0E3020906E22CC0A0E3000050E332
S11332400500000A032004E2030052E318108D0273
S1133250042081000CC042050140840218208DE244
S1133260041082E09BE382E0A221A0E102E182E07B
S11332708E3043E0303083E20C3041E5014084E29B
S1133280003052E2ECFFFF1A000000EA0040A0E325
S1133290088064E0C88FC8E1099068E0099064E0A0
S11332A0FF005AE30190498200005AE30190491259
S11332B0020C16E30400001A0600A0E10910A0E1C4
S11332C00720A0E1600200EB0090A0E3FF005AE3B6
S11332D02A14A0810700A081FF1001823002008B14
S11332E000005AE3FF100A120700A0112C02001B71
S11332F00600A0E10910A0E10720A0E1520200EBC2
S11333003000A0E30810A0E10720A0E13F0200EB99
S1133310010054E30600004A0C808DE2044088E07A
S11333200700A0E1011074E51D0200EB080054E160
S1133330FAFFFF1A100016E32000A0130910A011D1
S11333400720A0113102001B0010D5E5000051E355
S1133350E8FDFF1A083097E5000053E30400000A73
S1133360002097E5041097E5010052E10010A03316
S11333700210C337000097E5000000EA0000E0E314
S113338018D08DE2F04FBDE81EFF2FE1CDCCCCCCA0
S113339094200040DC3F00007830000058300000EA
S11333A0F43F0000E43F000010402DE90040A0E19C
S11333B00030D1E5000053E30400000A010070E38B
S11333C0043091150130431204308115020000EAE3
S11333D008C091E50FE0A0E11CFF2FE10400A0E18B
S11333E01040BDE81EFF2FE1F04F2DE90090A0E151
S11333F001B0A0E10280A0E103A0A0E124609DE56A
S11334000050E0E3000000EA0450A0E1014085E23E
S11334100900A0E1CF0100EB0070A0E1380200EB4D
S1133420000050E3F7FFFF1A0730A0E1010077E343
S11334300040E0035900000A068CC8E3000056E38C
S11334402B0000DA800018E30900000A2B0057E380
S11334500200000A2D0057E30500001A018B88E3DF
S1133460024085E20900A0E1BA0100EB0070A0E18E
S1133470016046E2000056E30030A0D30130A0C34F
S1133480300057E30030A013000053E31800000A93
S1133490028C88E3016046E2015084E20900A0E165
S11334A0AC0100EB0070A0E1000056E30D0000DA6F
S11334B0580050E3780050130A00001A10005AE331
S11334C000005A130700001A028CC8E3016046E2A8
S11334D0025084E20900A0E19E0100EB0070A0E12B
S11334E010A0A0E3300000EA00005AE308A0A00303
S11334F02D0000EA00005AE30AA0A003000056E3EE
S11335000050A0D30A0000CA0F0000EA028C88E32E
S1133510016046E29A0525E0014084E20900A0E149
S11335208C0100EB0070A0E1000056E30100001ADA
S1133530050000EA0050A0E30700A0E10A10A0E1A2
S1133540DA0100EB000050E3EFFFFFAA0700A0E15F
S11335500910A0E193FFFFEB020C18E30140E00324
S11335600E00000A010018E30C00001A00309BE56D
S1133570042083E200208BE5003093E5122D08E25D
S1133580120D52E300506502100018E30050C315F9
S11335900200001A080018E3B050C311005083055C
S11335A00400A0E1F04FBDE81EFF2FE10540A0E1BB
S11335B0D1FFFFEAF04F2DE914D04DE204008DE570
S11335C001A0A0E110208DE50090A0E308908DE516
S11335D07CB59FE50A60A0E10140D6E4000054E315
S11335E05701000A250054E32900000A0400A0E161
S11335F0C30100EB000050E30100001A120000EACE
S11336000460A0E1014086E20000D6E5BC0100EBC5
S1133610000050E3F9FFFF1A000000EA019089E27C
S113362004009DE54B0100EB0040A0E1B40100EB78
S1133630000050E3F8FFFF1A0400A0E104109DE528
S113364058FFFFEB06A0A0E1E1FFFFEA04009DE5BF
S1133650400100EB0050A0E1040050E10190890218
S113366006A0A001DAFFFF0A04109DE54DFFFFEB61
S113367008209DE5000052E3010075030050A013EB
S11336800150A003000055E30020E01308208DE55D
S11336902B0100EA0130DAE52A0053E302608A02D2
S11336A00180A0030080A0130640A0E10050A0E325
S11336B0060000EA0B0055E1210100CA055185E02E
S11336C0306046E2855096E01D01004A208088E380
S11336D00470A0E1014084E20060D7E504A0A0E109
S11336E00600A0E16C0100EB000050E3F0FFFF1ABC
S11336F00810A0E1202008E2000052E30251E00398
S11337004C0056E30160D70502A087024480880379
S11337100800000A680056E30600001A0160D7E5B5
S1133720680056E3108088030260D70503A087026F
S113373002A0871208808113256046E2530056E3F5
S113374006F19F97FE0000EA98380000443B000011
S1133750443B0000443B0000443B0000443B000069
S1133760443B0000443B0000443B0000443B000059
S1133770443B0000443B0000443B0000443B000049
S1133780443B0000443B0000443B0000443B000039
S1133790443B0000443B0000443B0000443B000029
S11337A0443B0000443B0000443B0000443B000019
S11337B0443B0000443B0000443B0000443B000009
S11337C0443B0000443B0000443B0000443B0000F9
S11337D0443B0000443B0000443B0000443B0000E9
S11337E0443B0000443B0000443B0000443B0000D9
S11337F0443B0000443B0000443B0000443B0000C9
S1133800443B0000443B0000443B0000443B0000B8
S1133810443B0000E43A0000443B0000443B000009
S1133820443B0000443B0000443B0000443B000098
S1133830443B0000443B0000443B0000443B000088
S1133840DC38000058390000443B0000443B0000D1
S1133850443B0000443B000078390000443B000036
S1133860443B0000443B0000443B00009839000006
S1133870CC390000EC390000443B0000443B00001C
S11338800C3A0000443B0000C43A0000443B0000F2
S1133890443B0000E43A000004009DE5AD0000EB69
S11338A00040A0E1250050E30190890248FFFF0A8F
S11338B004109DE5BBFEFFEB08309DE5010074E3B9
S11338C0000053030040A0030140A013000054E390
S11338D00030E00308308DE5990000EA203008E26A
S11338E0000053E30150A003018018E210309D054D
S11338F00420830210208D05004093050040A0138E
S1133900000055E38E00000A0D0000DA04009DE576
S1133910900000EB010070E30400001A08209DE50C
S1133920000052E30020E00308208DE5840000EA53
S1133930000058E30100C404019089E2015055E2FB
S1133940F1FFFF1A000058E308309D05013083029F
S113395008308D051EFFFFEA00508DE504009DE54B
S113396010108DE2802088E30A30A0E39DFEFFEB77
S11339700040A0E1610000EA00508DE504009DE5EF
S113398010108DE2802088E30030A0E395FEFFEB69
S11339900040A0E1590000EA010018E30CFFFF1AFF
S11339A010309DE5042083E210208DE5003093E57E
S11339B0100018E30090C31505FFFF1A080018E370
S11339C0B090C3110090830501FFFFEA00508DE51C
S11339D004009DE510108DE2802088E30830A0E308
S11339E080FEFFEB0040A0E1440000EA00508DE5BA
S11339F004009DE510108DE21E20C8E31030A0E302
S1133A0078FEFFEB0040A0E13C0000EA0040E0E368
S1133A10014084E204009DE54E0000EB0060A0E15B
S1133A20B70000EB000050E3F8FFFF1A010076E353
S1133A300040E0033100000A017018E210309D05D7
S1133A400420830210208D05003093050C308D0571
S1133A500020A0130C208D15000055E30C0000CAB3
S1133A600F0000EA015045E2000057E30C309D05C9
S1133A700160C3040C308D05014084E204009DE51F
S1133A80340000EB0060A0E1010070E30000551376
S1133A90030000DA0600A0E1990000EB000050E307
S1133AA0EFFFFF0A0600A0E104109DE53DFEFFEBD9
S1133AB0000057E30020A0030C309D050020C3053F
S1133AC00E0000EA00508DE504009DE510108DE223
S1133AD0802088E30A30A0E342FEFFEB0040A0E12F
S1133AE0060000EA00508DE504009DE510108DE20B
S1133AF0802088E31030A0E33AFEFFEB0040A0E111
S1133B00000054E3080000AA08209DE5010074E3C6
S1133B10000052030040A0030140A013000054E33E
S1133B200020E00308208DE5050000EA010018E309
S1133B3008309D050130830208308D05049089E02A
S1133B40A3FEFFEA08009DE514D08DE2F04FBDE826
S1133B501EFF2FE1CCCCCC0C04E02DE50030A0E11D
S1133B600020D0E5000052E30600000A042090E59E
S1133B700000D2E5000050E30120821204208315E6
S1133B800500001A030000EA04C090E50FE0A0E17C
S1133B901CFF2FE1000000EA0000E0E304E09DE4E4
S1133BA01EFF2FE110402DE90040A0E1FF0001E2DB
S1133BB0081094E5000051E30600000A003094E583
S1133BC0042094E501C083E202005CE10000A0034C
S1133BD0020053E10300C1370C3094E5000053E3C5
S1133BE00500000A001094E5042094E5020051E168
S1133BF00410A0310FE0A03113FF2F31003094E501
S1133C00013083E2003084E51040BDE81EFF2FE15F
S1133C10F0402DE90250A0E1010051E30800004A00
S1133C200160A0E10040A0E3FF7000E20500A0E114
S1133C300710A0E1DAFFFFEB014084E2060054E143
S1133C40F9FFFF1AF040BDE81EFF2FE104E02DE567
S1133C50100010E30400001A020C00E2000050E31C
S1133C602000A0033000A013E8FFFFEB04E09DE474
S1133C701EFF2FE1410040E2190050E30000A08341
S1133C800100A0931EFF2FE1610040E2190050E300
S1133C900000A0830100A0931EFF2FE1300040E24A
S1133CA0090050E30000A0830100A0931EFF2FE150
S1133CB030402DE90040A0E10150A0E1F6FFFFEB08
S1133CC0000050E3300044120900001A0400A0E18F
S1133CD0ECFFFFEB000050E3570044120400001A0D
S1133CE00400A0E1E2FFFFEB000050E337004412C0
S1133CF00000E003050050E10000E0A33040BDE80F
S1133D001EFF2FE1093040E2200050E3040053136A
S1133D100000A0830100A0931EFF2FE130402DE995
S1133D2004D04DE20050A0E104408DE2041024E5EB
S1133D30090000EB0500A0E1140000EB0D00A0E178
S1133D40120000EB190000EB040000EB00009DE5FD
S1133D5004D08DE23040BDE81EFF2FE11EFF2FE1AD
S1133D601EFF2FE100000000000000000000000022
S1133D70100E10EE010010E3FCFFFF0A100E11EE0E
S1133D801EFF2FE10000A0E10000A0E10000A0E17F
S1133D9002002DE9101E10EE020011E3FCFFFF1AD1
S1133DA0100E01EE0200BDE81EFF2FE10000A0E1AD
S1133DB0F0472DE90480A0E30870A0E10090A0E39F
S1133DC0EAFFFFEB2042A0E10F0000E20A0050E30B
S1133DD000F19F97F9FFFFEA043E0000583E0000FF
S1133DE0143F0000403F0000503F0000A03F00008F
S1133DF0B03E0000C03D0000C03D00005C3F00003C
S1133E00D03F0000D9FFFFEB000054E36600001A26
S1133E100D0000EAD5FFFFEB0730A0E10100C5E487
S1133E20014054E20020A0030120A013013053E21A
S1133E300010A00301100212000051E32004A0119D
S1133E40F5FFFF1A000052E3F1FFFF1A0100A0E39F
S1133E50CEFFFFEBD9FFFFEAC4FFFFEB000054E302
S1133E600060A0110950A0110B00001A0C0000EA18
S1133E702554A0E1000054E30120D614025C85110E
S1133E8001404412013053E2F8FFFF1A0500A0E19B
S1133E90BEFFFFEB000054E30100000A0730A0E17D
S1133EA0F2FFFFEA0100A0E3B8FFFFEBC3FFFFEA64
S1133EB0AEFFFFEB000054E30150A0033E00001AE4
S1133EC0100000EAA9FFFFEB0730A0E10110D6E4DF
S1133ED0FF2000E2020051E10050A013014054E22F
S1133EE00020A0030120A013013053E20010A0031E
S1133EF001100212000051E32004A011F2FFFF1A86
S1133F00000052E3EEFFFF1A0500A0E19FFFFFEB64
S1133F10AAFFFFEA95FFFFEB0050A0E193FFFFEB40
S1133F20000054E30200000A0100C5E4014054E229
S1133F30FCFFFF1A0100A0E394FFFFEB9FFFFFEAE1
S1133F408AFFFFEB0100A0E390FFFFEB9BFFFFEA7A
S1133F500100A0E38DFFFFEB98FFFFEA83FFFFEB77
S1133F600040A0E181FFFFEB0050A0E17FFFFFEBE9
S1133F700060A0E17DFFFFEB00A0A0E17BFFFFEB71
S1133F800030A0E10500A0E10610A0E10A20A0E1B4
S1133F900FE0A0E114FF2FE17CFFFFEB87FFFFEAB6
S1133FA00100A0E379FFFFEB080000EA0050A0E164
S1133FB06EFFFFEB0830A0E197FFFFEA0060A0E18D
S1133FC06AFFFFEB0150A0E30830A0E1BEFFFFEA67
S10B3FD0F047BDE81EFF2FE1DC
S1133FD801020408286E756C6C29000030313233F4
S1133FE83435363738396162636465663031323363
S10F3FF8343536373839414243444546DD
S90320607C

26
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Prog/ide/lpc2294_crossworks.hzs
View File

@ -2,23 +2,18 @@
<session>
<Bookmarks/>
<Breakpoints/>
<ETMWindow>
<ETMRegister number="0" value="800" />
<ETMRegister number="8" value="6f" />
<ETMRegister number="9" value="1000000" />
</ETMWindow>
<ExecutionCountWindow/>
<ExecutionProfileWindow/>
<Memory1>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory1>
<Memory2>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory2>
<Memory3>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory3>
<Memory4>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory4>
<Project>
<ProjectSessionItem path="lpc2294_crossworks" name="unnamed" />
@ -28,16 +23,16 @@
<ProjectSessionItem path="lpc2294_crossworks;demoprog_olimex_lpc_l2294_20mhz;Source Files;Demo;Prog" name="unnamed" />
</Project>
<Register1>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register1>
<Register2>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register2>
<Register3>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register3>
<Register4>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register4>
<TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
<TraceWindow>
@ -56,8 +51,7 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" y="50" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="50" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\boot.c" y="0" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\boot.c" left="0" selected="0" name="unnamed" top="0" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" y="36" path="C:\Work\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="18" />
</Files>
<ARMCrossStudioWindow activeProject="demoprog_olimex_lpc_l2294_20mhz" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388479" debugSearchPath="" buildConfiguration="ARM Flash Debug" />
</session>

2
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_Crossworks/Prog/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
Rowleys CrossWorks was used as the editor during the development of this software program. This directory contains
Rowleys CrossWorks (version 2.3.1) was used as the editor during the development of this software program. This directory contains
the CrossWorks project and solution files. More info is available at: http://www.rowley.co.uk/

BIN
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Boot/bin/openbtl_olimex_lpc_l2294_20mhz.elf
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Binary file not shown.

605
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Boot/bin/openbtl_olimex_lpc_l2294_20mhz.hex
View File

@ -1,7 +1,7 @@
:1000000018F09FE518F09FE518F09FE518F09FE5C0
:1000100018F09FE50000A0E118F09FE510F09FE5C3
:10002000500000009C120000A00000009C12000084
:100030009C1200006412000080120000000000000A
:1000200050000000B8120000A0000000B81200004C
:10003000B8120000801200009C12000000000000B6
:10004000E4009FE50110A0E3001080E5000000EF50
:10005000D8009FE5DBF021E300D0A0E1040040E2FE
:10006000D7F021E300D0A0E1040040E2D1F021E389
@ -12,308 +12,309 @@
:1000B000D7F021E300D0A0E1040040E2D1F021E339
:1000C00000D0A0E1040040E2D2F021E300D0A0E1A2
:1000D000040040E2D3F021E300D0A0E1040040E2BC
:1000E000DFF021E300D0A0E1010000EB810000EB94
:1000E000DFF021E300D0A0E1010000EB6B0000EBAA
:1000F000140000EA38109FE538209FE538309FE56E
:10010000030052E10400913404008234FBFFFF3A03
:100110000000A0E324109FE524209FE5020051E1A8
:1001200004008134FCFFFF3A1EFF2FE140C01FE0B6
:10013000DC1E0040D8130000000200400002004016
:1001400000020040F406004010402DE9D8309FE541
:100150000040A0E3D4109FE5D4209FE50100F3E523
:10016000910000E0260A40E2160E40E2020050E153
:100170000600009A014084E2FF4004E2040054E3D8
:10018000F5FFFF1AAC009FE57010A0E3DB0100EB68
:100190008422A0E1022082E3FF2002E298309FE562
:1001A0008420C3E55510E0E38C10C3E55520A0E39F
:1001B0008C20C3E50100A0E38000C3E58C10C3E5FB
:1001C0008C20C3E5B828D3E1010B12E3FCFFFF0A42
:1001D00064309FE50320A0E38020C3E55520E0E3E1
:1001E0008C20C3E5AB2082E28C20C3E50020A0E395
:1001F0000020C3E5042082E20420C3E50220A0E33E
:100200000020C3E50120A0E3013C83E20020C3E518
:1002100028309FE5002093E5052082E3002083E558
:10022000070000EB0D0000EBFDFFFFEAB31200003A
:10023000C0D40100A08002008013000000C01FE0B5
:1002400000C002E008402DE9AA0100EBA00100EB8C
:10025000500200EB070000EB0840BDE81EFF2FE155
:1002600008402DE9A40100EB130000EB850100EB31
:100270000840BDE81EFF2FE104E02DE50CD04DE263
:100280000030E0E30430CDE50030A0E30530CDE5FB
:10029000320000EBE20100EB18309FE50030D3E5BF
:1002A000010053E304008D024100000B0CD08DE2ED
:1002B00004E09DE41EFF2FE10002004008402DE90C
:1002C00014009FE5070200EB010050E308009F05C2
:1002D0003700000B0840BDE81EFF2FE1040200407C
:1002E00008402DE9FF1001E2DD0100EB2B0000EBDF
:1002F0000840BDE81EFF2FE10120A0E304309FE588
:100300000020C3E51EFF2FE10002004004309FE5FE
:100310000000D3E51EFF2FE10002004008402DE958
:10032000180000EB0840BDE81EFF2FE10020A0E30D
:1003300004309FE50120C3E51EFF2FE14402004089
:1003400014309FE50120E0E30320C3E50400C3E58A
:100350000220A0E3B424C3E11EFF2FE144020040C9
:100360001C309FE50020A0E30020C3E5482083E582
:100370004320C3E5B424C3E10220C3E50120C3E563
:100380001EFF2FE1440200400C309FE50000D3E542
:10039000000050E20100A0131EFF2FE144020040C4
:1003A0000020A0E304309FE54320C3E51EFF2FE1BA
:1003B0004402004038402DE90040A0E10030D0E583
:1003C000FF0053E31200001AD7FFFFEBAC349FE5A8
:1003D0000120A0E30020C3E50010E0E30310C3E523
:1003E0001010A0E30410C3E50010A0E30510C3E55E
:1003F0004000A0E30600C3E50700C3E50810C3E51D
:100400000920C3E50A20C3E50820A0E3B424C3E122
:100410000D0100EA64249FE50020D2E5010052E3CB
:100420001401001AC93043E2350053E303F19F97EA
:10043000030100EAD0060000440800004408000060
:100440003808000044080000440800001C080000B0
:100450001C070000E0070000A80700004408000097
:10046000440800004408000044080000440800005C
:10047000440800004408000044080000440800004C
:10048000440800004408000044080000440800003C
:10049000440800004408000044080000440800002C
:1004A000440800004408000044080000440800001C
:1004B000440800004408000044080000440800000C
:1004C00044080000440800004408000044080000FC
:1004D000440800004408000044080000D40500005F
:1004E0005C0500000C050000B40500004408000095
:1004F00044080000440800003406000044080000DE
:100500006C06000078060000AC0600000120D0E573
:100510003F0052E30200009A2200A0E387FFFFEBB6
:10052000C90000EA54539FE5040085E2481095E5B0
:10053000F90000EB0030E0E30330C5E50120D4E52D
:10054000483095E5033082E0483085E50130D4E558
:10055000013083E2B434C5E1BB0000EA0130D0E5EC
:100560003F0053E30200009A2200A0E373FFFFEB79
:10057000B50000EA041090E500539FE5481085E5BA
:10058000040085E20120D4E5E30000EB0030E0E365
:100590000330C5E50120D4E5483095E5033082E01D
:1005A000483085E50130D4E5013083E2B434C5E15B
:1005B000A50000EAC4329FE50020E0E30320C3E584
:1005C000042090E5482083E50120A0E3B424C3E1A2
:1005D0009D0000EAA4C29FE50030E0E30330CCE5D3
:1005E00048109CE5043090E5000053E30020A00390
:1005F0000500000A0020A0E30100D1E4002082E011
:10060000FF2002E2013053E2FAFFFF1A07208CE5D7
:1006100068329FE50120A0E30420C3E50020A0E3A9
:100620000520C3E50620C3E50820A0E3B424C3E108
:10063000850000EA44329FE50020E0E30320C3E5A3
:100640003C229FE5482083E50020A0E30420C3E589
:100650000520C3E50620C3E50720A0E3072083E5C6
:100660000820A0E3B424C3E1770000EA0000A0E37F
:1006700032FFFFEB740000EA00329FE50020E0E368
:100680000320C3E50020A0E30420C3E50110D3E567
:100690000510C3E50620C3E50720C3E50820C3E530
:1006A0000620A0E3B424C3E1670000EACC419FE543
:1006B0000030A0E30030C4E51BFFFFEB0030E0E3B7
:1006C0000330C4E50130A0E3B434C4E15E0000EAC5
:1006D000A8319FE5480093E53F10A0E3012084E2A4
:1006E000300100EB000050E30200001A3100A0E3EB
:1006F00012FFFFEB540000EA80319FE50020E0E3A9
:100700000320C3E5482093E53F2082E2482083E5AB
:100710000120A0E3B424C3E14B0000EA0130D0E59E
:100720003E0053E30200009A2200A0E303FFFFEB28
:10073000450000EA44319FE50020E0E30320C3E5E3
:100740000120A0E3B424C3E10110D0E5000051E38F
:100750000500001A1F0100EB000050E33A00001AE8
:100760003100A0E3F5FEFFEB370000EA0C319FE516
:10077000480093E5022084E20A0100EB000050E308
:100780000200001A3100A0E3ECFEFFEB2E0000EAAD
:10079000E8309FE50110D4E5482093E5022081E090
:1007A000482083E5280000EAD0309FE50020E0E300
:1007B0000320C3E50020A0E30420C3E50520C3E532
:1007C0004010A0E30610C3E50720C3E50820C3E5F9
:1007D0000920C3E50720A0E3B424C3E11A0000EA1E
:1007E00098309FE5480093E5041094E5F10000EB94
:1007F000000050E30200001A3100A0E3CFFEFFEB3F
:10080000110000EA74309FE50020E0E30320C3E517
:100810000120A0E3B424C3E10B0000EA5D0000EB7B
:1008200058309FE50020E0E30320C3E50120A0E36A
:10083000B424C3E1040000EA3100A0E3BFFEFFEBF3
:10084000010000EA2000A0E3BCFEFFEB2C309FE596
:100850004330D3E5010053E31000A003B7FEFF0BC4
:1008600018309FE50120A0E34320C3E5030083E2A5
:10087000B414D3E199FEFFEB3840BDE81EFF2FE131
:1008800044020040B812000008402DE9A2FEFFEB30
:10089000010050E30B00000A30309FE50030D3E543
:1008A000010053E30700001AFA0000EB310050E3A7
:1008B0000400009A0020A0E310309FE50020C3E56B
:1008C000CB0000EB220000EB0840BDE81EFF2FE14B
:1008D0009002004008402DE90120A0E310309FE580
:1008E0000020C3E5D90000EBE6FFFFEB0840BDE8C0
:1008F0001EFF2FE1900200401EFF2FE11EFF2FE19F
:1009000008402DE90C309FE5000083E5041083E5E5
:10091000F9FFFFEBFDFFFFEA9402004070402DE974
:100920000140A0E1005052E20700000A0060A0E18F
:100930000130D4E40130C6E4EFFFFFEB015045E2A3
:100940000558A0E12558B0E1F8FFFF1A7040BDE856
:100950001EFF2FE108402DE99A0000EB000050E354
:100960000900000A0101A0E3021AA0E34020A0E36D
:10097000E9FFFFEB0220A0E314309FE5402083E570
:100980000131A0E30FE0A0E113FF2FE10840BDE833
:100990001EFF2FE100C01FE008402DE9ABFDFFEB7B
:1009A0000840BDE81EFF2FE11C309FE51430D3E561
:1009B000010013E310309F150030D3150030C0152F
:1009C0000100A0130000A0031EFF2FE100C000E003
:1009D00010402DE944309FE51430D3E5200013E3A7
:1009E0000000A0030B00000A30309FE50000C3E5C3
:1009F0001430D3E5200013E30100A0130500001A12
:100A000018409FE5BCFFFFEB1430D4E5200013E352
:100A1000FBFFFF0A0100A0E31040BDE81EFF2FE12D
:100A200000C000E034309FE50020A0E30420C3E5CF
:100A30000820C3E51420C3E57F10E0E30C10C3E5F4
:100A40004110A0E30010C3E50420C3E50320A0E3A8
:100A50000C20C3E50720A0E30820C3E51EFF2FE11B
:100A600000C000E0F0412DE90050A0E10140A0E10C
:100A7000400051E368009F858310A0839FFFFF8B98
:100A80000400A0E1D1FFFFEB010050E350009F15EF
:100A90008610A01399FFFF1B0460A0E1000054E33F
:100AA0000D00000A0040A0E334709FE58E80A0E3B3
:100AB00091FFFFEB0400D5E7C4FFFFEB010050E31B
:100AC0000700A0110810A0118CFFFF1B014084E259
:100AD0000438A0E1230856E1F4FFFF8AF041BDE8A5
:100AE0001EFF2FE18813000070402DE90050A0E1A7
:100AF00098309FE50030D3E5000053E30A00001A68
:100B00008C009FE5A7FFFFEB010050E30000A0135E
:100B10001C00001A74309FE50120A0E30020C3E50B
:100B20000000A0E34500C3E5160000EA5C009FE575
:100B30004540D0E5040080E0050080E299FFFFEB2E
:100B4000010050E30000A0130E00001A014084E2EF
:100B5000FF2004E234309FE54520C3E50430D3E5AF
:100B6000020053E10000A0130600001A1C609FE57C
:100B70000500A0E1051086E267FFFFEB0030A0E36F
:100B80000030C6E50100A0E37040BDE81EFF2FE184
:100B90009C020040A002004008402DE9020100EB49
:100BA0000840BDE81EFF2FE108402DE9040100EBDD
:100BB0000840BDE81EFF2FE108402DE91B0100EBB6
:100BC0000840BDE81EFF2FE108402DE95D0100EB64
:100BD0000840BDE81EFF2FE108402DE96B0100EB46
:100BE000000050E30000A0038601001B0840BDE8A0
:100BF0001EFF2FE114309FE50020A0E3042083E5D1
:100C00000C2083E5082083E5102083E51EFF2FE1FB
:100C1000004000E01C309FE5082093E518309FE578
:100C2000001093E5011082E0040093E5011060E0FC
:100C3000060083E81EFF2FE1004000E0E4020040D0
:100C400004309FE5000083E51EFF2FE1E402004031
:100C500008402DE930309FE50000A0E3140083E553
:100C6000280083E524209FE50C2083E50120A0E3F4
:100C7000042083E5082093E514309FE5042083E5F4
:100C8000EEFFFFEB0840BDE81EFF2FE1004000E053
:100C90005FEA0000E402004008402DE9DCFFFFEBC2
:100CA00008309FE5000093E50840BDE81EFF2FE1F6
:100CB000E4020040F8402DE90060A0E10040A0E31C
:100CC0000450A0E150709FE50BFFFFEB043097E765
:100CD000060053E10900008A041087E0041091E542
:100CE000013083E0030056E10400002A852085E0FE
:100CF00024309FE5023183E00800D3E5040000EAD8
:100D0000015085E20C4084E2C00054E3EDFFFF1A7D
:100D1000FF00A0E3F840BDE81EFF2FE1C012000075
:100D200030402DE924D04DE20040A0E1000090E5E4
:100D3000DFFFFFEBFF0050E30000A0033700000AD5
:100D40003230A0E30C308DE510008DE514008DE508
:100D50000130A0E300308DE5E7FEFFEB0C008DE2F3
:100D60000D10A0E13A31E0E30FE0A0E113FF2FE125
:100D700000309DE5000053E30000A0132700001A97
:100D80003330A0E30C308DE50450A0E1043095E44D
:100D900010308DE514508DE5023CA0E318308DE550
:100DA00084309FE51C308DE50130A0E300308DE5F7
:100DB000D1FEFFEB0C008DE20D10A0E13A31E0E333
:100DC0000FE0A0E113FF2FE100309DE5000053E3A9
:100DD0000000A0131100001A3830A0E30C308DE59C
:100DE000003094E510308DE514508DE5023CA0E311
:100DF00018308DE50130A0E300308DE5BEFEFFEB3D
:100E00000C008DE20D10A0E13A31E0E30FE0A0E12B
:100E100013FF2FE100009DE5010070E20000A03308
:100E200024D08DE23040BDE81EFF2FE160EA0000D3
:100E300008402DE9813BB0E10000A0130700001A33
:100E4000003090E5010053E10100A0030300000A17
:100E5000041080E4022CA0E3AFFEFFEB0100A0E34E
:100E60000840BDE81EFF2FE138402DE90040A0E119
:100E70000150A0E14C309FE5030050E10600000A5C
:100E8000020A51E30600000AA4FFFFEB000050E352
:100E90000040A0030800000A020000EA28409FE585
:100EA000000000EA1C409FE50400A0E10510A0E15D
:100EB000DEFFFFEB000050E30040A0030400A0E1D0
:100EC0003840BDE81EFF2FE1F0040040EC02004076
:100ED000F8452DE90050A0E10140A0E10270A0E139
:100EE0000360A0E1A1A4A0E18AA4A0E1003090E504
:100EF000010073E30400001A0A10A0E1CBFFFFEB2E
:100F0000000050E30000A0032400000A003095E533
:100F10000A0053E10500000A0500A0E10A10A0E163
:100F2000D0FFFFEB005050E20000A0031B00000ABE
:100F3000003095E5044063E0044085E0044084E22D
:100F400060809FE502AC8AE26BFEFFEB043085E235
:100F5000043063E0080053E10500009A0500A0E1B9
:100F60000A10A0E1BFFFFFEB005050E20800000AAA
:100F7000044085E20130D7E40030C4E5016046E278
:100F80000668A0E12668B0E10300000A014084E29F
:100F9000ECFFFFEA0000A0E3000000EA0100A0E38C
:100FA000F845BDE81EFF2FE1FF0100000C309FE572
:100FB0000020E0E3002083E5042283E51EFF2FE10B
:100FC000EC02004070402DE90040A0E10150A0E19A
:100FD0000260A0E136FFFFEBFF0050E30000A0033A
:100FE0000E00000A010044E2050080E030FFFFEB44
:100FF000FF0050E30000A0030800000AA434A0E1B1
:10100000100053E30538A0E118009F0518009F1554
:101010000410A0E10620A0E12338A0E1ABFFFFEB24
:101020007040BDE81EFF2FE1F0040040EC020040DC
:1010300070402DE920D04DE20050A0E10160A0E118
:101040001BFFFFEB0040A0E1010045E2060080E04D
:1010500017FFFFEB0050A0E1FF0050E3FF00541327
:101060000000A0033300000A050054E10000A08343
:101070003000008A000054E30000A0032D00000AA5
:10108000100055E30000A0832A00008A3230A0E35C
:1010900038008DE80130A0E314308DE516FEFFEB3B
:1010A0000D00A0E114108DE23A31E0E30FE0A0E181
:1010B00013FF2FE114309DE5000053E30000A0135F
:1010C0001C00001A3430A0E338008DE870309FE532
:1010D0000C308DE50130A0E314308DE506FEFFEB0A
:1010E0000D00A0E114108DE23A31E0E30FE0A0E141
:1010F00013FF2FE114309DE5000053E30000A0131F
:101100000C00001A3530A0E338008DE80130A0E370
:1011100014308DE5F8FDFFEB0D00A0E114108DE219
:101120003A31E0E30FE0A0E113FF2FE114009DE569
:10113000010070E20000A03320D08DE27040BDE8D5
:101140001EFF2FE160EA0000023AA0E3050093E8E9
:10115000000082E0082093E5020080E00C2093E587
:10116000020080E0102093E5020080E0142093E567
:10117000020080E0182093E5020080E01C3093E537
:10118000030080E0010070E20000A0331EFF2FE1A9
:1011900010402DE908D04DE260209FE5823F82E2B9
:1011A000120093E9044081E0082292E5024084E0C5
:1011B0000C2093E5024084E0102093E5024084E097
:1011C000182093E5024084E01C3093E5034084E05E
:1011D000004064E204408DE5DAFFFFEB000054E1DB
:1011E0000100A00318009F150410A01301208D100A
:1011F00073FFFF1B08D08DE21040BDE81EFF2FE1FA
:10120000EC0200401420000008402DE948309FE522
:10121000043293E5010073E30400000A3C009FE5FB
:10122000BEFEFFEB000050E30000A0030800000A30
:1012300024309FE5003093E5010073E30100A00333
:101240000300000A10009FE5B4FEFFEB000050E22F
:101250000100A0130840BDE81EFF2FE1EC02004092
:10126000F004004004E04EE21F402DE908009FE535
:101270003810A0E3A1FDFFEB1F80FDE8AC130000D8
:1012800004E04EE20F502DE908009FE54610A0E370
:101290009AFDFFEB0F90FDE8AC1300000F502DE915
:1012A00008009FE55410A0E394FDFFEB0F90FDE8CC
:1012B000AC130000010204084F70656E424C5400EC
:1012C000002000000020000001000000004000009D
:1012D000002000000200000000600000002000006C
:1012E0000300000000800000002000000400000057
:1012F00000A00000002000000500000000C0000069
:10130000002000000600000000E0000000200000B7
:1013100007000000000001000000010008000000BC
:1013200000000200000001000900000000000300AE
:10133000002000000A000000002003000020000040
:101340000B00000000400300002000000C00000023
:1013500000600300002000000D000000008003007A
:10136000002000000E00000000A00300002000008C
:101370000F00000000C0030000200000100000006B
:101380006D61696E2E6300002E2E2F2E2E2F2E2EB5
:101390002F536F757263652F41524D375F4C504329
:1013A000323030302F756172742E63002E2E2F2E46
:1013B0002E2F2E2E2F536F757263652F41524D378E
:1013C0005F4C5043323030302F4743432F766563B4
:0813D000746F72732E630000BC
:10013000DC1E0040E8130000000200400002004006
:1001400000020040F806004008402DE988309FE595
:100150002220A0E38420C3E55510E0E38C10C3E522
:100160005520A0E38C20C3E50100A0E38000C3E597
:100170008C10C3E58C20C3E5B828D3E1010B12E352
:10018000FCFFFF0A50309FE50320A0E38020C3E579
:100190005520E0E38C20C3E55520A0E38C20C3E587
:1001A0000020A0E30020C3E50420A0E30420C3E571
:1001B0000220A0E30020C3E50120A0E30021C3E565
:1001C0001D3843E2002093E5052082E3002083E50B
:1001D000020000EB090000EBFDFFFFEA00C01FE09A
:1001E00008402DE9B60100EB7D0200EB630200EB55
:1001F000090000EBA80100EB0840BDE81EFF2FE15D
:1002000008402DE9AF0100EB8D0200EB130000EB7D
:100210008D0100EB0840BDE81EFF2FE104E02DE555
:100220000CD04DE20030E0E30430CDE50030A0E337
:100230000530CDE5380000EBF20100EB18309FE50A
:100240000030D3E5010053E304008D024700000BAA
:100250000CD08DE204E09DE41EFF2FE1000200407F
:1002600008402DE914009FE5170200EB010050E360
:1002700008009F053D00000B0840BDE81EFF2FE170
:10028000040200401EFF2FE108402DE9FF1001E2AB
:10029000EC0100EB300000EB0840BDE81EFF2FE151
:1002A0000120A0E304309FE50020C3E51EFF2FE1FD
:1002B000000200400020A0E304309FE50020C3E5D9
:1002C0001EFF2FE10002004004309FE50000D3E54F
:1002D0001EFF2FE10002004008402DE9180000EB4E
:1002E0000840BDE81EFF2FE10020A0E304309FE599
:1002F0000120C3E51EFF2FE14402004014309FE5BA
:100300000120E0E30320C3E50400C3E50220A0E3ED
:10031000B424C3E11EFF2FE1440200401C309FE5DE
:100320000020A0E30020C3E5482083E54320C3E587
:10033000B424C3E10220C3E50120C3E51EFF2FE181
:10034000440200400C309FE50000D3E5000090E23D
:100350000100A0131EFF2FE1440200400020A0E393
:1003600004309FE54320C3E51EFF2FE14402004017
:1003700038402DE90040A0E10030D0E5FF0053E314
:100380001200001AD7FFFFEBB4349FE50120A0E371
:100390000020C3E50010E0E30310C3E51010A0E364
:1003A0000410C3E50010A0E30510C3E54000A0E37E
:1003B0000600C3E50700C3E50810C3E50920C3E54F
:1003C0000A20C3E50820A0E3B424C3E10F0100EA3A
:1003D0006C249FE50020D2E5010052E31601001ACB
:1003E000C93043E2350053E303F19F97050100EA6A
:1003F000940600000808000008080000FC07000040
:100400000808000008080000E0070000E0060000FF
:10041000A40700006C07000008080000080800009E
:10042000080800000808000008080000080800008C
:10043000080800000808000008080000080800007C
:10044000080800000808000008080000080800006C
:10045000080800000808000008080000080800005C
:10046000080800000808000008080000080800004C
:10047000080800000808000008080000080800003C
:10048000080800000808000008080000080800002C
:10049000080800000808000090050000180500008A
:1004A000C8040000700500000808000008080000EB
:1004B00008080000F80500000808000030060000E9
:1004C0003C060000700600000120D0E53F0052E32A
:1004D0000200009A2200A0E387FFFFEBCB0000EAB6
:1004E0005C539FE5040085E2481095E5FD0000EBB4
:1004F0000030E0E30330C5E50120D4E5483095E560
:10050000033082E0483085E50130D4E5013083E2F4
:10051000B434C5E1BD0000EA0130D0E53F0053E34B
:100520000200009A2200A0E373FFFFEBB70000EA8D
:10053000041090E508539FE5481085E5040085E226
:100540000120D4E5E70000EB0030E0E30330C5E52F
:100550000120D4E5483095E5033082E0483085E558
:100560000130D4E5013083E2B434C5E1A70000EAEC
:10057000CC329FE50020E0E30320C3E5042090E5B2
:10058000482083E50120A0E3B424C3E19F0000EAF2
:10059000AC329FE50020E0E30320C3E5483093E55B
:1005A000040090E5000050E30700000A030080E02B
:1005B0000020A0E30110D3E4012082E0FF2002E24A
:1005C000000053E1FAFFFF1A000000EA0020A0E358
:1005D0006C329FE5072083E50120A0E30420C3E5FA
:1005E0000020A0E30520C3E50620C3E50820A0E322
:1005F000B424C3E1850000EA44329FE50020E0E333
:100600000320C3E53C229FE5482083E50020A0E3CA
:100610000420C3E50520C3E50620C3E50720A0E3C9
:10062000072083E50820A0E3B424C3E1770000EAB3
:100630000000A0E330FFFFEB740000EA00329FE50A
:100640000020E0E30320C3E50020A0E30420C3E58D
:100650000110D3E50510C3E50620C3E50720C3E577
:100660000820C3E50620A0E3B424C3E1670000EA44
:10067000CC419FE50030A0E30030C4E519FFFFEB5B
:100680000030E0E30330C4E50130A0E3B434C4E15A
:100690005E0000EAA8319FE5480093E53F10A0E323
:1006A000012084E2390100EB000050E30200001A4F
:1006B0003100A0E310FFFFEB540000EA80319FE51A
:1006C0000020E0E30320C3E5482093E53F2082E2D9
:1006D000482083E50120A0E3B424C3E14B0000EAF5
:1006E0000130D0E53E0053E30200009A2200A0E36F
:1006F00001FFFFEB450000EA44319FE50020E0E305
:100700000320C3E50120A0E3B424C3E10110D0E538
:10071000000051E30500001A280100EB000050E33F
:100720003A00001A3100A0E3F3FEFFEB370000EAC5
:100730000C319FE5480093E5022084E2130100EBB1
:10074000000050E30200001A3100A0E3EAFEFFEBD4
:100750002E0000EAE8309FE50110D4E5482093E53B
:10076000022081E0482083E5280000EAD0309FE5A0
:100770000020E0E30320C3E50020A0E30420C3E55C
:100780000520C3E54010A0E30610C3E50720C3E53C
:100790000820C3E50920C3E50720A0E3B424C3E192
:1007A0001A0000EA98309FE5480093E5041094E5AC
:1007B000FA0000EB000050E30200001A3100A0E351
:1007C000CDFEFFEB110000EA74309FE50020E0E36E
:1007D0000320C3E50120A0E3B424C3E10B0000EA39
:1007E000640000EB58309FE50020E0E30320C3E500
:1007F0000120A0E3B424C3E1040000EA3100A0E337
:10080000BDFEFFEB010000EA2000A0E3BAFEFFEB13
:100810002C309FE54330D3E5010053E31000A003E3
:10082000B5FEFF0B18309FE50120A0E34320C3E590
:10083000030083E2B414D3E192FEFFEB3840BDE83D
:100840001EFF2FE144020040D012000008402DE9B5
:10085000A0FEFFEB010050E30C00000A34309FE5DE
:100860000030D3E5010053E30800001A000100EB5B
:1008700020309FE5043093E5323083E2030050E1FD
:100880000020A0230C309F250020C3252600002B2C
:100890000840BDE81EFF2FE19002004010402DE906
:1008A00018409FE50130A0E30030C4E5F00000EB04
:1008B000040084E5E4FFFFEB1040BDE81EFF2FE1DC
:1008C000900200401EFF2FE11EFF2FE108402DE99E
:1008D0000C309FE5000083E5041083E5F9FFFFEB92
:1008E000FDFFFFEA9802004070402DE90040A0E1C2
:1008F000016042E20668A0E12668A0E1000052E340
:100900000700000A013080E2066083E0015060E0E9
:100910000530D4E70130C4E4EAFFFFEB060054E100
:10092000FAFFFF1A7040BDE81EFF2FE108402DE9D5
:100930009E0000EB000050E30B00000A50FEFFEBAE
:10094000B70000EB0101A0E3021AA0E34020A0E3FE
:10095000E4FFFFEB0220A0E314309FE5402083E595
:100960000131A0E30FE0A0E113FF2FE10840BDE853
:100970001EFF2FE100C01FE008402DE9B3FDFFEB93
:100980000840BDE81EFF2FE11C309FE51430D3E581
:10099000010013E310309F150030D3150030C0154F
:1009A0000100A0130000A0031EFF2FE100C000E023
:1009B00010402DE948309FE51430D3E5200013E3C3
:1009C0000000A0030C00000A34309FE50000C3E5DE
:1009D0001430D3E5200013E30600001A20409FE501
:1009E000B8FFFFEB1430D4E5200013E3FBFFFF0A50
:1009F0000100A0E3000000EA0100A0E31040BDE810
:100A00001EFF2FE100C000E034309FE50020A0E38E
:100A10000420C3E50820C3E51420C3E57F10E0E30C
:100A20000C10C3E54110A0E30010C3E50420C3E5AA
:100A30000320A0E30C20C3E50720A0E30820C3E5C2
:100A40001EFF2FE100C000E0F0412DE90060A0E1B1
:100A50000140A0E1400051E368009F858310A0831E
:100A600099FFFF8B0400A0E1D0FFFFEB010050E3F2
:100A700050009F158610A01393FFFF1B0450A0E1A8
:100A8000000054E30D00000A0040A0E334809FE51D
:100A90008E70A0E38BFFFFEB0400D6E7C3FFFFEBF4
:100AA000010050E30800A0110710A01186FFFF1BF2
:100AB000014084E20438A0E1230855E1F4FFFF8AF5
:100AC000F041BDE81EFF2FE19813000038402DE9EA
:100AD0000050A0E19C309FE50030D3E5000053E3D7
:100AE0000A00001A90009FE5A6FFFFEB010050E30B
:100AF0000000A0131D00001A78309FE50120A0E33C
:100B00000020C3E50000A0E34500C3E5170000EAAC
:100B100060309FE54540D3E5040083E0050080E2B6
:100B200098FFFFEB010050E30000A0130F00001A34
:100B3000014084E2FF2004E238309FE54520C3E510
:100B40000430D3E5020053E10000A0130700001AAF
:100B500020409FE50500A0E1051084E261FFFFEB66
:100B60000030A0E30030C4E50100A0E3FFFFFFEA8E
:100B70003840BDE81EFF2FE1A0020040A402004063
:100B800008402DE9030100EB0840BDE81EFF2FE1FE
:100B900008402DE9050100EB0840BDE81EFF2FE1EC
:100BA00008402DE91D0100EB0840BDE81EFF2FE1C4
:100BB00008402DE9870100EB0840BDE81EFF2FE14A
:100BC00008402DE9620100EB000050E30000A003A3
:100BD0000100000A910100EBFFFFFFEA0840BDE8B9
:100BE0001EFF2FE12C309FE50020A0E3142083E5B9
:100BF000282083E520109FE50C1083E50110A0E379
:100C0000041083E5081093E510309FE5001083E59C
:100C1000042083E51EFF2FE1004000E05FEA0000B2
:100C2000E802004014309FE50020A0E3042083E5A3
:100C30000C2083E5082083E5102083E51EFF2FE1CB
:100C4000004000E020309FE5082093E51C309FE540
:100C5000041093E5011082E0000093E5011060E0CC
:100C6000041083E5002083E51EFF2FE1004000E033
:100C7000E802004008402DE9F1FFFFEB08309FE556
:100C8000040093E50840BDE81EFF2FE1E8020040A4
:100C9000F8402DE90070A0E10040A0E30450A0E17D
:100CA00050609FE507FFFFEB063094E7070053E134
:100CB0000900008A041086E0041091E5013083E009
:100CC000030057E10400002A852085E024309FE5D9
:100CD000022183E00800D2E5040000EA015085E229
:100CE0000C4084E2C00054E3EDFFFF1AFF00A0E3D4
:100CF000F840BDE81EFF2FE1D812000030402DE97A
:100D000024D04DE20040A0E1000090E5DFFFFFEBC2
:100D1000FF0050E30000A0033800000A3220A0E3E7
:100D20000C208DE510008DE514008DE50130A0E369
:100D300000308DE5E3FEFFEB0C008DE20D10A0E12D
:100D40003A31E0E30FE0A0E113FF2FE100309DE531
:100D5000000053E30000A0132800001A3330A0E382
:100D60000C308DE50450A0E1043095E410308DE5A1
:100D700014508DE5023CA0E318308DE588309FE5E6
:100D80001C308DE50130A0E300308DE5CDFEFFEB9A
:100D90000C008DE20D10A0E13A31E0E30FE0A0E19C
:100DA00013FF2FE100309DE5000053E30000A01386
:100DB0001200001A3830A0E30C308DE5003094E5C5
:100DC00010308DE514508DE5023CA0E318308DE520
:100DD0000130A0E300308DE5BAFEFFEB0C008DE2A0
:100DE0000D10A0E13A31E0E30FE0A0E113FF2FE1A5
:100DF00000009DE5010070E20000A033FFFFFFEA64
:100E000024D08DE23040BDE81EFF2FE160EA0000F3
:100E100008402DE9813BB0E10000A0130800001A52
:100E2000003090E5010053E10100A0030400000A36
:100E3000041080E4022CA0E3AAFEFFEB0100A0E373
:100E4000FFFFFFEA0840BDE81EFF2FE138402DE913
:100E50000040A0E10150A0E150309FE5030050E1C7
:100E60000500000A020A51E30500000AA2FFFFEB99
:100E7000000050E30300001A080000EA30409FE53C
:100E8000000000EA24409FE50400A0E10510A0E175
:100E9000DEFFFFEB000050E30040A003000000EA8B
:100EA0000040A0E30400A0E13840BDE81EFF2FE1B0
:100EB000F4040040F0020040F8452DE90060A0E194
:100EC0000140A0E10250A0E10370A0E1A1A4A0E1D3
:100ED0008AA4A0E1002090E5010072E30400001A5A
:100EE0000A10A0E1C9FFFFEB000050E30000A003DF
:100EF0002500000A003096E50A0053E10400000ACC
:100F00000600A0E10A10A0E1CFFFFFEB006050E275
:100F10001A00000A003096E5044063E0044086E0D1
:100F2000044084E2018047E20888A0E1288885E047
:100F3000018088E258709FE502AC8AE261FEFFEB17
:100F4000043086E2043063E0070053E10500009AB4
:100F50000600A0E10A10A0E1BBFFFFEB006050E239
:100F60000800000A044086E20130D5E40130C4E400
:100F7000080055E1F0FFFF1A0100A0E3020000EABB
:100F80000000A0E3000000EA0000A0E3F845BDE88F
:100F90001EFF2FE1FF0100000C309FE50020E0E381
:100FA000002083E5042283E51EFF2FE1F0020040CC
:100FB00070402DE90040A0E10150A0E10260A0E1F5
:100FC00032FFFFEBFF0050E30000A0030F00000A18
:100FD000010044E2050080E02CFFFFEBFF0050E33E
:100FE0000000A0030900000AA434A0E1100053E3AC
:100FF0000538A0E11C009F051C009F150410A0E10E
:101000000620A0E12338A0E1AAFFFFEBFFFFFFEAE3
:101010007040BDE81EFF2FE1F4040040F0020040E4
:1010200070402DE920D04DE20060A0E10150A0E128
:1010300016FFFFEB0040A0E1010046E2050080E062
:1010400012FFFFEB0050A0E1FF0054E3FF0050133C
:101050000000A0033A00000A050054E10000A0834C
:101060003700008A000054E30000A0033400000AA7
:10107000100055E30000A0833100008A3230A0E365
:101080000C308DE510408DE514508DE50130A0E366
:1010900000308DE50BFEFFEB0C008DE20D10A0E1A2
:1010A0003A31E0E30FE0A0E113FF2FE100309DE5CE
:1010B000000053E30000A0132100001A3430A0E325
:1010C0000C308DE510408DE514508DE57C309FE5AA
:1010D00018308DE50130A0E300308DE5F9FDFFEB20
:1010E0000C008DE20D10A0E13A31E0E30FE0A0E149
:1010F00013FF2FE100309DE5000053E30000A01333
:101100000F00001A3530A0E30C308DE510408DE55E
:1011100014508DE50130A0E300308DE5E9FDFFEBD3
:101120000C008DE20D10A0E13A31E0E30FE0A0E108
:1011300013FF2FE100009DE5010070E20000A033E5
:10114000FFFFFFEA20D08DE27040BDE81EFF2FE1D7
:1011500060EA000004E02DE50CD04DE26C309FE524
:10116000043293E5010073E30100A0031400000AB8
:1011700058309FE5832F83E2060012E8011082E0D9
:10118000102293E5021081E0142293E5021081E021
:10119000182293E5021081E0202293E5021081E0FD
:1011A000242293E5023081E0003063E208208DE2E2
:1011B000043022E518009FE50410A0E37BFFFFEB5D
:1011C000FFFFFFEA0CD08DE204E09DE41EFF2FE15B
:1011D000F002004014200000023AA0E3050093E86A
:1011E000000082E0082093E5020080E00C2093E5F7
:1011F000020080E0102093E5020080E0142093E5D7
:10120000020080E0182093E5020080E01C3093E5A6
:10121000030080E0010070E20000A0331EFF2FE118
:1012200008402DE94C309FE5043293E5010073E35B
:101230000400000A40009FE5AFFEFFEB000050E312
:101240000000A0030900000A28309FE5003093E564
:10125000010073E30100A0030400000A14009FE5ED
:10126000A5FEFFEB000090E20100A013FFFFFFEAE4
:101270000840BDE81EFF2FE1F0020040F4040040EA
:1012800004E04EE21F402DE908009FE53810A0E37E
:101290008DFDFFEB1F80FDE8BC13000004E04EE273
:1012A0000F502DE908009FE54610A0E386FDFFEBF7
:1012B0000F90FDE8BC1300000F502DE908009FE5DA
:1012C0005410A0E380FDFFEB0F90FDE8BC1300007D
:1012D0004F70656E424C540000200000002000005A
:1012E000010000000040000000200000020000009B
:1012F00000600000002000000300000000800000EB
:10130000002000000400000000A0000000200000F9
:101310000500000000C000000020000006000000E2
:1013200000E00000002000000700000000000100B5
:1013300000000100080000000000020000000100A1
:101340000900000000000300002000000A00000067
:1013500000200300002000000B00000000400300FC
:10136000002000000C0000000060030000200000CE
:101370000D00000000800300002000000E000000AF
:1013800000A00300002000000F00000000C00300C8
:1013900000200000100000002E2E2F2E2E2F2E2EAB
:1013A0002F536F757263652F41524D375F4C504319
:1013B000323030302F756172742E63002E2E2F2E36
:1013C0002E2F2E2E2F536F757263652F41524D377E
:1013D0005F4C5043323030302F4743432F766563A4
:0813E000746F72732E630000AC
:00000001FF

178
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Boot/bin/openbtl_olimex_lpc_l2294_20mhz.map
View File

@ -1,59 +1,57 @@
bin/openbtl_olimex_lpc_l2294_20mhz.elf: file format elf32-littlearm
bin/openbtl_olimex_lpc_l2294_20mhz.elf
architecture: arm, flags 0x00000112:
architecture: armv4t, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x00000000
Program Header:
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
filesz 0x000013d8 memsz 0x000013d8 flags r-x
LOAD off 0x00010200 vaddr 0x40000200 paddr 0x000013d8 align 2**15
filesz 0x00000000 memsz 0x000004f4 flags rw-
filesz 0x000013e8 memsz 0x000013e8 flags r-x
LOAD off 0x00010200 vaddr 0x40000200 paddr 0x000013e8 align 2**15
filesz 0x00000000 memsz 0x000004f8 flags rw-
private flags = 5000000: [Version5 EABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000013d8 00000000 00000000 00008000 2**2
0 .text 000013e8 00000000 00000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .bss 000004f4 40000200 000013d8 00010200 2**2
1 .bss 000004f8 40000200 000013e8 00010200 2**2
ALLOC
2 .ARM.attributes 00000030 00000000 00000000 000093d8 2**0
2 .ARM.attributes 0000002e 00000000 00000000 000093e8 2**0
CONTENTS, READONLY
3 .comment 0000002a 00000000 00000000 00009408 2**0
3 .comment 00000030 00000000 00000000 00009416 2**0
CONTENTS, READONLY
4 .debug_abbrev 00000aa1 00000000 00000000 00009432 2**0
4 .debug_info 000021c1 00000000 00000000 00009446 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_info 000017a7 00000000 00000000 00009ed3 2**0
5 .debug_abbrev 00000e22 00000000 00000000 0000b607 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 0000088b 00000000 00000000 0000b67a 2**0
6 .debug_aranges 000001e8 00000000 00000000 0000c429 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_pubtypes 00000324 00000000 00000000 0000bf05 2**0
7 .debug_line 00000a21 00000000 00000000 0000c611 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000905 00000000 00000000 0000c229 2**0
8 .debug_str 00000935 00000000 00000000 0000d032 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 00000bed 00000000 00000000 0000cb2e 2**0
9 .debug_loc 00000f2d 00000000 00000000 0000d967 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_pubnames 000003af 00000000 00000000 0000d71b 2**0
10 .debug_frame 00000630 00000000 00000000 0000e894 2**2
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 000001a0 00000000 00000000 0000daca 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_frame 0000062c 00000000 00000000 0000dc6c 2**2
11 .debug_ranges 00000048 00000000 00000000 0000eec4 2**0
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .text 00000000 .text
40000200 l d .bss 00000000 .bss
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 l d .comment 00000000 .comment
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_pubnames 00000000 .debug_pubnames
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l df *ABS* 00000000 ./obj/cstart.o
00000004 l *ABS* 00000000 UND_STACK_SIZE
00000004 l *ABS* 00000000 ABT_STACK_SIZE
00000004 l *ABS* 00000000 FIQ_STACK_SIZE
@ -80,98 +78,100 @@ e01fc040 l *ABS* 00000000 MEMMAP
000000a0 l .text 00000000 Reset_Handler_SWI
00000000 l df *ABS* 00000000 hooks.c
00000000 l df *ABS* 00000000 main.c
000012b4 l O .text 00000004 pll_dividers.1366
00000000 l df *ABS* 00000000 extflash.c
00000000 l df *ABS* 00000000 boot.c
00000000 l df *ABS* 00000000 com.c
40000200 l O .bss 00000001 comEntryStateConnect
40000204 l O .bss 00000040 xcpCtoReqPacket.1371
40000204 l O .bss 00000040 xcpCtoReqPacket.4167
00000000 l df *ABS* 00000000 xcp.c
0000032c l F .text 00000014 XcpProtectResources
00000340 l F .text 00000020 XcpSetCtoError
000012b8 l O .text 00000008 xcpStationId
000002e8 l F .text 00000014 XcpProtectResources
000002fc l F .text 00000020 XcpSetCtoError
000012d0 l O .text 00000008 xcpStationId
40000244 l O .bss 0000004c xcpInfo
00000000 l df *ABS* 00000000 backdoor.c
40000290 l O .bss 00000001 backdoorOpen
40000294 l O .bss 00000004 backdoorOpenTime
00000000 l df *ABS* 00000000 cop.c
00000000 l df *ABS* 00000000 assert.c
40000294 l O .bss 00000004 assert_failure_file
40000298 l O .bss 00000004 assert_failure_line
40000298 l O .bss 00000004 assert_failure_file
4000029c l O .bss 00000004 assert_failure_line
00000000 l df *ABS* 00000000 cpu.c
00000000 l df *ABS* 00000000 can.c
00000000 l df *ABS* 00000000 uart.c
000009a8 l F .text 00000028 UartReceiveByte
000009d0 l F .text 00000054 UartTransmitByte
4000029c l O .bss 00000001 xcpCtoRxInProgress.1383
400002a0 l O .bss 00000041 xcpCtoReqPacket.1381
400002e1 l O .bss 00000001 xcpCtoRxLength.1382
00000988 l F .text 00000028 UartReceiveByte
000009b0 l F .text 00000058 UartTransmitByte
400002a0 l O .bss 00000001 xcpCtoRxInProgress.4179
400002a4 l O .bss 00000041 xcpCtoReqPacket.4177
400002e5 l O .bss 00000001 xcpCtoRxLength.4178
00000000 l df *ABS* 00000000 nvm.c
00000000 l df *ABS* 00000000 timer.c
400002e4 l O .bss 00000004 millisecond_counter
400002e8 l O .bss 00000004 free_running_counter_last
400002ec l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 flash.c
00000cb4 l F .text 0000006c FlashGetSector
00000d20 l F .text 00000110 FlashWriteBlock
00000e30 l F .text 00000038 FlashInitBlock
00000e68 l F .text 00000068 FlashSwitchBlock
00000ed0 l F .text 000000dc FlashAddToBlock
000012c0 l O .text 000000c0 flashLayout
400002ec l O .bss 00000204 blockInfo
400004f0 l O .bss 00000204 bootBlockInfo
00000c90 l F .text 0000006c FlashGetSector
00000cfc l F .text 00000114 FlashWriteBlock
00000e10 l F .text 0000003c FlashInitBlock
00000e4c l F .text 0000006c FlashSwitchBlock
00000eb8 l F .text 000000e0 FlashAddToBlock
000012d8 l O .text 000000c0 flashLayout
400002f0 l O .bss 00000204 blockInfo
400004f4 l O .bss 00000204 bootBlockInfo
00000000 l df *ABS* 00000000 vectors.c
00000278 g F .text 00000044 ComInit
00000fc4 g F .text 0000006c FlashWrite
00000900 g F .text 0000001c AssertFailure
00001280 g F .text 0000001c IRQ_ISR
00000c14 g F .text 0000002c TimerUpdate
000003a0 g F .text 00000014 XcpPacketTransmitted
000002bc g F .text 00000024 ComTask
000002f8 g F .text 00000014 ComSetConnectEntryState
00000244 g F .text 0000001c BootInit
000008d4 g F .text 00000024 BackDoorInit
000008fc g F .text 00000004 CopService
000013d8 g .text 00000000 _etext
00000bf4 g F .text 00000020 TimerReset
00000260 g F .text 00000018 BootTask
00001190 g F .text 00000078 FlashWriteChecksum
00000000 l df *ABS* 00000000
0000021c g F .text 00000044 ComInit
00000fb0 g F .text 00000070 FlashWrite
000008cc g F .text 0000001c AssertFailure
0000129c g F .text 0000001c IRQ_ISR
00000c44 g F .text 00000030 TimerUpdate
0000035c g F .text 00000014 XcpPacketTransmitted
00000260 g F .text 00000024 ComTask
000002a0 g F .text 00000014 ComSetConnectEntryState
000001e0 g F .text 00000020 BootInit
0000089c g F .text 00000028 BackDoorInit
000008c8 g F .text 00000004 CopService
000013e8 g .text 00000000 _etext
00000c24 g F .text 00000020 TimerReset
00000200 g F .text 0000001c BootTask
00001154 g F .text 00000084 FlashWriteChecksum
40000200 g .bss 00000000 _bss_start
000002e0 g F .text 00000018 ComTransmitPacket
00000288 g F .text 00000018 ComTransmitPacket
00000000 g .text 00000000 _startup
00000388 g F .text 00000018 XcpIsConnected
00000b98 g F .text 00000010 NvmInit
00000fac g F .text 00000018 FlashInit
400006f4 g *ABS* 00000000 _bss_end
00000344 g F .text 00000018 XcpIsConnected
00000b80 g F .text 00000010 NvmInit
00000f98 g F .text 00000018 FlashInit
400006f8 g .bss 00000000 _bss_end
00000050 g .text 00000000 Reset_Handler
00000a24 g F .text 00000040 UartInit
00000bb8 g F .text 00000010 NvmErase
000003b4 g F .text 000004d4 XcpPacketReceived
00001208 g F .text 0000005c FlashDone
00000284 g F .text 00000004 ComFree
00000a08 g F .text 00000040 UartInit
00000ba0 g F .text 00000010 NvmErase
00000370 g F .text 000004dc XcpPacketReceived
00001220 g F .text 00000060 FlashDone
000002b4 g F .text 00000014 ComSetDisconnectEntryState
00000040 g .text 00000000 EntryFromProg
0000030c g F .text 00000010 ComIsConnectEntryState
00000360 g F .text 00000028 XcpInit
00001030 g F .text 00000118 FlashErase
00000148 g F .text 000000fc main
00000bd8 g F .text 0000001c NvmDone
00000a64 g F .text 00000084 UartTransmitPacket
00000bc8 g F .text 00000010 NvmVerifyChecksum
0000091c g F .text 00000038 CpuMemCopy
000002c8 g F .text 00000010 ComIsConnectEntryState
0000031c g F .text 00000028 XcpInit
00001020 g F .text 00000134 FlashErase
00000148 g F .text 00000098 main
00000bc0 g F .text 00000024 NvmDone
00000a48 g F .text 00000084 UartTransmitPacket
00000bb0 g F .text 00000010 NvmVerifyChecksum
000008e8 g F .text 00000044 CpuMemCopy
40001edc g *ABS* 00000000 _stack_end
00000c40 g F .text 00000010 TimerSet
00001264 g F .text 0000001c FIQ_ISR
00000ae8 g F .text 000000b0 UartReceivePacket
00001280 g F .text 0000001c FIQ_ISR
00000acc g F .text 000000b4 UartReceivePacket
40000200 g .text 00000000 _data
000008f8 g F .text 00000004 CopInit
00000998 g F .text 00000010 CpuReset
000008c4 g F .text 00000004 CopInit
00000978 g F .text 00000010 CpuReset
000000f4 g .text 00000000 SetupRAM
00000ba8 g F .text 00000010 NvmWrite
00000954 g F .text 00000044 CpuStartUserProgram
00001148 g F .text 00000048 FlashVerifyChecksum
00000b90 g F .text 00000010 NvmWrite
0000092c g F .text 0000004c CpuStartUserProgram
000011d8 g F .text 00000048 FlashVerifyChecksum
40000200 g .text 00000000 _edata
400006f4 g *ABS* 00000000 _end
0000129c g F .text 00000018 UNDEF_ISR
0000031c g F .text 00000010 ComIsConnected
00000888 g F .text 0000004c BackDoorCheck
00000c98 g F .text 0000001c TimerGet
00000c50 g F .text 00000048 TimerInit
400006f8 g .bss 00000000 _end
000012b8 g F .text 00000018 UNDEF_ISR
000002d8 g F .text 00000010 ComIsConnected
0000084c g F .text 00000050 BackDoorCheck
00000c74 g F .text 0000001c TimerGet
00000be4 g F .text 00000040 TimerInit

5
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Boot/config.h
View File

@ -41,10 +41,15 @@
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
* big endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
#define BOOT_CPU_XTAL_SPEED_KHZ (20000)
#define BOOT_CPU_SYSTEM_SPEED_KHZ (60000)
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
/****************************************************************************************

24
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Boot/hooks.c
View File

@ -75,6 +75,30 @@ blt_bool BackDoorEntryHook(void)
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
/****************************************************************************************
* C P U D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/****************************************************************************************
** NAME: CpuUserProgramStartHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
** keep the bootloader active.
** DESCRIPTION: Callback that gets called when the bootloader is about to exit and
** hand over control to the user program. This is the last moment that
** some final checking can be performed and if necessary prevent the
** bootloader from activiting the user program.
**
****************************************************************************************/
blt_bool CpuUserProgramStartHook(void)
{
/* okay to start the user program */
return BLT_TRUE;
} /*** end of CpuUserProgramStartHook ***/
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
****************************************************************************************/

BIN
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Prog/bin/demoprog_olimex_lpc_l2294_20mhz.elf
View File

Binary file not shown.

88
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Prog/bin/demoprog_olimex_lpc_l2294_20mhz.map
View File

@ -1,56 +1,54 @@
bin/demoprog_olimex_lpc_l2294_20mhz.elf: file format elf32-littlearm
bin/demoprog_olimex_lpc_l2294_20mhz.elf
architecture: arm, flags 0x00000112:
architecture: armv4t, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x00002000
Program Header:
LOAD off 0x00000000 vaddr 0x00000000 paddr 0x00000000 align 2**15
filesz 0x000028e8 memsz 0x000028e8 flags r-x
LOAD off 0x00008200 vaddr 0x40000200 paddr 0x000028e8 align 2**15
filesz 0x00002b18 memsz 0x00002b18 flags r-x
LOAD off 0x00008200 vaddr 0x40000200 paddr 0x00002b18 align 2**15
filesz 0x00000000 memsz 0x0000005c flags rw-
private flags = 5000002: [Version5 EABI] [has entry point]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000008e8 00002000 00002000 00002000 2**2
0 .text 00000b18 00002000 00002000 00002000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .bss 0000005c 40000200 000028e8 00008200 2**2
1 .bss 0000005c 40000200 00002b18 00008200 2**2
ALLOC
2 .ARM.attributes 00000030 00000000 00000000 000028e8 2**0
2 .ARM.attributes 0000002e 00000000 00000000 00002b18 2**0
CONTENTS, READONLY
3 .comment 0000002a 00000000 00000000 00002918 2**0
3 .comment 00000030 00000000 00000000 00002b46 2**0
CONTENTS, READONLY
4 .debug_abbrev 0000029c 00000000 00000000 00002942 2**0
4 .debug_info 000004ce 00000000 00000000 00002b76 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_info 000004b9 00000000 00000000 00002bde 2**0
5 .debug_abbrev 00000310 00000000 00000000 00003044 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000222 00000000 00000000 00003097 2**0
6 .debug_loc 00000390 00000000 00000000 00003354 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_loc 00000390 00000000 00000000 000032b9 2**0
7 .debug_aranges 000000c0 00000000 00000000 000036e4 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_pubnames 00000175 00000000 00000000 00003649 2**0
8 .debug_line 00000224 00000000 00000000 000037a4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_aranges 000000c0 00000000 00000000 000037be 2**0
9 .debug_str 000002ab 00000000 00000000 000039c8 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_str 000002a8 00000000 00000000 0000387e 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_frame 000002e0 00000000 00000000 00003b28 2**2
10 .debug_frame 00000310 00000000 00000000 00003c74 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00002000 l d .text 00000000 .text
40000200 l d .bss 00000000 .bss
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 l d .comment 00000000 .comment
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_pubnames 00000000 .debug_pubnames
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 ./obj/cstart.o
00000100 l *ABS* 00000000 UND_STACK_SIZE
00000100 l *ABS* 00000000 ABT_STACK_SIZE
00000100 l *ABS* 00000000 FIQ_STACK_SIZE
@ -75,48 +73,50 @@ SYMBOL TABLE:
00002038 l .text 00000000 IRQ_Addr
00000000 l df *ABS* 00000000 vectors.c
00000000 l df *ABS* 00000000 main.c
0000217c l F .text 000001f0 Init
000028e4 l O .text 00000004 C.0.2054
0000217c l F .text 00000218 Init
00000000 l df *ABS* 00000000 boot.c
0000236c l F .text 0000002c BootActivate
00002538 l F .text 00000064 UartReceiveByte
40000200 l .bss 00000000 xcpCtoRxInProgress.1301
40000204 l .bss 00000000 xcpCtoReqPacket.1299
40000245 l .bss 00000000 xcpCtoRxLength.1300
00002394 l F .text 0000002c BootActivate
00002560 l F .text 00000060 UartReceiveByte
40000200 l .bss 00000000 xcpCtoRxInProgress.4095
40000204 l .bss 00000000 xcpCtoReqPacket.4093
40000245 l .bss 00000000 xcpCtoRxLength.4094
00000000 l df *ABS* 00000000 irq.c
40000248 l .bss 00000000 oldInterruptStatus
4000024c l .bss 00000000 interruptNesting
0000259c l F .text 00000028 IrqGetCPSR
000025c4 l F .text 00000024 IrqSetCPSR
000025c0 l F .text 00000028 IrqGetCPSR
000025e8 l F .text 00000024 IrqSetCPSR
00000000 l df *ABS* 00000000 led.c
40000250 l .bss 00000000 timer_counter_last.1292
40000254 l .bss 00000000 led_toggle_state.1291
40000250 l .bss 00000000 timer_counter_last.4086
40000254 l .bss 00000000 led_toggle_state.4085
00000000 l df *ABS* 00000000 timer.c
40000258 l .bss 00000000 millisecond_counter
00002868 g F .text 0000002c TimerUpdate
000025e8 g F .text 00000030 IrqInterruptEnable
00000000 l df *ABS* 00000000 memcpy.c
00000000 l df *ABS* 00000000
0000288c g F .text 0000002c TimerUpdate
0000260c g F .text 00000030 IrqInterruptEnable
000020d8 g F .text 00000044 TIMER0_ISR
000028e8 g .text 00000000 _etext
00002b18 g .text 00000000 _etext
00002908 g F .text 0000020c memcpy
40000200 g .bss 00000000 _bss_start
00002000 g .text 00000000 _startup
4000025c g *ABS* 00000000 _bss_end
4000025c g .bss 00000000 _bss_end
00002040 g .text 00000000 Reset_Handler
000026f4 g F .text 0000003c LedInit
00002684 g F .text 00000070 IrqInterruptRestore
00002718 g F .text 0000003c LedInit
000026a8 g F .text 00000070 IrqInterruptRestore
0000213c g F .text 00000040 main
40003edc g *ABS* 00000000 _stack_end
00002894 g F .text 0000002c TimerSet
00002398 g F .text 000000b8 BootComInit
000028b8 g F .text 0000002c TimerSet
000023c0 g F .text 000000b8 BootComInit
00002128 g F .text 00000008 FIQ_ISR
40000200 g .text 00000000 _data
00002730 g F .text 000000b4 LedToggle
00002754 g F .text 000000b4 LedToggle
40000200 g .text 00000000 _edata
4000025c g *ABS* 00000000 _end
4000025c g .bss 00000000 _end
00002130 g F .text 0000000c UNDEF_ISR
0000211c g F .text 0000000c SWI_ISR
00002618 g F .text 0000006c IrqInterruptDisable
00002450 g F .text 000000e8 BootComCheckActivationRequest
000028c0 g F .text 00000024 TimerGet
000027e4 g F .text 00000084 TimerInit
0000263c g F .text 0000006c IrqInterruptDisable
00002478 g F .text 000000e8 BootComCheckActivationRequest
000028e4 g F .text 00000024 TimerGet
00002808 g F .text 00000084 TimerInit

279
Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_GCC/Prog/bin/demoprog_olimex_lpc_l2294_20mhz.sx
View File

@ -11,135 +11,170 @@ S1132080DFF021E300D0A0E134109FE534209FE588
S113209034309FE5030052E104009134040082349B
S11320A0FBFFFF3A0000A0E320109FE520209FE5FE
S11320B0020051E104008134FCFFFF3A1E0000EAF3
S11320C0DC3E0040E828000000020040000200401E
S11320C0DC3E0040182B00000002004000020040EB
S11320D0000200405C02004004E04EE21F582DE97B
S11320E01CB08DE224309FE50120A0E3002083E5AD
S11320F01C309FE50020A0E3002083E514309FE519
S11321000FE0A0E113FF2FE11CD04BE21F98FDE884
S1132110004000E030F0FFFF6828000004B02DE527
S1132110004000E030F0FFFF8C28000004B02DE503
S113212000B08DE2FEFFFFEA04B04DE2FEFFFFEADD
S113213004B02DE500B08DE2FEFFFFEA00482DE972
S113214004B08DE20C0000EB20309FE50FE0A0E12D
S113215013FF2FE118309FE50FE0A0E113FF2FE1FB
S113216010309FE50FE0A0E113FF2FE1F8FFFFEA35
S113217098230000302700005024000000482DE977
S113218004B08DE210D04DE2A8319FE5003093E514
S113219010300BE50330A0E306304BE506305BE579
S11321A0013043E206304BE50030A0E305304BE557
S11321B01A0000EA05205BE50B30E0E304104BE273
S11321C0022081E0033082E00030D3E50320A0E167
S11321D00230A0E18332A0E1033062E00331A0E1E8
S11321E0023083E00322A0E1022063E00233A0E195
S11321F00C300BE50C201BE53C319FE5030052E15C
S11322000300009A0C201BE530319FE5030052E1E6
S11322100600009A05305BE5013083E205304BE5AA
S113222005305BE5030053E3E1FFFF9A000000EA99
S11322300000A0E108319FE505205BE58222A0E1D2
S1132240FF1002E206205BE5022081E1FF2002E2AA
S1132250FF2002E20020C3E5E8309FE55520E0E3DB
S11322600020C3E5DC309FE55520A0E30020C3E552
S1132270D4309FE50120A0E30020C3E5C4309FE5EE
S11322805520E0E30020C3E5B8309FE55520A0E3E6
S11322900020C3E50000A0E1B0309FE5B030D3E1F9
S11322A00338A0E12338A0E1013B03E2000053E33B
S11322B0F8FFFF0A90309FE50320A0E30020C3E568
S11322C080309FE55520E0E30020C3E574309FE5AE
S11322D05520A0E30020C3E574309FE50020A0E36F
S11322E00020C3E56C309FE50420A0E30020C3E593
S11322F05C309FE50220A0E30020C3E558309FE551
S11323000120A0E30020C3E550309FE50FE0A0E1E9
S113231013FF2FE148309FE50FE0A0E113FF2FE109
S113232040309FE50FE0A0E113FF2FE104D04BE222
S11323300048BDE81EFF2FE1E42800005F610200B1
S113234000E2040084C01FE08CC01FE080C01FE0D6
S113235088C01FE000C01FE004C01FE000C11FE0F0
S1132360F4260000E4270000E825000000482DE9D9
S113237004B08DE208D04DE24030A0E308300BE514
S113238008301BE50FE0A0E113FF2FE104D04BE27E
S11323900048BDE81EFF2FE104B02DE500B08DE23A
S11323A00CD04DE28C309FE588209FE5002092E51B
S11323B0052082E3002083E57C309FE50020A0E334
S11323C00020C3E574309FE50020A0E30020C3E5AE
S11323D06C309FE50020A0E30020C3E564309FE556
S11323E07F20E0E30020C3E54130A0E308300BE5A3
S11323F054309FE508201BE5FF2002E20020C3E5DE
S113240034309FE508201BE52224A0E1FF2002E2EE
S11324100020C3E52C309FE50320A0E30020C3E5A2
S113242018309FE50720A0E30020C3E500D08BE22D
S113243004B09DE41EFF2FE100C002E004C000E0F0
S113244008C000E014C000E00CC000E000C000E0E0
S113245000482DE904B08DE2CC309FE50030D3E58F
S1132460000053E30B00001AC0009FE5310000EBAD
S11324700030A0E1010053E32800001AA8309FE5D2
S11324800120A0E30020C3E5A4309FE50020A0E3E1
S11324900020C3E5210000EA94309FE50030D3E535
S11324A0012083E284309FE5033082E00300A0E151
S11324B0200000EB0030A0E1010053E31700001AF4
S11324C06C309FE50030D3E5013083E2FF2003E266
S11324D05C309FE50020C3E550309FE50020D3E544
S11324E04C309FE50030D3E5030052E10B00001AA5
S11324F034309FE50020A0E30020C3E52C309FE5A5
S11325000130D3E5FF0053E30400001A1C309FE5BB
S11325100230D3E5000053E30000001A92FFFFEB02
S113252004D04BE20048BDE81EFF2FE1000200404A
S1132530040200404502004004B02DE500B08DE2E5
S11325400CD04DE208000BE544309FE50030D3E5A4
S1132550FF3003E2013003E2FF3003E2000053E303
S11325600600000A2C309FE50030D3E5FF2003E28B
S113257008301BE50020C3E50130A0E3000000EAB9
S11325800030A0E30300A0E100D08BE204B09DE49E
S11325901EFF2FE114C000E000C000E010082DE988
S11325A004B08DE208D04DE200400FE108400BE595
S11325B008301BE50300A0E104D04BE21008BDE89D
S11325C01EFF2FE104B02DE500B08DE20CD04DE2EA
S11325D008000BE508301BE503F029E100D08BE28D
S11325E004B09DE41EFF2FE100482DE904B08DE204
S11325F008D04DE2E8FFFFEB08000BE508301BE5CF
S11326008030C3E30300A0E1EDFFFFEB04D04BE215
S11326100048BDE81EFF2FE100482DE904B08DE21B
S113262008D04DE250309FE50030D3E5000053E37D
S11326300800001AD8FFFFEB08000BE508301BE583
S1132640803083E30300A0E1DDFFFFEB2C309FE546
S113265008201BE5002083E51C309FE50030D3E50E
S1132660013083E2FF2003E20C309FE50020C3E544
S113267004D04BE20048BDE81EFF2FE14C020040AD
S11326804802004000482DE904B08DE208D04DE234
S113269054309FE50030D3E5013043E2FF2003E2EC
S11326A044309FE50020C3E53C309FE50030D3E58E
S11326B0000053E30900001AB7FFFFEB08000BE525
S11326C008301BE58020C3E320309FE5003093E50C
S11326D0803003E2033082E10300A0E1B8FFFFEBA6
S11326E004D04BE20048BDE81EFF2FE14C0200403D
S11326F04802004004B02DE500B08DE224309FE58F
S113270020209FE5002092E5022582E3002083E556
S113271014309FE50225A0E3002083E500D08BE27E
S113272004B09DE41EFF2FE1188002E0148002E053
S113273000482DE904B08DE208D04DE288309FE5D1
S11327400FE0A0E113FF2FE108000BE57C309FE5CB
S1132750003093E508201BE5022063E070309FE51C
S1132760030052E11400009A68309FE50030D3E57D
S1132770000053E30600001A58309FE50120A0E34F
S11327800020C3E550309FE50225A0E3002083E547
S1132790050000EA3C309FE50020A0E30020C3E5EB
S11327A038309FE50225A0E3002083E51C309FE537
S11327B008201BE5002083E5000000EA0000A0E1FA
S11327C004D04BE20048BDE81EFF2FE1C028000002
S11327D050020040F3010000540200401C8002E05B
S11327E0148002E000482DE904B08DE254309FE5E6
S11327F054209FE5002083E550309FE50320A0E3AB
S1132800002083E548309FE50120A0E3002083E514
S113281040309FE540209FE5002083E53C309FE564
S11328202420A0E3002083E534309FE51020A0E3BA
S1132830002083E50000A0E3150000EB04D04BE288
S11328400048BDE81EFF2FE1184000E05FEA0000E9
S1132850144000E0044000E000F1FFFFD820000035
S113286000F2FFFF10F0FFFF04B02DE500B08DE291
S113287018309FE5003093E5012083E20C309FE59A
S1132880002083E500D08BE204B09DE41EFF2FE11D
S11328905802004004B02DE500B08DE20CD04DE2AA
S11328A008000BE510309FE508201BE5002083E5B8
S11328B000D08BE204B09DE41EFF2FE158020040DB
S11328C004B02DE500B08DE210309FE5003093E5B3
S11328D00300A0E100D08BE204B09DE41EFF2FE1D1
S10B28E0580200400102040843
S1132170C0230000542700007824000000482DE903
S113218004B08DE210D04DE2CC319FE510104BE24B
S11321900320A0E10430A0E30100A0E10210A0E1CB
S11321A00320A0E1B4319FE50FE0A0E113FF2FE18C
S11321B00330A0E306304BE506305BE5013043E233
S11321C006304BE50030A0E305304BE51C0000EA87
S11321D005205BE50B30E0E304104BE2022081E0D4
S11321E0033082E00030D3E50320A0E10230A0E117
S11321F08332A0E1033062E00331A0E1023083E0E6
S11322000322A0E1022063E00233A0E10320A0E165
S11322100230A0E10C300BE50C201BE540319FE5BA
S1132220030052E10300009A0C201BE534319FE5C2
S1132230030052E10600009A05305BE5013083E2B9
S113224005304BE505305BE5030053E3DFFFFF9A00
S1132250000000EA0000A0E10C319FE505205BE5E9
S11322608222A0E1FF1002E206205BE5022081E168
S1132270FF2002E2FF2002E20020C3E5EC309FE5EC
S11322805520E0E30020C3E5E0309FE55520A0E3BE
S11322900020C3E5D8309FE50120A0E30020C3E57A
S11322A0C8309FE55520E0E30020C3E5BC309FE53E
S11322B05520A0E30020C3E50000A0E1B4309FE571
S11322C0B030D3E10338A0E12338A0E1013B03E2BD
S11322D0000053E3F8FFFF0A94309FE50320A0E3D6
S11322E00020C3E584309FE55520E0E30020C3E5EA
S11322F078309FE55520A0E30020C3E578309FE5C2
S11323000020A0E30020C3E570309FE50420A0E393
S11323100020C3E560309FE50220A0E30020C3E570
S11323205C309FE50120A0E30020C3E554309FE525
S11323300FE0A0E113FF2FE14C309FE50FE0A0E197
S113234013FF2FE144309FE50FE0A0E113FF2FE1DD
S113235004D04BE20048BDE81EFF2FE1142B00001F
S1132360082900005F61020000E2040084C01FE04D
S11323708CC01FE080C01FE088C01FE000C01FE0C9
S113238004C01FE000C11FE0182700000828000057
S11323900C26000000482DE904B08DE208D04DE27F
S11323A04030A0E308300BE508301BE50FE0A0E166
S11323B013FF2FE104D04BE20048BDE81EFF2FE1DC
S11323C004B02DE500B08DE20CD04DE28C309FE5D9
S11323D088209FE5002092E5052082E3002083E524
S11323E07C309FE50020A0E30020C3E574309FE526
S11323F00020A0E30020C3E56C309FE50020A0E3AB
S11324000020C3E564309FE57F20E0E30020C3E5BE
S11324104130A0E308300BE554309FE508201BE56C
S1132420FF2002E20020C3E534309FE508201BE5CD
S11324302224A0E1FF2002E20020C3E52C309FE526
S11324400320A0E30020C3E518309FE50720A0E3A4
S11324500020C3E500D08BE20008BDE81EFF2FE199
S113246000C002E004C000E008C000E014C000E0C6
S11324700CC000E000C000E000482DE904B08DE28B
S1132480CC309FE50030D3E5000053E30B00001A85
S1132490C0009FE5310000EB0030A0E1010053E3F0
S11324A02800001AA8309FE50120A0E30020C3E51E
S11324B0A4309FE50020A0E30020C3E5210000EA4A
S11324C094309FE50030D3E5012083E284309FE51A
S11324D0033082E00300A0E1200000EB0030A0E123
S11324E0010053E31700001A6C309FE50030D3E578
S11324F0013083E2FF2003E25C309FE50020C3E566
S113250050309FE50020D3E54C309FE50030D3E503
S1132510030052E10B00001A34309FE50020A0E3D1
S11325200020C3E52C309FE50130D3E5FF0053E3E1
S11325300400001A1C309FE50230D3E5000053E389
S11325400000001A92FFFFEB04D04BE20048BDE804
S11325501EFF2FE10002004004020040450200403B
S113256004B02DE500B08DE20CD04DE208000BE57F
S113257040309FE50030D3E5FF3003E2013003E251
S1132580000053E30600000A2C309FE50030D3E539
S1132590FF2003E208301BE50020C3E50130A0E37F
S11325A0000000EA0030A0E30300A0E100D08BE2C9
S11325B00008BDE81EFF2FE114C000E000C000E0E9
S11325C010082DE904B08DE208D04DE200400FE17F
S11325D008400BE508301BE50300A0E104D04BE202
S11325E01008BDE81EFF2FE104B02DE500B08DE218
S11325F00CD04DE208000BE508301BE503F029E19F
S113260000D08BE20008BDE81EFF2FE100482DE951
S113261004B08DE208D04DE2E8FFFFEB08000BE5C3
S113262008301BE58030C3E30300A0E1EDFFFFEBBE
S113263004D04BE20048BDE81EFF2FE100482DE91D
S113264004B08DE208D04DE250309FE50030D3E570
S1132650000053E30800001AD8FFFFEB08000BE565
S113266008301BE5803083E30300A0E1DDFFFFEBCE
S11326702C309FE508201BE5002083E51C309FE5F6
S11326800030D3E5013083E2FF2003E20C309FE504
S11326900020C3E504D04BE20048BDE81EFF2FE153
S11326A04C0200404802004000482DE904B08DE28D
S11326B008D04DE254309FE50030D3E5013043E2C9
S11326C0FF2003E244309FE50020C3E53C309FE552
S11326D00030D3E5000053E30900001AB7FFFFEB15
S11326E008000BE508301BE58020C3E320309FE59C
S11326F0003093E5803003E2033082E10300A0E17F
S1132700B8FFFFEB04D04BE20048BDE81EFF2FE109
S11327104C0200404802004004B02DE500B08DE2B8
S113272024309FE520209FE5002092E5022582E3E6
S1132730002083E514309FE50225A0E3002083E513
S113274000D08BE20008BDE81EFF2FE1188002E0F4
S1132750148002E000482DE904B08DE208D04DE277
S113276088309FE50FE0A0E113FF2FE108000BE59F
S11327707C309FE5003093E508201BE5022063E0F0
S113278070309FE5030052E11400009A68309FE521
S11327900030D3E5000053E30600001A58309FE5EB
S11327A00120A0E30020C3E550309FE50225A0E30B
S11327B0002083E5050000EA3C309FE50020A0E30B
S11327C00020C3E538309FE50225A0E3002083E51F
S11327D01C309FE508201BE5002083E5000000EA8B
S11327E00000A0E104D04BE20048BDE81EFF2FE149
S11327F0E428000050020040F301000054020040AD
S11328001C8002E0148002E000482DE904B08DE24F
S113281054309FE554209FE5002083E550309FE528
S11328200320A0E3002083E548309FE50120A0E3D6
S1132830002083E540309FE540209FE5002083E5AC
S11328403C309FE52420A0E3002083E534309FE55D
S11328501020A0E3002083E50000A0E3150000EBB6
S113286004D04BE20048BDE81EFF2FE1184000E011
S11328705FEA0000144000E0044000E000F1FFFFC4
S1132880D820000000F2FFFF10F0FFFF04B02DE598
S113289000B08DE218309FE5003093E5012083E21B
S11328A00C309FE5002083E500D08BE20008BDE8F2
S11328B01EFF2FE15802004004B02DE500B08DE268
S11328C00CD04DE208000BE510309FE508201BE515
S11328D0002083E500D08BE20008BDE81EFF2FE155
S11328E05802004004B02DE500B08DE210309FE5A1
S11328F0003093E50300A0E100D08BE20008BDE8BE
S11329001EFF2FE158020040030052E3F0012DE9BD
S11329100900008A000052E30500000A0030A0E329
S113292003C0D1E703C0C0E7013083E2020053E1F2
S1132930FAFFFF1AF001BDE81EFF2FE1030010E3C8
S1132940022080E00B00000A01C080E2014081E225
S113295003300CE2015054E5000053E30410A0E1FD
S11329600C30A0E101504CE5014084E201C08CE24E
S1132970F6FFFF1A000000EA0030A0E103C011E2F4
S11329804F00001A02C063E03F005CE3240000DA59
S113299000C091E500C083E504C091E504C083E56F
S11329A008C091E508C083E50CC091E50CC083E53F
S11329B010C091E510C083E514C091E514C083E50F
S11329C018C091E518C083E51CC091E51CC083E5DF
S11329D020C091E520C083E524C091E524C083E5AF
S11329E028C091E528C083E52CC091E52CC083E57F
S11329F030C091E530C083E534C091E534C083E54F
S1132A0038C091E538C083E53CC091E5403083E2AD
S1132A1004C003E502C063E03F005CE3401081E2D0
S1132A20DAFFFFCA0F005CE30C0000DA00C091E596
S1132A3000C083E504C091E504C083E508C091E5C6
S1132A4008C083E50CC091E5103083E204C003E5BF
S1132A5002C063E00F005CE3101081E2F2FFFFCAE2
S1132A6003005CE30A0000DA04C083E2044081E26C
S1132A7002306CE0045014E5030053E30410A0E1B9
S1132A800C30A0E104500CE5044084E204C08CE264
S1132A90F6FFFFCA030052E10130838201108182F4
S1132AA001208282A2FFFF9A01C051E5013083E236
S1132AB0020053E102C043E5011081E2F9FFFF1A6D
S1132AC09BFFFFEA025063E001406CE0030055E322
S1132AD0005094E5EEFFFFDA04606CE28C71A0E133
S1132AE08661A0E104C083E23587A0E10450B4E527
S1132AF0158688E102306CE0030053E304800CE5A2
S1132B000C30A0E1041081E204C08CE2F5FFFFCA9E
S10B2B10DFFFFFEA01020408E3
S9032000DC

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/bin/openbtl_olimex_efm32g880.elf
View File

Binary file not shown.

1330
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/bin/openbtl_olimex_efm32g880.map
View File

File diff suppressed because it is too large Load Diff

667
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/bin/openbtl_olimex_efm32g880.srec
View File

@ -1,5 +1,5 @@
S02B0000443A2F7573722F6665617365722F736F6674776172652F4F70656E424C542F5461726765742F44657D
S1130000B0070020550100007D0200007D020000C1
S02B0000433A2F576F726B2F736F6674776172652F4F70656E424C542F5461726765742F44656D6F2F41524DEF
S1130000B8070020550100007D0200007D020000B9
S11300107D0200007D0200007D0200007D020000E0
S11300207D0200007D0200007D0200007D020000D0
S11300307D0200007D0200007D0200007D020000C0
@ -20,7 +20,7 @@ S113010854485549554A00F06BF85548554900225A
S113011800F071F854485549091A082903DB0022EC
S113012802600430016046484649884205D00268A6
S1130138043003B4904703BCF7E700208646EC4636
S113014800F0B0FC00200021494A904772B62F49BC
S113014800F0B6FC00200021494A904772B62F49B6
S11301588D462F492F480A1A04D081F309880222B0
S113016882F314882C482D492D4A00F039F82D487B
S11301782D492E4A00F034F82D482E492E4A00F015
@ -32,171 +32,171 @@ S11301C8884205D00268043003B4904703BCF7E7BB
S11301D800208646EC4600200021254A9047FEE789
S11301E8884207D0521A05D0037801300B700131C8
S11301F8013AF9D17047884202D002700130FAE717
S11302087047000008ED00E000000000B00700207F
S1130218B0070020B00700205C1A00003801002055
S1130228400100207C0200007C0200002817000026
S113023824190000000000203801002028170000BD
S113024828170000281700002817000028170000A6
S1130258281700002817000028170000211900009B
S1130268400100202E06002030060020B0060020A1
S10702784915000020
S11302087047000008ED00E000000000B807002077
S1130218B8070020B8070020541A0000380100204D
S1130228400100207C0200007C0200002C17000022
S11302381C19000000000020380100202C170000C1
S11302482C1700002C1700002C1700002C17000096
S11302582C1700002C1700002C1700001B19000095
S1130268400100203606002038060020B806002089
S10702784D1500001C
S113027C00B503483C21034B98475DF804FB00BFD1
S113028C281700007509000000B5074B984748B1C2
S113029C064B9847064B4FF400521A6042F2040383
S11302AC1B6898475DF804FB2D070000910A0000B9
S11302BC08ED00E0F0B50C4695B20646054F06E095
S11302CC14F8013B013D06F8013BB847ADB2002DD3
S11302DCF6D1F0BDCB0A000000B5024B98475DF88F
S11302EC04FB00BF55010000F0B50C4D0C4F064645
S11302FC0024B8472B689E4209D36A689B189E4217
S113030C05D2064B0C2202FB0434207AF0BD0134D6
S113031C0C350F2CEDD1FF20F0BD00BFC017000031
S113032CCB0A00002DE9F147114B054600689847AC
S113033CFF281AD0DFF83C90DFF83C8000242F68AB
S113034C261DAB5904EB070A0093C847504669466F
S113035C0422C04748B9E259009B9A4206D1B6F52B
S113036C007F3446EBD1012000E00020BDE8F88783
S113037CF5020000CB0A000079000020114B30B5C7
S113038C984204460D4606D0B1F5005F05D00E4BDD
S113039C984718B910E00D4C00E01C46EB050DD144
S11303AC2368AB420BD0204640F8045B29464FF43B
S11303BC0072074B984702E0044600E000242046F4
S11303CC30BD00BF40010020310300004403002075
S11303DCC10200002DE9F04F1FFA83F8036821F4E1
S11303ECFE77013304460D46164627F0030706D163
S11303FC40F8047B39464FF400721B4B9847236832
S113040CBB4205D020463946184B9847044630B3B6
S113041C2368DFF85CA0C3EB050B0BF1040B134D45
S113042CA34440F2FF19D047231DC3EB0B034B45E8
S113043C07D9204607F50071A847044688B100F196
S113044C040B16F8013B08F1FF381FFA88F80BF877
S113045C013BB8F1000FE6D10120BDE8F08FBDE8F7
S113046CF08FBDE8F08F00BFC102000089030000CB
S113047CCB0A0000054B00B59847054A4FF0FF33F3
S113048C1360044A13605DF804FB00BFED14000014
S113049C4403002040010020F0B5104F05460C46E3
S11304AC1646B847FF2814D0681E0019B847FF2811
S11304BC11D025F4FE7323F00303B3F5005F08BFDA
S11304CC0748A3B218BF0748074C29463246A04731
S11304DCF0BD0020F0BD0020F0BD00BFF50200000F
S11304EC4001002044030020E10300002DE9F04703
S11304FC484E0F460446B047013C0546E019B04748
S113050CA5F1FF010746484240EB0100FF2F08BF4D
S113051C40F0010000287AD1BD4279D8002D70D06A
S113052C0F2F75D83C4B1E78A6F14702534243EB70
S113053C0203492E08BF43F0010333B9482E14BFFC
S113054C4FF400664FF4805601E04FF40076DFF868
S113055CCC80DFF8D0A0C1460024D04799F80830ED
S113056CAB4204D10C235C432C4B1C5906E00134E4
S113057C0F2C09F10C09F0D14FF0FF34DFF89C90EB
S113058CDFF8A0A00025D04799F80830BB4205D16C
S113059C0C235D43214B53F8059006E001350F2DD8
S11305AC09F10C09EFD14FF0FF39DFF878A00025E1
S11305BCD04798F80830BB4205D1184B0C2202FBEB
S11305CC05356B6805E001350F2D08F10C08EFD1EA
S11305DC0023C4EB09099944B9FBF6F91FFA89F90C
S11305EC0025DFF840800E4F06E0C0472046B84790
S11305FCA41948B90135ADB24D45F6D30120BDE877
S113060CF0872846BDE8F0870020BDE8F08700207D
S113061CBDE8F087F5020000FE81E00FC017000072
S113062C01000020CB0A00000F4B01B51A680132FF
S113063C17D05A68996842F2B8008918DA68891890
S113064C1A6989185A6989189A698918DA698B1888
S113065C5B4201AA42F8043D04216A46034B9847C5
S113066C00E0012008BD00BF40010020A5040000EB
S113067C42F2040318684FF400531B68C01842F28A
S113068C08031B68C01842F20C031B68C01842F222
S113069C10031B68C01842F214031B68C01842F202
S11306AC18031B68C01842F2B8031B68C018D0F1B9
S11306BC010038BF00207047094800B503680133B6
S11306CC02D0084B984748B107480368013302D05D
S11306DC044B984710B1054B984701205DF804FB77
S11306EC4001002031030000440300200D150000DC
S11306FC00B5024B98475DF804FB00BF8104000071
S113070C00B5024B98475DF804FB00BFA50400003C
S113071C00B5024B98475DF804FB00BFF9040000D8
S113072C00B5024B98475DF804FB00BF7D06000042
S113073C00B5034B984708B1024B98475DF804FB8E
S113074C35060000C5060000054B002243F2AF61DC
S113075C1A60596005219A601960024B1A8070471F
S113076C10E000E048050020014B00221A6070479D
S113077C10E000E0044B1B68DB0303D5034B1A8821
S113078C01321A80704700BF10E000E048050020D9
S113079C00B5034B9847034B18885DF804FB00BF66
S11307AC810700004805002030B5204D86B06C460A
S11307BC0FCD0FC495E8030084E803001C4C012101
S11307CC1C48A0471C4D0220062104220123A847E3
S11307DC0122002302200721A8470121174D1848A4
S11307ECA04702211748184B984728460121174B5C
S11307FC984728460121A047154C002506A941F825
S113080C185D20466946134B9847204629464FF4F9
S113081C1652114B984703236365042363632046E4
S113082C05210E4B984706B030BD00BF741800006C
S113083C0D10000000C202006D13000040151600DC
S113084C002304000300120079120000E10E0000E2
S113085C0044084075140000F51300004514000012
S113086C2DE9F043CDB2402D814603D91A486821B5
S113087C1A4B98471A4CA368D8060AD52046294621
S113088C184B9847184E00E0B047A368D906FBD51F
S113089C03E011486B21114B9847114E0024124F61
S11308ACB04614E0B847B36819F80410DA0609D551
S11308BC0B480C4B984700E0B847D8F80830DB06D7
S11308CCFAD503E004487321044B98470134A3B2CE
S11308DCAB42E7D3BDE8F0838C1800007509000027
S11308EC00440840D1140000CB0A0000F0B5184CA9
S11308FC0646257817486DB9C36A13F0040323D050
S113090C154B9847154B187001232370144B28462C
S113091C1D70F0BDC36A124D13F004032F7813D06D
S113092C0D4B98470D492B78CF19787001330A7801
S113093CDBB29A422B7009D130460A4B01319847ED
S113094C002323700120F0BD1846F0BD0020F0BD3B
S113095C8C05002000440840C51400004A05002002
S113096C8B050020C1020000034B00B51860034B3B
S113097C034C1960A047FDE7900500209405002066
S113098CCB0A000010B5094B984701280DD0084C30
S113099C2378012B09D1074B9847312805D900231B
S11309AC2370054B9847054B984710BDB90A0000B6
S11309BC980500209D0700007507000095020000B3
S11309CC044B012200B51A70034B9847034B98470C
S11309DC5DF804FB98050020550700009109000000
S11309EC00B5054B9847054B9847054B9847054B65
S11309FC98475DF804FB00BFC90A0000CD0900004C
S1130A0CFD060000350A000000B5044B9847044B62
S1130A1C9847044B98475DF804FB00BFCB0A0000D1
S1130A2C6D0A00009109000001B5FF238DF8003018
S1130A3C00238DF80130064B9847064B9847064B1C
S1130A4C1B78012B02D16846044B984708BD00BFA4
S1130A5CE10A0000B5070000990500201D0B0000F9
S1130A6C00B50548054B9847012802D10248044BB0
S1130A7C98475DF804FB00BF9A050020F9080000B4
S1130A8C1D0B00007047000000B5C9B2024B98471B
S1130A9C024B98475DF804FB6D0800000D0B000039
S1130AAC014B01221A7070479905002000B5024BC6
S1130ABC98475DF804FB00BFFD0A000070477047BF
S1130ACC034BFE22DA7002221871A3F844207047FB
S1130ADCDC050020054B00221A709A6483F843202D
S1130AECA3F844209A705A70704700BFDC050020AC
S1130AFC024B1878003018BF01207047DC05002029
S1130B0C024B002283F84320704700BFDC05002011
S1130B1C70B503780546FF2B774C0FD1E370102387
S1130B2C012200212371402322706272A27261702F
S1130B3C6171A371E371217208227DE02678012E84
S1130B4C40F0D980F32B40D011D8CF2B00F0B780D4
S1130B5C05D8C92B77D0CC2B40F0BA80B6E0D12B7A
S1130B6C00F0A7807CD3D22B40F0B28093E0FA2B18
S1130B7C47D006D8F52B0CD011D3F62B40F0A88017
S1130B8C1FE0FD2B4ED0FE2B59D0FC2B40F0A08047
S1130B9C46E042783F2A66D8201DA16C06E04378D3
S1130BAC3F2B60D84168A1644278201D534B984771
S1130BBCFF23E3706A78A36CD318A3646B780133B6
S1130BCC74E0FF23E370436848E0FF23E3700023E1
S1130BDCA06C69681A4603E01C5C01331219D2B28A
S1130BEC8B42F9D1444B0021DA71120E9A72012214
S1130BFC1A7108221972597259719971A3F8442007
S1130C0C69E0FF23E3703E4B0722A36400232371A6
S1130C1C6371A37123726372A372E271082345E0BA
S1130C2C002056E0FF236278E37000236271237185
S1130C3CA371E37123720622A4F844204BE0002331
S113028C2C1700006509000000B5084B984758B1BD
S113029C074B9847074B9847074B4FF400521A608B
S11302AC42F204031B6898475DF804FB1D07000029
S11302BC9D0A00006507000008ED00E0F0B50C464F
S11302CC95B20646054F06E014F8013B013D06F8CD
S11302DC013BB847ADB2002DF6D1F0BDD70A0000F2
S11302EC00B5024B98475DF804FB00BF55010000B4
S11302FCF0B50C4D0C4F06460024B8472B689E42B3
S113030C09D36A689B189E4205D2064B0C2202FB49
S113031C0434207AF0BD01340C350F2CEDD1FF20C0
S113032CF0BD00BFC0170000D70A00002DE9F1474B
S113033C114B054600689847FF281AD0DFF83C900B
S113034CDFF83C8000242F68261DAB5904EB070A08
S113035C0093C847504669460422C04748B9E2593D
S113036C009B9A4206D1B6F5007F3446EBD10120AE
S113037C00E00020BDE8F887FD020000D70A000069
S113038C79000020114B30B5984204460D4606D036
S113039CB1F5005F05D00E4B984718B910E00D4C21
S11303AC00E01C46EB050DD12368AB420BD0204674
S11303BC40F8045B29464FF40072074B984702E05F
S11303CC044600E00024204630BD00BF400100205C
S11303DC3903000044030020C90200002DE9F04F4A
S11303EC1FFA83F8036821F4FE77013304460D46A3
S11303FC164627F0030706D140F8047B39464FF420
S113040C00721B4B98472368BB4205D020463946E3
S113041C184B9847044630B32368DFF85CA0C3EB51
S113042C050B0BF1040B134DA34440F2FF19D047F9
S113043C231DC3EB0B034B4507D9204607F500716D
S113044CA847044688B100F1040B16F8013B08F1E7
S113045CFF381FFA88F80BF8013BB8F1000FE6D10E
S113046C0120BDE8F08FBDE8F08FBDE8F08F00BF30
S113047CC902000091030000D70A0000054B00B527
S113048C9847054A4FF0FF331360044A13605DF834
S113049C04FB00BFF11400004403002040010020C1
S11304ACF0B5104F05460C461646B847FF2814D035
S11304BC681E0019B847FF2811D025F4FE7323F0E9
S11304CC0303B3F5005F08BF0748A3B218BF07487E
S11304DC074C29463246A047F0BD0020F0BD002051
S11304ECF0BD00BFFD0200004001002044030020C9
S11304FCE90300002DE9F047424E0F460446B0478D
S113050C013C0546E019B047FF2D074673D0FF2880
S113051C74D085426FD8002D6AD00F286BD83A4B13
S113052C1E78472E08D0492E06D0482E14BF4FF4FF
S113053C00664FF4805601E04FF40076DFF8CC806F
S113054CDFF8D0A0C1460024D04799F80830AB425C
S113055C04D10C235C432D4B1C5906E001340F2CA5
S113056C09F10C09F0D14FF0FF34DFF8A090DFF85B
S113057CA4A00025D04799F80830BB4205D10C2320
S113058C5D43224B53F8059006E001350F2D09F11C
S113059C0C09EFD14FF0FF39DFF878A00025D047D4
S11305AC98F80830BB4205D1184B0C2202FB0535D8
S11305BC6B6805E001350F2D08F10C08EFD1002311
S11305CCC4EB09099944B9FBF6F91FFA89F900251A
S11305DCDFF840800E4F06E0C0472046B847A41908
S11305EC48B90135ADB24D45F6D30120BDE8F087CD
S11305FC2846BDE8F0870020BDE8F0870020BDE860
S113060CF08700BFFD020000FE81E00FC017000060
S113061C01000020D70A00000F4B01B51A68013203
S113062C17D05A68996842F2B8008918DA688918A0
S113063C1A6989185A6989189A698918DA698B1898
S113064C5B4201AA42F8043D04216A46034B9847D5
S113065C00E0012008BD00BF40010020AD040000F3
S113066C42F2040318684FF400531B68C01842F29A
S113067C08031B68C01842F20C031B68C01842F232
S113068C10031B68C01842F214031B68C01842F212
S113069C18031B68C01842F2B8031B68C018D0F1C9
S11306AC010038BF00207047094800B503680133C6
S11306BC02D0084B984748B107480368013302D06D
S11306CC044B984710B1054B984701205DF804FB87
S11306DC40010020390300004403002011150000E0
S11306EC00B5024B98475DF804FB00BF8904000079
S11306FC00B5024B98475DF804FB00BFAD04000045
S113070C00B5024B98475DF804FB00BF01050000DF
S113071C00B5024B98475DF804FB00BF6D06000062
S113072C00B5034B984708B1024B98475DF804FB9E
S113073C25060000B5060000054B002243F2AF610C
S113074C1A60596005219A601960024B1A8070472F
S113075C10E000E048050020014B00221A607047AD
S113076C10E000E0044B1B68DB0303D5034B1A8831
S113077C01321A80704700BF10E000E048050020E9
S113078C00B5034B9847034B18885DF804FB00BF76
S113079C710700004805002030B5204D86B06C462A
S11307AC0FCD0FC495E8030084E803001C4C012111
S11307BC1C48A0471C4D0220062104220123A847F3
S11307CC0122002302200721A8470121174D1848B4
S11307DCA04702211748184B984728460121174B6C
S11307EC984728460121A047154C002506A941F835
S11307FC185D20466946134B9847204629464FF40A
S113080C1652114B984703236365042363632046F4
S113081C05210E4B984706B030BD00BF741800007C
S113082C0D10000000C202006D13000040151600EC
S113083C002304000300120079120000E10E0000F2
S113084C0044084079140000FD1300004914000012
S113085C2DE9F043CDB2402D814603D91A486821C5
S113086C1A4B98471A4CA368D8060AD52046294631
S113087C184B9847184E00E0B047A368D906FBD52F
S113088C03E011486B21114B9847114E0024124F71
S113089CB04614E0B847B36819F80410DA0609D561
S11308AC0B480C4B984700E0B847D8F80830DB06E7
S11308BCFAD503E004487321044B98470134A3B2DE
S11308CCAB42E7D3BDE8F0838C1800006509000047
S11308DC00440840D5140000D70A0000F0B5184CA9
S11308EC0646257817486DB9C36A13F0040323D060
S11308FC154B9847154B187001232370144B28463D
S113090C1D70F0BDC36A124D13F004032F7813D07D
S113091C0D4B98470D492B78CF19787001330A7811
S113092CDBB29A422B7009D130460A4B01319847FD
S113093C002323700120F0BD1846F0BD0020F0BD4B
S113094C8C05002000440840C91400004A0500200E
S113095C8B050020C9020000034B00B51860034B43
S113096C034C1960A047FDE7900500209405002076
S113097CD70A000010B50A4B984701280ED0094C31
S113098C2378012B0AD1084B9847084B1B68323348
S113099C984203D300232370054B984710BD00BF26
S11309ACC50A0000980500208D0700009C05002056
S11309BC95020000054B012200B51A70044B9847B0
S11309CC044B1860044B98475DF804FB9805002011
S11309DC8D0700009C0500208109000000B5064B22
S11309EC9847064B9847064B9847064B9847064B37
S11309FC98475DF804FB00BFD50A000045070000CA
S1130A0CED060000410A0000C109000000B5054BC9
S1130A1C9847054B9847054B9847054B98475DF805
S1130A2C04FB00BFD70A000071070000790A00001C
S1130A3C8109000001B5FF238DF8003000238DF8E7
S1130A4C0130064B9847064B9847064B1B78012BF5
S1130A5C02D16846044B984708BD00BFED0A00005C
S1130A6CA5070000A0050020290B000000B50548CF
S1130A7C054B9847012802D10248044B98475DF86E
S1130A8C04FB00BFA1050020E9080000290B0000AD
S1130A9C7047000000B5C9B2024B9847024B984707
S1130AAC5DF804FB5D080000190B0000014B0122EA
S1130ABC1A707047A005002000B5024B98475DF8EA
S1130ACC04FB00BF090B000070477047034BFE2268
S1130ADCDA7002221871A3F844207047E405002050
S1130AEC054B00221A709A6483F84320A3F844201F
S1130AFC9A705A70704700BFE4050020024B1878B6
S1130B0C003018BF01207047E4050020024B00227E
S1130B1C83F84320704700BFE405002070B50378C8
S1130B2C0546FF2B744C0ED1E370102300210122D7
S1130B3C23714023617022706171A371E37121727E
S1130B4C6272A2726CE02678012E40F0D480F32BF2
S1130B5C40D011D8CF2B00F0B28005D8C92B72D05D
S1130B6CCC2B40F0B580B1E0D12B00F0A28077D330
S1130B7CD22B40F0AD808EE0FA2B44D006D8F52B66
S1130B8C0CD011D3F62B40F0A3801FE0FD2B4BD0DF
S1130B9CFE2B54D0FC2B40F09B8043E042783F2A40
S1130BAC61D8201DA16C06E043783F2B5BD84168CB
S1130BBCA1644278201D514B9847FF23E3706A7857
S1130BCCA36CD318A3646B7801336FE0FF23E37039
S1130BDC436843E0FF23E3700023A06C69681A4662
S1130BEC03E01C5C01331219D2B28B42F9D1424B93
S1130BFCC3F8072001221A7100225A719A71082233
S1130C0CA3F8442067E0FF23E3703D4B0722A36461
S1130C1C002323716371A371E27123726372A37253
S1130C2C082343E0002054E0FF236278E3700023A0
S1130C3C2371A371E37123726271062336E00023DE
S1130C4C237063703DE0421C3F21A06C2D4B9847F0
S1130C5C00283BD0FF23E370A36C3F33A36432E042
S1130C6C43783E2B01D9222033E0FF23E370A4F810
@ -208,9 +208,9 @@ S1130CBC11E0A06C6968154B984710B906E0144B09
S1130CCC9847FF23E370A4F8446004E0312000E06B
S1130CDC2020104B9847084C94F84330012B02D138
S1130CEC10200C4B9847012384F84330B4F844107B
S1130CFC09480A4B984770BDDC050020C10200006E
S1130D0C161900000D0700003D0700001D07000028
S1130D1CE5020000CD0A0000DF050020950A000062
S1130CFC09480A4B984770BDE4050020C90200005E
S1130D0C10190000FD0600002D0700000D0700005F
S1130D1CED020000D90A0000E7050020A10A00003A
S1130D2C1C4AD36A03F47053B3F5805F2DD0B3F52A
S1130D3C005F03D0B3F5006F05D101E0164B00E062
S1130D4C164B18687047D36803F4E063B3F5007F5F
@ -220,24 +220,24 @@ S1130D7C01E00B4870470B4870470B4870470B4811
S1130D8C70470B487047002070474FF40040704781
S1130D9C0848704700800C40380100203C010020BA
S1130DAC003FAB01809FD500C0D8A700C0CF6A001C
S1130DBC40420F00406F400100B5054B9847054B6E
S1130DCC5B6803F00F03D840034B18605DF804FB19
S1130DDC2D0D000000800C402806002070474FF4B5
S1130DEC00407047014B1868704700BF3801002061
S1130DFC0A494B6803F00702032A0CD8DFE802F017
S1130E0C0202070723F0070343F0010303E023F076
S1130E1C070343F003034B60704700BF00000C4012
S1130E2C104A10B5104C11498218A2424B680BD8C9
S1130E3C03F00702023A012A23F0070394BF43F09C
S1130E4C030343F001030BE0094A904208D803F072
S1130E5C0702023A012A23F0070398BF43F0020366
S1130E6C4B6010BDFFDB0BFFFF23F40000000C40B4
S1130E7C0024F400034B5A6DD20702D41A6D1042AD
S1130E8CFCD1704700800C400E4B40009B6A00B5AF
S1130E9C33FA00F000F00300022806D0032808D02F
S1130EAC012808BF084B09D100E0084B98475DF8AE
S1130EBC04FB074B984740085DF804FB00205DF8E1
S1130ECC04FB00BF00800C40EB0D0000F10D000092
S1130DBC40420F00406F400100B5064B9847064B6C
S1130DCC5B6803F00F0320FA03F0044B18605DF822
S1130DDC04FB00BF2D0D000000800C4030060020E9
S1130DEC70474FF400407047014B1868704700BFC0
S1130DFC380100200A494B6803F00702032A0CD877
S1130E0CDFE802F00202070723F0070343F00103B3
S1130E1C03E023F0070343F003034B60704700BF68
S1130E2C00000C40104A10B5104C11498218A24213
S1130E3C4B680BD803F00702023A012A23F007038C
S1130E4C94BF43F0030343F001030BE0094A9042BF
S1130E5C08D803F00702023A012A23F0070398BFCB
S1130E6C43F002034B6010BDFFDB0BFFFF23F400C8
S1130E7C00000C400024F400034B5A6DD20702D43A
S1130E8C1A6D1042FCD1704700800C400D4B400091
S1130E9C9B6A00B523FA00F000F00300022805D089
S1130EAC032807D001280AD1074B00E0074B9847C9
S1130EBC5DF804FB064B984740085DF804FB0020E2
S1130ECC5DF804FB00800C40EF0D0000F50D0000F4
S1130EDCC50D0000C0F30313013B10B50C46032BE6
S1130EEC7FD8DFE803F0020E2058B1FA81F43D4BB1
S1130EFCE4B29A68C4F11F0422F00F0214439C60FC
@ -255,173 +255,172 @@ S1130FAC98421ED10EE04020134B9847B4FA84F4B7
S1130FBC0C4BE4B21A6FC4F11F0422F00302144365
S1130FCC1C6710BD40200C4B9847B4FA84F4054BB5
S1130FDCE4B21A6FC4F11F0422F0300242EA041482
S1130FEC1C6710BD00800C40FD0D0000C50D0000F9
S1130FFC2D0E000030140A00810E00004005140070
S1130FEC1C6710BD00800C40010E0000C50D0000F4
S1130FFC310E000030140A00850E00004005140068
S113100CC0F30322013A70B50346CDB2052A20D8A9
S113101CDFE802F0031206090C0F00200D4C0DE062
S113102C00200D4C0AE001200C4C07E010200C4C65
S113103C04E000200B4C01E00B4C0020C3F30436FD
S113104C08B10A4B984704F1047406EBC406B600C5
S113105C356070BD08800C4040800C4058800C40BA
S113106C60800C4078800C4044800C40810E000061
S113107C00F00F000138032829D8DFE800F0041829
S113108C240207207047144BD86A00F47050B0F552
S113106C60800C4078800C4044800C40850E00005D
S113107C00F00F000138032827D8DFE800F004182B
S113108C220207207047134BD86A00F47050B0F555
S113109C805F0AD0B0F5005F05D0B0F5006F0CBFCF
S11310AC04200520704702207047032070470A4B28
S11310BC9B6A03F003035A1E022A0AD8074AD31860
S11310CC13F8010C7047044B01209B6A70470020F5
S11310DC70470120704700BF00800C401E190000AF
S11310EC00F47810B0F5402F00B542D013D8B0F509
S11310FC802F2AD005D8002875D0B0F5003F76D1C2
S113110C1EE0B0F5002F24D0B0F5202F29D0B0F577
S113111CC02F6CD11BE0B0F5A01F47D006D8B0F59A
S113112C602F2ED0B0F5901F61D13AE0B0F5C01FFE
S113113C4ED0B0F5D01F53D0B0F5B01F57D13DE011
S113114C2E4B98472E4B9B6808E02E4B4CE000200E
S113115C28E02D4B00209847294B9B6E03F00F037E
S113116C33E0294B00209847254B9B6EC3F30313A4
S113117C2BE0254B00209847214B9B6EC3F3012396
S113118C23E0214B002098471D4B9A6EDB6FC2F372
S113119C0122D04003F007030133B0FBF3F05DF8F8
S11311AC04FB0120184B98475DF804FB164B0120F7
S11311BC9847134B1B6F03F0030306E0124B0120FB
S11311CC98470F4B1B6FC3F30113D8405DF804FB16
S11310AC0420052070470220704703207047094B29
S11310BC9B6A03F00303013B022B08D8064AD05C5D
S11310CC7047044B01209B6A704700207047012035
S11310DC704700BF00800C401819000000F4781011
S11310ECB0F5402F00B542D013D8B0F5802F2AD0DC
S11310FC05D8002877D0B0F5003F78D11EE0B0F5C4
S113110C002F24D0B0F5202F29D0B0F5C02F6ED1EC
S113111C1BE0B0F5A01F48D006D8B0F5602F2ED038
S113112CB0F5901F63D13BE0B0F5C01F50D0B0F5C3
S113113CD01F55D0B0F5B01F59D13EE02F4B984776
S113114C2F4B9B6808E02F4B4EE0002029E02E4BE0
S113115C002098472A4B9B6E03F00F0334E02A4B74
S113116C00209847264B9B6EC3F303132CE0264BAD
S113117C00209847224B9B6EC3F3012324E0224B9F
S113118C002098471E4B9A6EDB6FC2F3012220FAA3
S113119C02F003F007030133B0FBF3F05DF804FB3A
S11311AC0120194B98475DF804FB174B0120984715
S11311BC134B1B6F03F0030306E0134B01209847FA
S11311CC0F4B1B6FC3F3011320FA03F05DF804FB00
S11311DC0E480F4B9847072802D008280AD102E082
S11311EC0C485DF804FB054B98475DF804FB0020A4
S11311FC5DF804FB00205DF804FB00BF2D0D00001E
S113120C00800C40C50D0000950E00000400180071
S113120C00800C40C50D0000990E0000040018006D
S113121C7D100000809FD50010B5C9B2D2B204284D
S113122C1FD8DFE800F00C0911030600012002238B
S113123C0CE01020202309E04020802306E04FF42A
S113124C80704FF4007301E004200823054C29B18D
S113125C206222B1E26A1342FCD000E02362024B0A
S113126C984710BD00800C404113000010B500F0ED
S113127C0F04012C03D04DD3032C4BD820E002399E
S113128C032947D8DFE801F0020B050800200424E9
S113127C0F04012C03D04ED3032C4CD820E002399C
S113128C032948D8DFE801F0020B050800200424E8
S113129C07E00220044604E00320012401E00120BD
S11312AC032401210A461C4B98471C4B98471C4BA2
S11312BC5C621C4B98471C4B98471C4B984710BDC1
S11312CC0139022C14BF02240024052922D8DFE89A
S11312DC01F016030A21211101210F4B00200A46AB
S11312CC0139022C14BF02240024052923D8DFE899
S11312DC01F016030A22221101210F4B00200A46A9
S11312EC984702230CE001200B4B01460246984719
S11312FC012305E00E4B01221A60032300E00023B6
S113130C0320A34010FA04F4054A916A21EA040468
S113131C2343936210BD00BF25120000FD0D000095
S113132C00800C4041130000C50D00002D0E000080
S113130C032003FA04F300FA04F4054A916A21EA6F
S113131C04042343936210BD25120000010E000047
S113132C00800C4041130000C50D0000310E00007C
S113133C08089043024BDA6A024B1A80704700BFCC
S113134C00800C402C06002024225043034B1A58D6
S113134C00800C403406002024225043034B1A58CE
S113135C22F0030211431950704700BF0060004093
S113136CF0B55AB124244443012504F180448D4042
S113137C04F5C0440BB1256100E065614FF0240411
S113138C04FB00F4072904F1804404F5C0440AD892
S113139C8D000F26AE4012FA05F5676827EA06069B
S11313AC354365600AE08D00203D0F26AE4012FAED
S11313BC05F5A76827EA06063543A56062B9242219
S11313CC5043012400F1804014FA01F100F5C040AF
S11313DC0BB10161F0BD4161F0BD036CDB0702D4BC
S11313EC436C1942FCD1704730B50446154669B9B3
S11313FC0C4B984206D003F58063984208BF0A4808
S113140C0ED100E009480A4B984701464901B1FB4B
S113141CF5F5203DED0020460421064B9847E56088
S113142C30BD00BF004008404015160040051400B4
S113143CED100000E713000030B5CD4305F00505B1
S113144C044641EA4505024B02219847656030BDCC
S113145CE7130000C9B229B1436C002BFCD1012362
S113146C036470470164704770B5104B0D4602213C
S113147C044698470A236360204601210C4EB0476A
S113148C2969EB6822680B43696922F01C020B433F
S113149C1343236020466968AA68064B98472B6857
S11314AC204663600021B04770BD00BFE713000005
S11314BC61140000F513000083689A06FCD5C0691A
S11314CCC0B2704730B50446CDB2A368D806FCD57B
S11314DC20464021014B9847A56230BDE71300001C
S11314EC064B9A6842F001029A6041F67132DA6353
S11314FC9A6822F001029A60704700BF00000C4009
S113150C054B9A6842F001029A600022DA639A68E9
S113151C22F001029A60704700000C40064B1A69D5
S113152C02F03F0202709A69DB6902F0F002C3F325
S113153C0313134343707047D0FF0FE0554B01B5B1
S113154C9847554B1B681B0E0ED1544B1A6822F04E
S113155C70021A60524B1A6822F060421A601A68C0
S113156C62F060621A6001E0032B0BD84C4B1A68D2
S113157C22F4FC521A604B4A0023136053609361AB
S113158C13629363484B684698479DF80030012BCF
S113159C10D19DF8013023B9424B1A6842F0020273
S11315AC1A609DF80130012B9FBF404B1A6842F022
S11315BC01021A603E4B1A683E4B9A4220D83B4BB0
S11315CC1A6842F490421A603B4A10681168156814
S11315DC146805F4FE4204F07F04224301F07F01F9
S11315EC42EA0141C0F30620344A41EA0061116029
S11315FC334A1168334A11601A6822F490421A6013
S113160C012100200A46304B9847304B304C1A6C61
S113161C002142F00F021A645A6C2E486FEA1242EF
S113162C6FEA02425A64A04700212B48A0470021CC
S113163C2A48A04700212A48A04700212948A0474E
S113164C00212948A04700212848A0470021284808
S113165CA04700212748A04700212748A047002184
S113166C2648A04700212648A04700212548A0472A
S113167C00212548A0470120092103460522234CBB
S113168CA04701200221224B9847224B9847224C19
S113169CA047FDE7E90D0000FC81E00F0CA00C4015
S11316AC20600C4040800C402915000044800C4004
S11316BCF081E00FFFB98A4CB481E00F3420004074
S11316CCC881E00F2C4000402512000000800C4023
S11316DC0D10000000030400001304000033040088
S11316EC00A202000002020000120200002202000A
S11316FC00320200007202000082020000B20200FA
S113170C00E2020000F2020000D202006D1300009D
S10F171C55130000ED090000150A000040
S1131728443A2F7573722F6665617365722F736FF0
S11317386674776172652F4F70656E424C542F54EE
S113174861726765742F44656D6F2F41524D434D27
S1131758335F45464D33325F4F6C696D65785F453D
S11317684D3332473838304631323853544B5F435F
S1131778726F7373776F726B732F426F6F742F6905
S113178864652F2E2E2F2E2E2F2E2E2F2E2E2F53D6
S11317986F757263652F41524D434D335F45464D16
S11317A833322F43726F7373776F726B732F76654F
S11317B863746F72732E6300002000000020000021
S11317C801000000004000000020000002000000AA
S11317D800600000002000000300000000800000FA
S11317E8002000000400000000A000000020000009
S11317F80500000000C000000020000006000000F2
S113180800E00000002000000700000000000100C4
S11318180020000008000000002001000020000053
S11318280900000000400100002000000A00000038
S113183800600100002000000B000000008001008F
S1131848002000000C00000000A00100002000009F
S11318580D00000000C00100002000000E00000080
S113186800E00100002000000F0000000500000057
S113187800000000802500000000000000000000B7
S113188800000000443A2F7573722F666561736512
S1131898722F736F6674776172652F4F70656E422D
S11318A84C542F5461726765742F44656D6F2F41D2
S11318B8524D434D335F45464D33325F4F6C696D2E
S11318C865785F454D3332473838304631323853BE
S11318D8544B5F43726F7373776F726B732F426FDE
S11318E86F742F6964652F2E2E2F2E2E2F2E2E2FD8
S11318F82E2E2F536F757263652F41524D434D330E
S11319085F45464D33322F756172742E63004F70F4
S10C1918656E424C540003020602
S11319241B4B10B59A6842F001029A6001221861B7
S1131934DA60DA69510706D59A684FF0FF3022F06D
S113194401029A6010BDDA69920706D59A686FF0AD
S1131954010022F001029A6010BD0222DA600D4AED
S113196400E0013AD8690A4910F001000C4602D09B
S1131974002AF6D100E032B9A3686FF0020023F024
S11319840103A36010BD8B6823F001038B6010BDB9
S113199400000C40809698002D4B2DE9F0419C6882
S11319A4921044F001049C6000254FF001081F4686
S11319B44FF0080C41E01861C3F80C80DE6916F09E
S11319C4040F07D0A3684FF0FF3023F00103A36092
S11319D4BDE8F081DE6916F0020F09D0A3686FF048
S11319E4010023F00103A360BDE8F081013C00E0A1
S11319F4184CDE6916F0080F154E02D1002CF5D1EF
S1131A0412E08CB151F8044BBC61C7F80CC0114C02
S1131A1400E0013CDE6916F0010F0D4E02D0002CEB
S1131A24F7D101E004303CB9B3686FF0020023F04D
S1131A340103B360BDE8F08101359542044CBADB7F
S1131A44A368002023F00103A360BDE8F08100BF74
S10B1A5400000C40809698008C
S10B1A5C008000000048E801CD
S113136CF0B562B124244443012504F1804405FA08
S113137C01F504F5C0440BB1256100E065614FF043
S113138C240404FB00F4072904F1804404F5C0444C
S113139C0BD88D000F2606FA05F602FA05F56768D8
S11313AC27EA0606354365600BE08D00203D0F26C9
S11313BC06FA05F602FA05F5A76827EA0606354388
S11313CCA56062B924225043012400F1804004FA40
S11313DC01F100F5C0400BB10161F0BD4161F0BDFC
S11313EC036CDB0702D4436C1942FCD17047000038
S11313FC30B50446154661B90B4B984205D003F53C
S113140C806398420FD1094800E00948094B98477A
S113141C01464901B1FBF5F5203DED0020460421C0
S113142C054B9847E56030BD004008404015160058
S113143C40051400E9100000ED13000030B5CD4355
S113144C05F00505044641EA4505024B022198477F
S113145C656030BDED130000C9B229B1436C002B9B
S113146CFCD10123036470470164704770B5104BC1
S113147C0D460221044698470A2363602046012145
S113148C0C4EB0472969EB6822680B43696922F05A
S113149C1C020B431343236020466968AA68064B5D
S11314AC98472B68204663600021B04770BD00BF8D
S11314BCED13000065140000FD13000083689A0608
S11314CCFCD5C069C0B2704730B50446CDB2A36830
S11314DCD806FCD520464021014B9847A56230BD67
S11314ECED130000064B9A6842F001029A6041F633
S11314FC7132DA639A6822F001029A60704700BF75
S113150C00000C40054B9A6842F001029A600022DC
S113151CDA639A6822F001029A60704700000C406A
S113152C064B1A6902F03F0202709A69DB6902F0F9
S113153CF002C3F30313134343707047D0FF0FE05F
S113154C554B01B59847554B1B681B0E0ED1544B8C
S113155C1A6822F070021A60524B1A6822F0604228
S113156C1A601A6862F060621A6001E0032B0BD8EF
S113157C4C4B1A6822F4FC521A604B4A0023136039
S113158C5360936113629363484B684698479DF884
S113159C0030012B10D19DF8013023B9424B1A684D
S11315AC42F002021A609DF80130012B04D8404B22
S11315BC1A6842F001021A603E4B1A683E4B9A427A
S11315CC20D83B4B1A6842F490421A603B4A10688C
S11315DC11681568146805F4FE4204F07F04224374
S11315EC01F07F0142EA0141C0F30620344A41EA8A
S11315FC00611160334A1168334A11601A6822F48D
S113160C90421A60012100200A46304B9847304B17
S113161C304C1A6C002142F00F021A645A6C2E489A
S113162C6FEA12426FEA02425A64A04700212B4827
S113163CA04700212A48A04700212A48A04700219E
S113164C2948A04700212948A04700212848A04741
S113165C00212848A04700212748A04700212748FB
S113166CA04700212648A04700212648A047002176
S113167C2548A04700212548A047012009210346FD
S113168C0522234CA04701200221224B9847224BD0
S113169C9847224CA047FDE7ED0D0000FC81E00FBC
S11316AC0CA00C4020600C4040800C402D15000018
S11316BC44800C40F081E00FFFB98A4CB481E00FF8
S11316CC34200040C881E00F2C400040251200005B
S11316DC00800C400D1000000003040000130400F3
S11316EC0033040000A202000002020000120200F7
S11316FC002202000032020000720200008202008A
S113170C00B2020000E2020000F2020000D2020069
S113171C6D13000055130000E9090000190A0000BC
S113172C433A2F576F726B2F736F667477617265C0
S113173C2F4F70656E424C542F5461726765742F31
S113174C44656D6F2F41524D434D335F45464D33C8
S113175C325F4F6C696D65785F454D33324738386D
S113176C304631323853544B5F43726F7373776F17
S113177C726B732F426F6F742F6964652F2E2E2F2B
S113178C2E2E2F2E2E2F2E2E2F536F757263652F08
S113179C41524D434D335F45464D33322F43726FA7
S11317AC7373776F726B732F766563746F72732EAA
S11317BC6300000000200000002000000100000075
S11317CC0040000000200000020000000060000047
S11317DC0020000003000000008000000020000036
S11317EC0400000000A00000002000000500000020
S11317FC00C00000002000000600000000E0000013
S113180C0020000007000000000001000020000080
S113181C0800000000200100002000000900000066
S113182C00400100002000000A00000000600100DC
S113183C002000000B0000000080010000200000CC
S113184C0C00000000A00100002000000D000000AE
S113185C00C00100002000000E00000000E00100A8
S113186C002000000F000000050000000000000034
S113187C80250000000000000000000000000000B3
S113188C433A2F576F726B2F736F6674776172655F
S113189C2F4F70656E424C542F5461726765742FD0
S11318AC44656D6F2F41524D434D335F45464D3367
S11318BC325F4F6C696D65785F454D33324738380C
S11318CC304631323853544B5F43726F7373776FB6
S11318DC726B732F426F6F742F6964652F2E2E2FCA
S11318EC2E2E2F2E2E2F2E2E2F536F757263652FA7
S11318FC41524D434D335F45464D33322F75617222
S112190C742E63004F70656E424C540003020644
S113191C1B4B10B59A6842F001029A6001221861BF
S113192CDA60DA69510706D59A684FF0FF3022F075
S113193C01029A6010BDDA69920706D59A686FF0B5
S113194C010022F001029A6010BD0222DA600D4AF5
S113195C00E0013AD8690A4910F001000C4602D0A3
S113196C002AF6D100E032B9A3686FF0020023F02C
S113197C0103A36010BD8B6823F001038B6010BDC1
S113198C00000C40809698002D4B2DE9F0419C688A
S113199C921044F001049C6000254FF001081F468E
S11319AC4FF0080C41E01861C3F80C80DE6916F0A6
S11319BC040F07D0A3684FF0FF3023F00103A3609A
S11319CCBDE8F081DE6916F0020F09D0A3686FF050
S11319DC010023F00103A360BDE8F081013C00E0A9
S11319EC184CDE6916F0080F154E02D1002CF5D1F7
S11319FC12E08CB151F8044BBC61C7F80CC0114C0B
S1131A0C00E0013CDE6916F0010F0D4E02D0002CF3
S1131A1CF7D101E004303CB9B3686FF0020023F055
S1131A2C0103B360BDE8F08101359542044CBADB87
S1131A3CA368002023F00103A360BDE8F08100BF7C
S10B1A4C00000C408096980094
S10B1A54008000000048E801D5
S9030155A6

5
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/config.h
View File

@ -41,10 +41,15 @@
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
* big endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
#define BOOT_CPU_XTAL_SPEED_KHZ (32000)
#define BOOT_CPU_SYSTEM_SPEED_KHZ (14000)
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
/****************************************************************************************

24
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/hooks.c
View File

@ -67,6 +67,30 @@ blt_bool BackDoorEntryHook(void)
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
/****************************************************************************************
* C P U D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/****************************************************************************************
** NAME: CpuUserProgramStartHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
** keep the bootloader active.
** DESCRIPTION: Callback that gets called when the bootloader is about to exit and
** hand over control to the user program. This is the last moment that
** some final checking can be performed and if necessary prevent the
** bootloader from activiting the user program.
**
****************************************************************************************/
blt_bool CpuUserProgramStartHook(void)
{
/* okay to start the user program */
return BLT_TRUE;
} /*** end of CpuUserProgramStartHook ***/
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
****************************************************************************************/

33
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/ide/EFM32G880_crossworks.hzs
View File

@ -2,23 +2,18 @@
<session>
<Bookmarks/>
<Breakpoints/>
<ETMWindow>
<ETMRegister number="0" value="800" />
<ETMRegister number="8" value="6f" />
<ETMRegister number="9" value="1000000" />
</ETMWindow>
<ExecutionCountWindow/>
<ExecutionProfileWindow/>
<Memory1>
<MemoryWindow autoEvaluate="0" addressText="0x4000" numColumns="8" sizeText="128" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="0x4000" numColumns="8" sizeText="128" dataSize="1" radix="16" name="openbtl_olimex_efm32g880" addressSpace="" />
</Memory1>
<Memory2>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_olimex_efm32g880" addressSpace="" />
</Memory2>
<Memory3>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_olimex_efm32g880" addressSpace="" />
</Memory3>
<Memory4>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_olimex_efm32g880" addressSpace="" />
</Memory4>
<Project>
<ProjectSessionItem path="EFM32G880_crossworks" name="unnamed" />
@ -26,22 +21,18 @@
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files" name="unnamed" />
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Demo" name="unnamed" />
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Demo;Boot" name="unnamed" />
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source" name="unnamed" />
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source;ARMCM3_EFM32" name="unnamed" />
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source;ARMCM3_EFM32;Crossworks" name="unnamed" />
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;System Files" name="unnamed" />
</Project>
<Register1>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_olimex_efm32g880" />
</Register1>
<Register2>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_olimex_efm32g880" />
</Register2>
<Register3>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_olimex_efm32g880" />
</Register3>
<Register4>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_olimex_efm32g880" />
</Register4>
<TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
<TraceWindow>
@ -60,9 +51,7 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="8" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" y="37" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="36" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\cpu.c" y="43" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\cpu.c" left="0" selected="0" name="unnamed" top="37" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\flash.c" y="101" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\flash.c" left="0" selected="0" name="unnamed" top="74" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" y="85" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" left="18" selected="1" name="unnamed" top="63" />
</Files>
<ARMCrossStudioWindow activeProject="openbtl_olimex_efm32g880" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
<ARMCrossStudioWindow activeProject="openbtl_olimex_efm32g880" autoConnectTarget="SEGGER J-Link" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
</session>

2
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Boot/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
Rowleys CrossWorks was used as the editor during the development of this software program. This directory contains
Rowleys CrossWorks (version 2.3.1) was used as the editor during the development of this software program. This directory contains
the CrossWorks project and solution files. More info is available at: http://www.rowley.co.uk/

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Prog/bin/demoprog_olimex_efm32g880.elf
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1911
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Prog/bin/demoprog_olimex_efm32g880.map
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File diff suppressed because it is too large Load Diff

1022
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Prog/bin/demoprog_olimex_efm32g880.srec
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25
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Prog/ide/EFM32G880_crossworks.hzs
View File

@ -2,23 +2,18 @@
<session>
<Bookmarks/>
<Breakpoints/>
<ETMWindow>
<ETMRegister number="0" value="800" />
<ETMRegister number="8" value="6f" />
<ETMRegister number="9" value="1000000" />
</ETMWindow>
<ExecutionCountWindow/>
<ExecutionProfileWindow/>
<Memory1>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory1>
<Memory2>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory2>
<Memory3>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory3>
<Memory4>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="" addressSpace="" />
</Memory4>
<Project>
<ProjectSessionItem path="EFM32G880_crossworks" name="unnamed" />
@ -28,16 +23,16 @@
<ProjectSessionItem path="EFM32G880_crossworks;demoprog_olimex_efm32g880;Source Files;Demo;Prog" name="unnamed" />
</Project>
<Register1>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register1>
<Register2>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register2>
<Register3>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register3>
<Register4>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="" />
</Register4>
<TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
<TraceWindow>
@ -56,7 +51,7 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="40" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" y="102" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="76" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" y="21" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="21" />
</Files>
<ARMCrossStudioWindow activeProject="demoprog_olimex_efm32g880" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
</session>

2
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Prog/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
Rowleys CrossWorks was used as the editor during the development of this software program. This directory contains
Rowleys CrossWorks (version 2.3.1) was used as the editor during the development of this software program. This directory contains
the CrossWorks project and solution files. More info is available at: http://www.rowley.co.uk/

53
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks/Prog/memory.x
View File

@ -1,7 +1,6 @@
MEMORY
{
UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
FLASH (rx) : ORIGIN = 0x00002000, LENGTH = 0x00020000 - 0x2000
}
@ -9,10 +8,8 @@ MEMORY
SECTIONS
{
__CM3_System_Control_Space_segment_start__ = 0xe000e000;
__CM3_System_Control_Space_segment_end__ = 0xe000f000;
__RAM_segment_start__ = 0x20000000;
__RAM_segment_end__ = 0x20004000;
__SRAM_segment_start__ = 0x20000000;
__SRAM_segment_end__ = 0x20004000;
__FLASH_segment_start__ = 0x00002000;
__FLASH_segment_end__ = 0x00020000;
@ -25,8 +22,8 @@ SECTIONS
__STACKSIZE_UND__ = 0;
__HEAPSIZE__ = 128;
__vectors_ram_load_start__ = ALIGN(__RAM_segment_start__ , 256);
.vectors_ram ALIGN(__RAM_segment_start__ , 256) (NOLOAD) : AT(ALIGN(__RAM_segment_start__ , 256))
__vectors_ram_load_start__ = ALIGN(__SRAM_segment_start__ , 256);
.vectors_ram ALIGN(__SRAM_segment_start__ , 256) (NOLOAD) : AT(ALIGN(__SRAM_segment_start__ , 256))
{
__vectors_ram_start__ = .;
*(.vectors_ram .vectors_ram.*)
@ -35,7 +32,7 @@ SECTIONS
__vectors_ram_load_end__ = __vectors_ram_end__;
. = ASSERT(__vectors_ram_end__ >= __RAM_segment_start__ && __vectors_ram_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .vectors_ram is too large to fit in RAM memory segment");
. = ASSERT(__vectors_ram_end__ >= __SRAM_segment_start__ && __vectors_ram_end__ <= __SRAM_segment_end__ , "error: .vectors_ram is too large to fit in SRAM memory segment");
__vectors_load_start__ = ALIGN(__FLASH_segment_start__ , 256);
.vectors ALIGN(__FLASH_segment_start__ , 256) : AT(ALIGN(__FLASH_segment_start__ , 256))
@ -47,7 +44,7 @@ SECTIONS
__vectors_load_end__ = __vectors_end__;
. = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .vectors is too large to fit in FLASH memory segment");
. = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= __FLASH_segment_end__ , "error: .vectors is too large to fit in FLASH memory segment");
__init_load_start__ = ALIGN(__vectors_end__ , 4);
.init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
@ -59,7 +56,7 @@ SECTIONS
__init_load_end__ = __init_end__;
. = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .init is too large to fit in FLASH memory segment");
. = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= __FLASH_segment_end__ , "error: .init is too large to fit in FLASH memory segment");
__text_load_start__ = ALIGN(__init_end__ , 4);
.text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
@ -71,7 +68,7 @@ SECTIONS
__text_load_end__ = __text_end__;
. = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .text is too large to fit in FLASH memory segment");
. = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= __FLASH_segment_end__ , "error: .text is too large to fit in FLASH memory segment");
__dtors_load_start__ = ALIGN(__text_end__ , 4);
.dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
@ -83,7 +80,7 @@ SECTIONS
__dtors_load_end__ = __dtors_end__;
. = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .dtors is too large to fit in FLASH memory segment");
. = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= __FLASH_segment_end__ , "error: .dtors is too large to fit in FLASH memory segment");
__ctors_load_start__ = ALIGN(__dtors_end__ , 4);
.ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
@ -95,7 +92,7 @@ SECTIONS
__ctors_load_end__ = __ctors_end__;
. = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .ctors is too large to fit in FLASH memory segment");
. = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= __FLASH_segment_end__ , "error: .ctors is too large to fit in FLASH memory segment");
__rodata_load_start__ = ALIGN(__ctors_end__ , 4);
.rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
@ -107,7 +104,7 @@ SECTIONS
__rodata_load_end__ = __rodata_end__;
. = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .rodata is too large to fit in FLASH memory segment");
. = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= __FLASH_segment_end__ , "error: .rodata is too large to fit in FLASH memory segment");
__ARM.exidx_load_start__ = ALIGN(__rodata_end__ , 4);
.ARM.exidx ALIGN(__rodata_end__ , 4) : AT(ALIGN(__rodata_end__ , 4))
@ -121,7 +118,7 @@ SECTIONS
__exidx_end = __ARM.exidx_end__;
__ARM.exidx_load_end__ = __ARM.exidx_end__;
. = ASSERT(__ARM.exidx_end__ >= __FLASH_segment_start__ && __ARM.exidx_end__ <= (__FLASH_segment_start__ + 0x00020000) , "error: .ARM.exidx is too large to fit in FLASH memory segment");
. = ASSERT(__ARM.exidx_end__ >= __FLASH_segment_start__ && __ARM.exidx_end__ <= __FLASH_segment_end__ , "error: .ARM.exidx is too large to fit in FLASH memory segment");
__fast_load_start__ = ALIGN(__ARM.exidx_end__ , 4);
.fast ALIGN(__vectors_ram_end__ , 4) : AT(ALIGN(__ARM.exidx_end__ , 4))
@ -133,7 +130,7 @@ SECTIONS
__fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
. = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00020000) , "error: .fast is too large to fit in FLASH memory segment");
. = ASSERT(__fast_load_end__ >= __FLASH_segment_start__ && __fast_load_end__ <= __FLASH_segment_end__ , "error: .fast is too large to fit in FLASH memory segment");
.fast_run ALIGN(__vectors_ram_end__ , 4) (NOLOAD) :
{
@ -144,7 +141,7 @@ SECTIONS
__fast_run_load_end__ = __fast_run_end__;
. = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .fast_run is too large to fit in RAM memory segment");
. = ASSERT(__fast_run_end__ >= __SRAM_segment_start__ && __fast_run_end__ <= __SRAM_segment_end__ , "error: .fast_run is too large to fit in SRAM memory segment");
__data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
.data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
@ -156,7 +153,7 @@ SECTIONS
__data_load_end__ = __data_load_start__ + SIZEOF(.data);
. = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00020000) , "error: .data is too large to fit in FLASH memory segment");
. = ASSERT(__data_load_end__ >= __FLASH_segment_start__ && __data_load_end__ <= __FLASH_segment_end__ , "error: .data is too large to fit in FLASH memory segment");
.data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
{
@ -167,7 +164,7 @@ SECTIONS
__data_run_load_end__ = __data_run_end__;
. = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .data_run is too large to fit in RAM memory segment");
. = ASSERT(__data_run_end__ >= __SRAM_segment_start__ && __data_run_end__ <= __SRAM_segment_end__ , "error: .data_run is too large to fit in SRAM memory segment");
__bss_load_start__ = ALIGN(__data_run_end__ , 4);
.bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
@ -179,7 +176,7 @@ SECTIONS
__bss_load_end__ = __bss_end__;
. = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .bss is too large to fit in RAM memory segment");
. = ASSERT(__bss_end__ >= __SRAM_segment_start__ && __bss_end__ <= __SRAM_segment_end__ , "error: .bss is too large to fit in SRAM memory segment");
__non_init_load_start__ = ALIGN(__bss_end__ , 4);
.non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
@ -191,7 +188,7 @@ SECTIONS
__non_init_load_end__ = __non_init_end__;
. = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .non_init is too large to fit in RAM memory segment");
. = ASSERT(__non_init_end__ >= __SRAM_segment_start__ && __non_init_end__ <= __SRAM_segment_end__ , "error: .non_init is too large to fit in SRAM memory segment");
__heap_load_start__ = ALIGN(__non_init_end__ , 4);
.heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
@ -204,7 +201,7 @@ SECTIONS
__heap_load_end__ = __heap_end__;
. = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .heap is too large to fit in RAM memory segment");
. = ASSERT(__heap_end__ >= __SRAM_segment_start__ && __heap_end__ <= __SRAM_segment_end__ , "error: .heap is too large to fit in SRAM memory segment");
__stack_load_start__ = ALIGN(__heap_end__ , 4);
.stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
@ -217,7 +214,7 @@ SECTIONS
__stack_load_end__ = __stack_end__;
. = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .stack is too large to fit in RAM memory segment");
. = ASSERT(__stack_end__ >= __SRAM_segment_start__ && __stack_end__ <= __SRAM_segment_end__ , "error: .stack is too large to fit in SRAM memory segment");
__stack_process_load_start__ = ALIGN(__stack_end__ , 4);
.stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
@ -230,7 +227,7 @@ SECTIONS
__stack_process_load_end__ = __stack_process_end__;
. = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .stack_process is too large to fit in RAM memory segment");
. = ASSERT(__stack_process_end__ >= __SRAM_segment_start__ && __stack_process_end__ <= __SRAM_segment_end__ , "error: .stack_process is too large to fit in SRAM memory segment");
__tbss_load_start__ = ALIGN(__stack_process_end__ , 4);
.tbss ALIGN(__stack_process_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_process_end__ , 4))
@ -242,7 +239,7 @@ SECTIONS
__tbss_load_end__ = __tbss_end__;
. = ASSERT(__tbss_end__ >= __RAM_segment_start__ && __tbss_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .tbss is too large to fit in RAM memory segment");
. = ASSERT(__tbss_end__ >= __SRAM_segment_start__ && __tbss_end__ <= __SRAM_segment_end__ , "error: .tbss is too large to fit in SRAM memory segment");
__tdata_load_start__ = ALIGN(__data_load_start__ + SIZEOF(.data) , 4);
.tdata ALIGN(__tbss_end__ , 4) : AT(ALIGN(__data_load_start__ + SIZEOF(.data) , 4))
@ -256,7 +253,7 @@ SECTIONS
__FLASH_segment_used_end__ = ALIGN(__data_load_start__ + SIZEOF(.data) , 4) + SIZEOF(.tdata);
. = ASSERT((__tdata_load_start__ + SIZEOF(.tdata)) >= __FLASH_segment_start__ && (__tdata_load_start__ + SIZEOF(.tdata)) <= (__FLASH_segment_start__ + 0x00020000) , "error: .tdata is too large to fit in FLASH memory segment");
. = ASSERT(__tdata_load_end__ >= __FLASH_segment_start__ && __tdata_load_end__ <= __FLASH_segment_end__ , "error: .tdata is too large to fit in FLASH memory segment");
.tdata_run ALIGN(__tbss_end__ , 4) (NOLOAD) :
{
@ -267,9 +264,9 @@ SECTIONS
__tdata_run_load_end__ = __tdata_run_end__;
__RAM_segment_used_end__ = ALIGN(__tbss_end__ , 4) + SIZEOF(.tdata_run);
__SRAM_segment_used_end__ = ALIGN(__tbss_end__ , 4) + SIZEOF(.tdata_run);
. = ASSERT(__tdata_run_end__ >= __RAM_segment_start__ && __tdata_run_end__ <= (__RAM_segment_start__ + 0x00004000) , "error: .tdata_run is too large to fit in RAM memory segment");
. = ASSERT(__tdata_run_end__ >= __SRAM_segment_start__ && __tdata_run_end__ <= __SRAM_segment_end__ , "error: .tdata_run is too large to fit in SRAM memory segment");
}

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Boot/bin/openbtl_olimex_efm32g880.bin
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Binary file not shown.

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Boot/bin/openbtl_olimex_efm32g880.elf
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290
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Boot/bin/openbtl_olimex_efm32g880.map
View File

@ -7,223 +7,185 @@ start address 0x00000000
Program Header:
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
filesz 0x000015d3 memsz 0x000015d3 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x000015d3 align 2**15
filesz 0x00000138 memsz 0x00000728 flags rwx
filesz 0x0000152f memsz 0x0000152f flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x0000152f align 2**15
filesz 0x00000150 memsz 0x00000150 flags rwx
LOAD off 0x00010150 vaddr 0x20000150 paddr 0x00001680 align 2**15
filesz 0x00000000 memsz 0x000005f8 flags rw-
private flags = 5000000: [Version5 EABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000015d3 00000000 00000000 00008000 2**3
0 .text 0000152f 00000000 00000000 00008000 2**3
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000138 20000000 000015d3 00010000 2**2
1 .data 00000150 20000000 0000152f 00010000 2**2
CONTENTS, ALLOC, LOAD, CODE
2 .bss 000005f0 20000138 0000170b 00010138 2**2
2 .bss 000005f8 20000150 00001680 00010150 2**2
ALLOC
3 .debug_abbrev 00003f13 00000000 00000000 00010138 2**0
3 .debug_info 000068b0 00000000 00000000 00010150 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000d7e9 00000000 00000000 0001404b 2**0
4 .debug_abbrev 000021f7 00000000 00000000 00016a00 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_line 00005915 00000000 00000000 00021834 2**0
5 .debug_loc 000030be 00000000 00000000 00018bf7 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_pubtypes 00001800 00000000 00000000 00027149 2**0
6 .debug_aranges 000005b8 00000000 00000000 0001bcb5 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_str 000055da 00000000 00000000 00028949 2**0
7 .debug_ranges 00000980 00000000 00000000 0001c26d 2**0
CONTENTS, READONLY, DEBUGGING
8 .comment 0000002a 00000000 00000000 0002df23 2**0
8 .debug_line 000023f2 00000000 00000000 0001cbed 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_str 00001c9b 00000000 00000000 0001efdf 2**0
CONTENTS, READONLY, DEBUGGING
10 .comment 00000030 00000000 00000000 00020c7a 2**0
CONTENTS, READONLY
9 .ARM.attributes 00000031 00000000 00000000 0002df4d 2**0
11 .ARM.attributes 00000033 00000000 00000000 00020caa 2**0
CONTENTS, READONLY
10 .debug_loc 00006519 00000000 00000000 0002df7e 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_pubnames 00001513 00000000 00000000 00034497 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_aranges 00000c70 00000000 00000000 000359aa 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000af8 00000000 00000000 0003661a 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_frame 00001bdc 00000000 00000000 00037114 2**2
12 .debug_frame 00000bdc 00000000 00000000 00020ce0 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .text 00000000 .text
20000000 l d .data 00000000 .data
20000138 l d .bss 00000000 .bss
00000000 l d .debug_abbrev 00000000 .debug_abbrev
20000150 l d .bss 00000000 .bss
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .comment 00000000 .comment
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_pubnames 00000000 .debug_pubnames
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 vectors.c
00000000 l df *ABS* 00000000 cstart.c
000000e2 l F .text 00000000 zero_loop2
0000146e l F .text 00000000 zero_loop
000000e4 l F .text 00000000 zero_loop2
000013c6 l F .text 00000000 zero_loop
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 system_efm32.c
20000000 l O .data 00000004 SystemLFXOClock
20000004 l O .data 00000004 SystemHFXOClock
00000000 l df *ABS* 00000000 efm32_cmu.c
000003c0 l F .text 0000000e BITBAND_Peripheral
000003d0 l F .text 00000030 CMU_FlashWaitStateMax
00000400 l F .text 0000000c CMU_DivToLog2
0000040c l F .text 00000054 CMU_FlashWaitStateControl
00000460 l F .text 00000018 CMU_Sync
00000478 l F .text 0000003c CMU_LFClkGet
000014b0 l O .text 00000003 CSWTCH.5
000014b3 l O .text 00000003 CSWTCH.8
000003c0 l F .text 00000030 CMU_FlashWaitStateMax
000003f0 l F .text 00000054 CMU_FlashWaitStateControl
00000444 l F .text 00000014 CMU_Sync
00000458 l F .text 0000003c CMU_LFClkGet
00001410 l O .text 00000003 CSWTCH.19
00000000 l df *ABS* 00000000 efm32_emu.c
20000138 l O .bss 00000002 cmuStatus
20000150 l O .bss 00000002 cmuStatus
00000000 l df *ABS* 00000000 efm32_gpio.c
00000000 l df *ABS* 00000000 efm32_leuart.c
000009bc l F .text 00000010 LEUART_Sync
00000968 l F .text 0000000e LEUART_Sync
00000000 l df *ABS* 00000000 efm32_msc.c
00000000 l df *ABS* 00000000 efm32_system.c
00000000 l df *ABS* 00000000 boot.c
00000000 l df *ABS* 00000000 com.c
2000013a l O .bss 00000001 comEntryStateConnect
2000013b l O .bss 00000040 xcpCtoReqPacket.1375
20000152 l O .bss 00000001 comEntryStateConnect
20000153 l O .bss 00000040 xcpCtoReqPacket.4167
00000000 l df *ABS* 00000000 xcp.c
00000ba4 l F .text 0000000c XcpProtectResources
00000bb0 l F .text 00000014 XcpSetCtoError
000014b6 l O .text 00000008 xcpStationId
2000017c l O .bss 0000004c xcpInfo
00000b30 l F .text 00000014 XcpSetCtoError
00001413 l O .text 00000008 xcpStationId
20000194 l O .bss 0000004c xcpInfo
00000000 l df *ABS* 00000000 backdoor.c
200001c8 l O .bss 00000001 backdoorOpen
200001e0 l O .bss 00000001 backdoorOpen
200001e4 l O .bss 00000004 backdoorOpenTime
00000000 l df *ABS* 00000000 cop.c
00000000 l df *ABS* 00000000 assert.c
200001cc l O .bss 00000004 assert_failure_file
200001d0 l O .bss 00000004 assert_failure_line
200001e8 l O .bss 00000004 assert_failure_file
200001ec l O .bss 00000004 assert_failure_line
00000000 l df *ABS* 00000000 cpu.c
00000000 l df *ABS* 00000000 uart.c
00000e94 l F .text 00000020 UartReceiveByte
00000eb4 l F .text 00000030 UartTransmitByte
200001d4 l O .bss 00000041 xcpCtoReqPacket.2673
20000215 l O .bss 00000001 xcpCtoRxLength.2674
20000216 l O .bss 00000001 xcpCtoRxInProgress.2675
000014e4 l O .text 00000010 C.4.3618
200001f0 l O .bss 00000001 xcpCtoRxLength.5470
200001f1 l O .bss 00000041 xcpCtoReqPacket.5469
20000232 l O .bss 00000001 xcpCtoRxInProgress.5471
00000000 l df *ABS* 00000000 nvm.c
00000000 l df *ABS* 00000000 timer.c
20000218 l O .bss 00000002 millisecond_counter
20000234 l O .bss 00000002 millisecond_counter
00000000 l df *ABS* 00000000 flash.c
000010b8 l F .text 00000038 FlashGetSector
000010f0 l F .text 00000030 FlashGetSectorBaseAddr
00001120 l F .text 0000004e FlashWriteBlock
0000116e l F .text 00000026 FlashInitBlock
00001194 l F .text 00000040 FlashSwitchBlock
000011d4 l F .text 00000080 FlashAddToBlock
000014f4 l O .text 000000b4 flashLayout
2000021c l O .bss 00000204 bootBlockInfo
20000420 l O .bss 00000204 blockInfo
00000000 l df *ABS* 00000000 hooks.c
00000000 l df *ABS* 00000000 core_cm3.c
00000000 l df *ABS* 00000000 efm32_acmp.c
00000000 l df *ABS* 00000000 efm32_adc.c
00000000 l df *ABS* 00000000 efm32_aes.c
00000000 l df *ABS* 00000000 efm32_assert.c
00000000 l df *ABS* 00000000 efm32_dac.c
00000000 l df *ABS* 00000000 efm32_dbg.c
00000000 l df *ABS* 00000000 efm32_dma.c
00000000 l df *ABS* 00000000 efm32_ebi.c
00000000 l df *ABS* 00000000 efm32_i2c.c
00000000 l df *ABS* 00000000 efm32_int.c
00000000 l df *ABS* 00000000 efm32_lcd.c
00000000 l df *ABS* 00000000 efm32_lesense.c
00000000 l df *ABS* 00000000 efm32_letimer.c
00000000 l df *ABS* 00000000 efm32_mpu.c
00000000 l df *ABS* 00000000 efm32_opamp.c
00000000 l df *ABS* 00000000 efm32_pcnt.c
00000000 l df *ABS* 00000000 efm32_prs.c
00000000 l df *ABS* 00000000 efm32_rmu.c
00000000 l df *ABS* 00000000 efm32_rtc.c
00000000 l df *ABS* 00000000 efm32_timer.c
00000000 l df *ABS* 00000000 efm32_usart.c
00000000 l df *ABS* 00000000 efm32_vcmp.c
00000000 l df *ABS* 00000000 efm32_wdog.c
00001490 l F .text 00000010 __MSC_ErasePage_veneer
000014a0 l F .text 00000010 __MSC_WriteWord_veneer
00000b38 g F .text 0000002c ComInit
00001270 g F .text 00000048 FlashWrite
00000900 g F .text 00000018 GPIO_DriveModeSet
00000e34 g F .text 00000018 AssertFailure
000008ec g F .text 00000014 EMU_UpdateOscConfig
00001450 g F .text 00000038 reset_handler
000006b8 g F .text 00000128 CMU_ClockFreqGet
0000105c g F .text 0000001c TimerUpdate
00000bf0 g F .text 00000010 XcpPacketTransmitted
00000a14 g F .text 00000018 LEUART_Enable
00000a2c g F .text 00000012 LEUART_FreezeEnable
00000b64 g F .text 0000001c ComTask
00000b94 g F .text 0000000c ComSetConnectEntryState
00000b10 g F .text 00000016 BootInit
00000e18 g F .text 00000018 BackDoorInit
000007e0 g F .text 00000054 CMU_OscillatorEnable
00000e32 g F .text 00000002 CopService
000015d3 g .text 00000000 _etext
0000063c g F .text 0000007c CMU_ClockSelectGet
00001050 g F .text 0000000c TimerReset
20000624 g O .bss 00000004 SystemCoreClock
00000b26 g F .text 00000012 BootTask
00001384 g F .text 00000044 FlashWriteChecksum
00000b82 g F .text 00000010 ComTransmitPacket
00001024 l F .text 0000003c FlashGetSector
00001060 l F .text 00000044 FlashWriteBlock
000010a4 l F .text 0000004c FlashSwitchBlock
000010f0 l F .text 00000084 FlashAddToBlock
00001450 l O .text 000000b4 flashLayout
20000238 l O .bss 00000204 bootBlockInfo
2000043c l O .bss 00000204 blockInfo
00000000 l df *ABS* 00000000
00000100 l *ABS* 00000000 __STACKSIZE__
000013f0 l F .text 00000010 __MSC_ErasePage_veneer
00001400 l F .text 00000010 __MSC_WriteWord_veneer
00000ac4 g F .text 0000002c ComInit
00001190 g F .text 00000048 FlashWrite
000008c0 g F .text 00000018 GPIO_DriveModeSet
00000dc4 g F .text 00000018 AssertFailure
000008ac g F .text 00000014 EMU_UpdateOscConfig
000013a4 g F .text 00000044 reset_handler
00000684 g F .text 00000120 CMU_ClockFreqGet
00000ff8 g F .text 0000001c TimerUpdate
00000b70 g F .text 00000010 XcpPacketTransmitted
000009bc g F .text 00000018 LEUART_Enable
00000af0 g F .text 0000001c ComTask
00000b20 g F .text 0000000c ComSetConnectEntryState
00000a94 g F .text 0000001a BootInit
00000da0 g F .text 00000020 BackDoorInit
000007a4 g F .text 00000050 CMU_OscillatorEnable
00000dc2 g F .text 00000002 CopService
0000152f g .text 00000000 _etext
0000061c g F .text 00000068 CMU_ClockSelectGet
00000fec g F .text 0000000c TimerReset
20000640 g O .bss 00000004 SystemCoreClock
00000aae g F .text 00000016 BootTask
000012d4 g F .text 00000040 FlashWriteChecksum
00000b0e g F .text 00000010 ComTransmitPacket
000003b4 g F .text 0000000c SystemLFXOClockGet
000005c8 g F .text 00000074 CMU_ClockEnable
00000a86 g F .text 0000000e LEUART_Rx
00000be0 g F .text 00000010 XcpIsConnected
0000102c g F .text 00000004 NvmInit
00001254 g F .text 0000001c FlashInit
20000628 g .bss 00000000 _ebss
00000100 g *ABS* 00000000 __STACKSIZE__
00001444 g F .text 0000000c UnusedISR
00000b80 g F .text 00000002 ComFree
00000a3e g F .text 00000048 LEUART_Init
20000080 g F .data 000000b4 MSC_WriteWord
00000ee4 g F .text 00000094 UartInit
00000ad0 g F .text 0000001c MSC_Deinit
00000834 g F .text 000000b8 CMU_ClockSelectSet
00001034 g F .text 00000004 NvmErase
20000138 g .bss 00000000 _bss
000005b0 g F .text 0000006c CMU_ClockEnable
00000a14 g F .text 0000000c LEUART_Rx
00000b60 g F .text 00000010 XcpIsConnected
00000fa8 g F .text 00000004 NvmInit
00001174 g F .text 0000001c FlashInit
20000648 g .bss 00000000 _ebss
00001398 g F .text 0000000c UnusedISR
00000b0c g F .text 00000002 ComFree
000009d4 g F .text 00000040 LEUART_Init
2000007c g F .data 000000d0 MSC_WriteWord
00000e28 g F .text 00000094 UartInit
00000a58 g F .text 0000001c MSC_Deinit
000007f4 g F .text 000000b8 CMU_ClockSelectSet
00000fb0 g F .text 00000004 NvmErase
20000150 g .bss 00000000 _bss
000002f4 g F .text 00000098 SystemHFClockGet
00000c00 g F .text 000001e8 XcpPacketReceived
20000008 g F .data 00000078 MSC_ErasePage
00001410 g F .text 00000034 FlashDone
000000b8 g F .text 0000004c EntryFromProg
00000bc4 g F .text 0000001c XcpInit
000012b8 g F .text 000000cc FlashErase
00000118 g F .text 000001dc main
0000103c g F .text 00000012 NvmDone
00000f78 g F .text 00000050 UartTransmitPacket
00001038 g F .text 00000004 NvmVerifyChecksum
00000e70 g F .text 00000020 CpuMemCopy
00001078 g F .text 0000000c TimerSet
00000918 g F .text 000000a4 GPIO_PinModeSet
00000b80 g F .text 000001e8 XcpPacketReceived
20000008 g F .data 00000074 MSC_ErasePage
0000135c g F .text 0000003c FlashDone
000000b8 g F .text 00000050 EntryFromProg
00000b44 g F .text 0000001c XcpInit
000011d8 g F .text 000000fc FlashErase
0000011c g F .text 000001d8 main
00000fb8 g F .text 00000012 NvmDone
00000ebc g F .text 00000080 UartTransmitPacket
00000fb4 g F .text 00000004 NvmVerifyChecksum
00000e04 g F .text 0000001e CpuMemCopy
000008d8 g F .text 00000090 GPIO_PinModeSet
000003ac g F .text 00000002 SystemInit
00000a94 g F .text 0000001a LEUART_Tx
000004b4 g F .text 00000114 CMU_ClockDivSet
00000fc8 g F .text 00000064 UartReceivePacket
00000a20 g F .text 00000018 LEUART_Tx
00000494 g F .text 0000011c CMU_ClockDivSet
00000f3c g F .text 0000006c UartReceivePacket
20000000 g .data 00000000 _data
00000e30 g F .text 00000002 CopInit
00000dc0 g F .text 00000002 CopInit
000003ae g F .text 00000006 SystemLFRCOClockGet
00000e90 g F .text 00000004 CpuReset
000009cc g F .text 00000048 LEUART_BaudrateSet
00000aec g F .text 00000024 SYSTEM_ChipRevisionGet
00000e22 g F .text 00000004 CpuReset
00000978 g F .text 00000044 LEUART_BaudrateSet
00000a74 g F .text 00000020 SYSTEM_ChipRevisionGet
0000038c g F .text 00000020 SystemCoreClockGet
00001030 g F .text 00000004 NvmWrite
00000e4c g F .text 00000024 CpuStartUserProgram
20000728 g .bss 00000000 _estack
000013c8 g F .text 00000046 FlashVerifyChecksum
20000138 g .data 00000000 _edata
00000fac g F .text 00000004 NvmWrite
00000ddc g F .text 00000028 CpuStartUserProgram
20000748 g .bss 00000000 _estack
00001314 g F .text 00000048 FlashVerifyChecksum
20000150 g .data 00000000 _edata
00000000 g O .text 000000b8 _vectab
00000ba0 g F .text 00000004 ComIsConnected
00000de8 g F .text 00000030 BackDoorCheck
20000628 g .bss 00000000 _stack
000010a8 g F .text 00000010 TimerGet
00001084 g F .text 00000024 TimerInit
00000ab0 g F .text 00000020 MSC_Init
00000b2c g F .text 00000004 ComIsConnected
00000d68 g F .text 00000038 BackDoorCheck
20000648 g .bss 00000000 _stack
00001014 g F .text 00000010 TimerGet
00000fcc g F .text 00000020 TimerInit
00000a38 g F .text 00000020 MSC_Init

5
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Boot/config.h
View File

@ -41,10 +41,15 @@
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
* big endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
#define BOOT_CPU_XTAL_SPEED_KHZ (32000)
#define BOOT_CPU_SYSTEM_SPEED_KHZ (14000)
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
/****************************************************************************************

24
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Boot/hooks.c
View File

@ -67,6 +67,30 @@ blt_bool BackDoorEntryHook(void)
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
/****************************************************************************************
* C P U D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/****************************************************************************************
** NAME: CpuUserProgramStartHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
** keep the bootloader active.
** DESCRIPTION: Callback that gets called when the bootloader is about to exit and
** hand over control to the user program. This is the last moment that
** some final checking can be performed and if necessary prevent the
** bootloader from activiting the user program.
**
****************************************************************************************/
blt_bool CpuUserProgramStartHook(void)
{
/* okay to start the user program */
return BLT_TRUE;
} /*** end of CpuUserProgramStartHook ***/
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
****************************************************************************************/

2
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Boot/makefile
View File

@ -172,7 +172,7 @@ LIB_PATH = -L../../../Source/ARMCM3_EFM32/GCC/
#|---------------------------------------------------------------------------------------|
CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -Os -T memory.x
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -Wno-main
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) -Wno-attributes
CFLAGS += -ffunction-sections -fdata-sections $(INC_PATH) -D EFM32G880F128
CFLAGS += -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Prog/bin/demoprog_olimex_efm32g880.elf
View File

Binary file not shown.

180
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Prog/bin/demoprog_olimex_efm32g880.map
View File

@ -7,72 +7,65 @@ start address 0x00002000
Program Header:
LOAD off 0x00000000 vaddr 0x00000000 paddr 0x00000000 align 2**15
filesz 0x0000344c memsz 0x0000344c flags r-x
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x0000344c align 2**15
filesz 0x0000315c memsz 0x0000315c flags r-x
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x0000315c align 2**15
filesz 0x00000008 memsz 0x00000168 flags rw-
private flags = 5000002: [Version5 EABI] [has entry point]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 0000144c 00002000 00002000 00002000 2**2
0 .text 0000115c 00002000 00002000 00002000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000008 20000000 0000344c 00008000 2**2
1 .data 00000008 20000000 0000315c 00008000 2**2
CONTENTS, ALLOC, LOAD, DATA
2 .bss 00000160 20000008 00003454 00008008 2**2
2 .bss 00000160 20000008 00003164 00008008 2**2
ALLOC
3 .debug_abbrev 000039ba 00000000 00000000 00008008 2**0
3 .debug_info 00005a0f 00000000 00000000 00008008 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000db0e 00000000 00000000 0000b9c2 2**0
4 .debug_abbrev 00001851 00000000 00000000 0000da17 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_line 0000554b 00000000 00000000 000194d0 2**0
5 .debug_loc 00002ba8 00000000 00000000 0000f268 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_loc 000065d3 00000000 00000000 0001ea1b 2**0
6 .debug_aranges 00000488 00000000 00000000 00011e10 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_pubnames 0000138d 00000000 00000000 00024fee 2**0
7 .debug_ranges 000003a8 00000000 00000000 00012298 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_pubtypes 00001700 00000000 00000000 0002637b 2**0
8 .debug_line 00001e4a 00000000 00000000 00012640 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_aranges 00000b10 00000000 00000000 00027a7b 2**0
9 .debug_str 00001a6b 00000000 00000000 0001448a 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000008f0 00000000 00000000 0002858b 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_str 000051e2 00000000 00000000 00028e7b 2**0
CONTENTS, READONLY, DEBUGGING
12 .comment 0000002a 00000000 00000000 0002e05d 2**0
10 .comment 00000030 00000000 00000000 00015ef5 2**0
CONTENTS, READONLY
13 .ARM.attributes 00000031 00000000 00000000 0002e087 2**0
11 .ARM.attributes 00000033 00000000 00000000 00015f25 2**0
CONTENTS, READONLY
14 .debug_frame 000017ac 00000000 00000000 0002e0b8 2**2
12 .debug_frame 00000904 00000000 00000000 00015f58 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00002000 l d .text 00000000 .text
20000000 l d .data 00000000 .data
20000008 l d .bss 00000000 .bss
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_pubnames 00000000 .debug_pubnames
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .comment 00000000 .comment
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 vectors.c
00000000 l df *ABS* 00000000 boot.c
000020bc l F .text 00000034 UartReceiveByte
20000008 l O .bss 00000001 xcpCtoRxLength.2654
20000009 l O .bss 00000001 xcpCtoRxInProgress.2655
0000343c l O .text 00000010 C.3.3551
2000000c l O .bss 00000041 xcpCtoReqPacket.2653
000020bc l F .text 0000002c UartReceiveByte
20000008 l O .bss 00000041 xcpCtoReqPacket.5451
2000004c l O .bss 00000001 xcpCtoRxLength.5452
2000004d l O .bss 00000001 xcpCtoRxInProgress.5453
00000000 l df *ABS* 00000000 cstart.c
000022de l F .text 00000000 zero_loop
00002276 l F .text 00000000 zero_loop
00000000 l df *ABS* 00000000 irq.c
00000000 l df *ABS* 00000000 led.c
20000050 l O .bss 00000004 timer_counter_last.2646
20000054 l O .bss 00000001 led_toggle_state.2645
20000050 l O .bss 00000004 timer_counter_last.5444
20000054 l O .bss 00000001 led_toggle_state.5443
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 timer.c
20000058 l O .bss 00000004 millisecond_counter
@ -80,95 +73,70 @@ SYMBOL TABLE:
20000000 l O .data 00000004 SystemLFXOClock
20000004 l O .data 00000004 SystemHFXOClock
00000000 l df *ABS* 00000000 lcdcontroller.c
000027e4 l F .text 00000060 LCD_enableSegment
00002844 l F .text 00000070 LCD_disableSegment
000026c0 l F .text 00000060 LCD_enableSegment
00002720 l F .text 00000070 LCD_disableSegment
00000000 l df *ABS* 00000000 efm32_cmu.c
00002a40 l F .text 00000010 BITBAND_Peripheral
00002a50 l F .text 00000038 CMU_FlashWaitStateMax
00002a88 l F .text 0000000c CMU_DivToLog2
00002a94 l F .text 00000064 CMU_FlashWaitStateControl
00002af8 l F .text 0000000a CMU_AUXClkGet
00002b04 l F .text 00000020 CMU_Sync
00002b24 l F .text 00000052 CMU_LFClkGet
00002904 l F .text 00000010 BITBAND_Peripheral
00002914 l F .text 00000030 CMU_FlashWaitStateMax
00002944 l F .text 0000000c CMU_DivToLog2
00002950 l F .text 00000058 CMU_FlashWaitStateControl
000029a8 l F .text 00000008 CMU_AUXClkGet
000029b0 l F .text 00000018 CMU_Sync
000029c8 l F .text 0000004c CMU_LFClkGet
00000000 l df *ABS* 00000000 efm32_emu.c
20000060 l O .bss 00000002 cmuStatus
00000000 l df *ABS* 00000000 efm32_gpio.c
00000000 l df *ABS* 00000000 efm32_leuart.c
000032f8 l F .text 00000010 LEUART_Sync
00003028 l F .text 00000010 LEUART_Sync
00000000 l df *ABS* 00000000 efm32_system.c
00000000 l df *ABS* 00000000 core_cm3.c
00000000 l df *ABS* 00000000 efm32_acmp.c
00000000 l df *ABS* 00000000 efm32_adc.c
00000000 l df *ABS* 00000000 efm32_aes.c
00000000 l df *ABS* 00000000 efm32_assert.c
00000000 l df *ABS* 00000000 efm32_dac.c
00000000 l df *ABS* 00000000 efm32_dbg.c
00000000 l df *ABS* 00000000 efm32_dma.c
00000000 l df *ABS* 00000000 efm32_ebi.c
00000000 l df *ABS* 00000000 efm32_i2c.c
00000000 l df *ABS* 00000000 efm32_int.c
00000000 l df *ABS* 00000000 efm32_lcd.c
00000000 l df *ABS* 00000000 efm32_lesense.c
00000000 l df *ABS* 00000000 efm32_letimer.c
00000000 l df *ABS* 00000000 efm32_mpu.c
00000000 l df *ABS* 00000000 efm32_msc.c
00000000 l df *ABS* 00000000 efm32_opamp.c
00000000 l df *ABS* 00000000 efm32_pcnt.c
00000000 l df *ABS* 00000000 efm32_prs.c
00000000 l df *ABS* 00000000 efm32_rmu.c
00000000 l df *ABS* 00000000 efm32_rtc.c
00000000 l df *ABS* 00000000 efm32_timer.c
00000000 l df *ABS* 00000000 efm32_usart.c
00000000 l df *ABS* 00000000 efm32_vcmp.c
00000000 l df *ABS* 00000000 efm32_wdog.c
00000000 l df *ABS* 00000000 strlen.c
000031f4 g F .text 0000001e GPIO_DriveModeSet
000031dc g F .text 00000016 EMU_UpdateOscConfig
00002298 g F .text 0000005c reset_handler
00002e5c g F .text 000001e6 CMU_ClockFreqGet
0000336c g F .text 00000022 LEUART_Enable
00003390 g F .text 00000018 LEUART_FreezeEnable
00002300 g F .text 00000004 IrqInterruptEnable
00000000 l df *ABS* 00000000
00000100 l *ABS* 00000000 __STACKSIZE__
00002f34 g F .text 0000001c GPIO_DriveModeSet
00002f20 g F .text 00000014 EMU_UpdateOscConfig
0000223c g F .text 00000060 reset_handler
00002c50 g F .text 00000170 CMU_ClockFreqGet
0000308c g F .text 00000020 LEUART_Enable
000030ac g F .text 00000018 LEUART_FreezeEnable
000022a8 g F .text 00000004 IrqInterruptEnable
2000005c g O .bss 00000004 frameCounter
00003044 g F .text 00000074 CMU_OscillatorEnable
000028f0 g F .text 000000a8 LCD_Symbol
0000344c g .text 00000000 _etext
000026d0 g F .text 00000012 TimerISRHandler
00002db0 g F .text 000000aa CMU_ClockSelectGet
00002dc0 g F .text 00000064 CMU_OscillatorEnable
000027c8 g F .text 000000a4 LCD_Symbol
0000315c g .text 00000000 _etext
000025d0 g F .text 00000010 TimerISRHandler
00002bb4 g F .text 0000009c CMU_ClockSelectGet
20000064 g O .bss 00000004 SystemCoreClock
000027d8 g F .text 0000000c SystemLFXOClockGet
00002d28 g F .text 00000088 CMU_ClockEnable
000028d4 g F .text 0000001c LCD_AllOff
00003408 g F .text 0000000e LEUART_Rx
000026b4 g F .text 0000000c SystemLFXOClockGet
00002b3c g F .text 00000078 CMU_ClockEnable
000027ac g F .text 0000001c LCD_AllOff
0000311c g F .text 0000000e LEUART_Rx
20000068 g .bss 00000000 _ebss
000028b4 g F .text 00000020 LCD_IRQHandler
00000100 g *ABS* 00000000 __STACKSIZE__
000026e4 g F .text 00000002 UnusedISR
00002304 g F .text 00000016 LedInit
000033a8 g F .text 0000005e LEUART_Init
000030b8 g F .text 00000122 CMU_ClockSelectSet
00002790 g F .text 0000001c LCD_IRQHandler
000025e0 g F .text 00000002 UnusedISR
000022ac g F .text 00000014 LedInit
000030c4 g F .text 00000058 LEUART_Init
00002e24 g F .text 000000fc CMU_ClockSelectSet
20000008 g .bss 00000000 _bss
000026e8 g F .text 000000b6 SystemHFClockGet
00002998 g F .text 000000a6 LCD_Init
0000239c g F .text 000002b0 main
0000265c g F .text 0000000c TimerSet
00003214 g F .text 000000e2 GPIO_PinModeSet
000020f0 g F .text 000000ea BootComInit
000027cc g F .text 00000002 SystemInit
00002b78 g F .text 000001b0 CMU_ClockDivSet
0000264c g F .text 00000010 TimerDeinit
000025e4 g F .text 000000a0 SystemHFClockGet
0000286c g F .text 00000098 LCD_Init
00002318 g F .text 00000240 main
00002568 g F .text 0000000c TimerSet
00002f50 g F .text 000000d8 GPIO_PinModeSet
000020e8 g F .text 000000d0 BootComInit
000026a8 g F .text 00000002 SystemInit
00002a14 g F .text 00000128 CMU_ClockDivSet
00002558 g F .text 00000010 TimerDeinit
20000000 g .data 00000000 _data
0000231c g F .text 00000080 LedToggle
000027d0 g F .text 00000006 SystemLFRCOClockGet
00003308 g F .text 00000064 LEUART_BaudrateSet
00003418 g F .text 00000024 SYSTEM_ChipRevisionGet
000027a0 g F .text 0000002a SystemCoreClockGet
000022c0 g F .text 00000058 LedToggle
000026ac g F .text 00000006 SystemLFRCOClockGet
00003038 g F .text 00000054 LEUART_BaudrateSet
0000312c g F .text 00000020 SYSTEM_ChipRevisionGet
00002684 g F .text 00000024 SystemCoreClockGet
20000168 g .bss 00000000 _estack
20000008 g .data 00000000 _edata
00002000 g O .text 000000bc _vectab
000021dc g F .text 000000bc BootComCheckActivationRequest
000021b8 g F .text 00000084 BootComCheckActivationRequest
20000068 g .bss 00000000 _stack
000026c4 g F .text 0000000c TimerGet
00002668 g F .text 0000005a TimerInit
000025c4 g F .text 0000000c TimerGet
00002574 g F .text 00000050 TimerInit

605
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Prog/bin/demoprog_olimex_efm32g880.srec
View File

@ -1,328 +1,281 @@
S025000062696E2F64656D6F70726F675F6F6C696D65785F65666D3332673838302E737265634A
S11320006801002099220000E5260000E526000072
S1132010E5260000E5260000E5260000E526000090
S1132020E5260000E5260000E5260000E526000080
S1132030E5260000E5260000E5260000D126000084
S1132040E5260000E5260000E5260000E526000060
S1132050E5260000E5260000E5260000E526000050
S1132060E5260000E5260000E5260000E526000040
S1132070E5260000E5260000E5260000E526000030
S1132080E5260000E5260000E5260000E526000020
S1132090E5260000E5260000E5260000E526000010
S11320A0E5260000E5260000E5260000B52800002E
S11320B0E5260000E5260000EE11AA5510B50446F9
S11320C04FF48843C4F20803DB6A13F0040F0CD006
S11320D04FF48840C4F2080043F20943C0F20003FD
S11320E0984720704FF0010010BD4FF0000010BD64
S11320F070B584B043F23C43C0F200036E460FCB8C
S113210086E80F004FF44240C0F202004FF0010194
S113211042F62954C0F20004A0474FF002004FF0E9
S113212006014FF004024FF0010343F21525C0F2FB
S11321300005A8474FF002004FF007014FF00102DD
S11321404FF00003A8474FF40C50C0F204004FF0C6
S11321500101A0474FF00300C0F212004FF002014A
S113216043F2B903C0F2000398474FF4AA55C0F2F2
S1132170160528464FF0010142F67933C0F20003F8
S1132180984728464FF00101A0474FF000058DF80D
S113219000504FF48844C4F208042046694643F2D0
S11321A0A933C0F200039847204629464FF416523B
S11321B043F20933C0F2000398474FF00303636509
S11321C04FF00403636320464FF0050143F26D337F
S11321D0C0F20003984704B070BD00BF08B540F2D8
S11321E00903C2F200031B78CBB940F20C00C2F21F
S11321F0000042F2BD03C0F200039847012848D111
S113220040F20903C2F200034FF001021A7040F2D7
S11322100803C2F200034FF000021A7008BD40F236
S11322200803C2F2000318781A4BC01842F2BD0327
S1132230C0F20003984701282BD140F20803C2F2F0
S113224000031A7802F10102D2B21A7040F20C03B0
S1132250C2F200031B7893421BD140F20903C2F27D
S113226000034FF000021A7040F20C03C2F20003A4
S11322705B78FF2B0DD140F20C03C2F200039B7874
S11322803BB942F24D63C0F2000398474FF0B903E3
S1132290984708BD0D00002008B516498D4640F248
S11322A00002C2F2000240F20803C2F200039A42A2
S11322B011D243F24C42C0F2000240F20003C2F2D7
S11322C0000340F20800C2F2000052F8041B43F875
S11322D0041B8342F9D3084808494FF0000288429E
S11322E0B8BF40F8042BFADB42F29D33C0F200037E
S11322F0984708BD680100200800002068000020FD
S113230062B6704708B54FF42040C4F2080042F6A4
S11323109913C0F20003984708BD00BF10B542F2FC
S1132320C563C0F200039847044640F25003C2F26A
S113233000031B68C31AB3F5FA7F2ED340F254038B
S1132340C2F200031B7893B940F25403C2F20003B3
S11323504FF001021A704FF42040C4F208004FF00D
S1132360000142F6F103C0F20003984710E040F286
S11323705403C2F200034FF000021A704FF42040DD
S1132380C4F20800114642F6F103C0F20003984774
S113239040F25003C2F200031C6010BD30B583B09C
S11323A042F2CD73C0F20003984748F2FC13C0F622
S11323B0E0731B681B0E14D14AF20C03C4F20C0325
S11323C01A6822F070021A6046F22003C4F20C0369
S11323D01A6822F060421A601A6862F060621A6039
S11323E001E0032B22D846F22003C4F20C031A683E
S11323F022F4FC521A6048F24002C4F20C024FF07C
S11324000003136048F24402C4F20C02136048F261
S11324105802C4F20C02136048F26002C4F20C02C7
S1132420136048F27802C4F20C02136001A843F26C
S11324301943C0F2000398479DF80430012B17D1CB
S11324409DF805303BB948F24003C4F20C031A6806
S113245042F002021A609DF80530012B9FBF48F23A
S11324604403C4F20C031A6842F0010298BF1A60D4
S113247048F2F013C0F6E0731A684BF6FF13C4F683
S11324808A439A4230D848F24403C4F20C031A68CF
S113249042F490421A6048F2B412C0F6E072116835
S11324A001F4FE4110681568146804F07F0405F413
S11324B0FE4244EA020200F07F0042EA004242EA9D
S11324C0014142F23402C4F20002116048F2C8121F
S11324D0C0F6E072116844F22C02C4F200021160EA
S11324E01A6822F490421A604FF000004FF0010184
S11324F00A4643F24503C0F2000398474FF40043F1
S1132500C4F20C031A6C42F00F021A645A6C6FEA9C
S113251012426FEA02425A644FF44070C0F204005F
S11325204FF0000142F62954C0F20004A0474FF4D2
S11325309850C0F204004FF00001A0474FF44C50F3
S1132540C0F204004FF00001A0474FF42240C0F253
S113255002004FF00001A0474FF40070C0F20200E7
S11325604FF00001A0474FF49050C0F202004FF02A
S11325700001A0474FF40850C0F202004FF00001E0
S1132580A0474FF44850C0F202004FF00001A047AA
S11325904FF4E440C0F202004FF00001A0474FF4B2
S11325A00240C0F202004FF00001A0474FF4324055
S11325B0C0F202004FF00001A0474FF46240C0F2A5
S11325C002004FF00001A0474FF47240C0F2020035
S11325D04FF00001A0474FF45240C0F202004FF008
S11325E00001A0474FF001004FF009014FF0050230
S11325F0034643F21524C0F20004A0474FF0010043
S11326004FF0020143F2F513C0F20003984742F27F
S11326100533C0F20003984742F26963C0F2000335
S1132620984742F20133C0F20003984742F2F103A3
S1132630C0F20003984742F21D35C0F2000542F291
S1132640DD14C0F20004A847A047FCE74EF21003D3
S1132650CEF200034FF000021A60704740F25803B4
S1132660C2F200031860704708B54FF02000C0F2B2
S1132670040042F65D63C0F20003984744F6D35366
S1132680C1F26203A3FB00204FEA901000F1FF3077
S11326904EF21003CEF2000358604FF46D42CEF2B6
S11326A000024FF0E00182F823104FF00000986020
S11326B04FF007021A6042F25D63C0F200039847CC
S11326C008BD00BF40F25803C2F200031868704707
S11326D040F25803C2F200031A6802F101021A60C0
S11326E0704700BFFEE700BF4FF40043C4F20C0381
S11326F0DB6A03F47053B3F5805F48D0B3F5005F31
S113270003D0B3F5006F0CD105E040F20003C2F230
S113271000031868704740F20403C2F2000318680B
S113272070474FF40043C4F20C03DB6803F4E06326
S1132730B3F5007F19D004D80BB3B3F5807F23D150
S113274018E0B3F5806F25D0B3F5A06F03D0B3F5CF
S1132750407F19D104E04FF47C50C0F2AB107047B5
S113276049F68070C0F2D50070474DF6C000C0F243
S1132770A70070474CF6C070C0F26A00704744F27C
S11327804020C0F20F0070474FF0000070474FF434
S11327900040704746F64070C0F24010704700BFDA
S11327A008B542F2E963C0F2000398474FF40043CE
S11327B0C4F20C035B6803F00F0320FA03F040F249
S11327C06402C2F20002106008BD00BF704700BF7F
S11327D04FF40040704700BF40F20003C2F2000310
S11327E0186870471F2AC4BF203A04314FF0010310
S11327F003FA02F2072924D8DFE801F004080C10D8
S113280014181C20036C1A4302647047436C1A4367
S113281042647047836C1A4382647047C36C1A43E2
S1132820C2647047036D1A4302657047436D1A43CF
S113283042657047836D1A4382657047C36D1A43BE
S1132840C26570471F2AC4BF203A04314FF0010308
S113285003FA02F207292CD8DFE801F004090E1369
S1132860181D2227036C23EA020202647047436C9A
S113287023EA020242647047836C23EA0202826400
S11328807047C36C23EA0202C2647047036D23EAF3
S1132890020202657047436D23EA020242657047F3
S11328A0836D23EA020282657047C36D23EA020244
S11328B0C26570474FF42043C4F208034FF0FF325F
S11328C05A6240F25C03C2F200031A6802F1010288
S11328D01A6070474FF00003036403654364436563
S11328E083648365C364C365436E002BFCD1704766
S11328F038B50B293FD8DFE801F03A060B0F14195D
S11329001E23282D31354FF003034FF0010432E02C
S11329104FF003031C462EE04FF003034FF0000476
S113292029E04FF003034FF0020424E04FF02703A3
S11329304FF000041FE04FF027034FF003041AE0A8
S11329404FF001034FF0030415E04FF001034FF083
S1132950020410E04FF001031C460CE04FF00103A9
S11329601C4608E04FF007034FF0030403E04FF068
S11329700F034FF003043AB121461A4642F2E573BD
S1132980C0F20003984738BD21461A4642F6450373
S1132990C0F20003984738BD10B504464FF4004315
S11329A0C4F20C039A6A22F003029A629A6A42F011
S11329B002029A629A6D42F004029A659A6E22F4B7
S11329C040729A669A6E42F440729A664FF000031F
S11329D08362636E002BFCD14FF0FF3363624FF4CC
S11329E06143CEF200034FF000621A604FF001031E
S11329F0A36241F60B7363604FF40043C4F20C030B
S1132A004FF00002DA67204642F6D503C0F2000315
S1132A10984740F2FF33A3604FF005032360636ED1
S1132A20002BFCD14FF48073C0F21C03E360636E8F
S1132A30002BFCD14FF001036362A36210BD00BF01
S1132A4000F1047001EBC0004FEA8000026070479F
S1132A504FF00003C4F20C035B6803F00702032A7F
S1132A600CD8DFE802F00202070723F0070343F063
S1132A70010303E023F0070343F003034FF00002D4
S1132A80C4F20C0253607047B0FA80F0C0B2C0F1D7
S1132A901F0070474FF00003C4F20C035B684DF64F
S1132AA0FF32CFF60B72821842F2FF31C0F2F4010A
S1132AB08A420BD803F00702A2F10202012A23F092
S1132AC0070394BF43F0030343F001034FF4105290
S1132AD0C0F2F402904209D803F00702A2F1020204
S1132AE0012A23F0070398BF43F002034FF00002CA
S1132AF0C4F20C025360704749F68070C0F2D500EE
S1132B00704700BF4FF40043C4F20C035B6D13F035
S1132B10010F06D14FF40042C4F20C02136D1842A7
S1132B20FCD1704708B54FF40043C4F20C039B6A10
S1132B304FEA400023FA00F303F00303022B09D009
S1132B40032B0DD0012B13D142F2D173C0F2000339
S1132B50984708BD42F2D973C0F20003984708BDF4
S1132B6042F2A173C0F2000398474FEA500008BD37
S1132B704FF0000008BD00BF10B50C46C0F30313AE
S1132B8003F1FF33032B00F2CE80DFE803F00213DE
S1132B903390084642F68923C0F2000398474FF465
S1132BA00043C4F20C039A6822F00F0240EA0202C6
S1132BB09A6010BD42F65123C0F2000398472046A4
S1132BC042F68923C0F2000398474FF40043C4F24D
S1132BD00C035A6822F00F0240EA02025A6042F2E1
S1132BE0A173C0F20003984742F69523C0F2000394
S1132BF0984710BD41F23043C0F20A03984224D0F2
S1132C004FF03003C0F20C03984236D04FF4866381
S1132C10C0F20803984240F086804FF0040042F668
S1132C200533C0F200039847204642F68923C0F2D8
S1132C30000398474FF40043C4F20C039A6E22F049
S1132C400F0240EA02029A6610BD4FF0040042F6F9
S1132C500533C0F200039847204642F68923C0F2A8
S1132C60000398474FF40043C4F20C039A6E22F019
S1132C70F00242EA00129A6610BD4FF0040042F6D8
S1132C800533C0F200039847204642F68923C0F278
S1132C90000398474FF40043C4F20C039A6EA0F16A
S1132CA0100022F4407242EA00229A6610BD4FF4EA
S1132CB0A863C0F21403984206D04FF4AA53C0F29A
S1132CC0160398422FD117E04FF0400042F6053327
S1132CD0C0F200039847204642F68923C0F200035D
S1132CE098474FF40043C4F20C031A6F22F0030216
S1132CF040EA02021A6710BD4FF0400042F6053365
S1132D00C0F200039847204642F68923C0F200032C
S1132D1098474FF40043C4F20C031A6F22F03002B8
S1132D2042EA00121A6710BD70B50D46C0F30323C2
S1132D3003F1FF33052B3AD8DFE803F0082D3217EF
S1132D401E0348F27804C4F20C042DE0C0F30436E8
S1132D5048F20804C4F20C04204631462A4642F6DE
S1132D604123C0F20003984770BD4FF0010348F2BD
S1132D705804C4F20C0405E04FF0100348F2600458
S1132D80C4F20C04C0F30436184642F60533C0F20C
S1132D9000039847E0E748F24404C4F20C0403E05B
S1132DA048F24004C4F20C04C0F30436D4E770BD06
S1132DB000F00F0000F1FF30032842D8DFE800F0F4
S1132DC0051B2E024FF0070070474FF40043C4F276
S1132DD00C03D86A00F47050B0F5805F34D0B0F5BD
S1132DE0005F05D0B0F5006F0CBF042005207047CC
S1132DF04FF0020070474FF40043C4F20C03986A8A
S1132E0000F00300022822D0032804D001280CBFBC
S1132E100320012070474FF0060070474FF4004331
S1132E20C4F20C03986A00F00C00022812D00328A4
S1132E3004D001280CBF0320012070474FF0060086
S1132E4070474FF0000070474FF0030070474FF099
S1132E50020070474FF00200704700BF08B500F44D
S1132E607810B0F5402F74D014D8B0F5802F40D02E
S1132E7005D848B3B0F5003F40F0E0802AE0B0F553
S1132E80002F44D0B0F5202F52D0B0F5C02F40F021
S1132E90D58034E0B0F5A01F00F08C8007D8B0F5E1
S1132EA0602F67D0B0F5901F40F0C8807AE0B0F58D
S1132EB0C01F00F0A180B0F5D01F00F0B980B0F5BC
S1132EC0B01F40F0BB8086E042F2E963C0F2000329
S1132ED0984708BD42F2E963C0F2000398474FF4F3
S1132EE00043C4F20C039B6803F00F0320FA03F0C1
S1132EF008BD42F2A173C0F20003984708BD4FF029
S1132F00000042F62533C0F20003984708BD4FF095
S1132F10000042F62533C0F2000398474FF4004303
S1132F20C4F20C039B6E03F00F0320FA03F008BDF8
S1132F304FF0000042F62533C0F2000398474FF4E7
S1132F400043C4F20C039B6EC3F3031320FA03F093
S1132F5008BD4FF0000042F62533C0F20003984745
S1132F604FF40043C4F20C039B6EC3F3012320FA15
S1132F7003F008BD4FF0000042F62533C0F2000311
S1132F8098474FF40043C4F20C039A6EC2F3012233
S1132F9020FA02F0DB6F03F0070303F10103B0FB37
S1132FA0F3F008BD4FF0010042F62533C0F20003F0
S1132FB0984708BD4FF0010042F62533C0F20003E4
S1132FC098474FF40043C4F20C031B6F03F0030350
S1132FD020FA03F008BD4FF0010042F62533C0F299
S1132FE0000398474FF40043C4F20C031B6FC3F370
S1132FF0011320FA03F008BD4FF00400C0F21800DA
S113300042F6B153C0F200039847072807D00828B6
S11330100BD142F2E963C0F20003984708BD42F6BF
S1133020F923C0F20003984708BD4FF0000008BD23
S113303042F6F923C0F20003984708BD4FF00000A0
S113304008BD00BF10B5042835D8DFE800F0120D24
S1133050170308004FF001044FF0020012E04FF094
S113306010044FF020000DE04FF040044FF08000BA
S113307008E04FF480744FF4007003E04FF0040450
S11330804FF0080069B14FF40043C4F20C031C6212
S113309062B14FF40042C4F20C02D36A1842FCD06D
S11330A004E04FF40043C4F20C03186243F2DD134E
S11330B0C0F20003984710BD10B500F00F000128BE
S11330C006D0002800F08880032800F285803BE0C9
S11330D0A1F1020103297FD8DFE801F00210070BF8
S11330E04FF000004FF004040CE04FF002000446DF
S11330F008E04FF003004FF0010403E04FF001003B
S11331004FF003044FF001010A4643F24503C0F2B5
S11331100003984742F65123C0F2000398474FF446
S11331200043C4F20C035C6243F2DD13C0F20003FB
S1133130984742F2A173C0F20003984742F69523E0
S1133140C0F20003984710BD022814BF02240024D3
S113315001F1FF3105293FD8DFE801F02C03103ECF
S11331603E1C4FF000004FF001010A4643F24503B4
S1133170C0F2000398474FF002021DE04FF0010037
S11331800146024643F24503C0F2000398474FF05C
S1133190010211E048F24000C4F20C004FF00201B9
S11331A04FF0010242F64123C0F2000398474FF06A
S11331B0030201E04FF000024FF40043C4F20C0399
S11331C0996A02FA04F24FF0030000FA04F421EAC7
S11331D0040442EA04049C6210BD00BF4FF400439F
S11331E0C4F20C03DA6A40F26003C2F200031A80EC
S11331F0704700BF4FF4C043C4F2000300EBC000AB
S113320053F8202022F0030241EA020243F820206E
S1133210704700BFF0B41446E2B16BB14FF0010542
S113322005FA01F500EBC0024FEA820202F1804286
S113323002F5C04215610DE04FF0010505FA01F5F4
S113324000EBC0064FEA860646F21002C4F2000202
S1133250B2185560072916D800EBC0024FEA820263
S113326002F1804202F5C04257684FEA81054FF0EF
S11332700F0606FA05F627EA060604FA05F546EAF5
S11332800505556017E000EBC0024FEA820202F127
S1133290804202F5C04297684FEA8105A5F12005F6
S11332A04FF00F0606FA05F627EA060604FA05F5B6
S11332B046EA05059560E4B96BB14FF0010303FAE2
S11332C001F100EBC0004FEA800000F1804000F5FE
S11332D0C04001610DE04FF0010303FA01F100EB7E
S11332E0C0004FEA800046F21003C4F20003C31882
S11332F05960F0BC704700BF036C13F0010F02D19A
S1133300436C1942FCD1704738B50446154608464B
S1133310D1B94FF48043C4F208039C420BD04FF45C
S11333208843C4F208039C4204BF4FF4AA50C0F27D
S113333016001AD103E04FF4A860C0F2140042F65C
S11333405D63C0F2000398474FEA4010B0FBF5F507
S1133350A5F120054FEAC50520464FF0040143F2CC
S1133360F923C0F200039847E56038BD38B5044638
S11333706FEA010505F0050541EA45054FF0020134
S113338043F2F923C0F200039847656038BD00BFDB
S113339031B1436C002BFCD14FF00103036470473F
S11333A04FF000030364704770B504460D464FF0B8
S11333B0020143F2F923C0F2000398474FF00A03D5
S11333C0636020464FF0010143F29136C0F20006DB
S11333D0B04723682A7B23F01C0342EA03036A7B79
S11333E01343AA7B1343236020466968AA6843F207
S11333F00933C0F2000398472B78636020464FF0EE
S11334000001B04770BD00BF836813F0200FFBD0EC
S1133410C069C0B2704700BF4FF6D073CEF20F033D
S11334201A6902F03F0202709A6902F0F002DB6945
S1133430C3F3031342EA030343707047050000001B
S10F3440000000008025000000000000D7
S10B344C008000000048E801C3
S1132000680100203D220000E1250000E1250000D8
S1132010E1250000E1250000E1250000E1250000A4
S1132020E1250000E1250000E1250000E125000094
S1132030E1250000E1250000E1250000D125000094
S1132040E1250000E1250000E1250000E125000074
S1132050E1250000E1250000E1250000E125000064
S1132060E1250000E1250000E1250000E125000054
S1132070E1250000E1250000E1250000E125000044
S1132080E1250000E1250000E1250000E125000034
S1132090E1250000E1250000E1250000E125000024
S11320A0E1250000E1250000E12500009127000062
S11320B0E1250000E1250000EE11AA5510B5044603
S11320C0074BDB6A13F0040F06D00548054B98470D
S11320D020704FF0010010BD4FF0000010BD00BF94
S11320E0004408401D31000070B584B0254B6D4696
S11320F00FCB8DE80F0024484FF00101234CA0477B
S11321004FF002004FF006014FF004024FF00103BC
S11321101F4EB0474FF002004FF007014FF001028D
S11321204FF00003B0471B484FF00101A0471A4885
S11321304FF00201194B9847194E30464FF00101F8
S1132140184B984730464FF00101A0474FF0000666
S11321508DF80060144C20466946144B984720467D
S113216031464FF41652124B98474FF00303636500
S11321704FF00403636320464FF005010D4B98476D
S113218004B070BD4C31000000C202003D2B0000C1
S1132190512F00000023040003001200252E00002C
S11321A040151600152A000000440840C530000000
S11321B0393000008D30000008B51A4B1B786BB91C
S11321C019481A4B984701282AD14FF00102154BA0
S11321D01A704FF00002164B1A7008BD144B187891
S11321E0144BC018114B9847012819D1104A137881
S11321F003F10103DBB213700B4A12789A420FD138
S11322004FF00002074B1A70074B5B78FF2B07D186
S1132210054B9B7823B9084B98474FF0B90398476F
S113222008BD00BF4D00002008000020BD200000B4
S11322304C000020090000205925000010B5174962
S11322408D46114B114A9A4211D202F10403104CEB
S1132250E41A24F0030404F104044FF000031046CC
S11322600C495A581A5003F10403A342F9D10C48FB
S11322700C494FF000028842B8BF40F8042BFFF627
S1132280FAAF054B984710BD08000020000000205D
S11322900B0000205C3100001923000068010020BD
S11322A0080000206800002062B6704708B50248A4
S11322B0024B984708BD00BF00A008406D280000ED
S11322C010B5104B984704460F4B1B68C31AB3F55F
S11322D0FA7F16D30D4B1B784BB94FF001020B4B11
S11322E01A700B484FF000010A4B984707E04FF073
S11322F00002064B1A7006481146064B9847024BDB
S11323001C6010BDC52500005000002054000020B2
S113231000A00840C927000000B583B0684B984767
S1132320684B1B681B0E0ED1674B1A6822F07002B3
S11323301A60664B1A6822F060421A601A6862F0EA
S113234060621A6001E0032B14D8604B1A6822F40F
S1132350FC521A604FF000035D4A136002F104025C
S1132360136002F11402136002F10802136002F117
S11323701802136001A8574B98479DF80430012BAD
S113238010D19DF8053023B9514B1A6842F002026E
S11323901A609DF80530012B04D84F4B1A6842F09F
S11323A001021A604D4B1A684D4B9A4220D84A4B91
S11323B01A6842F490421A604A4A1168C1F306212D
S11323C010681568146804F07F0405F4FE42224383
S11323D000F07F0042EA004242EA0161424A116091
S11323E0424A1168424A11601A6822F490421A6003
S11323F04FF000004FF001010A463E4B98473E4B18
S11324001A6C42F00F021A645A6C6FEA12426FEAB5
S113241002425A6439484FF00001394CA047394808
S11324204FF00001A04738484FF00001A04737485B
S11324304FF00001A04736484FF00001A04735484F
S11324404FF00001A04734484FF00001A047334843
S11324504FF00001A04732484FF00001A047314837
S11324604FF00001A04730484FF00001A0472F482B
S11324704FF00001A0472E484FF00001A0472D481F
S11324804FF00001A0474FF001004FF009014FF059
S113249005020346284CA0474FF001004FF002010B
S11324A0264B9847264B9847264B9847264B9847E8
S11324B0264B9847264D274CA847A047FCE700BF6A
S11324C0A9260000FC81E00F0CA00C4020600C4009
S11324D040800C402D31000044800C40F081E00F1E
S11324E0FFB98A4CB481E00F34200040C881E00F6A
S11324F02C400040C12D000000800C40000304006B
S11325003D2B0000001304000033040000A202006D
S11325100002020000120200002202000032020047
S1132520007202000082020000B2020000E2020017
S113253000F2020000D20200512F0000352F0000EB
S1132540AD22000075250000A9220000E92000004A
S1132550C1220000B92100004FF00002014B1A60B3
S1132560704700BF10E000E0014B1860704700BFE7
S11325705800002008B50D480D4B98470D4BA3FBA0
S113258000204FEA901000F1FF300B4B58604FF0E1
S1132590E0010A4A82F823104FF0000098604FF0DF
S11325A007021A60064B984708BD00BF20000400CC
S11325B0512C0000D34D621010E000E000ED00E06B
S11325C069250000014B1868704700BF58000020BF
S11325D0024B1A6802F101021A6070475800002089
S11325E0FEE700BF1E4BDB6A03F47053B3F5805F54
S11325F030D0B3F5005F03D0B3F5006F06D102E02D
S1132600184B18687047184B18687047144BDB68F0
S113261003F4E063B3F5007F13D004D8ABB1B3F592
S1132620807F14D10FE0B3F5806F16D0B3F5A06F9F
S113263003D0B3F5407F0AD101E00C4870470C4841
S113264070470C4870470C4870470C4870474FF06F
S1132650000070474FF4004070470948704700BFBE
S113266000800C400000002004000020003FAB016B
S1132670809FD500C0D8A700C0CF6A0040420F0099
S1132680406F400108B5054B9847054B5B6803F064
S11326900F0320FA03F0034B186008BDE525000082
S11326A000800C4064000020704700BF4FF40040DD
S11326B0704700BF014B1868704700BF000000203E
S11326C01F2AC4BF203A04314FF0010303FA02F277
S11326D0072924D8DFE801F004080C1014181C2082
S11326E0036C1A4302647047436C1A434264704794
S11326F0836C1A4382647047C36C1A43C264704784
S1132700036D1A4302657047436D1A43426570476F
S1132710836D1A4382657047C36D1A43C26570475F
S11327201F2AC4BF203A04314FF0010303FA02F216
S113273007292CD8DFE801F004090E13181D2227FD
S1132740036C23EA020202647047436C23EA020228
S113275042647047836C23EA020282647047C36C4C
S113276023EA0202C2647047036D23EA020202658F
S11327707047436D23EA020242657047836D23EA82
S1132780020282657047C36D23EA0202C265704784
S11327904FF0FF32034B5A62034B1A6802F10102F5
S11327A01A60704700A008405C0000204FF000034E
S11327B0036403654364436583648365C364C365D9
S11327C0436E002BFCD1704738B50B293FD8DFE8A6
S11327D001F03A060B0F14191E23282D31354FF042
S11327E003034FF0010432E04FF003031C462EE0D4
S11327F04FF003034FF0000429E04FF003034FF0C0
S1132800020424E04FF027034FF000041FE04FF0D0
S113281027034FF003041AE04FF001034FF00304C1
S113282015E04FF001034FF0020410E04FF00103F4
S11328301C460CE04FF001031C4608E04FF0070370
S11328404FF0030403E04FF00F034FF0030422B1F1
S113285021461A46034B984738BD21461A46024B77
S1132860984738BDC12600002127000010B5044652
S1132870204B9A6A22F003029A629A6A42F0020298
S11328809A629A6D42F004029A659A6E22F440723A
S11328909A669A6E42F440729A664FF0000383621D
S11328A0636E002BFCD14FF0FF3363624FF0006284
S11328B0114B1A604FF00103A36241F60B7363607E
S11328C04FF000020B4BDA6720460C4B984740F25E
S11328D0FF33A3604FF005032360636E002BFCD12C
S11328E0074BE360636E002BFCD14FF0010363627E
S11328F0A36210BD00800C4000E100E0AD270000A1
S113290000011C0000F1047001EBC0014FEA8100DA
S1132910026070470A4B5B6803F00702032A0CD875
S1132920DFE802F00202070723F0070343F0010384
S113293003E023F0070343F00303014A53607047A5
S113294000000C40B0FA80F0C0B2C0F11F00704724
S1132950114B5B68114A821811498A420BD803F063
S11329600702A2F10202012A23F0070394BF43F0F5
S1132970030343F001030B4A904209D803F0070212
S1132980A2F10202012A23F0070398BF43F00203D5
S1132990014A5360704700BF00000C40FFDB0BFF8F
S11329A0FF23F4000024F40000487047809FD50002
S11329B0044B5B6D13F0010F03D1024A136D1842EF
S11329C0FCD1704700800C4008B50E4B9B6A4FEA5F
S11329D0400023FA00F303F00303022B06D0032B79
S11329E007D0012B0AD1084B984708BD074B9847DD
S11329F008BD074B98474FEA500008BD4FF0000050
S1132A0008BD00BF00800C40AD260000B5260000C4
S1132A108526000010B50C46C0F3031303F1FF3301
S1132A20032B7AD8DFE803F0020C1C5508463B4B15
S1132A3098473B4B9A6822F00F021043986010BDF0
S1132A40384B98472046354B9847354B5A6822F007
S1132A500F0210435860344B9847344B984710BDCD
S1132A60334B984215D003F5F633984220D0A3F5A2
S1132A707F33984251D14FF004002E4B98472046A3
S1132A80264B9847264B9A6E22F00F021043986605
S1132A9010BD4FF00400274B984720461F4B984722
S1132AA01F4B9A6E22F0F00242EA0010986610BDA5
S1132AB04FF004001F4B98472046184B9847184B7B
S1132AC09A6EA0F1100022F4407242EA00229A6643
S1132AD010BD194B984204D003F5043398421CD11D
S1132AE00DE04FF04000134B984720460B4B98479E
S1132AF00B4B1A6F22F003021043186710BD4FF0FE
S1132B0040000C4B98472046044B9847044B1A6FDF
S1132B1022F0300242EA0010186710BD4529000077
S1132B2000800C4015290000852600005129000072
S1132B3030140A00B12900004005140070B50446A1
S1132B400D46C0F3032303F1FF33052B21D8DFE83F
S1132B5003F0051A1C0E12030E4E17E0C0F30434E2
S1132B600D4E304621462A460C4B984770BD4FF017
S1132B7001000B4E02E04FF010000A4EC4F304347F
S1132B80094B9847EDE7094E00E0094EC4F30434BD
S1132B90E7E770BD78800C4008800C4005290000F0
S1132BA058800C4060800C40B129000044800C40E7
S1132BB040800C4000F00F0000F1FF30032839D8AA
S1132BC0DFE800F0051828024FF0070070471F4B9C
S1132BD0D86A00F47050B0F5805F2ED0B0F5005F75
S1132BE005D0B0F5006F0CBF0420052070474FF0EE
S1132BF002007047154B986A00F0030002281FD0AA
S1132C00032804D001280CBF0320012070474FF093
S1132C10060070470D4B986A00F00C00022812D091
S1132C20032804D001280CBF0320012070474FF073
S1132C30060070474FF0000070474FF003007047E4
S1132C404FF0020070474FF00200704700800C40C4
S1132C5008B500F47810B0F5402F54D014D8B0F56E
S1132C60802F32D005D820B3B0F5003F40F09680D5
S1132C7022E0B0F5002F30D0B0F5202F38D0B0F5D9
S1132C80C02F40F08B8023E0B0F5A01F5DD006D8A4
S1132C90B0F5602F42D0B0F5901F7FD150E0B0F571
S1132CA0C01F68D0B0F5D01F75D0B0F5B01F75D176
S1132CB056E03C4B984708BD3A4B98473A4B9B68C3
S1132CC003F00F0320FA03F008BD384B984708BD02
S1132CD04FF00000364B984708BD4FF00000344BCE
S1132CE09847314B9B6E03F00F0320FA03F008BDA5
S1132CF04FF000002E4B98472B4B9B6EC3F30313EE
S1132D0020FA03F008BD4FF00000294B9847264BEA
S1132D109B6EC3F3012320FA03F008BD4FF00000BB
S1132D20234B9847204B9A6EC2F3012220FA02F0FB
S1132D30DB6F03F0070303F10103B0FBF3F008BDFD
S1132D404FF001001A4B984708BD4FF00100184B93
S1132D509847154B1B6F03F0030320FA03F008BDDB
S1132D604FF00100124B98470F4B1B6FC3F3011335
S1132D7020FA03F008BD0F480F4B9847072804D0EA
S1132D80082805D1074B984708BD0C4B984708BD48
S1132D904FF0000008BD094B984708BD4FF00000F4
S1132DA008BD00BFE525000000800C40852600001A
S1132DB0C929000004001800B52B0000A92900004F
S1132DC008B5042829D8DFE800F0120D170308001D
S1132DD04FF001034FF0020012E04FF010034FF0E8
S1132DE020000DE04FF040034FF0800008E04FF466
S1132DF080734FF4007003E04FF004034FF00800B9
S1132E0039B106490B6232B10A46D36A1842FCD082
S1132E1001E0024B1862024B984708BD00800C4049
S1132E20212F000010B500F00F00012804D0002865
S1132E3064D0032862D829E0A1F1020103295DD8F6
S1132E40DFE801F00210070B4FF000004FF004041C
S1132E500CE04FF00200044608E04FF003004FF08E
S1132E60010403E04FF001004FF003044FF00101AF
S1132E700A46234B9847234B9847234B5C62234BCA
S1132E809847234B9847234B984710BD022814BFFB
S1132E900224002401F1FF3105292FD8DFE801F0D5
S1132EA020030D2E2E164FF000004FF001010A46AC
S1132EB0134B98474FF0020214E04FF00100014613
S1132EC002460F4B98474FF001020BE012484FF0B7
S1132ED002014FF00102114B98474FF0030201E049
S1132EE04FF00002084B996A02FA04F24FF0030013
S1132EF000FA04F421EA040414439C6210BD00BFE8
S1132F00C12D00001529000000800C40212F000075
S1132F10852600005129000040800C40052900004E
S1132F20024BDA6A024B1A80704700BF00800C40E3
S1132F3060000020054B00EBC0004FEA80001A58E7
S1132F4022F0030211431950704700BF0060004093
S1132F50F0B41446CAB16BB14FF0010505FA01F59E
S1132F6000EBC0024FEA820202F1804202F5C04245
S1132F7015610AE04FF0010505FA01F500EBC00602
S1132F804FEA8606274AB2185560072915D800EB80
S1132F90C0024FEA820202F1804202F5C042576841
S1132FA04FEA81054FF00F0606FA05F627EA0606F2
S1132FB004FA05F53543556016E000EBC0024FEA0C
S1132FC0820202F1804202F5C04297684FEA81050D
S1132FD0A5F120054FF00F0606FA05F627EA0606C6
S1132FE004FA05F535439560CCB96BB14FF0010394
S1132FF003FA01F100EBC0004FEA800000F18040C9
S113300000F5C04001610AE04FF0010303FA01F149
S113301000EBC0004FEA8000024BC3185960F0BCBB
S1133020704700BF10600040036C13F0010F02D121
S1133030436C1942FCD1704738B50446154608461E
S113304059B90D4B9C4205D003F580639C4212D1C3
S11330500A4800E00A480B4B98474FEA4010B0FB7F
S1133060F5F5A5F120054FEAC50520464FF004010A
S1133070054B9847E56038BD0040084040151600F0
S113308040051400512C00002930000038B50446D6
S11330906FEA010505F0050541EA45054FF0020117
S11330A0014B9847656038BD2930000031B1436C4D
S11330B0002BFCD14FF00103036470474FF0000371
S11330C00364704770B504460D464FF00201104B7F
S11330D098474FF00A03636020464FF001010D4EFC
S11330E0B04723682A7B23F01C0313436A7B1343F2
S11330F0AA7B1343236020466968AA68064B984755
S11331002B78636020464FF00001B04770BD00BFCC
S113311029300000AD30000039300000836813F01E
S1133120200FFBD0C069C0B2704700BF064B1A69BC
S113313002F03F0202709A6902F0F002DB69C3F305
S11331400313134343707047D0FF0FE005000000E2
S10F3150000000008025000000000000CA
S10B315C008000000048E801B6
S9032000DC

2
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC/Prog/makefile
View File

@ -160,7 +160,7 @@ CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -mlong-calls -O1 -T memory.x
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -D sprintf=usprintf -Wno-main
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) -D snprintf=usnprintf
CFLAGS += -D printf=uipprintf -ffunction-sections -fdata-sections $(INC_PATH)
CFLAGS += -D EFM32G880F128
CFLAGS += -D EFM32G880F128 -Wno-attributes
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
LFLAGS += $(LIB_PATH) -Xlinker --gc-sections
OFLAGS = -O srec

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/bin/openbtl_olimex_efm32g880.out
View File

Binary file not shown.

905
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/bin/openbtl_olimex_efm32g880.srec
View File

@ -1,418 +1,418 @@
S02000006F70656E62746C5F6F6C696D65785F65666D3332673838302E7372656320
S113000060070020C10D00004D1B00004D1B0000C7
S11300104D1B00004D1B00004D1B00004D1B00003C
S11300204D1B00004D1B00004D1B00004D1B00002C
S11300304D1B00004D1B00004D1B00004D1B00001C
S11300404D1B00004D1B00004D1B00004D1B00000C
S11300504D1B00004D1B00004D1B00004D1B0000FC
S11300604D1B00004D1B00004D1B00004D1B0000EC
S11300704D1B00004D1B00004D1B00004D1B0000DC
S11300804D1B00004D1B00004D1B00004D1B0000CC
S11300904D1B00004D1B00004D1B00004D1B0000BC
S11300A04D1B00004D1B00004D1B00004D1B0000AC
S10B00B04D1B00004D1B000074
S11300B8044B9D46C046C046C046C04600F069FE93
S11300C801F09AF960070020890011EB401010F143
S11300D8844002607047DFF89005006810F007015B
S11300E80029012903D9891E012905D908E0C00876
S11300F8C00050F0010003E0C008C00050F0030045
S1130108DFF8641508607047B0FA80F0D0F11F007A
S11301187047DFF854150968DFF85025821ADFF8AC
S113012850359A420DD211F00702921E012A04D8C2
S1130138C908C90051F0030103E0C908C90051F016
S11301480101DFF8282590420BD211F00700801E28
S1130158012804D8C808C00050F0020101E0C90809
S1130168C900DFF8040501607047DFF80805704727
S113017880B5DFF8040500F09EF9C0B2072804D062
S1130188082805D100F0AFFA03E0FFF7EEFF00E01E
S1130198002002BD80B5DFF8E4140968C0B240004D
S11301A831FA00F010F0030000280FD0022806D01E
S11301B802D3032806D00BE000F0CFFA09E000F0E0
S11301C8CFFA06E000F084FA400802E0002000E0DC
S11301D8002002BDDFF8A8140968C90704D4DFF8B1
S11301E8A41409680142FAD1704710B50C00C0F391
S11301F80311012907D0C0F09A80032925D010D310
S1130208042967D093E02000FFF77EFF0400DFF89D
S113021880040068000900012043DFF874140860B2
S113022885E0FFF758FF2000FFF76EFF0400DFF8B2
S113023864040068000900012043DFF858140860CA
S113024800F046FAFFF765FF71E0DFF84C148842C6
S113025808D0DFF84814884215D0DFF848148842DB
S113026823D036E00420FFF7B5FF2000FFF74CFF4A
S11302780400DFF82C040068000900012043DFF8BB
S11302882014086025E00420FFF7A4FF2000FFF7EE
S11302983BFF0400DFF80804006830F0F00050EA7F
S11302A80410DFF8FC13086013E00420FFF792FF42
S11302B82000FFF729FF0400DFF8E403006830F4A6
S11302C84070B4F1100150EA0120DFF8D41308603B
S11302D8FFE72CE0DFF8D013884204D0DFF8CC1312
S11302E8884211D022E04020FFF774FF2000FFF776
S11302F80BFF0400DFF8B80300688008800020437F
S1130308DFF8AC13086011E04020FFF763FF20001A
S1130318FFF7FAFE0400DFF89803006830F03000B5
S113032850EA0410DFF888130860FFE7FFE710BD00
S113033870B50C000021C0F30322D2B2012A09D0FF
S113034829D3032A19D015D3052A1DD018D3062A70
S11303581ED020E0DFF83853C0F30436002902D059
S11303680800FFF737FFE4B2220031002800FFF746
S1130378ABFE70BDDFF83C53EEE7DFF83C53EBE728
S1130388DFF838530121E7E7DFF834531021E3E7B6
S1130398DFF83053E0E7ECE780B510F47810002874
S11303A824D0B0F5003F24D0B0F5802F2AD0B0F582
S11303B8C02F2AD0B0F5002F2BD0B0F5202F32D083
S11303C8B0F5402F39D0B0F5602F41D0B0F5901F6B
S11303D851D0B0F5A01F52D0B0F5B01F59D0B0F528
S11303E8C01F60D0B0F5D01F60D062E000F07BF988
S11303F860E000F078F9DFF89812096811F00F014D
S1130408C84057E000F064F954E00020FFF7C2FE4A
S113041850E00020FFF7BEFEDFF88412096811F0EF
S11304280F01C84046E00020FFF7B4FEDFF8701261
S11304380968C1F30311C8403CE00020FFF7AAFE95
S1130448DFF85C120968090A11F00301C84031E0B9
S11304580020FFF79FFEDFF848120968090A11F027
S11304680301C840DFF86012096811F00701491C4C
S1130478B0FBF1F01EE00120FFF78CFE1AE001202A
S1130488FFF788FEDFF82812096811F00301C84055
S113049810E00120FFF77EFEDFF814120968C1F3AB
S11304A80111C84006E0FFF763FE03E0FFF75DFEB5
S11304B800E0002002BD012110F00F00012806D041
S11304C836D303282DD018D304282FD030E0DFF8F2
S11304D8BC01006810F47050B0F5006F09D0B0F595
S11304E8805F04D0B0F5005F05D1022104E0032148
S11304F802E0042100E005211BE0DFF88001006828
S113050810F00300012804D009D3032805D002D32E
S113051805E0032104E0022102E0062100E00121B4
S113052807E0DFF858010068012102E0072100E034
S113053800210800C0B2704738B50324032310F023
S11305480F000200521E03D0521E012A27D956E07A
S1130558C9B2022906D021D3042919D015D30529F3
S113056819D01BE004240023012201211800C0B281
S113057800F046F8FFF7AFFD4348046000F00CF9BB
S113058800F0A6F8FFF7C5FD39E003240123EBE7E3
S113059802240223E8E701240323E5E72FE00228E5
S11305A801D1002400E00224C9B2012906D002299D
S11305B80FD0032914D0062919D01FE000202F4991
S11305C809680322A2409143A04008432B490860CC
S11305D815E001220121002000F012F80220EEE7C4
S11305E801220121012000F00BF80120E7E7012294
S11305F802213148FFF768FD0320E0E7FFE731BD3A
S113060810B5C0B2002821D0022813D01AD3042868
S113061814D022D2012302240220C9B200291DD0F9
S11306282A490B60D2B2002A1AD018490968014233
S113063816D1FAE7042308240820EEE7102320241F
S11306482020EAE7402380248020E6E74FF48073E3
S11306584FF400744FF40070DFE703E01B480460B4
S113066800F09AF810BD000004000C400124F400C6
S11306780024F400809FD5000400180028800C4052
S113068854800C4050800C4024800C402C800C403A
S113069808800C4004800C403004080030140A0020
S11306A868800C4030000C0040051400401516000A
S11306B870800C4044800C4040800C4058800C40B2
S11306C860800C4078800C407C800C4020800C407A
S11306D880B500F008F82449096811F00F01C840F2
S11306E82249086002BD2248006810F47050B0F531
S11306F8006F0BD0B0F5805F05D0B0F5005F08D16E
S11307081C48006827E04FF4004024E01A480068B9
S113071821E01A48006810F4E060002818D0B0F509
S1130728807F13D0B0F5007F0ED0B0F5407F09D09C
S1130738B0F5806F04D0B0F5A06F0BD110480AE073
S1130748104808E0104806E0104804E0104802E0A9
S1130758104800E00020704770474FF4004070478D
S1130768044800687047000004800C4054060020C8
S11307782C800C40700100206C0100200C800C407F
S1130788003FAB01406F4001809FD500C0D8A7004F
S1130798C0CF6A0040420F0002480349096801803B
S11307A870470000580600202C800C40DFF800F049
S11307B889000020DFF800F00100002080B500F077
S11307C845FADFF878045FF0FF310160DFF8700460
S11307D85FF0FF31016001BD70B504000D00160023
S11307E8200000F0C8F9FF2805D02819401E00F0A1
S11307F8C2F9FF2801D1002019E0600A4FF4007102
S11308084843DFF840140968884208D12B009BB29A
S113081832002100DFF8280400F0E9F807E02B0093
S11308289BB232002100DFF8140400F0E0F870BD38
S113083870B504000D00200000F09DF90600281989
S1130848401E00F098F9F6B2FF2E02D0C0B2FF287D
S113085801D1002005E00100C9B23000C0B200F0A7
S113086849F970BD80B500200090DFF8D403006812
S113087810F1010F01D1012037E00098DFF8C0130F
S11308884968081800900098DFF8B41389680818B4
S113089800900098DFF8A813C96808180090009819
S11308A8DFF89C130969081800900098DFF8901382
S11308B84969081800900098DFF8841389690818B2
S11308C800900098DFF87813C96908180090009818
S11308D8C04300900098401C009000AA0421DFF84F
S11308E864030068B830FFF777FF02BD0020DFF823
S11308F85413096809680818DFF84813096849682F
S11309080818DFF84013096889680818DFF83413F1
S11309180968C9680818CB49096809690818C949E0
S1130928096849690818C749096889690818C549D7
S11309380968D1F8B8100818002801D1012000E08E
S11309480020704780B5BE48006810F1010F06D03A
S1130958BB4800F091F8002801D100200EE0B74808
S1130968006810F1010F06D0B44800F085F800289B
S113097801D1002002E000F07AF9012002BD80B51F
S11309884FF40072B1FBF2F303FB1213002B01D0F6
S113099800200BE002688A4201D1012006E00160D0
S11309A84FF40072001D00F089F9012002BD38B52A
S11309B804000D00A248844208D1A04C290020005C
S11309C8FFF7DDFF002810D100200FE09D480068E4
S11309D8854203D19A4C9B480568EFE7200000F054
S11309E84BF80028EAD1002000E0200032BD2DE9B0
S11309F8F04104000F0015001E00780A4FF400713E
S1130A0801FB00F8206810F1010F07D141462000CE
S1130A18FFF7B5FF002801D100202BE020684045EE
S1130A2808D041462000FFF7C2FF0400002C01D182
S1130A3800201FE02068381A0019071D00F054F937
S1130A48201D381A4FF4007188420AD308F2002195
S1130A582000FFF7ACFF0400002C01D1002009E0BE
S1130A68271D287838707F1C6D1C761EB6B2012E9F
S1130A78E4D20120BDE8F081F8B505000124286816
S1130A8800F079F8C0B2FF2801D100201DE000264B
S1130A9800E0761C802E16D2286810EB860715EB2A
S1130AA886004068009000F01FF9042200A938006D
S1130AB8FFF77CFE002801D0002404E03868009980
S1130AC88842E6D000242000C0B2F2BD5E48007817
S1130AD8C0B2472802D0C0B2492802D14FF40070EE
S1130AE807E0C0B2482802D14FF4805001E04FF427
S1130AF800607047F8B506000C00E4B2F6B2B442E0
S1130B0801D2002036E04F48007AF6B2864205D377
S1130B184C4890F8B000E4B2A04201D2002029E089
S1130B28FFF7D4FF05003000C0B200F04EF806000D
S1130B382000C0B200F049F807002000C0B200F05D
S1130B4861F8C019401E801B401CB0FBF5F4002757
S1130B5800E07F1CBFB2A4B2A7420AD200F0C4F8D6
S1130B68BFB205FB0760FFF725FE0028F1D000207F
S1130B7800E00120F2BD38B50400002500E06D1C3A
S1130B88EDB20F2D1FD200F0AFF8EDB20C202D49B5
S1130B9800FB051000688442F1D3EDB20C2029490A
S1130BA800FB05100068EDB20C21264A01FB052163
S1130BB8496808188442E2D2EDB20C20214900FBAE
S1130BC80510007A00E0FF2032BD38B50400002586
S1130BD800E06D1CEDB20F2D11D200F085F8EDB2D6
S1130BE80C20184900FB0510007AE4B2A042F0D1A9
S1130BF8EDB20C20134900FB0510006801E05FF01A
S1130C08FF3032BD38B50400002500E06D1CEDB29C
S1130C180F2D11D200F068F8EDB20C20094900FB41
S1130C280510007AE4B2A042F0D1EDB20C200549D7
S1130C3800FB0510406800E0002032BD740100206C
S1130C4878030020D8190000FE81E00F10480068DE
S1130C5850F001000E4908600E4841F671310160F8
S1130C680B48006840084000094908607047084874
S1130C78006850F001000649086006480021016038
S1130C8803480068400840000149086070470000B4
S1130C9808000C403C000C4080B500F032F80028F5
S1130CA809D000F06EF804484FF40051016042F294
S1130CB804000068804701BD08ED00E070B5040039
S1130CC80D00160005E0287820706D1C641C00F0E7
S1130CD80BF83000461E80B20128F4D270BD80B5EE
S1130CE800F06AF801BD7047704780B5FFF766FDEC
S1130CF801BD80B5FFF770FD02BD80B5FFF798FD13
S1130D0802BD80B5FFF7F2FD02BD80B5FFF7AAFD6D
S1130D18002801D1002001E0FFF714FE02BD10B441
S1130D2850F8041B81B102681218001D50F8043BE6
S1130D38DC0744BFA9F10104E31852F8044B43F853
S1130D48044B091FF9D1EBE710BC704780B500A824
S1130D5814490A88028000F03BF800F06FFA124840
S1130D680078012802D100A800F05CF801BD80B524
S1130D780E4800F0CEFA012802D10C4800F052F8CF
S1130D8801BD704780B5C9B200F099FA00F044F883
S1130D9801BD054801210170704703480021017015
S1130DA87047000016140000600700200C0600209D
S1130DB880B500F028F802BD044B9D46C046C046E5
S1130DC8C046C046FFF7E9FF00F016FB60070020A5
S1130DD8DFF8240400210170DFF81C040021816479
S1130DE8DFF81404002180F84310DFF80C04002114
S1130DF8A0F84410DFF8000400218170DFF8F8033C
S1130E08002141707047DFF8F0030078002801D111
S1130E18002000E001207047DFF8DC03002180F89F
S1130E284310704780B50178FF2918D100F08BF87A
S1130E38DFF8C40390F84300012802D1102000F021
S1130E4878F8DFF8B403012180F84310DFF8A80329
S1130E58B0F94410DFF8A40300F053F801BDDFF83B
S1130E689813097801294BD10178C92932D0CC29A2
S1130E783FD0CF293AD0D0292FD0D12933D0D22965
S1130E882ED0F32917D0F4290FD0F5290AD0F62942
S1130E980ED0FA2912D0FC2913D0FD2914D0FE292A
S1130EA815D029E000F0CDF8C2E700F0E9F8BFE773
S1130EB800F0BCF8BCE700F005F9B9E700F09EF8CB
S1130EC8B6E700F095F8B3E700F07AF8B0E700F079
S1130ED868F8ADE700F027F9AAE700F03EF9A7E7BC
S1130EE800F007F9A4E700F066F9A1E700F077F944
S1130EF89EE700F08BF99BE7202000F01AF897E7AB
S1130F08ACE780B589B2FFF73DFF01BD10B40023FB
S1130F1802E00478E318401C0C00611E002CF8D190
S1130F28DBB21360012010BC7047B3480021417044
S1130F387047B149FE22CA70AF490871AE48022110
S1130F48A0F84410704710B50400FFF7EEFFAA4854
S1130F5801210170A848FF21C170A748002101712F
S1130F68A548007950F01000A3490871A24800214F
S1130F784171A148A049497941719F484021817133
S1130F889D484021C1719C48002101729A48012161
S1130F98417299480121817297480821A0F84410A8
S1130FA810BD10B50400944800210170FFF7BDFF7F
S1130FB89148FF21C17090480121A0F8441010BD48
S1130FC88D49FF22CA708C4900220A718A498A4ACB
S1130FD852784A71884900228A7187490022CA7165
S1130FE8854900220A7284490622A1F844207047E0
S1130FF810B504000020FFF79CFF10BD7E49FF22B6
S1131008CA707D497E4A8A647B4900220A717A49FA
S113101800224A71784900228A7177490722C1F867
S1131028072075490822A1F8442070477249FF2215
S1131038CA707149406888646F480121A0F8441057
S1131048704710B504006078402803D32220FFF7C6
S113105870FF14E0627892B26748816C6948FFF7C0
S11310682DFE6548FF21C1706348806C61780818BB
S1131078614988646078401C5F49A1F8440010BD48
S113108810B504006078402803D32220FFF751FFED
S113109817E0594861688164627892B25648816C55
S11310A85848FFF70BFE5448FF21C1705248806C22
S11310B861780818504988646078401C4E49A1F842
S11310C8440010BD80B54C49FF22CA704E4A41689D
S11310D84948806CFFF71AFF4749087146480021C0
S11310E8417145480021817143480821A0F8441002
S11310F801BD4149FF22CA703F4900220A713E4995
S113110800224A713C4940228A713B490022CA7133
S1131118394900220A72384900224A72364907229C
S1131128A1F84420704780B5421C3F213248806CA6
S1131138FFF7DFFD002803D13120FFF7FAFE0BE0AB
S11311482D48FF21C1702C48806C3F302A4988649F
S113115829480121A0F8441001BD10B504006078A5
S11311683F2803D32220FFF7E4FE23E02248FF218F
S1131178C17021480121A0F844106078002807D1E3
S1131188FFF7C3FD002802D13120FFF7D2FE11E09A
S1131198A21C61781848806CFFF7ABFD002803D1C6
S11311A83120FFF7C6FE05E01348806C6178081803
S11311B81149886410BD80B541680F48806CFFF7F9
S11311C89CFD002803D13120FFF7B3FE06E00A484E
S11311D8FF21C17008480121A0F8441001BD10B5D1
S11311E80400FFF77CFD0448FF21C1700248012177
S11311F8A0F8441010BD00007C0500207F050020E5
S1131208681B0000800500208305002080B531207C
S1131218FFF78FFE01BD50F8041B61B150F8042B91
S1131228D30744BFA9F101039A18002342F8043BE9
S1131238091FFAD1EFE770474163704700B585B0DD
S113124800A85F49102200F0E3F801215D48FFF788
S11312586FF8012304220621022000F016F9002366
S113126801220721022000F010F901215648FFF756
S11312785FF802215548FFF75FF901215448FEF74A
S1131288B4FF01215248FFF753F800208DF80000FD
S113129800A9504800F0ADF94FF4165200214D480A
S11312A800F065F94C480321016004214948FFF71F
S11312B8C3FF0521474800F081F905B000BD70B5AA
S11312C804000D00EDB2412D03D36821434800F01A
S11312D8C7F92800C0B200F05DF8012803D06B21DB
S11312E83E4800F0BDF900260CE0FFF7FDFCB6B25D
S11312F8305D00F04FF8012803D07321374800F01F
S1131308AFF9761C2800C0B2B6B280B28642ECD3DC
S113131870BD10B504003248007800280CD131485B
S113132800F02AF8012805D12D48012101702E4822
S113133800210170002010BD2B480078294940186D
S1131348401C00F019F80128F4D127480078401C03
S11313582549087024480078224909788842E9D147
S11313682148027892B221492000FFF7A7FC1C48C3
S1131378002101700120DEE710B5040000201C499B
S11313880968490704D5134800F056F9207001206C
S1131398C0B210BD80B517490968C90601D4002038
S11313A80CE00100C9B20B4800F04CF901E0FFF76A
S11313B89BFC10480068C006F9D5012002BD000056
S11313C83C1B000000C202000023040003001200BA
S11313D8401516000044084054440840D41A00003C
S11313E85E060020C80500205D060020C90500200F
S11313F82C4408400844084000F03EF9002801D075
S113140800F03CF9002000F0BEF900F057FAFF00A4
S1131418103A07D330B4B1E83810103AA0E83810BD
S1131428F9D230BC530724BFB1E80810A0E808106B
S113143844BF51F8043B40F8043BD20724BF31F8B9
S1131448022B20F8022B44BF0B7803707047083A2C
S113145807D3B1E80810083A40F8043B40F804CB35
S1131468F7D25307E4E70000C0B224223B4B02FB47
S11314780032126892089200C9B21143C0B2242201
S1131488364B02FB00300160704770B4D2B2002AB8
S113149812D0002B08D0C0B22424304D04FB0054D1
S11314A801258D40256107E0C0B224242B4D04FB9F
S11314B8005401258D406561082919D2C0B224243D
S11314C8264D04FB005464680F250E00F6B2B600DE
S11314D8B540AC43D2B20D00EDB2AD0012FA05F539
S11314E82C43C0B224251D4E05FB00656C601AE030
S11314F8C0B22424194D04FB0054A4680F250E001F
S1131508083EF6B2B600B540AC43D2B20D00083D71
S1131518EDB2AD0012FA05F52C43C0B224250F4EE6
S113152805FB0065AC60D2B2002A14D1002B09D0A7
S1131538C0B22422094B02FB0030012212FA01F145
S1131548016108E0C0B22422044B02FB00300122EE
S113155812FA01F1416170BC70470000006000405C
S1131568026CD20702D4426C0A42FCD1704738B5E7
S113157804001500002906D10C4884420ED10C48F9
S1131588FEF70AFF01004801B0FBF5F5203DED0028
S113159804212000FFF7E4FFE56031BD05488442DB
S11315A801D10548ECE7F8E70000000000400840D6
S11315B840051400004408404015160038B50400DE
S11315C8C9B2CD4315F005056D00C9B20D4302211A
S11315D82000FFF7C5FF656031BDC9B2002905D0F9
S11315E8416C0029FCD10121016401E0002101645E
S11315F8704738B504000D0002212000FFF7B0FF42
S11316080A20606001212000FFF7E7FF206830F01E
S11316181C00297B0843697B0843A97B0843206095
S1131628AA6869682000FFF7A2FF28786060002193
S11316382000FFF7D2FF31BD81688906FCD5C06957
S1131648C0B2704738B504000D00A068C006FCD5C8
S113165840212000FFF784FFEDB2A56231BD0000F0
S113166880B5034A106003480160FFF73DFBFCE7BF
S11316784C060020500600200120704710B5084988
S113168879441C31074C7C441A34A14206D0081D05
S11316980A68511888470146A142F8D110BD00BF15
S11316A8700400009004000080B568480168080EC2
S11316B800280DD16648026832F07002026065485D
S11316C80268D200D2080260026872F060620260A6
S11316D8080E042813D25F48016831F4FC510160F4
S11316E85D48002101605D48002101605C480021DB
S11316F801605C48002101605B480021016000A88A
S113170800F0DEF89DF80000012811D19DF80100D1
S1131718002804D15048016851F0020101609DF885
S11317280100022804D24D48016851F0010101600A
S11317384E4801684E48814224D24848016851F411
S1131748904101604B480068000410F0FE4149488C
S1131758006810F07F0051EA00414648006810F420
S1131768FE4001434348006810F07F0001434248AB
S1131778016042484249096801603848016831F407
S11317889041016001BD80B500F005F800F0AEF8A5
S113179800F0B6F8FCE780B5FEF7DEFFFFF784FF3C
S11317A8012201210020FEF72BFF2B48006850F08E
S11317B80F00294908602948006840F47F4050F028
S11317C8FF002649086000212E48FEF7B1FD0021DC
S11317D82D48FEF7ADFD00212C48FEF7A9FD002198
S11317E82B48FEF7A5FD00212A48FEF7A1FD00219C
S11317F82948FEF79DFD00212848FEF799FD0021A0
S11318082748FEF795FD00212648FEF791FD0021A3
S11318182548FEF78DFD00212448FEF789FD0021A7
S11318282348FEF785FD00212248FEF781FD0021AB
S11318382148FEF77DFD0123052209210120FFF738
S113184824FE02210120FFF70FFE01BDFC81E00FF9
S11318580CA00C4020600C4040800C4044800C409C
S113186858800C4060800C4078800C40F081E00F78
S113187800BA8A4CB481E00F342000402C40004068
S1131888C881E00F000304000013040000330400BF
S113189800A202000002020000120200002202005C
S11318A800320200007202000082020000B202004C
S11318B800E2020000F2020000D2020000F028B8A0
S11318C80749096811F03F0101700649096811F0D8
S11318D8F001054A1268C2F30312114341707047BC
S11318E8E0FF0FE0E8FF0FE0ECFF0FE080B5FFF743
S11318F8FAF900F013F8FFF7F8F9FFF727FA01BD32
S113190880B5FFF7F1F9FFF732FA00F010F801BDDE
S11319180746384600F022F8FBE7000080B50E4879
S11319280121017000F024F800F001F801BD80B530
S1131938FFF73EFA01280ED00748007801280AD19B
S113194800F038F8322806D303480021017000F06B
S113195820F8FFF7A1F901BD5C06002080B5C04658
S1131968C046024A11001820ABBEFBE7260002005D
S113197880B500F00EF8124843F2AF6101601148D7
S113198800210160104805210160002000F00FF8D3
S113199801BD0D480021016070470B480068C00371
S11319A804D50A480088401C08490880704707493C
S11319B80880704780B5FFF7F0FF0448008802BD2F
S11319C814E000E018E000E010E000E05A0600200F
S113000068070020110E0000411B0000411B000086
S1130010411B0000411B0000411B0000411B00006C
S1130020411B0000411B0000411B0000411B00005C
S1130030411B0000411B0000411B0000411B00004C
S1130040411B0000411B0000411B0000411B00003C
S1130050411B0000411B0000411B0000411B00002C
S1130060411B0000411B0000411B0000411B00001C
S1130070411B0000411B0000411B0000411B00000C
S1130080411B0000411B0000411B0000411B0000FC
S1130090411B0000411B0000411B0000411B0000EC
S11300A0411B0000411B0000411B0000411B0000DC
S10B00B0411B0000411B00008C
S11300B8044B9D46C046C046C046C04600F063FE99
S11300C801F0C2F968070020890011EB401010F113
S11300D8844002607047DFF88405006810F0070167
S11300E80029012903D9891E012904D906E001211F
S11300F861F3020002E0032161F30200DFF85C15FA
S113010808607047B0FA80F0D0F11F007047DFF83C
S11301184C150968DFF84825821ADFF848359A42F1
S11301280BD211F00702921E012A03D8032262F3AC
S1130138020102E0012262F30201DFF82425904261
S11301480AD211F00700801E012803D8022060F3A8
S1130158020101E0C908C900DFF800050160704721
S1130168DFF80405704780B5DFF8000500F09EF954
S1130178C0B2072804D0082805D100F0AEFA03E07D
S1130188FFF7EEFF00E0002002BD80B5DFF8E014C1
S11301980968C0B2400031FA00F010F003000028EA
S11301A80FD0022806D002D3032806D00BE000F0B3
S11301B8CEFA09E000F0CEFA06E000F083FA40082F
S11301C802E0002000E0002002BDDFF8A81409685E
S11301D8C90704D4DFF8A01409680142FAD17047AA
S11301E810B50C00C0F30311012907D0C0F09A80A0
S11301F8032925D010D3042967D093E02000FFF702
S113020881FF0400DFF87C04006800090001204332
S1130218DFF87014086085E0FFF75DFF2000FFF742
S113022871FF0400DFF8600400680009000120433E
S1130238DFF85414086000F045FAFFF768FF71E02E
S1130248DFF84814884208D0DFF84414884215D0EF
S1130258DFF84414884223D036E00420FFF7B5FFC2
S11302682000FFF74FFF0400DFF8280400680009A6
S113027800012043DFF81C14086025E00420FFF780
S1130288A4FF2000FFF73EFF0400DFF8080400681D
S113029830F0F00050EA0410DFF8F813086013E0B7
S11302A80420FFF792FF2000FFF72CFF0400DFF87B
S11302B8E403006830F44070B4F1100150EA0120FE
S11302C8DFF8D0130860FFE72CE0DFF8D01388428A
S11302D804D0DFF8CC13884211D022E04020FFF785
S11302E874FF2000FFF70EFF0400DFF8B80300686E
S11302F8800880002043DFF8AC13086011E0402038
S1130308FFF763FF2000FFF7FDFE0400DFF8940306
S1130318006830F0300050EA0410DFF888130860F1
S1130328FFE7FFE710BD70B50C000021C0F30322FE
S1130338D2B2012A09D029D3032A19D015D3052A00
S11303481DD018D3062A1ED020E0DFF83853C0F396
S11303580436002902D00800FFF737FFE4B2220070
S113036831002800FFF7B0FE70BDDFF83C53EEE71C
S1130378DFF83853EBE7DFF838530121E7E7DFF814
S113038834531021E3E7DFF83053E0E7ECE780B5B6
S113039810F47810002824D0B0F5003F24D0B0F52C
S11303A8802F2AD0B0F5C02F2AD0B0F5002F2BD03B
S11303B8B0F5202F32D0B0F5402F39D0B0F5602FEA
S11303C841D0B0F5901F51D0B0F5A01F52D0B0F570
S11303D8B01F59D0B0F5C01F60D0B0F5D01F60D0A1
S11303E862E000F07AF960E000F077F9DFF894123F
S11303F8096811F00F01C84057E000F063F954E0B0
S11304080020FFF7C2FE50E00020FFF7BEFEDFF831
S11304188412096811F00F01C84046E00020FFF774
S1130428B4FEDFF870120968C1F30311C8403CE058
S11304380020FFF7AAFEDFF85C120968090A11F028
S11304480301C84031E00020FFF79FFEDFF84412A3
S11304580968090A11F00301C840DFF86012096845
S113046811F00701491CB0FBF1F01EE00120FFF771
S11304788CFE1AE00120FFF788FEDFF828120968CD
S113048811F00301C84010E00120FFF77EFEDFF8F9
S113049814120968C1F30111C84006E0FFF763FEAE
S11304A803E0FFF75DFE00E0002002BD012110F02B
S11304B80F00012806D036D303282DD018D30428DA
S11304C82FD030E0DFF8B801006810F47050B0F5B0
S11304D8006F09D0B0F5805F04D0B0F5005F05D196
S11304E8022104E0032102E0042100E005211BE0CD
S11304F8DFF87C01006810F00300012804D009D358
S1130508032805D002D305E0032104E0022102E018
S1130518062100E0012107E0DFF854010068012109
S113052802E0072100E000210800C0B2704738B596
S11305380324032310F00F000200521E03D0521E9E
S1130548012A27D956E0C9B2022906D021D30429A1
S113055819D015D3052919D01BE00424002301223E
S113056801211800C0B200F046F8FFF7B4FD434873
S1130578046000F00BF900F0A5F8FFF7C8FD39E0B6
S113058803240123EBE702240223E8E701240323DD
S1130598E5E72FE0022801D1002400E00224C9B2D3
S11305A8012906D002290FD0032914D0062919D00D
S11305B81FE000202E4909680322A2409143A0406D
S11305C808432B49086015E001220121002000F0AE
S11305D812F80220EEE701220121012000F00BF8B5
S11305E80120E7E7012202213048FFF76DFD0320CF
S11305F8E0E7FFE731BD10B5C0B2002821D00228DA
S113060813D01AD3042814D022D20123022402209E
S1130618C9B200291DD02A490B60D2B2002A1AD0C7
S113062817490968014216D1FAE704230824082067
S1130638EEE7102320242020EAE7402380248020AA
S1130648E6E74FF480734FF400744FF40070DFE76B
S113065803E01B48046000F099F810BD04000C4046
S11306680124F4000024F400809FD500040018003D
S113067828800C4054800C4050800C4024800C404E
S11306882C800C4008800C4004800C403004080086
S113069830140A0068800C4030000C004005140037
S11306A84015160070800C4044800C4040800C407B
S11306B858800C4060800C4078800C407C800C4052
S11306C820800C4080B500F008F82449096811F02E
S11306D80F01C8402249086002BD2248006810F48E
S11306E87050B0F5006F0BD0B0F5805F05D0B0F551
S11306F8005F08D11C48006827E04FF4004024E05C
S11307081A48006821E01A48006810F4E0600028DC
S113071818D0B0F5807F13D0B0F5007F0ED0B0F5B7
S1130728407F09D0B0F5806F04D0B0F5A06F0BD12D
S113073810480AE0104808E0104806E0104804E0B1
S1130748104802E0104800E00020704770474FF45A
S113075800407047044800687047000004800C405B
S1130768580600202C800C40700100206C010020E9
S11307780C800C40003FAB01406F4001809FD500C6
S1130788C0D8A700C0CF6A0040420F0002480349FE
S113079809680180704700005C0600202C800C402A
S11307A8DFF800F089000020DFF800F001000020E5
S11307B880B500F043FADFF874045FF0FF3101609C
S11307C8DFF86C045FF0FF31016001BD70B504000F
S11307D80D001600200000F0C6F9FF2805D02819DE
S11307E8401E00F0C0F9FF2801D1002019E0600A7A
S11307F84FF400714843DFF83C140968884208D173
S11308082B009BB232002100DFF8240400F0E8F842
S113081807E02B009BB232002100DFF8100400F03F
S1130828DFF870BD70B504000D00200000F09BF9DE
S113083806002819401E00F096F9F6B2FF2E02D0E1
S1130848C0B2FF2801D1002005E00100C9B2300080
S1130858C0B200F047F970BD80B500200090DFF801
S1130868D003006810F1010F01D1012037E000988E
S1130878DFF8BC134968081800900098DFF8B01333
S11308888968081800900098DFF8A413C968081844
S113089800900098DFF898130969081800900098E8
S11308A8DFF88C134969081800900098DFF8801362
S11308B88969081800900098DFF87413C969081842
S11308C800900098C04300900098401C009000AA33
S11308D80421DFF860030068B830FFF777FF02BD32
S11308E80020DFF85013096809680818DFF8441372
S11308F8096849680818DFF83C1309688968081802
S1130908CC490968C9680818CA49096809690818EE
S1130918C849096849690818C649096889690818E5
S1130928C4490968D1F8B8100818002801D1012071
S113093800E00020704780B5BD48006810F1010F41
S113094806D0BB4800F090F8002801D100200EE042
S1130958B648006810F1010F06D0B44800F084F8D6
S1130968002801D1002002E000F079F9012002BD3D
S113097880B54FF40072B1FBF2F303FB1213002BA2
S113098801D000200BE002688A4201D1012006E070
S113099801604FF40072001D00F08AF9012002BDC5
S11309A838B504000D00A248844208D19F4C2900A0
S11309B82000FFF7DDFF002810D100200FE09D483C
S11309C80068854203D19A4C9A480568EFE72000ED
S11309D800F04AF80028EAD1002000E0200032BDE7
S11309E82DE9F04104000F0015001E00780A4FF4A9
S11309F8007101FB00F8206810F1010F07D141468E
S1130A082000FFF7B5FF002801D100202AE0206864
S1130A18404508D041462000FFF7C2FF0400002CDF
S1130A2801D100201EE02068381A0019071D00F0C3
S1130A3855F9201D381AB0F5007F0AD318F500714E
S1130A482000FFF7ADFF0400002C01D1002009E0CD
S1130A58271D287838707F1C6D1C761EB6B2002EB0
S1130A68E5D10120BDE8F081F8B505000124286826
S1130A7800F079F8C0B2FF2801D100201DE000265B
S1130A8800E0761C802E16D2286810EB860715EB3A
S1130A9886004068009000F021F9042200A938007B
S1130AA8FFF77EFE002801D0002404E0386800998E
S1130AB88842E6D000242000C0B2F2BD5E48007827
S1130AC8C0B2472802D0C0B2492802D14FF40070FE
S1130AD807E0C0B2482802D14FF4805001E04FF437
S1130AE800607047F8B506000C00E4B2F6B2B442F0
S1130AF801D2002036E04F48007AF6B2864205D388
S1130B084C4890F8B000E4B2A04201D2002029E099
S1130B18FFF7D4FF05003000C0B200F04EF806001D
S1130B282000C0B200F049F807002000C0B200F06D
S1130B3861F8C019401E801B401CB0FBF5F4002767
S1130B4800E07F1CBFB2A4B2A7420AD200F0C6F8E4
S1130B58BFB205FB0760FFF727FE0028F1D000208D
S1130B6800E00120F2BD38B50400002500E06D1C4A
S1130B78EDB20F2D1FD200F0B1F8EDB20C202D49C3
S1130B8800FB051000688442F1D3EDB20C2029491A
S1130B9800FB05100068EDB20C21264A01FB052173
S1130BA8496808188442E2D2EDB20C20214900FBBE
S1130BB80510007A00E0FF2032BD38B50400002596
S1130BC800E06D1CEDB20F2D11D200F087F8EDB2E4
S1130BD80C20184900FB0510007AE4B2A042F0D1B9
S1130BE8EDB20C20134900FB0510006801E05FF02A
S1130BF8FF3032BD38B50400002500E06D1CEDB2AD
S1130C080F2D11D200F06AF8EDB20C20094900FB4F
S1130C180510007AE4B2A042F0D1EDB20C200549E7
S1130C2800FB0510406800E0002032BD740100207C
S1130C3878030020D8190000FE81E00F10480068EE
S1130C4850F001000E4908600E4841F67131016008
S1130C580B48006840084000094908607047084884
S1130C68006850F001000649086006480021016048
S1130C7803480068400840000149086070470000C4
S1130C8808000C403C000C4080B500F034F8002803
S1130C980BD000F070F800F09AF804484FF40051B3
S1130CA8016042F204000068804701BD08ED00E0DD
S1130CB870B504000D00160005E0287820706D1C3E
S1130CC8641C00F00BF83000461E80B20028F4D1F2
S1130CD870BD80B500F098F801BD7047704780B5C5
S1130CE8FFF766FD01BD80B5FFF770FD02BD80B555
S1130CF8FFF798FD02BD80B5FFF7F2FD02BD80B590
S1130D08FFF7AAFD002801D1002001E0FFF713FE38
S1130D1802BD10B450F8041B81B102681218001DFA
S1130D2850F8043BDC0744BFA9F10104E31852F866
S1130D38044B43F8044B091FF9D1EBE710BC704787
S1130D4880B515480088ADF8000000F069F800F097
S1130D589DFA12480078012802D100A800F08AF808
S1130D6801BD80B50E4800F0FCFA012802D10C48F8
S1130D7800F080F801BD704780B5C9B200F0C7FA29
S1130D8800F072F801BD054801210170704703485D
S1130D9800210170704700006614000064060020FA
S1130DA80C06002080B500F056F802BD80B500F0AE
S1130DB80EF8114843F2AF61016010480021016048
S1130DC80F48052101600F480021018001BD0C482E
S1130DD80021016070470A480068C00304D5094827
S1130DE80088401C07490880704780B5FFF7F3FF67
S1130DF80448008802BD000014E000E018E000E0A8
S1130E0810E000E05E060020044B9D46C046C04644
S1130E18C046C046FFF7BBFF00F016FB680700207A
S1130E28DFF8240400210170DFF81C040021816428
S1130E38DFF81404002180F84310DFF80C040021C3
S1130E48A0F84410DFF8000400218170DFF8F803EB
S1130E58002141707047DFF8F0030078002801D1C1
S1130E68002000E001207047DFF8DC03002180F84F
S1130E784310704780B50178FF2918D100F08BF82A
S1130E88DFF8C40390F84300012802D1102000F0D1
S1130E9878F8DFF8B403012180F84310DFF8A803D9
S1130EA8B0F94410DFF8A40300F053F801BDDFF8EB
S1130EB89813097801294BD10178C92932D0CC2952
S1130EC83FD0CF293AD0D0292FD0D12933D0D22915
S1130ED82ED0F32917D0F4290FD0F5290AD0F629F2
S1130EE80ED0FA2912D0FC2913D0FD2914D0FE29DA
S1130EF815D029E000F0CDF8C2E700F0E9F8BFE723
S1130F0800F0BCF8BCE700F005F9B9E700F09EF87A
S1130F18B6E700F095F8B3E700F07AF8B0E700F028
S1130F2868F8ADE700F027F9AAE700F03EF9A7E76B
S1130F3800F007F9A4E700F066F9A1E700F077F9F3
S1130F489EE700F08BF99BE7202000F01AF897E75A
S1130F58ACE780B589B2FFF70FFF01BD10B40023D9
S1130F6802E00478E318401C0C00611E002CF8D140
S1130F78DBB21360012010BC7047B34800214170F4
S1130F887047B149FE22CA70AF490871AE480221C0
S1130F98A0F84410704710B50400FFF7EEFFAA4804
S1130FA801210170A848FF21C170A74800210171DF
S1130FB8A548007950F01000A3490871A2480021FF
S1130FC84171A148A049497941719F4840218171E3
S1130FD89D484021C1719C48002101729A48012111
S1130FE8417299480121817297480821A0F8441058
S1130FF810BD10B50400944800210170FFF7BDFF2F
S11310089148FF21C17090480121A0F8441010BDF7
S11310188D49FF22CA708C4900220A718A498A4A7A
S113102852784A71884900228A7187490022CA7114
S1131038854900220A7284490622A1F8442070478F
S113104810B504000020FFF79CFF10BD7E49FF2265
S1131058CA707D497E4A8A647B4900220A717A49AA
S113106800224A71784900228A7177490722C1F817
S1131078072075490822A1F8442070477249FF22C5
S1131088CA707149406888646F480121A0F8441007
S1131098704710B504006078402803DB2220FFF76E
S11310A870FF14E0627892B26748816C6948FFF770
S11310B8FFFD6548FF21C1706348806C617808189A
S11310C8614988646078401C5F49A1F8440010BDF8
S11310D810B504006078402803DB2220FFF751FF95
S11310E817E0594861688164627892B25648816C05
S11310F85848FFF7DDFD5448FF21C1705248806C01
S113110861780818504988646078401C4E49A1F8F1
S1131118440010BD80B54C49FF22CA704E4A41684C
S11311284948806CFFF71AFF47490871464800216F
S1131138417145480021817143480821A0F84410B1
S113114801BD4149FF22CA703F4900220A713E4944
S113115800224A713C4940228A713B490022CA71E3
S1131168394900220A72384900224A72364907224C
S1131178A1F84420704780B5421C3F213248806C56
S1131188FFF7B1FD002803D13120FFF7FAFE0BE089
S11311982D48FF21C1702C48806C3F302A4988644F
S11311A829480121A0F8441001BD10B50400607855
S11311B83F2803DB2220FFF7E4FE23E02248FF2137
S11311C8C17021480121A0F844106078002807D193
S11311D8FFF795FD002802D13120FFF7D2FE11E078
S11311E8A21C61781848806CFFF77DFD002803D1A4
S11311F83120FFF7C6FE05E01348806C61780818B3
S11312081149886410BD80B541680F48806CFFF7A8
S11312186EFD002803D13120FFF7B3FE06E00A482B
S1131228FF21C17008480121A0F8441001BD10B580
S11312380400FFF74EFD0448FF21C1700248012154
S1131248A0F8441010BD00007C0500207F05002094
S11312585C1B0000800500208305002080B5312038
S1131268FFF78FFE01BD50F8041B61B150F8042B41
S1131278D30744BFA9F101039A18002342F8043B99
S1131288091FFAD1EFE770474163704700B585B08D
S113129800A85F49102200F0E3F801215D48FFF738
S11312A842F8012304220621022000F016F9002343
S11312B801220721022000F010F901215648FFF706
S11312C832F802215548FFF732F901215448FEF754
S11312D887FF01215248FFF726F800208DF8000007
S11312E800A9504800F0ADF94FF4165200214D48BA
S11312F800F065F94C480321016004214948FFF7CF
S1131308C3FF0521474800F081F905B000BD70B559
S113131804000D00EDB2412D03DB6821434800F0C1
S1131328C7F92800C0B200F05DF8012803D06B218A
S11313383E4800F0BDF900260CE0FFF7CFFCB6B23A
S1131348305D00F04FF8012803D07321374800F0CE
S1131358AFF9761C2800C0B2B6B280B28642ECD38C
S113136870BD10B504003248007800280CD131480B
S113137800F02AF8012805D12D48012101702E48D2
S113138800210170002010BD2B480078294940181D
S1131398401C00F019F80128F4D127480078401CB3
S11313A82549087024480078224909788842E9D1F7
S11313B82148027892B221492000FFF779FC1C48A1
S11313C8002101700120DEE710B5040000201C494B
S11313D80968490704D5134800F056F9207001201C
S11313E8C0B210BD80B517490968C90601D40020E8
S11313F80CE00100C9B20B4800F04CF901E0FFF71A
S11314086DFC10480068C006F9D5012002BD000033
S1131418301B000000C20200002304000300120075
S1131428401516000044084054440840D01A0000EF
S113143862060020C805002061060020C9050020B6
S11314482C4408400844084000F03EF9002801D024
S113145800F03CF9002000F0BCF900F055FAFF0058
S1131468103A07D330B4B1E83810103AA0E838106D
S1131478F9D230BC530724BFB1E80810A0E808101B
S113148844BF51F8043B40F8043BD20724BF31F869
S1131498022B20F8022B44BF0B7803707047083ADC
S11314A807D3B1E80810083A40F8043B40F804CBE5
S11314B8F7D25307E4E70000C0B224223B4B02FBF7
S11314C80032126892089200C9B21143C0B22422B1
S11314D8364B02FB00300160704770B4D2B2002A68
S11314E812D0002B08D0C0B22424304D04FB005481
S11314F801258D40256107E0C0B224242B4D04FB4F
S1131508005401258D406561082919D2C0B22424EC
S1131518264D04FB005464680F250E00F6B2B6008D
S1131528B540AC43D2B20D00EDB2AD0012FA05F5E8
S11315382C43C0B224251D4E05FB00656C601AE0DF
S1131548C0B22424194D04FB0054A4680F250E00CE
S1131558083EF6B2B600B540AC43D2B20D00083D21
S1131568EDB2AD0012FA05F52C43C0B224250F4E96
S113157805FB0065AC60D2B2002A14D1002B09D057
S1131588C0B22422094B02FB0030012212FA01F1F5
S1131598016108E0C0B22422044B02FB003001229E
S11315A812FA01F1416170BC70470000006000400C
S11315B8026CD20702D4426C0A42FCD1704738B597
S11315C804001500002906D10C4884420ED10C48A9
S11315D8FEF7DDFE01004801B0FBF5F5203DED0006
S11315E804212000FFF7E4FFE56031BD054884428B
S11315F801D10548ECE7F8E7000000000040084086
S113160840051400004408404015160038B504008D
S1131618C9B2CD4315F005056D00C9B20D430221C9
S11316282000FFF7C5FF656031BDC9B2002905D0A8
S1131638416C0029FCD10121016401E0002101640D
S1131648704738B504000D0002212000FFF7B0FFF1
S11316580A20606001212000FFF7E7FF206830F0CE
S11316681C00297B0843697B0843A97B0843206045
S1131678AA6869682000FFF7A2FF28786060002143
S11316882000FFF7D2FF31BD81688906FCD5C06907
S1131698C0B2704738B504000D00A068C006FCD578
S11316A840212000FFF784FFEDB2A56231BD0000A0
S11316B880B5034A106003480160FFF70FFBFCE79D
S11316C84C060020500600200120704710B5074939
S11316D879441831064C7C44163404E00A68081D21
S11316E8511888470146A142F8D110BD18040000DA
S11316F83804000080B568480168080E00280DD138
S11317086648026832F07002026065480268D200D6
S1131718D2080260026872F060620260080E04284F
S113172813D25F48016831F4FC5101605D4800211F
S113173801605D48002101605C48002101605C484B
S1131748002101605B480021016000A800F0DEF878
S11317589DF80000012811D19DF80100002804D14A
S11317685048016851F0020101609DF80100022807
S113177804DA4D48016851F0010101604E480168DE
S11317884E48814224D24848016851F4904101608E
S11317984B480068000410F0FE414948006810F006
S11317A87F0051EA00414648006810F4FE400143B6
S11317B84348006810F07F000143424801604248F2
S11317C84249096801603848016831F49041016070
S11317D801BD80B500F005F800F0AEF800F0B8F8E7
S11317E8FCE780B5FEF7B2FFFFF784FF0122012171
S11317F80020FEF700FF2B48006850F00F0029492D
S113180808602948006840F47F4050F0FF002649EA
S1131818086000212E48FEF786FD00212D48FEF7BA
S113182882FD00212C48FEF77EFD00212B48FEF79F
S11318387AFD00212A48FEF776FD00212948FEF7A3
S113184872FD00212848FEF76EFD00212748FEF7A7
S11318586AFD00212648FEF766FD00212548FEF7AB
S113186862FD00212448FEF75EFD00212348FEF7AF
S11318785AFD00212248FEF756FD00212148FEF7B3
S113188852FD0123052209210120FFF726FE02212A
S11318980120FFF711FE01BDFC81E00F0CA00C40F4
S11318A820600C4040800C4044800C4058800C4020
S11318B860800C4078800C40F081E00F00BA8A4CBC
S11318C8B481E00F342000402C400040C881E00F70
S11318D800030400001304000033040000A2020003
S11318E8000202000012020000220200003202007C
S11318F8007202000082020000B2020000E202004C
S113190800F2020000D2020000F02CB8074909686E
S113191811F03F0101700649096811F0F001054A08
S11319281268C2F30312114341707047E0FF0FE0DD
S1131938E8FF0FE0ECFF0FE080B5FFF7CEF9FFF703
S113194835FAFFF7CCF9FFF7FBF900F011F801BD00
S113195880B5FFF7C3F9FFF73EFAFFF702FA00F084
S113196812F801BD0746384600F028F8FBE70000E6
S113197880B5104801210170FFF737FA0E49086055
S113198800F001F801BD80B5FFF70CFA01280FD06B
S11319980848007801280BD1FFF727FA0649096897
S11319A83231884204D3034800210170FFF76CF9EF
S11319B801BD0000600600205406002080B5C04622
S11319C8C046024A11001820ABBEFBE726000200FD
S11319D8002000000020000001000000004000007A
S11319E80020000002000000006000000020000049
S11319F80300000000800000002000000400000034
@ -424,42 +424,41 @@ S1131A48002000000A0000000060010000200000DF
S1131A580B00000000800100002000000C000000C2
S1131A6800A00100002000000D00000000C00100DB
S1131A78002000000E00000000E00100002000002B
S1131A880F000000443A5C7573725C6665617365A7
S1131A98725C736F6674776172655C4F70656E42D1
S1131AA84C545C5461726765745C536F75726365FA
S1131AB85C41524D434D335F45464D33325C494199
S1131AC8525C766563746F72732E6300443A5C7576
S1131AD873725C6665617365725C736F6674776153
S1131AE872655C4F70656E424C545C5461726765F4
S1131AF8745C536F757263655C41524D434D335F3B
S1131B0845464D33325C756172742E6300000000E3
S1131B1807F7FFFFEC040000740100200000000038
S1131B28FFF1FFFF740100004000000000000020E6
S1131B3800000000050000000000000080250000EF
S1131B480000000080B540210148FFF789FD01BD70
S1131B588C1A0000C046C046C046C046FFF74CFC7D
S1131B684F70656E424C54005449554A126852F0FD
S1131B780102534B1A60534A106053480122026011
S1131B8852480068400708D54D480068400840009E
S1131B984B4908605FF0FF3029E04C480068800733
S1131BA808D54748006840084000454908607FF068
S1131BB801001CE044480222026000E0491E434838
S1131BC80068C00701D50029F8D1002908D13C488C
S1131BD80068400840003A4908607FF0020006E0C7
S1131BE837480068400840003549086000207047BD
S1131BF830B4334B1B6853F00103314C236093100A
S1131C08002200E0521C9A424FDA10EB82042D4D58
S1131C182C602D4C012525602C4C2468640708D5BC
S1131C282748006840084000254908605FF0FF30F5
S1131C3842E0264C2468A40708D5214800684008D7
S1131C4840001F4908607FF0010035E01B4C00E0AC
S1131C58641E1E4D2D682D0701D4002CF8D1002CCC
S1131C6808D11748006840084000154908607FF00B
S1131C78020021E051F82240154D2C60124C082531
S1131C8825600E4C00E0641E104D2D68ED0701D54B
S1131C98002CF8D1002CB5D1094800684008400050
S1131CA8074908607FF0020006E00548006840081C
S1131CB8400003490860002030BC704780969800B3
S1131CC808000C4010000C400C000C401C000C4098
S10F1CD818000C400048E80100800000E7
S9031B5D84
S1131A880F000000433A5C576F726B5C736F6674A7
S1131A98776172655C4F70656E424C545C54617238
S1131AA86765745C536F757263655C41524D434D51
S1131AB8335F45464D33325C4941525C7665637405
S1131AC86F72732E63000000433A5C576F726B5C4D
S1131AD8736F6674776172655C4F70656E424C54BF
S1131AE85C5461726765745C536F757263655C41BD
S1131AF8524D434D335F45464D33325C75617274C4
S1131B082E63000063F7FFFFF00400007401002057
S1131B1800000000FFF1FFFF740100004000000016
S1131B280000002000000000050000000000000084
S1131B38802500000000000080B540210148FFF71F
S1131B48B7FD01BD8C1A0000C046C046C046C04659
S1131B58FFF77AFC4F70656E424C54005449554A5D
S1131B68126852F00102534B1A60534A10605348EA
S1131B780122026052480068400708D54D480068B1
S1131B88400840004B4908605FF0FF3029E04C48AA
S1131B980068800708D54748006840084000454960
S1131BA808607FF001001CE044480222026000E063
S1131BB8491E43480068C00701D50029F8D1002907
S1131BC808D13C480068400840003A4908607FF062
S1131BD8020006E0374800684008400035490860BC
S1131BE80020704730B4334B1B6853F00103314C69
S1131BF823609310002200E0521C9A424FDA10EB43
S1131C0882042D4D2C602D4C012525602C4C246814
S1131C18640708D52748006840084000254908603B
S1131C285FF0FF3042E0264C2468A40708D5214819
S1131C380068400840001F4908607FF0010035E053
S1131C481B4C00E0641E1E4D2D682D0701D4002C8A
S1131C58F8D1002C08D117480068400840001549FD
S1131C6808607FF0020021E051F82240154D2C60F5
S1131C78124C082525600E4C00E0641E104D2D689A
S1131C88ED0701D5002CF8D1002CB5D1094800681E
S1131C9840084000074908607FF0020006E0054854
S1131CA800684008400003490860002030BC7047C1
S1131CB88096980008000C4010000C400C000C4062
S1131CC81C000C4018000C400048E801008000008B
S9031B5190

5
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/config.h
View File

@ -41,10 +41,15 @@
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
* big endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
#define BOOT_CPU_XTAL_SPEED_KHZ (32000)
#define BOOT_CPU_SYSTEM_SPEED_KHZ (14000)
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
#define BOOT_CPU_CONNECT_STATE_PREFIX __no_init

24
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/hooks.c
View File

@ -67,6 +67,30 @@ blt_bool BackDoorEntryHook(void)
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
/****************************************************************************************
* C P U D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/****************************************************************************************
** NAME: CpuUserProgramStartHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
** keep the bootloader active.
** DESCRIPTION: Callback that gets called when the bootloader is about to exit and
** hand over control to the user program. This is the last moment that
** some final checking can be performed and if necessary prevent the
** bootloader from activiting the user program.
**
****************************************************************************************/
blt_bool CpuUserProgramStartHook(void)
{
/* okay to start the user program */
return BLT_TRUE;
} /*** end of CpuUserProgramStartHook ***/
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
****************************************************************************************/

1050
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/efm32G880.dep
View File

File diff suppressed because it is too large Load Diff

942
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/efm32G880.ewd
View File

File diff suppressed because it is too large Load Diff

60
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/efm32G880.ewp
View File

@ -29,8 +29,8 @@
</option>
<option>
<name>Variant</name>
<version>19</version>
<state>37</state>
<version>20</version>
<state>38</state>
</option>
<option>
<name>GEndianMode</name>
@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.30.3.53229</state>
<state>6.50.5.4846</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -137,13 +137,13 @@
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
<version>20</version>
<state>38</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
<version>20</version>
<state>38</state>
</option>
<option>
<name>OGUseCmsis</name>
@ -162,6 +162,10 @@
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCDefines</name>
<state>EFM32G880F128</state>
@ -613,7 +617,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>14</version>
<version>15</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -781,10 +785,6 @@
<name>CrcAlign</name>
<state>1</state>
</option>
<option>
<name>CrcAlgo</name>
<state>1</state>
</option>
<option>
<name>CrcPoly</name>
<state>0x11021</state>
@ -887,6 +887,16 @@
<name>IlinkStackCallGraphFile</name>
<state></state>
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcUnitSize</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -943,7 +953,7 @@
</option>
<option>
<name>Variant</name>
<version>19</version>
<version>20</version>
<state>0</state>
</option>
<option>
@ -1051,12 +1061,12 @@
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<version>20</version>
<state>0</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<version>20</version>
<state>0</state>
</option>
<option>
@ -1076,6 +1086,10 @@
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCDefines</name>
<state>NDEBUG</state>
@ -1519,7 +1533,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>14</version>
<version>15</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1687,10 +1701,6 @@
<name>CrcAlign</name>
<state>1</state>
</option>
<option>
<name>CrcAlgo</name>
<state>1</state>
</option>
<option>
<name>CrcPoly</name>
<state>0x11021</state>
@ -1793,6 +1803,16 @@
<name>IlinkStackCallGraphFile</name>
<state></state>
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcUnitSize</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>

2
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
IAR Embedded Workbench for ARM v6.30 was used as the editor during the development of this software program. This directory contains
IAR Embedded Workbench for ARM v6.50 was used as the editor during the development of this software program. This directory contains
the Embedded Workbench project and worksapce files. More info is available at: http://www.iar.com/

15
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/settings/efm32G880.cspy.bat
View File

@ -2,14 +2,23 @@
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\bin\armbat.dll" --flash_loader "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\config\flashloader\EnergyMicro\FlashEFM32.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\CONFIG\debugger\EnergyMicro\EFM32G880F128.ddf" "--drv_verify_download" "--semihosting" "--device=EFM32G880F128" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\EnergyMicro\Trace_EFM32.dmac" --flash_loader "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\flashloader\EnergyMicro\FlashEFM32.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\CONFIG\debugger\EnergyMicro\EFM32G880F128.ddf" "--drv_verify_download" "--semihosting" "--device=EFM32G880F128" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"

94
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/settings/efm32G880.dbgdt
View File

@ -1,5 +1,97 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project/>
<Project>
<Desktop>
<Static>
<Debug-Log>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1861</ColumnWidth1></Debug-Log>
<Build>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1395</ColumnWidth1><ColumnWidth2>372</ColumnWidth2><ColumnWidth3>93</ColumnWidth3></Build>
<Workspace>
<ColumnWidths>
<Column0>124</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
<Disassembly>
<col-names>
<item>Disassembly</item><item>_I0</item></col-names>
<col-widths>
<item>500</item><item>20</item></col-widths>
<DisasmHistory/>
<ShowCodeCoverage>1</ShowCodeCoverage><ShowInstrProfiling>1</ShowInstrProfiling></Disassembly>
</Static>
<Windows>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-15722-3606</Identity>
<TabName>Debug Log</TabName>
<Factory>Debug-Log</Factory>
<Session/>
</Tab>
<Tab>
<Identity>TabID-15200-3615</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<Tabs>
<Tab>
<Identity>TabID-26471-3609</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>efm32G880</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd1><Wnd2>
<Tabs>
<Tab>
<Identity>TabID-4451-3612</Identity>
<TabName>Disassembly</TabName>
<Factory>Disassembly</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>36</YPos2><SelStart2>2963</SelStart2><SelEnd2>2963</SelEnd2></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\Source\ARMCM3_EFM32\timer.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\Source\ARMCM3_EFM32\timer.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-02c0d7a8><key>iaridepm.enu1</key></Toolbar-02c0d7a8></Sizes></Row0><Row1><Sizes><Toolbar-03430168><key>debuggergui.enu1</key></Toolbar-03430168></Sizes></Row1><Row2><Sizes><Toolbar-03430230><key>armjlink.enu1</key></Toolbar-03430230></Sizes></Row2></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>717</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>104167</sizeHorzCX><sizeHorzCY>198413</sizeHorzCY><sizeVertCX>104167</sizeVertCX><sizeVertCY>713294</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>717</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>104167</sizeHorzCX><sizeHorzCY>198413</sizeHorzCY><sizeVertCX>104167</sizeVertCX><sizeVertCY>713294</sizeVertCY></Rect></Wnd2></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>200</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>198413</sizeHorzCY><sizeVertCX>104167</sizeVertCX><sizeVertCY>198413</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Project>

85
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/settings/efm32G880.dni
View File

@ -10,6 +10,91 @@ LimitSize=0
ByteLimit=50
[Breakpoints]
Count=0
[DebugChecksum]
Checksum=-1802937773
[Exceptions]
StopOnUncaught=_ 0
StopOnThrow=_ 0
[CallStack]
ShowArgs=0
[Disassembly]
MixedMode=1
[JLinkDriver]
CStepIntDis=_ 0
[SWOTraceHWSettings]
OverrideDefaultClocks=0
CpuClock=72000000
ClockAutoDetect=0
ClockWanted=2000000
JtagSpeed=2000000
Prescaler=36
TimeStampPrescIndex=0
TimeStampPrescData=0
PcSampCYCTAP=1
PcSampPOSTCNT=15
PcSampIndex=0
DataLogMode=0
ITMportsEnable=0
ITMportsTermIO=0
ITMportsLogFile=0
ITMlogFile=$PROJ_DIR$\ITM.log
[CallStackLog]
Enabled=0
[DriverProfiling]
Enabled=0
Mode=3
Graph=0
Symbiont=0
Exclusions=
[RecentFlashDownload]
Path=C:\Work\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC\Boot\bin\openbtl_olimex_efm32g880.bin
[DataLog]
LogEnabled=0
SumEnabled=0
GraphEnabled=0
ShowTimeLog=1
ShowTimeSum=1
[EventLog]
LogEnabled=0
SumEnabled=0
GraphEnabled=0
ShowTimeLog=1
ShowTimeSum=1
Title0=Ch0
Symbol0=0 4 1
Title1=Ch1
Symbol1=0 4 1
Title2=Ch2
Symbol2=0 4 1
Title3=Ch3
Symbol3=0 4 1
SumSortOrder=0
[InterruptLog]
LogEnabled=0
SumEnabled=0
GraphEnabled=0
ShowTimeLog=1
ShowTimeSum=1
SumSortOrder=0
[TermIOLog]
LoggingEnabled=_ 0
LogFile=_ ""
[Trace2]
Enabled=0
ShowSource=0
[SWOTraceWindow]
PcSampling=0
InterruptLogs=0
ForcedTimeStamps=0
EventCPI=0
EventEXC=0
EventFOLD=0
EventLSU=0
EventSLEEP=0
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
Category=_ 0
[Disassemble mode]
mode=0
[Breakpoints2]

10
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Boot/ide/settings/efm32G880.wsdt
View File

@ -25,7 +25,7 @@
<ColumnWidth1>78</ColumnWidth1>
<ColumnWidth2>946</ColumnWidth2>
</Find-in-Files>
</Static>
<TerminalIO/><Debug-Log><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1861</ColumnWidth1></Debug-Log></Static>
<Windows>
@ -55,22 +55,22 @@
<Factory>Find-in-Files</Factory>
<Session/>
</Tab>
</Tabs>
<Tab><Identity>TabID-20200-19078</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs>
<SelectedTab>0</SelectedTab></Wnd3></Windows>
<SelectedTab>2</SelectedTab></Wnd3></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>51</YPos><SelStart>3132</SelStart><SelEnd>3132</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\Source\ARMCM3_EFM32\timer.h</Filename><XPos>0</XPos><YPos>32</YPos><SelStart>1983</SelStart><SelEnd>1983</SelEnd></Tab><ActiveTab>1</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\Source\ARMCM3_EFM32\timer.c</Filename><XPos>0</XPos><YPos>96</YPos><SelStart>5082</SelStart><SelEnd>5082</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>36</YPos2><SelStart2>2602</SelStart2><SelEnd2>2602</SelEnd2></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\Source\ARMCM3_EFM32\timer.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\Source\ARMCM3_EFM32\timer.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-00498008><key>iaridepm.enu1</key></Toolbar-00498008></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>724</Bottom><Right>442</Right><x>-2</x><y>-2</y><xscreen>240</xscreen><yscreen>243</yscreen><sizeHorzCX>125000</sizeHorzCX><sizeHorzCY>240594</sizeHorzCY><sizeVertCX>231250</sizeVertCX><sizeVertCY>718812</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>241</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>243</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>240594</sizeHorzCY><sizeVertCX>125000</sizeVertCX><sizeVertCY>240594</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
<Top><Row0><Sizes><Toolbar-02c0d7a8><key>iaridepm.enu1</key></Toolbar-02c0d7a8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>722</Bottom><Right>442</Right><x>-2</x><y>-2</y><xscreen>240</xscreen><yscreen>243</yscreen><sizeHorzCX>125000</sizeHorzCX><sizeHorzCY>241071</sizeHorzCY><sizeVertCX>231250</sizeVertCX><sizeVertCY>718254</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>241</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>243</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>241071</sizeHorzCY><sizeVertCX>125000</sizeVertCX><sizeVertCY>241071</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

BIN
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/bin/demoprog_olimex_efm32g880.out
View File

Binary file not shown.

569
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/bin/demoprog_olimex_efm32g880.srec
View File

@ -1,287 +1,286 @@
S021000064656D6F70726F675F6F6C696D65785F65666D3332673838302E73726563B6
S1132000680400209D3100003731000037310000A2
S1132010373100003731000037310000373100001C
S1132020373100003731000037310000373100000C
S1132030373100003731000037310000532F0000E2
S113204037310000373100003731000037310000EC
S113205037310000373100003731000037310000DC
S113206037310000373100003731000037310000CC
S113207037310000373100003731000037310000BC
S113208037310000373100003731000037310000AC
S1132090373100003731000037310000373100009C
S11320A0373100003731000037310000B927000014
S10F20B03731000037310000EE11AA5552
S1132000680400208D31000049310000493100008E
S113201049310000493100004931000049310000D4
S113202049310000493100004931000049310000C4
S1132030493100004931000049310000432F0000BC
S113204049310000493100004931000049310000A4
S11320504931000049310000493100004931000094
S11320604931000049310000493100004931000084
S11320704931000049310000493100004931000074
S11320804931000049310000493100004931000064
S11320904931000049310000493100004931000054
S11320A0493100004931000049310000AD270000EA
S10F20B04931000049310000EE11AA552E
S11320BC890011EB401010F1844002607047DFF886
S11320CC9005006810F007010029012903D9891E25
S11320DC012905D908E0C008C00050F0010003E054
S11320ECC008C00050F00300DFF8641508607047A6
S11320FCB0FA80F0D0F11F007047DFF8541509686E
S113210CDFF85025821ADFF850359A420DD211F0BF
S113211C0702921E012A04D8C908C90051F0030110
S113212C03E0C908C90051F00101DFF828259042E9
S113213C0BD211F00700801E012804D8C808C00077
S113214C50F0020101E0C908C900DFF80405016080
S113215C7047DFF80805704780B5DFF8040500F018
S113216C9EF9C0B2072804D0082805D100F0AFFAB4
S113217C03E0FFF7EEFF00E0002002BD80B5DFF8BE
S113218CE4140968C0B2400031FA00F010F0030006
S113219C00280FD0022806D002D3032806D00BE067
S11321AC00F0CFFA09E000F0CFFA06E000F084FA70
S11321BC400802E0002000E0002002BDDFF8A81473
S11321CC0968C90704D4DFF8A41409680142FAD1D8
S11321DC704710B50C00C0F30311012907D0C0F0EF
S11321EC9A80032925D010D3042967D093E02000CA
S11321FCFFF77EFF0400DFF880040068000900018B
S113220C2043DFF87414086085E0FFF758FF2000C2
S113221CFFF76EFF0400DFF8640400680009000196
S113222C2043DFF85814086000F046FAFFF765FF06
S113223C71E0DFF84C14884208D0DFF84814884267
S113224C15D0DFF84814884223D036E00420FFF779
S113225CB5FF2000FFF74CFF0400DFF82C040068E6
S113226C000900012043DFF82014086025E0042055
S113227CFFF7A4FF2000FFF73BFF0400DFF808047E
S113228C006830F0F00050EA0410DFF8FC1308602A
S113229C13E00420FFF792FF2000FFF729FF04004E
S11322ACDFF8E403006830F44070B4F1100150EA34
S11322BC0120DFF8D4130860FFE72CE0DFF8D0131B
S11322CC884204D0DFF8CC13884211D022E040209D
S11322DCFFF774FF2000FFF70BFF0400DFF8B803CF
S11322EC0068800880002043DFF8AC13086011E01C
S11322FC4020FFF763FF2000FFF7FAFE0400DFF82D
S113230C9803006830F0300050EA0410DFF88813AA
S113231C0860FFE7FFE710BD70B50C000021C0F3A7
S113232C0322D2B2012A09D029D3032A19D015D3F6
S113233C052A1DD018D3062A1ED020E0DFF8385306
S113234CC0F30436002902D00800FFF737FFE4B2CB
S113235C220031002800FFF7ABFE70BDDFF83C53C0
S113236CEEE7DFF83C53EBE7DFF838530121E7E7FE
S113237CDFF834531021E3E7DFF83053E0E7ECE700
S113238C80B510F47810002824D0B0F5003F24D088
S113239CB0F5802F2AD0B0F5C02F2AD0B0F5002F7D
S11323AC2BD0B0F5202F32D0B0F5402F39D0B0F56A
S11323BC602F41D0B0F5901F51D0B0F5A01F52D072
S11323CCB0F5B01F59D0B0F5C01F60D0B0F5D01F18
S11323DC60D062E000F07BF960E000F078F9DFF89F
S11323EC9812096811F00F01C84057E000F064F925
S11323FC54E00020FFF7C2FE50E00020FFF7BEFEC1
S113240CDFF88412096811F00F01C84046E000207F
S113241CFFF7B4FEDFF870120968C1F30311C8406A
S113242C3CE00020FFF7AAFEDFF85C120968090AF9
S113243C11F00301C84031E00020FFF79FFEDFF8E4
S113244C48120968090A11F00301C840DFF8601248
S113245C096811F00701491CB0FBF1F01EE00120E2
S113246CFFF78CFE1AE00120FFF788FEDFF8281234
S113247C096811F00301C84010E00120FFF77EFE4B
S113248CDFF814120968C1F30111C84006E0FFF724
S113249C63FE03E0FFF75DFE00E0002002BD0121B6
S11324AC10F00F00012806D036D303282DD018D3F2
S11324BC04282FD030E0DFF8BC01006810F4705011
S11324CCB0F5006F09D0B0F5805F04D0B0F5005FB3
S11324DC05D1022104E0032102E0042100E00521DE
S11324EC1BE0DFF88001006810F00300012804D021
S11324FC09D3032805D002D305E0032104E002210B
S113250C02E0062100E0012107E0DFF85801006831
S113251C012102E0072100E000210800C0B270474D
S113252C38B50324032310F00F000200521E03D00D
S113253C521E012A27D956E0C9B2022906D021D34A
S113254C042919D015D3052919D01BE00424002320
S113255C012201211800C0B200F046F8FFF7AFFDCC
S113256C4348046000F00CF900F0A6F8FFF7C5FD31
S113257C39E003240123EBE702240223E8E70124D6
S113258C0323E5E72FE0022801D1002400E0022414
S113259CC9B2012906D002290FD0032914D0062967
S11325AC19D01FE000202F4909680322A24091434F
S11325BCA04008432B49086015E0012201210020AA
S11325CC00F012F80220EEE701220121012000F0B4
S11325DC0BF80120E7E7012202213148FFF768FDDF
S11325EC0320E0E7FFE731BD10B5C0B2002821D0CD
S11325FC022813D01AD3042814D022D20123022483
S113260C0220C9B200291DD02A490B60D2B2002A7B
S113261C1AD018490968014216D1FAE70423082490
S113262C0820EEE7102320242020EAE7402380240E
S113263C8020E6E74FF480734FF400744FF400707D
S113264CDFE703E01B48046000F09AF810BD0000BB
S113265C04000C400124F4000024F400809FD500F5
S113266C0400180028800C4054800C4050800C400E
S113267C24800C402C800C4008800C4004800C40BE
S113268C3004080030140A0068800C4030000C0040
S113269C400514004015160070800C4044800C401A
S11326AC40800C4058800C4060800C4078800C407A
S11326BC7C800C4020800C4080B500F008F8244944
S11326CC096811F00F01C8402249086002BD224874
S11326DC006810F47050B0F5006F0BD0B0F5805F4B
S11326EC05D0B0F5005F08D11C48006827E04FF412
S11326FC004024E01A48006821E01A48006810F4ED
S113270CE060002818D0B0F5807F13D0B0F5007FBE
S113271C0ED0B0F5407F09D0B0F5806F04D0B0F581
S113272CA06F0BD110480AE0104808E0104806E0EE
S113273C104804E0104802E0104800E00020704704
S113274C70474FF40040704704480068704700001D
S113275C04800C40540000202C800C400400002009
S113276C000000200C800C40003FAB01406F400186
S113277C809FD500C0D8A700C0CF6A0040420F008C
S113278C0248034909680180704700005C0000207E
S113279C2C800C4040B24109DFF83022012310F0A8
S11327AC1F0013FA00F042F821007047DFF82002F2
S11327BC5FF0FF314162DFF81C020068401CDFF857
S11327CC141208607047202A01DB203A091D0123EA
S11327DC13FA02F200290BD0022911D00CD30429CC
S11327EC16D011D306291BD016D307291CD01EE0F2
S11327FC016C114301641AE0416C1143416416E00D
S113280C816C1143816412E0C16C1143C1640EE00C
S113281C016D114301650AE0416D1143416506E008
S113282C816D1143816502E0C16D1143C16570472F
S113283C202A01DB203A091D012313FA02F2002994
S113284C0BD0022911D00CD3042916D011D306298C
S113285C1BD016D307291CD01EE0016C91430164D4
S113286C1AE0416C9143416416E0816C914381649C
S113287C12E0C16C9143C1640EE0016D914301659A
S113288C0AE0416D9143416506E0816D9143816598
S113289C02E0C16D9143C1657047002101640021C0
S11328AC01650021416400214165002181640021FE
S11328BC81650021C1640021C165416E0029FCD1F0
S11328CC704710B5C9B2002911D0022915D011D303
S11328DC042918D014D306291BD017D308291ED0C9
S11328EC1AD30A2921D01DD30B2921D022E0032489
S11328FC0F231FE0012403231CE00324032319E00A
S113290C0024032316E00224032313E000242723CA
S113291C10E0032427230DE0032401230AE00224FE
S113292C012307E00124012304E00124012301E035
S113293C03240723002A04D01A002100FFF743FFC5
S113294C03E01A002100FFF773FF10BD38B5040033
S113295C214DA86A80088000A862A86A50F0020081
S113296CA862A86D50F00400A865A86E30F44070FD
S113297CA866A86E4FF440710843A8660020A062B4
S113298C606E0028FCD15FF0FF3060621B20FFF703
S113299C01FF0120A06241F60B7060600020E86723
S11329AC2000FFF77AFF40F2FF30A0600520206082
S11329BC606E0028FCD10948E060606E0028FCD1F0
S11329CC012060620120A06231BD000000E100E042
S11329DC00A008404C00002000800C4000011C00AA
S11329EC80B56C480168080E00280DD16A4802684D
S11329FC32F07002026069480268D200D2080260A8
S1132A0C026872F060620260080E042813D26348F4
S1132A1C016831F4FC510160614800210160614896
S1132A2C00210160604800210160604800210160C0
S1132A3C5F480021016000A800F0E4F89DF8000054
S1132A4C012811D19DF80100002804D154480168D3
S1132A5C51F0020101609DF80100022804D2514892
S1132A6C016851F0010101605248016852488142E9
S1132A7C24D24C48016851F4904101604F480068DD
S1132A8C000410F0FE414D48006810F07F0051EA3C
S1132A9C00414A48006810F4FE400143474800686E
S1132AAC10F07F00014346480160464846490968D6
S1132ABC01603C48016831F49041016001BD80B56E
S1132ACC00F007F800F0BCF800F057F900F0F9F842
S1132ADCFAE780B5FFF734FEFFF782FF01220121EC
S1132AEC0020FFF781FD2E48006850F00F002C49A0
S1132AFC08602C48006840F47F4050F0FF002949DE
S1132B0C086000213148FFF707FC00213048FFF72B
S1132B1C03FC00212F48FFF7FFFB00212E48FFF791
S1132B2CFBFB00212D48FFF7F7FB00212C48FFF796
S1132B3CF3FB00212B48FFF7EFFB00212A48FFF79A
S1132B4CEBFB00212948FFF7E7FB00212848FFF79E
S1132B5CE3FB00212748FFF7DFFB00212648FFF7A2
S1132B6CDBFB00212548FFF7D7FB00212448FFF7A6
S1132B7CD3FB012305220921012000F038F902219D
S1132B8C012000F023F900F0F3F800F0C4F900F090
S1132B9CEFF901BDFC81E00F0CA00C4020600C404F
S1132BAC40800C4044800C4058800C4060800C40A9
S1132BBC78800C40F081E00F00BA8A4CB481E00FAD
S1132BCC342000402C400040C881E00F0003040076
S1132BDC001304000033040000A2020000020200EF
S1132BEC00120200002202000032020000720200F5
S1132BFC0082020000B2020000E2020000F20200B5
S1132C0C00D202000749096811F03F01017006491E
S1132C1C096811F0F001054A1268C2F3031211435A
S1132C2C41707047E0FF0FE0E8FF0FE0ECFF0FE0AE
S1132C3C4163704780B500F07CF9B920804701BD31
S1132C4C00B585B000A83F49102200F093F901218A
S1132C5C3D48FFF761FB012304220621022000F00A
S1132C6CC6F8002301220721022000F0C0F801213C
S1132C7C3648FFF751FB02213548FFF751FC01217F
S1132C8C3448FFF7A6FA01213248FFF745FB002030
S1132C9C8DF8000000A9304800F0F7F94FF41652F3
S1132CAC00212D4800F0AFF92C48032101600421C8
S1132CBC2948FFF7BDFF0521274800F0CBF905B0E3
S1132CCC00BD80B52648007800280BD1254800F0BB
S1132CDC2BF8012827D12248012101702248002118
S1132CEC017020E0204800781E494018401C00F078
S1132CFC1BF8012817D11C480078401C1A4908708D
S1132D0C194800781749097888420CD114480021D5
S1132D1C017014484078FF2805D1124880780028A7
S1132D2C01D1FFF787FF01BD10B504000F480068FF
S1132D3C400705D5084800F0CBF92070012000E0CD
S1132D4C002010BDB031000000C2020000230400BA
S1132D5C0300120040151600004408405444084077
S1132D6C5F000020080000205E0000202C44084076
S1132D7C80B51348FFF7EAFD01BD10B500F0E0F88B
S1132D8C040010480068201A4FF4FA71884216D3D4
S1132D9C0D480078002808D10B480121017001224C
S1132DAC00210748FFF78DFD07E00748002101705B
S1132DBC002200210248FFF784FD0248046010BD84
S1132DCC00A008405000002060000020C0B2242263
S1132DDC3B4B02FB0032126892089200C9B21143B9
S1132DECC0B22422364B02FB00300160704770B431
S1132DFCD2B2002A12D0002B08D0C0B22424304DF9
S1132E0C04FB005401258D40256107E0C0B2242445
S1132E1C2B4D04FB005401258D406561082919D202
S1132E2CC0B22424264D04FB005464680F250E0004
S1132E3CF6B2B600B540AC43D2B20D00EDB2AD0063
S1132E4C12FA05F52C43C0B224251D4E05FB006572
S1132E5C6C601AE0C0B22424194D04FB0054A4681D
S1132E6C0F250E00083EF6B2B600B540AC43D2B204
S1132E7C0D00083DEDB2AD0012FA05F52C43C0B2BD
S1132E8C24250F4E05FB0065AC60D2B2002A14D188
S1132E9C002B09D0C0B22422094B02FB00300122C2
S1132EAC12FA01F1016108E0C0B22422044B02FBC6
S1132EBC0030012212FA01F1416170BC704700002C
S1132ECC0060004040B2002808D540B210F00F005A
S1132EDC204A8018490100F8041C03E040B21E4A41
S1132EEC49018154704780B5B0F1807F01D3012032
S1132EFC10E00002000A401E1849086007215FF028
S1132F0CFF30FFF7DFFF1648002101601548072149
S1132F1C0160002002BD80B51348FFF731FA4FF46D
S1132F2C7A71B0FBF1F0FFF7DEFF002000F005F83A
S1132F3C01BD0C480021016070470C4908607047C2
S1132F4C0A480068704709480068401C0749086033
S1132F5C7047000018ED00E000E400E014E000E02D
S1132F6C18E000E010E000E020000400580000200D
S1132F7C62B67047103A07D330B4B1E83810103A3F
S1132F8CA0E83810F9D230BC530724BFB1E80810BC
S1132F9CA0E8081044BF51F8043B40F8043BD207A6
S1132FAC24BF31F8022B20F8022B44BF0B7803709A
S1132FBC7047083A07D3B1E80810083A40F8043BC4
S1132FCC40F804CBF7D25307E4E710B450F8041BD1
S1132FDC81B102681218001D50F8043BDC0744BF91
S1132FECA9F10104E31852F8044B43F8044B091FEC
S1132FFCF9D1EBE710BC7047026CD20702D4426CD7
S113300C0A42FCD1704738B504001500002906D1DA
S113301C0C4884420ED10C48FFF7B2F90100480168
S113302CB0FBF5F5203DED0004212000FFF7E4FF93
S113303CE56031BD0548844201D10548ECE7F8E769
S113304C0000000000400840400514000044084003
S113305C4015160038B50400C9B2CD4315F005056A
S113306C6D00C9B20D4302212000FFF7C5FF656056
S113307C31BDC9B2002905D0416C0029FCD1012114
S113308C016401E000210164704738B504000D00AF
S113309C02212000FFF7B0FF0A206060012120000C
S11330ACFFF7E7FF206830F01C00297B0843697B9D
S11330BC0843A97B08432060AA6869682000FFF7CD
S11330CCA2FF2878606000212000FFF7D2FF31BDF9
S11330DC81688906FCD5C069C0B2704710B508492F
S11330EC79441C31074C7C441A34A14206D0081D87
S11330FC0A68511888470146A142F8D110BD00BF97
S113310C2C0000004C00000050F8041B61B150F876
S113311C042BD30744BFA9F101039A18002342F8E6
S113312C043B091FFAD1EFE77047FEE7DDFFFFFF11
S113313C5C00000008000020000000008FFEFFFF70
S113314C08000000700000000000002000000000D7
S113315C00F009F8002801D0FFF7C0FF0020FFF7AA
S113316CAEFC00F002F80120704700F001B800003A
S113317C0746384600F002F8FBE7000080B5C0466D
S113318CC046024A11001820ABBEFBE72600020021
S113319C034B9D46C046C046C046C046FFF7D8FF09
S11331AC68040020050000000000000080250000D9
S10F31BC000000000048E8010080000052
S903319D2E
S11320CC8405006810F007010029012903D9891E31
S11320DC012904D906E0012161F3020002E0032185
S11320EC61F30200DFF85C1508607047B0FA80F009
S11320FCD0F11F007047DFF84C150968DFF848254C
S113210C821ADFF848359A420BD211F00702921E5C
S113211C012A03D8032262F3020102E0012262F3D2
S113212C0201DFF8242590420AD211F00700801E28
S113213C012803D8022060F3020101E0C908C90098
S113214CDFF8000501607047DFF80405704780B5BF
S113215CDFF8000500F09EF9C0B2072804D0082867
S113216C05D100F0AEFA03E0FFF7EEFF00E000202B
S113217C02BD80B5DFF8E0140968C0B2400031FA42
S113218C00F010F0030000280FD0022806D002D370
S113219C032806D00BE000F0CEFA09E000F0CEFAEA
S11321AC06E000F083FA400802E0002000E0002082
S11321BC02BDDFF8A8140968C90704D4DFF8A01419
S11321CC09680142FAD1704710B50C00C0F3031131
S11321DC012907D0C0F09A80032925D010D30429F3
S11321EC67D093E02000FFF781FF0400DFF87C0444
S11321FC0068000900012043DFF87014086085E0D2
S113220CFFF75DFF2000FFF771FF0400DFF86004A7
S113221C0068000900012043DFF85414086000F042
S113222C45FAFFF768FF71E0DFF84814884208D0DC
S113223CDFF84414884215D0DFF84414884223D0C4
S113224C36E00420FFF7B5FF2000FFF74FFF040032
S113225CDFF828040068000900012043DFF81C148F
S113226C086025E00420FFF7A4FF2000FFF73EFFE1
S113227C0400DFF80804006830F0F00050EA0410A1
S113228CDFF8F813086013E00420FFF792FF200036
S113229CFFF72CFF0400DFF8E403006830F440700F
S11322ACB4F1100150EA0120DFF8D0130860FFE705
S11322BC2CE0DFF8D013884204D0DFF8CC1388422A
S11322CC11D022E04020FFF774FF2000FFF70EFF2F
S11322DC0400DFF8B8030068800880002043DFF8AE
S11322ECAC13086011E04020FFF763FF2000FFF7F8
S11322FCFDFE0400DFF89403006830F0300050EA6F
S113230C0410DFF888130860FFE7FFE710BD70B511
S113231C0C000021C0F30322D2B2012A09D029D324
S113232C032A19D015D3052A1DD018D3062A1ED07A
S113233C20E0DFF83853C0F30436002902D008003B
S113234CFFF737FFE4B2220031002800FFF7B0FE9C
S113235C70BDDFF83C53EEE7DFF83853EBE7DFF8FA
S113236C38530121E7E7DFF834531021E3E7DFF8B2
S113237C3053E0E7ECE780B510F47810002824D053
S113238CB0F5003F24D0B0F5802F2AD0B0F5C02F83
S113239C2AD0B0F5002F2BD0B0F5202F32D0B0F5C9
S11323AC402F39D0B0F5602F41D0B0F5901F51D0EB
S11323BCB0F5A01F52D0B0F5B01F59D0B0F5C01F66
S11323CC60D0B0F5D01F60D062E000F07AF960E024
S11323DC00F077F9DFF89412096811F00F01C84086
S11323EC57E000F063F954E00020FFF7C2FE50E020
S11323FC0020FFF7BEFEDFF88412096811F00F010C
S113240CC84046E00020FFF7B4FEDFF870120968FC
S113241CC1F30311C8403CE00020FFF7AAFEDFF82B
S113242C5C120968090A11F00301C84031E000206C
S113243CFFF79FFEDFF844120968090A11F0030143
S113244CC840DFF86012096811F00701491CB0FBA1
S113245CF1F01EE00120FFF78CFE1AE00120FFF7DB
S113246C88FEDFF82812096811F00301C84010E057
S113247C0120FFF77EFEDFF814120968C1F3011185
S113248CC84006E0FFF763FE03E0FFF75DFE00E0E3
S113249C002002BD012110F00F00012806D036D314
S11324AC03282DD018D304282FD030E0DFF8B8013E
S11324BC006810F47050B0F5006F09D0B0F5805F6F
S11324CC04D0B0F5005F05D1022104E0032102E041
S11324DC042100E005211BE0DFF87C01006810F00A
S11324EC0300012804D009D3032805D002D305E046
S11324FC032104E0022102E0062100E0012107E0AF
S113250CDFF854010068012102E0072100E00021FA
S113251C0800C0B2704738B50324032310F00F0031
S113252C0200521E03D0521E012A27D956E0C9B20A
S113253C022906D021D3042919D015D3052919D081
S113254C1BE004240023012201211800C0B200F076
S113255C46F8FFF7B4FD4348046000F00BF900F0B3
S113256CA5F8FFF7C8FD39E003240123EBE70224A7
S113257C0223E8E701240323E5E72FE0022801D135
S113258C002400E00224C9B2012906D002290FD08C
S113259C032914D0062919D01FE000202E490968FC
S11325AC0322A2409143A04008432B49086015E044
S11325BC01220121002000F012F80220EEE7012292
S11325CC0121012000F00BF80120E7E70122022190
S11325DC3048FFF76DFD0320E0E7FFE731BD10B590
S11325ECC0B2002821D0022813D01AD3042814D046
S11325FC22D2012302240220C9B200291DD02A4967
S113260C0B60D2B2002A1AD017490968014216D1BC
S113261CFAE7042308240820EEE7102320242020C2
S113262CEAE7402380248020E6E74FF480734FF4DC
S113263C00744FF40070DFE703E01B48046000F003
S113264C99F810BD04000C400124F4000024F4009B
S113265C809FD5000400180028800C4054800C4046
S113266C50800C4024800C402C800C4008800C4082
S113267C04800C403004080030140A0068800C40BC
S113268C30000C00400514004015160070800C40FE
S113269C44800C4040800C4058800C4060800C40BE
S11326AC78800C407C800C4020800C4080B500F07D
S11326BC08F82449096811F00F01C8402249086040
S11326CC02BD2248006810F47050B0F5006F0BD0B6
S11326DCB0F5805F05D0B0F5005F08D11C480068E8
S11326EC27E04FF4004024E01A48006821E01A481F
S11326FC006810F4E060002818D0B0F5807F13D087
S113270CB0F5007F0ED0B0F5407F09D0B0F5806FE6
S113271C04D0B0F5A06F0BD110480AE0104808E0C3
S113272C104806E0104804E0104802E0104800E0AD
S113273C0020704770474FF400407047044800680D
S113274C7047000004800C40540000202C800C4086
S113275C04000020000000200C800C40003FAB0162
S113276C406F4001809FD500C0D8A700C0CF6A003D
S113277C40420F0002480349096801807047000079
S113278C5C0000202C800C4040B24109DFF82C2264
S113279C012310F01F0013FA00F042F821007047D7
S11327ACDFF81C025FF0FF314162DFF818020068A9
S11327BC401CDFF8101208607047202A01DB203A15
S11327CC091D012313FA02F200290BD0022911D09E
S11327DC0CD3042916D011D306291BD016D30729E0
S11327EC1CD01EE0016C114301641AE0416C1143CE
S11327FC416416E0816C1143816412E0C16C114395
S113280CC1640EE0016D114301650AE0416D114391
S113281C416506E0816D1143816502E0C16D114390
S113282CC1657047202A01DB203A091D012313FAE4
S113283C02F200290BD0022911D00CD3042916D092
S113284C11D306291BD016D307291CD01EE0016C0A
S113285C914301641AE0416C9143416416E0816C2C
S113286C9143816412E0C16C9143C1640EE0016D2B
S113287C914301650AE0416D9143416506E0816D28
S113288C9143816502E0C16D9143C165704700219C
S113289C016400210165002141640021416500218E
S11328AC8164002181650021C1640021C165416EF0
S11328BC0029FCD1704710B5C9B2002911D00229E6
S11328CC15D011D3042918D014D306291BD017D32F
S11328DC08291ED01AD30A2921D01DD30B2921D0A3
S11328EC22E003240F231FE0012403231CE0032410
S11328FC032319E00024032316E00224032313E02A
S113290C0024272310E0032427230DE003240123B0
S113291C0AE00224012307E00124012304E001243A
S113292C012301E003240723002A04D01A00210008
S113293CFFF743FF03E01A002100FFF773FF10BDFC
S113294C38B50400204DA86A80088000A862A86AE3
S113295C50F00200A862A86D50F00400A865A86E9F
S113296C30F44070A866A86E50F44070A86600203D
S113297CA062606E0028FCD15FF0FF3060621B2007
S113298CFFF702FF0120A06241F60B70606000208B
S113299CE8672000FFF77BFF40F2FF30A0600520C2
S11329AC2060606E0028FCD10848E060606E00284E
S11329BCFCD1012060620120A06231BD00E100E085
S11329CC00A008404C00002000800C4000011C00BA
S11329DC80B56C480168080E00280DD16A4802685D
S11329EC32F07002026069480268D200D2080260B8
S11329FC026872F060620260080E042813D2634805
S1132A0C016831F4FC5101606148002101606148A6
S1132A1C00210160604800210160604800210160D0
S1132A2C5F480021016000A800F0E4F89DF8000064
S1132A3C012811D19DF80100002804D154480168E3
S1132A4C51F0020101609DF80100022804DA51489A
S1132A5C016851F0010101605248016852488142F9
S1132A6C24D24C48016851F4904101604F480068ED
S1132A7C000410F0FE414D48006810F07F0051EA4C
S1132A8C00414A48006810F4FE400143474800687E
S1132A9C10F07F00014346480160464846490968E6
S1132AAC01603C48016831F49041016001BD80B57E
S1132ABC00F007F800F0BCF800F057F900F0F9F852
S1132ACCFAE780B5FFF736FEFFF782FF01220121FA
S1132ADC0020FFF784FD2E48006850F00F002C49AD
S1132AEC08602C48006840F47F4050F0FF002949EE
S1132AFC086000213148FFF70AFC00213048FFF739
S1132B0C06FC00212F48FFF702FC00212E48FFF79A
S1132B1CFEFB00212D48FFF7FAFB00212C48FFF7A0
S1132B2CF6FB00212B48FFF7F2FB00212A48FFF7A4
S1132B3CEEFB00212948FFF7EAFB00212848FFF7A8
S1132B4CE6FB00212748FFF7E2FB00212648FFF7AC
S1132B5CDEFB00212548FFF7DAFB00212448FFF7B0
S1132B6CD6FB012305220921012000F038F90221AA
S1132B7C012000F023F900F0F3F800F0C4F900F0A0
S1132B8CEFF901BDFC81E00F0CA00C4020600C405F
S1132B9C40800C4044800C4058800C4060800C40B9
S1132BAC78800C40F081E00F00BA8A4CB481E00FBD
S1132BBC342000402C400040C881E00F0003040086
S1132BCC001304000033040000A2020000020200FF
S1132BDC0012020000220200003202000072020005
S1132BEC0082020000B2020000E2020000F20200C5
S1132BFC00D202000749096811F03F01017006492F
S1132C0C096811F0F001054A1268C2F3031211436A
S1132C1C41707047E0FF0FE0E8FF0FE0ECFF0FE0BE
S1132C2C4163704780B500F07CF9B920804701BD41
S1132C3C00B585B000A83F49102200F093F901219A
S1132C4C3D48FFF764FB012304220621022000F017
S1132C5CC6F8002301220721022000F0C0F801214C
S1132C6C3648FFF754FB02213548FFF754FC012189
S1132C7C3448FFF7A9FA01213248FFF748FB00203A
S1132C8C8DF8000000A9304800F0F7F94FF4165203
S1132C9C00212D4800F0AFF92C48032101600421D8
S1132CAC2948FFF7BDFF0521274800F0CBF905B0F3
S1132CBC00BD80B52648007800280BD1254800F0CB
S1132CCC2BF8012827D12248012101702248002128
S1132CDC017020E0204800781E494018401C00F088
S1132CEC1BF8012817D11C480078401C1A4908709D
S1132CFC194800781749097888420CD114480021E6
S1132D0C017014484078FF2805D1124880780028B7
S1132D1C01D1FFF787FF01BD10B504000F4800680F
S1132D2C400705D5084800F0CBF92070012000E0DD
S1132D3C002010BDA031000000C2020000230400DA
S1132D4C0300120040151600004408405444084087
S1132D5C5F000020080000205E0000202C44084086
S1132D6C80B51348FFF7ECFD01BD10B500F0E0F899
S1132D7C040010480068201AB0F5FA7F16D30E48E8
S1132D8C0078002808D10C4801210170012200218F
S1132D9C0748FFF790FD07E0074800210170002267
S1132DAC00210348FFF787FD0248046010BD0000B2
S1132DBC00A008405000002060000020C0B2242273
S1132DCC3B4B02FB0032126892089200C9B21143C9
S1132DDCC0B22422364B02FB00300160704770B441
S1132DECD2B2002A12D0002B08D0C0B22424304D09
S1132DFC04FB005401258D40256107E0C0B2242456
S1132E0C2B4D04FB005401258D406561082919D212
S1132E1CC0B22424264D04FB005464680F250E0014
S1132E2CF6B2B600B540AC43D2B20D00EDB2AD0073
S1132E3C12FA05F52C43C0B224251D4E05FB006582
S1132E4C6C601AE0C0B22424194D04FB0054A4682D
S1132E5C0F250E00083EF6B2B600B540AC43D2B214
S1132E6C0D00083DEDB2AD0012FA05F52C43C0B2CD
S1132E7C24250F4E05FB0065AC60D2B2002A14D198
S1132E8C002B09D0C0B22422094B02FB00300122D2
S1132E9C12FA01F1016108E0C0B22422044B02FBD6
S1132EAC0030012212FA01F1416170BC704700003C
S1132EBC0060004040B2002808D540B210F00F006A
S1132ECC204A8018490100F8041C03E040B21E4A51
S1132EDC49018154704780B5B0F1807F01D3012042
S1132EEC10E00002000A401E1849086007215FF038
S1132EFCFF30FFF7DFFF164800210160154807215A
S1132F0C0160002002BD80B51348FFF734FA4FF47A
S1132F1C7A71B0FBF1F0FFF7DEFF002000F005F84A
S1132F2C01BD0C480021016070470C4908607047D2
S1132F3C0A480068704709480068401C0749086043
S1132F4C7047000018ED00E000E400E014E000E03D
S1132F5C18E000E010E000E020000400580000201D
S1132F6C62B67047103A07D330B4B1E83810103A4F
S1132F7CA0E83810F9D230BC530724BFB1E80810CC
S1132F8CA0E8081044BF51F8043B40F8043BD207B6
S1132F9C24BF31F8022B20F8022B44BF0B780370AA
S1132FAC7047083A07D3B1E80810083A40F8043BD4
S1132FBC40F804CBF7D25307E4E710B450F8041BE1
S1132FCC81B102681218001D50F8043BDC0744BFA1
S1132FDCA9F10104E31852F8044B43F8044B091FFC
S1132FECF9D1EBE710BC7047026CD20702D4426CE7
S1132FFC0A42FCD1704738B504001500002906D1EB
S113300C0C4884420ED10C48FFF7B5F90100480175
S113301CB0FBF5F5203DED0004212000FFF7E4FFA3
S113302CE56031BD0548844201D10548ECE7F8E779
S113303C0000000000400840400514000044084013
S113304C4015160038B50400C9B2CD4315F005057A
S113305C6D00C9B20D4302212000FFF7C5FF656066
S113306C31BDC9B2002905D0416C0029FCD1012124
S113307C016401E000210164704738B504000D00BF
S113308C02212000FFF7B0FF0A206060012120001C
S113309CFFF7E7FF206830F01C00297B0843697BAD
S11330AC0843A97B08432060AA6869682000FFF7DD
S11330BCA2FF2878606000212000FFF7D2FF31BD09
S11330CC81688906FCD5C069C0B2704710B5074940
S11330DC79441831064C7C44163404E00A68081D03
S11330EC511888470146A142F8D110BD2C000000AC
S11330FC4C00000050F8041B61B150F8042BD307AA
S113310C44BFA9F101039A18002342F8043B091F98
S113311CFAD1EFE770470000DDFFFFFF5C00000011
S113312C080000200000000093FEFFFF08000000D0
S113313C740000000000002000000000FEE7000006
S113314C00F009F8002801D0FFF7C0FF0020FFF7BA
S113315CAEFC00F002F80120704700F001B800004A
S113316C0746384600F002F8FBE7000080B5C0467D
S113317CC046024A11001820ABBEFBE72600020031
S113318C034B9D46C046C046C046C046FFF7D8FF19
S113319C68040020050000000000000080250000E9
S10F31AC000000000048E8010080000062
S903318D3E

890
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/efm32G880.dep
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940
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/efm32G880.ewd
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60
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/efm32G880.ewp
View File

@ -29,8 +29,8 @@
</option>
<option>
<name>Variant</name>
<version>19</version>
<state>37</state>
<version>20</version>
<state>38</state>
</option>
<option>
<name>GEndianMode</name>
@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.30.3.53229</state>
<state>6.50.5.4846</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -137,13 +137,13 @@
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
<version>20</version>
<state>38</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
<version>20</version>
<state>38</state>
</option>
<option>
<name>OGUseCmsis</name>
@ -162,6 +162,10 @@
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCDefines</name>
<state>EFM32G880F128</state>
@ -611,7 +615,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>14</version>
<version>15</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -779,10 +783,6 @@
<name>CrcAlign</name>
<state>1</state>
</option>
<option>
<name>CrcAlgo</name>
<state>1</state>
</option>
<option>
<name>CrcPoly</name>
<state>0x11021</state>
@ -885,6 +885,16 @@
<name>IlinkStackCallGraphFile</name>
<state></state>
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcUnitSize</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -941,7 +951,7 @@
</option>
<option>
<name>Variant</name>
<version>19</version>
<version>20</version>
<state>0</state>
</option>
<option>
@ -1049,12 +1059,12 @@
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<version>20</version>
<state>0</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<version>20</version>
<state>0</state>
</option>
<option>
@ -1074,6 +1084,10 @@
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCDefines</name>
<state>NDEBUG</state>
@ -1517,7 +1531,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>14</version>
<version>15</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1685,10 +1699,6 @@
<name>CrcAlign</name>
<state>1</state>
</option>
<option>
<name>CrcAlgo</name>
<state>1</state>
</option>
<option>
<name>CrcPoly</name>
<state>0x11021</state>
@ -1791,6 +1801,16 @@
<name>IlinkStackCallGraphFile</name>
<state></state>
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcUnitSize</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>

2
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
IAR Embedded Workbench for ARM v6.30 was used as the editor during the development of this software program. This directory contains
IAR Embedded Workbench for ARM v6.50 was used as the editor during the development of this software program. This directory contains
the Embedded Workbench project and worksapce files. More info is available at: http://www.iar.com/

15
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/settings/efm32G880.cspy.bat
View File

@ -2,14 +2,23 @@
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\bin\armsim2.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\bin\armbat.dll" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.0 Kickstart\arm\CONFIG\debugger\EnergyMicro\EFM32G880F128.ddf" "--semihosting" "--device=EFM32G880F128"
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armsim2.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\EnergyMicro\Trace_EFM32.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\CONFIG\debugger\EnergyMicro\EFM32G880F128.ddf" "--semihosting" "--device=EFM32G880F128"

6
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/settings/efm32G880.dni
View File

@ -15,6 +15,12 @@ GraphEnabled=0
ShowTimeLog=1
ShowTimeSum=1
SumSortOrder=0
[DataLog]
LogEnabled=0
SumEnabled=0
GraphEnabled=0
ShowTimeLog=1
ShowTimeSum=1
[Disassemble mode]
mode=0
[Breakpoints2]

12
Target/Demo/ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR/Prog/ide/settings/efm32G880.wsdt
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@ -12,7 +12,7 @@
<Column0>289</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
<Column0>362</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
<Build>
@ -24,7 +24,7 @@
<Windows>
<Wnd2>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-15953-11523</Identity>
@ -36,7 +36,7 @@
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2><Wnd3>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<Tabs>
<Tab>
<Identity>TabID-26827-12343</Identity>
@ -46,20 +46,20 @@
</Tab>
<Tab><Identity>TabID-26138-18087</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab></Tabs>
<SelectedTab>0</SelectedTab></Wnd3></Windows>
<SelectedTab>0</SelectedTab></Wnd1></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.c</Filename><XPos>0</XPos><YPos>128</YPos><SelStart>4450</SelStart><SelEnd>4450</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\vectors.c</Filename><XPos>0</XPos><YPos>105</YPos><SelStart>7856</SelStart><SelEnd>7856</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>32</YPos><SelStart>2687</SelStart><SelEnd>2687</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\led.c</Filename><XPos>0</XPos><YPos>32</YPos><SelStart>2220</SelStart><SelEnd>2220</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\boot.c</Filename><XPos>0</XPos><YPos>31</YPos><SelStart>2430</SelStart><SelEnd>2430</SelEnd></Tab><ActiveTab>4</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\timer.c</Filename><XPos>0</XPos><YPos>43</YPos><SelStart>3070</SelStart><SelEnd>3081</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.h</Filename><XPos>0</XPos><YPos>1121</YPos><SelStart>68737</SelStart><SelEnd>68750</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\timer.h</Filename><XPos>0</XPos><YPos>32</YPos><SelStart>1997</SelStart><SelEnd>1997</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\vectors.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\led.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\boot.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><ActiveTab>4</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\timer.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\timer.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-00837930><key>iaridepm.enu1</key></Toolbar-00837930></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>587</Bottom><Right>363</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>125000</sizeHorzCX><sizeHorzCY>240964</sizeHorzCY><sizeVertCX>228125</sizeVertCX><sizeVertCY>709639</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1602</Right><x>-2</x><y>-2</y><xscreen>1604</xscreen><yscreen>200</yscreen><sizeHorzCX>1002500</sizeHorzCX><sizeHorzCY>240964</sizeHorzCY><sizeVertCX>125000</sizeVertCX><sizeVertCY>240964</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
<Top><Row0><Sizes><Toolbar-02a1d7a8><key>iaridepm.enu1</key></Toolbar-02a1d7a8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>722</Bottom><Right>436</Right><x>-2</x><y>-2</y><xscreen>240</xscreen><yscreen>243</yscreen><sizeHorzCX>125000</sizeHorzCX><sizeHorzCY>241071</sizeHorzCY><sizeVertCX>228125</sizeVertCX><sizeVertCY>718254</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>241</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>243</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>241071</sizeHorzCY><sizeVertCX>125000</sizeVertCX><sizeVertCY>241071</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

BIN
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/bin/openbtl_ek_lm3s6965.elf
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Binary file not shown.

2150
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/bin/openbtl_ek_lm3s6965.map
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1644
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/bin/openbtl_ek_lm3s6965.srec
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File diff suppressed because it is too large Load Diff

36
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/config.h
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@ -41,10 +41,15 @@
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
* big endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
#define BOOT_CPU_XTAL_SPEED_KHZ (8000)
#define BOOT_CPU_SYSTEM_SPEED_KHZ (50000)
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
/****************************************************************************************
@ -65,6 +70,37 @@
#define BOOT_COM_UART_CHANNEL_INDEX (0)
/****************************************************************************************
* F I L E S Y S T E M I N T E R F A C E C O N F I G U R A T I O N
****************************************************************************************/
/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable
* to 1. This enables support for firmware updates from a file stored on a locally
* attached file system such as an SD-card. Note that this interface can be enabled
* together with one of the remote communication interfaces such as UART, CAN or USB.
*
* Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during
* a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each
* time a new string formatted log entry is available. This could be used during testing
* by outputting the string on UART or to create a log file on the file system itself.
*
* Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error
* occurs during the firmware update. This could for example be used to turn on an error
* LED to inform the user that something went wrong. Inspecting the log messages provides
* additional information on the error cause.
*
* Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new
* firmware update is started by the bootloader.
*
* Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a
* firmware update is completed by the bootloader.
*/
#define BOOT_FILE_SYS_ENABLE (1)
#define BOOT_FILE_LOGGING_ENABLE (1)
#define BOOT_FILE_ERROR_HOOK_ENABLE (1)
#define BOOT_FILE_STARTED_HOOK_ENABLE (1)
#define BOOT_FILE_COMPLETED_HOOK_ENABLE (1)
/****************************************************************************************
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
****************************************************************************************/

205
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/hooks.c
View File

@ -33,6 +33,11 @@
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#if (BOOT_FILE_LOGGING_ENABLE > 0)
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/uartlib.h"
#endif
/****************************************************************************************
@ -67,6 +72,30 @@ blt_bool BackDoorEntryHook(void)
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
/****************************************************************************************
* C P U D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/****************************************************************************************
** NAME: CpuUserProgramStartHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
** keep the bootloader active.
** DESCRIPTION: Callback that gets called when the bootloader is about to exit and
** hand over control to the user program. This is the last moment that
** some final checking can be performed and if necessary prevent the
** bootloader from activiting the user program.
**
****************************************************************************************/
blt_bool CpuUserProgramStartHook(void)
{
/* okay to start the user program */
return BLT_TRUE;
} /*** end of CpuUserProgramStartHook ***/
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
****************************************************************************************/
@ -176,4 +205,180 @@ void CopServiceHook(void)
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
/****************************************************************************************
* F I L E S Y S T E M I N T E R F A C E H O O K F U N C T I O N S
****************************************************************************************/
#if (BOOT_FILE_SYS_ENABLE > 0)
/****************************************************************************************
* Constant data declarations
****************************************************************************************/
static const blt_char firmwareFilename[] = "/demoprog_ek_lm3s6965.srec";
/****************************************************************************************
* Local data declarations
****************************************************************************************/
#if (BOOT_FILE_LOGGING_ENABLE > 0)
static struct
{
FIL handle;
blt_bool canUse;
} logfile;
#endif
/****************************************************************************************
** NAME: FileIsFirmwareUpdateRequestedHook
** PARAMETER: none
** RETURN VALUE: BLT_TRUE if a firmware update is requested, BLT_FALSE otherwise.
** DESCRIPTION: Callback that gets called continuously when the bootloader is idle to
** check whether a firmware update from local file storage should be
** started. This could for example be when a switch is pressed, when a
** certain file is found on the local file storage, etc.
**
****************************************************************************************/
blt_bool FileIsFirmwareUpdateRequestedHook(void)
{
FILINFO fileInfoObject = { 0 }; /* needs to be zeroed according to f_stat docs */;
/* Current example implementation looks for a predetermined firmware file on the
* SD-card. If the SD-card is accessible and the firmware file was found the firmware
* update is started. When successfully completed, the firmware file is deleted.
* During the firmware update, progress information is written to a file called
* bootlog.txt and additionally outputted on UART @57600 bps for debugging purposes.
*/
/* check if firmware file is present and SD-card is accessible */
if (f_stat(firmwareFilename, &fileInfoObject) == FR_OK)
{
/* check if the filesize is valid and that it is not a directory */
if ( (fileInfoObject.fsize > 0) && (!(fileInfoObject.fattrib & AM_DIR)) )
{
/* all conditions are met to start a firmware update from local file storage */
return BLT_TRUE;
}
}
/* still here so no firmware update request is pending */
return BLT_FALSE;
} /*** end of FileIsFirmwareUpdateRequestedHook ***/
/****************************************************************************************
** NAME: FileGetFirmwareFilenameHook
** PARAMETER: none
** RETURN VALUE: valid firmware filename with full path or BLT_NULL.
** DESCRIPTION: Callback to obtain the filename of the firmware file that should be
** used during the firmware update from the local file storage. This
** hook function is called at the beginning of the firmware update from
** local storage sequence.
**
****************************************************************************************/
const blt_char *FileGetFirmwareFilenameHook(void)
{
return firmwareFilename;
} /*** end of FileGetFirmwareFilenameHook ***/
#if (BOOT_FILE_STARTED_HOOK_ENABLE > 0)
/****************************************************************************************
** NAME: FileFirmwareUpdateStartedHook
** PARAMETER: none
** RETURN VALUE: none
** DESCRIPTION: Callback that gets called to inform the application that a firmware
** update from local storage just started.
**
****************************************************************************************/
void FileFirmwareUpdateStartedHook(void)
{
#if (BOOT_FILE_LOGGING_ENABLE > 0)
/* create/overwrite the logfile */
logfile.canUse = BLT_FALSE;
if (f_open(&logfile.handle, "/bootlog.txt", FA_CREATE_ALWAYS | FA_WRITE) == FR_OK)
{
logfile.canUse = BLT_TRUE;
}
#endif
} /*** end of FileFirmwareUpdateStartedHook ***/
#endif /* BOOT_FILE_STARTED_HOOK_ENABLE > 0 */
#if (BOOT_FILE_COMPLETED_HOOK_ENABLE > 0)
/****************************************************************************************
** NAME: FileFirmwareUpdateCompletedHook
** PARAMETER: none
** RETURN VALUE: none
** DESCRIPTION: Callback that gets called to inform the application that a firmware
** update was successfully completed.
**
****************************************************************************************/
void FileFirmwareUpdateCompletedHook(void)
{
#if (BOOT_FILE_LOGGING_ENABLE > 0)
/* close the log file */
if (logfile.canUse == BLT_TRUE)
{
f_close(&logfile.handle);
}
/* wait for all logging related transmission to complete */
while (UARTBusy(UART0_BASE) == true);
#endif
/* now delete the firmware file from the disk since the update was successful */
f_unlink(firmwareFilename);
} /*** end of FileFirmwareUpdateCompletedHook ***/
#endif /* BOOT_FILE_COMPLETED_HOOK_ENABLE > 0 */
#if (BOOT_FILE_ERROR_HOOK_ENABLE > 0)
/****************************************************************************************
** NAME: FileFirmwareUpdateErrorHook
** PARAMETER: error_code additional information on the error that occurred.
** RETURN VALUE: none
** DESCRIPTION: Callback that gets called in case an error occurred during a firmware
** update. Refer to <file.h> for a list of available error codes.
**
****************************************************************************************/
void FileFirmwareUpdateErrorHook(blt_int8u error_code)
{
} /*** end of FileFirmwareUpdateErrorHook ***/
#endif /* BOOT_FILE_ERROR_HOOK_ENABLE > 0 */
#if (BOOT_FILE_LOGGING_ENABLE > 0)
/****************************************************************************************
** NAME: FileFirmwareUpdateLogHook
** PARAMETER: info_string pointer to a character array with the log entry info.
** RETURN VALUE: none
** DESCRIPTION: Callback that gets called each time new log information becomes
** available during a firmware update.
**
****************************************************************************************/
void FileFirmwareUpdateLogHook(blt_char *info_string)
{
/* write the string to the log file */
if (logfile.canUse == BLT_TRUE)
{
if (f_puts(info_string, &logfile.handle) < 0)
{
logfile.canUse = BLT_FALSE;
f_close(&logfile.handle);
}
}
/* echo all characters in the string on UART */
while(*info_string != '\0')
{
/* write character to transmit holding register */
UARTCharPutNonBlocking(UART0_BASE, *info_string);
/* wait for tx holding register to be empty */
while(UARTSpaceAvail(UART0_BASE) == false);
/* point to the next character in the string */
info_string++;
}
} /*** end of FileFirmwareUpdateLogHook ***/
#endif /* BOOT_FILE_LOGGING_ENABLE > 0 */
#endif /* BOOT_FILE_SYS_ENABLE > 0 */
/*********************************** end of hooks.c ************************************/

25
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/ide/lm3s6965_crossworks.hzp
View File

@ -1,14 +1,14 @@
<!DOCTYPE CrossStudio_Project_File>
<solution Name="lm3s6965_crossworks" target="8" version="2">
<project Name="openbtl_ek_lm3s6965">
<configuration Name="Common" Placement="Flash" Target="LM3S6965" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_LM3S;$(ProjectDir)/../../../../Source/ARMCM3_LM3S/Crossworks" gcc_entry_point="reset_handler" gcc_optimization_level="Optimize For Size" link_include_standard_libraries="No" linker_additional_files="" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/LM3S/LM3S6965_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
<configuration Name="Common" Placement="Flash" Target="LM3S6965" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_library_optimization="Small" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/fatfs;$(ProjectDir)/../lib/driverlib;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/fatfs/src;$(ProjectDir)/../../../../Source/ARMCM3_LM3S;$(ProjectDir)/../../../../Source/ARMCM3_LM3S/Crossworks" gcc_entry_point="reset_handler" gcc_optimization_level="Optimize For Size" link_include_standard_libraries="Yes" linker_DebugIO_enabled="No" linker_additional_files="" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/LM3S/LM3S6965_MemoryMap.xml" linker_output_format="srec" linker_printf_enabled="No" linker_printf_width_precision_supported="No" linker_scanf_enabled="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
<folder Name="Source Files">
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
<folder Name="Demo">
<folder Name="Boot">
<folder Name="lib">
<folder Name="inc">
<folder Name="inc" file_name="">
<file file_name="../lib/inc/hw_ints.h"/>
<file file_name="../lib/inc/hw_nvic.h"/>
<file file_name="../lib/inc/hw_sysctl.h"/>
@ -17,8 +17,9 @@
<file file_name="../lib/inc/hw_gpio.h"/>
<file file_name="../lib/inc/hw_uart.h"/>
<file file_name="../lib/inc/hw_memmap.h"/>
<file file_name="../lib/inc/hw_ssi.h"/>
</folder>
<folder Name="driverlib">
<folder Name="driverlib" file_name="">
<file file_name="../lib/driverlib/sysctl.c"/>
<file file_name="../lib/driverlib/sysctl.h"/>
<file file_name="../lib/driverlib/debug.h"/>
@ -32,6 +33,13 @@
<file file_name="../lib/driverlib/flashlib.h"/>
<file file_name="../lib/driverlib/uartlib.c"/>
<file file_name="../lib/driverlib/uartlib.h"/>
<file file_name="../lib/driverlib/pin_map.h"/>
<file file_name="../lib/driverlib/ssi.c"/>
<file file_name="../lib/driverlib/ssi.h"/>
</folder>
<folder Name="fatfs" file_name="">
<file file_name="../lib/fatfs/ffconf.h"/>
<file file_name="../lib/fatfs/mmc.c"/>
</folder>
</folder>
<file file_name="../config.h"/>
@ -39,7 +47,7 @@
<file file_name="../main.c"/>
</folder>
</folder>
<folder Name="Source">
<folder Name="Source" file_name="">
<folder Name="ARMCM3_LM3S">
<folder Name="Crossworks">
<file file_name="../../../../Source/ARMCM3_LM3S/Crossworks/cstart.s"/>
@ -70,6 +78,15 @@
<file file_name="../../../../Source/plausibility.h"/>
<file file_name="../../../../Source/xcp.c"/>
<file file_name="../../../../Source/xcp.h"/>
<folder Name="fatfs" file_name="">
<file file_name="../../../../Source/fatfs/src/diskio.h"/>
<file file_name="../../../../Source/fatfs/src/ff.c"/>
<file file_name="../../../../Source/fatfs/src/ff.h"/>
<file file_name="../../../../Source/fatfs/src/integer.h"/>
<file file_name="../../../../Source/fatfs/src/option/unicode.c"/>
</folder>
<file file_name="../../../../Source/file.c"/>
<file file_name="../../../../Source/file.h"/>
</folder>
</folder>
<folder Name="System Files">

30
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/ide/lm3s6965_crossworks.hzs
View File

@ -2,23 +2,18 @@
<session>
<Bookmarks/>
<Breakpoints/>
<ETMWindow>
<ETMRegister number="0" value="800" />
<ETMRegister number="8" value="6f" />
<ETMRegister number="9" value="1000000" />
</ETMWindow>
<ExecutionCountWindow/>
<ExecutionProfileWindow/>
<Memory1>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_ek_lm3s6965" addressSpace="" />
</Memory1>
<Memory2>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_ek_lm3s6965" addressSpace="" />
</Memory2>
<Memory3>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_ek_lm3s6965" addressSpace="" />
</Memory3>
<Memory4>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" name="openbtl_ek_lm3s6965" addressSpace="" />
</Memory4>
<Project>
<ProjectSessionItem path="lm3s6965_crossworks" name="unnamed" />
@ -26,19 +21,18 @@
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files" name="unnamed" />
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source" name="unnamed" />
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source;ARMCM3_LM3S" name="unnamed" />
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source;ARMCM3_LM3S;Crossworks" name="unnamed" />
</Project>
<Register1>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_ek_lm3s6965" />
</Register1>
<Register2>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_ek_lm3s6965" />
</Register2>
<Register3>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_ek_lm3s6965" />
</Register3>
<Register4>
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_ek_lm3s6965" />
</Register4>
<TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
<TraceWindow>
@ -57,8 +51,8 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="72" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\Crossworks\cstart.s" y="87" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\Crossworks\cstart.s" left="0" selected="1" name="unnamed" top="74" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" y="61" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="37" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Source\ARMCM3_LM3S\cpu.c" y="78" path="C:\Work\software\OpenBLT\Target\Source\ARMCM3_LM3S\cpu.c" left="0" selected="1" name="unnamed" top="45" />
</Files>
<ARMCrossStudioWindow activeProject="openbtl_ek_lm3s6965" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\lib\driverlib" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
<ARMCrossStudioWindow activeProject="openbtl_ek_lm3s6965" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="C:\Work\software\OpenBLT\Target\Source" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
</session>

2
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/ide/readme.txt
View File

@ -1,4 +1,4 @@
Integrated Development Environment
----------------------------------
Rowleys CrossWorks was used as the editor during the development of this software program. This directory contains
Rowleys CrossWorks (version 2.3.1) was used as the editor during the development of this software program. This directory contains
the CrossWorks project and solution files. More info is available at: http://www.rowley.co.uk/

41
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/cpulib.c
View File

@ -3,23 +3,38 @@
// cpu.c - Instruction wrappers for special CPU instructions needed by the
// drivers.
//
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************

41
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/cpulib.h
View File

@ -2,23 +2,38 @@
//
// cpu.h - Prototypes for the CPU instruction wrapper functions.
//
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************

41
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/debug.h
View File

@ -2,23 +2,38 @@
//
// debug.h - Macros for assisting debug of the driver library.
//
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************

187
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/flashlib.c
View File

@ -2,23 +2,38 @@
//
// flash.c - Driver for programming the on-chip flash.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -48,7 +63,11 @@ static const unsigned long g_pulFMPPERegs[] =
FLASH_FMPPE,
FLASH_FMPPE1,
FLASH_FMPPE2,
FLASH_FMPPE3
FLASH_FMPPE3,
FLASH_FMPPE4,
FLASH_FMPPE5,
FLASH_FMPPE6,
FLASH_FMPPE7
};
//*****************************************************************************
@ -62,7 +81,11 @@ static const unsigned long g_pulFMPRERegs[] =
FLASH_FMPRE,
FLASH_FMPRE1,
FLASH_FMPRE2,
FLASH_FMPRE3
FLASH_FMPRE3,
FLASH_FMPRE4,
FLASH_FMPRE5,
FLASH_FMPRE6,
FLASH_FMPRE7
};
//*****************************************************************************
@ -70,7 +93,8 @@ static const unsigned long g_pulFMPRERegs[] =
//! Gets the number of processor clocks per micro-second.
//!
//! This function returns the number of clocks per micro-second, as presently
//! known by the flash controller.
//! known by the flash controller. This function is only valid on Sandstorm-
//! and Fury-class devices.
//!
//! \return Returns the number of processor clocks per micro-second.
//
@ -93,7 +117,7 @@ FlashUsecGet(void)
//! This function is used to tell the flash controller the number of processor
//! clocks per micro-second. This value must be programmed correctly or the
//! flash most likely will not program correctly; it has no affect on reading
//! flash.
//! flash. This function is only valid on Sandstorm- and Fury-class devices.
//!
//! \return None.
//
@ -113,11 +137,11 @@ FlashUsecSet(unsigned long ulClocks)
//!
//! \param ulAddress is the start address of the flash block to be erased.
//!
//! This function will erase a 1 kB block of the on-chip flash. After erasing,
//! the block will be filled with 0xFF bytes. Read-only and execute-only
//! blocks cannot be erased.
//! This function erases a 1-kB block of the on-chip flash. After erasing,
//! the block is filled with 0xFF bytes. Read-only and execute-only blocks
//! cannot be erased.
//!
//! This function will not return until the block has been erased.
//! This function does not return until the block has been erased.
//!
//! \return Returns 0 on success, or -1 if an invalid block address was
//! specified or the block is write-protected.
@ -132,9 +156,10 @@ FlashClear(unsigned long ulAddress)
ASSERT(!(ulAddress & (FLASH_ERASE_SIZE - 1)));
//
// Clear the flash access interrupt.
// Clear the flash access and error interrupts.
//
HWREG(FLASH_FCMISC) = FLASH_FCMISC_AMISC;
HWREG(FLASH_FCMISC) = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_ERMISC);
//
// Erase the block.
@ -150,9 +175,10 @@ FlashClear(unsigned long ulAddress)
}
//
// Return an error if an access violation occurred.
// Return an error if an access violation or erase error occurred.
//
if(HWREG(FLASH_FCRIS) & FLASH_FCRIS_ARIS)
if(HWREG(FLASH_FCRIS) & (FLASH_FCRIS_ARIS | FLASH_FCRIS_VOLTRIS |
FLASH_FCRIS_ERRIS))
{
return(-1);
}
@ -173,19 +199,16 @@ FlashClear(unsigned long ulAddress)
//! \param ulCount is the number of bytes to be programmed. Must be a multiple
//! of four.
//!
//! This function will program a sequence of words into the on-chip flash.
//! Programming each location consists of the result of an AND operation
//! of the new data and the existing data; in other words bits that contain
//! 1 can remain 1 or be changed to 0, but bits that are 0 cannot be changed
//! to 1. Therefore, a word can be programmed multiple times as long as these
//! rules are followed; if a program operation attempts to change a 0 bit to
//! a 1 bit, that bit will not have its value changed.
//! This function programs a sequence of words into the on-chip flash.
//! Each word in a page of flash can only be programmed one time between an
//! erase of that page; programming a word multiple times results in an
//! unpredictable value in that word of flash.
//!
//! Since the flash is programmed one word at a time, the starting address and
//! byte count must both be multiples of four. It is up to the caller to
//! Because the flash is programmed one word at a time, the starting address
//! and byte count must both be multiples of four. It is up to the caller to
//! verify the programmed contents, if such verification is required.
//!
//! This function will not return until the data has been programmed.
//! This function does not return until the data has been programmed.
//!
//! \return Returns 0 on success, or -1 if a programming error is encountered.
//
@ -201,9 +224,10 @@ FlashProgram(unsigned long *pulData, unsigned long ulAddress,
ASSERT(!(ulCount & 3));
//
// Clear the flash access interrupt.
// Clear the flash access and error interrupts.
//
HWREG(FLASH_FCMISC) = FLASH_FCMISC_AMISC;
HWREG(FLASH_FCMISC) = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_INVDMISC | FLASH_FCMISC_PROGMISC);
//
// See if this device has a write buffer.
@ -280,7 +304,8 @@ FlashProgram(unsigned long *pulData, unsigned long ulAddress,
//
// Return an error if an access violation occurred.
//
if(HWREG(FLASH_FCRIS) & FLASH_FCRIS_ARIS)
if(HWREG(FLASH_FCRIS) & (FLASH_FCRIS_ARIS | FLASH_FCRIS_VOLTRIS |
FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS))
{
return(-1);
}
@ -297,7 +322,7 @@ FlashProgram(unsigned long *pulData, unsigned long ulAddress,
//!
//! \param ulAddress is the start address of the flash block to be queried.
//!
//! This function will get the current protection for the specified 2 kB block
//! This function gets the current protection for the specified 2-kB block
//! of flash. Each block can be read/write, read-only, or execute-only.
//! Read/write blocks can be read, executed, erased, and programmed. Read-only
//! blocks can be read and executed. Execute-only blocks can only be executed;
@ -390,17 +415,17 @@ FlashProtectGet(unsigned long ulAddress)
//! \param eProtect is the protection to be applied to the block. Can be one
//! of \b FlashReadWrite, \b FlashReadOnly, or \b FlashExecuteOnly.
//!
//! This function will set the protection for the specified 2 kB block of
//! flash. Blocks which are read/write can be made read-only or execute-only.
//! Blocks which are read-only can be made execute-only. Blocks which are
//! This function sets the protection for the specified 2-kB block of
//! flash. Blocks that are read/write can be made read-only or execute-only.
//! Blocks that are read-only can be made execute-only. Blocks that are
//! execute-only cannot have their protection modified. Attempts to make the
//! block protection less stringent (that is, read-only to read/write) will
//! result in a failure (and be prevented by the hardware).
//! block protection less stringent (that is, read-only to read/write)
//! result in a failure (and are prevented by the hardware).
//!
//! Changes to the flash protection are maintained only until the next reset.
//! This allows the application to be executed in the desired flash protection
//! environment to check for inappropriate flash access (via the flash
//! interrupt). To make the flash protection permanent, use the
//! This protocol allows the application to be executed in the desired flash
//! protection environment to check for inappropriate flash access (via the
//! flash interrupt). To make the flash protection permanent, use the
//! FlashProtectSave() function.
//!
//! \return Returns 0 on success, or -1 if an invalid address or an invalid
@ -536,7 +561,7 @@ FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
{
ulProtectRE &= ~(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30);
ulProtectRE |= (HWREG(g_pulFMPRERegs[ulBank]) &
(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30));
(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30));
}
//
@ -555,11 +580,11 @@ FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
//
//! Saves the flash protection settings.
//!
//! This function will make the currently programmed flash protection settings
//! permanent. This is a non-reversible operation; a chip reset or power cycle
//! will not change the flash protection.
//! This function makes the currently programmed flash protection settings
//! permanent. On some devices, this operation is non-reversible; a chip reset
//! or power cycle does not change the flash protection.
//!
//! This function will not return until the protection has been saved.
//! This function does not return until the protection has been saved.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
//
@ -567,7 +592,7 @@ FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
long
FlashProtectSave(void)
{
int ulTemp, ulLimit;
unsigned long ulTemp, ulLimit;
//
// If running on a Sandstorm-class device, only trigger a save of the first
@ -604,8 +629,8 @@ FlashProtectSave(void)
//! \param pulUser0 is a pointer to the location to store USER Register 0.
//! \param pulUser1 is a pointer to the location to store USER Register 1.
//!
//! This function will read the contents of user registers (0 and 1), and
//! store them in the specified locations.
//! This function reads the contents of user registers (0 and 1), and
//! stores them in the specified locations.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
//
@ -646,7 +671,7 @@ FlashUserGet(unsigned long *pulUser0, unsigned long *pulUser1)
//! \param ulUser0 is the value to store in USER Register 0.
//! \param ulUser1 is the value to store in USER Register 1.
//!
//! This function will set the contents of the user registers (0 and 1) to
//! This function sets the contents of the user registers (0 and 1) to
//! the specified values.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
@ -679,11 +704,11 @@ FlashUserSet(unsigned long ulUser0, unsigned long ulUser1)
//
//! Saves the user registers.
//!
//! This function will make the currently programmed user register settings
//! permanent. This is a non-reversible operation; a chip reset or power cycle
//! will not change this setting.
//! This function makes the currently programmed user register settings
//! permanent. On some devices, this operation is non-reversible; a chip reset
//! or power cycle does not change this setting.
//!
//! This function will not return until the protection has been saved.
//! This function does not return until the protection has been saved.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
//
@ -739,12 +764,12 @@ FlashUserSave(void)
//! \param pfnHandler is a pointer to the function to be called when the flash
//! interrupt occurs.
//!
//! This sets the handler to be called when the flash interrupt occurs. The
//! flash controller can generate an interrupt when an invalid flash access
//! occurs, such as trying to program or erase a read-only block, or trying to
//! read from an execute-only block. It can also generate an interrupt when a
//! program or erase operation has completed. The interrupt will be
//! automatically enabled when the handler is registered.
//! This function sets the handler to be called when the flash interrupt
//! occurs. The flash controller can generate an interrupt when an invalid
//! flash access occurs, such as trying to program or erase a read-only block,
//! or trying to read from an execute-only block. It can also generate an
//! interrupt when a program or erase operation has completed. The interrupt
//! is automatically enabled when the handler is registered.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
@ -770,9 +795,9 @@ FlashIntRegister(void (*pfnHandler)(void))
//
//! Unregisters the interrupt handler for the flash interrupt.
//!
//! This function will clear the handler to be called when the flash interrupt
//! occurs. This will also mask off the interrupt in the interrupt controller
//! so that the interrupt handler is no longer called.
//! This function clears the handler to be called when the flash interrupt
//! occurs. This function also masks off the interrupt in the interrupt
//! controller so that the interrupt handler is no longer called.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
@ -801,9 +826,9 @@ FlashIntUnregister(void)
//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_ACCESS values.
//!
//! Enables the indicated flash controller interrupt sources. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor.
//! This function enables the indicated flash controller interrupt sources.
//! Only the sources that are enabled can be reflected to the processor
//! interrupt; disabled sources have no effect on the processor.
//!
//! \return None.
//
@ -824,9 +849,9 @@ FlashIntEnable(unsigned long ulIntFlags)
//! \param ulIntFlags is a bit mask of the interrupt sources to be disabled.
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_ACCESS values.
//!
//! Disables the indicated flash controller interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt;
//! disabled sources have no effect on the processor.
//! This function disables the indicated flash controller interrupt sources.
//! Only the sources that are enabled can be reflected to the processor
//! interrupt; disabled sources have no effect on the processor.
//!
//! \return None.
//
@ -847,9 +872,9 @@ FlashIntDisable(unsigned long ulIntFlags)
//! \param bMasked is false if the raw interrupt status is required and true if
//! the masked interrupt status is required.
//!
//! This returns the interrupt status for the flash controller. Either the raw
//! interrupt status or the status of interrupts that are allowed to reflect to
//! the processor can be returned.
//! This function returns the interrupt status for the flash controller.
//! Either the raw interrupt status or the status of interrupts that are
//! allowed to reflect to the processor can be returned.
//!
//! \return The current interrupt status, enumerated as a bit field of
//! \b FLASH_INT_PROGRAM and \b FLASH_INT_ACCESS.
@ -880,10 +905,10 @@ FlashIntStatus(tBoolean bMasked)
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_AMISC values.
//!
//! The specified flash controller interrupt sources are cleared, so that they
//! no longer assert. This must be done in the interrupt handler to keep it
//! from being called again immediately upon exit.
//! no longer assert. This function must be called in the interrupt handler
//! to keep the interrupt from being triggered again immediately upon exit.
//!
//! \note Because there is a write buffer in the Cortex-M3 processor, it may
//! \note Because there is a write buffer in the Cortex-M processor, it may
//! take several clock cycles before the interrupt source is actually cleared.
//! Therefore, it is recommended that the interrupt source be cleared early in
//! the interrupt handler (as opposed to the very last action) to avoid

50
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/flashlib.h
View File

@ -2,23 +2,38 @@
//
// flash.h - Prototypes for the flash driver.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -56,8 +71,13 @@ tFlashProtection;
// returned from FlashIntStatus().
//
//*****************************************************************************
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
#define FLASH_INT_EEPROM 0x00000004 // EEPROM Interrupt Mask
#define FLASH_INT_VOLTAGE_ERR 0x00000200 // Voltage Error Interrupt Mask
#define FLASH_INT_DATA_ERR 0x00000400 // Invalid Data Interrupt Mask
#define FLASH_INT_ERASE_ERR 0x00000800 // Erase Error Interrupt Mask
#define FLASH_INT_PROGRAM_ERR 0x00002000 // Program Verify Error Interrupt Mask
//*****************************************************************************
//

936
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/gpio.c
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File diff suppressed because it is too large Load Diff

682
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/gpio.h
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@ -2,23 +2,38 @@
//
// gpio.h - Defines and Macros for GPIO API.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -71,7 +86,8 @@ extern "C"
#define GPIO_RISING_EDGE 0x00000004 // Interrupt on rising edge
#define GPIO_BOTH_EDGES 0x00000001 // Interrupt on both edges
#define GPIO_LOW_LEVEL 0x00000002 // Interrupt on low level
#define GPIO_HIGH_LEVEL 0x00000007 // Interrupt on high level
#define GPIO_HIGH_LEVEL 0x00000006 // Interrupt on high level
#define GPIO_DISCRETE_INT 0x00010000 // Interrupt for individual pins
//*****************************************************************************
//
@ -84,6 +100,7 @@ extern "C"
#define GPIO_STRENGTH_8MA 0x00000004 // 8mA drive strength
#define GPIO_STRENGTH_8MA_SC 0x0000000C // 8mA drive with slew rate control
//*****************************************************************************
//
// Values that can be passed to GPIOPadConfigSet as the ulPadType parameter,
@ -94,620 +111,8 @@ extern "C"
#define GPIO_PIN_TYPE_STD_WPU 0x0000000A // Push-pull with weak pull-up
#define GPIO_PIN_TYPE_STD_WPD 0x0000000C // Push-pull with weak pull-down
#define GPIO_PIN_TYPE_OD 0x00000009 // Open-drain
#define GPIO_PIN_TYPE_OD_WPU 0x0000000B // Open-drain with weak pull-up
#define GPIO_PIN_TYPE_OD_WPD 0x0000000D // Open-drain with weak pull-down
#define GPIO_PIN_TYPE_ANALOG 0x00000000 // Analog comparator
//*****************************************************************************
//
// Values that can be passed to GPIOPinConfigure as the ulPinConfig parameter.
//
//*****************************************************************************
//
// GPIO pin A0
//
#define GPIO_PA0_U0RX 0x00000001
#define GPIO_PA0_I2C1SCL 0x00000008
#define GPIO_PA0_U1RX 0x00000009
//
// GPIO pin A1
//
#define GPIO_PA1_U0TX 0x00000401
#define GPIO_PA1_I2C1SDA 0x00000408
#define GPIO_PA1_U1TX 0x00000409
//
// GPIO pin A2
//
#define GPIO_PA2_SSI0CLK 0x00000801
#define GPIO_PA2_PWM4 0x00000804
#define GPIO_PA2_I2S0RXSD 0x00000809
//
// GPIO pin A3
//
#define GPIO_PA3_SSI0FSS 0x00000c01
#define GPIO_PA3_PWM5 0x00000c04
#define GPIO_PA3_I2S0RXMCLK 0x00000c09
//
// GPIO pin A4
//
#define GPIO_PA4_SSI0RX 0x00001001
#define GPIO_PA4_PWM6 0x00001004
#define GPIO_PA4_CAN0RX 0x00001005
#define GPIO_PA4_I2S0TXSCK 0x00001009
//
// GPIO pin A5
//
#define GPIO_PA5_SSI0TX 0x00001401
#define GPIO_PA5_PWM7 0x00001404
#define GPIO_PA5_CAN0TX 0x00001405
#define GPIO_PA5_I2S0TXWS 0x00001409
//
// GPIO pin A6
//
#define GPIO_PA6_I2C1SCL 0x00001801
#define GPIO_PA6_CCP1 0x00001802
#define GPIO_PA6_PWM0 0x00001804
#define GPIO_PA6_PWM4 0x00001805
#define GPIO_PA6_CAN0RX 0x00001806
#define GPIO_PA6_USB0EPEN 0x00001808
#define GPIO_PA6_U1CTS 0x00001809
//
// GPIO pin A7
//
#define GPIO_PA7_I2C1SDA 0x00001c01
#define GPIO_PA7_CCP4 0x00001c02
#define GPIO_PA7_PWM1 0x00001c04
#define GPIO_PA7_PWM5 0x00001c05
#define GPIO_PA7_CAN0TX 0x00001c06
#define GPIO_PA7_CCP3 0x00001c07
#define GPIO_PA7_USB0PFLT 0x00001c08
#define GPIO_PA7_U1DCD 0x00001c09
//
// GPIO pin B0
//
#define GPIO_PB0_CCP0 0x00010001
#define GPIO_PB0_PWM2 0x00010002
#define GPIO_PB0_U1RX 0x00010005
//
// GPIO pin B1
//
#define GPIO_PB1_CCP2 0x00010401
#define GPIO_PB1_PWM3 0x00010402
#define GPIO_PB1_CCP1 0x00010404
#define GPIO_PB1_U1TX 0x00010405
//
// GPIO pin B2
//
#define GPIO_PB2_I2C0SCL 0x00010801
#define GPIO_PB2_IDX0 0x00010802
#define GPIO_PB2_CCP3 0x00010804
#define GPIO_PB2_CCP0 0x00010805
#define GPIO_PB2_USB0EPEN 0x00010808
//
// GPIO pin B3
//
#define GPIO_PB3_I2C0SDA 0x00010c01
#define GPIO_PB3_FAULT0 0x00010c02
#define GPIO_PB3_FAULT3 0x00010c04
#define GPIO_PB3_USB0PFLT 0x00010c08
//
// GPIO pin B4
//
#define GPIO_PB4_U2RX 0x00011004
#define GPIO_PB4_CAN0RX 0x00011005
#define GPIO_PB4_IDX0 0x00011006
#define GPIO_PB4_U1RX 0x00011007
#define GPIO_PB4_EPI0S23 0x00011008
//
// GPIO pin B5
//
#define GPIO_PB5_C0O 0x00011401
#define GPIO_PB5_CCP5 0x00011402
#define GPIO_PB5_CCP6 0x00011403
#define GPIO_PB5_CCP0 0x00011404
#define GPIO_PB5_CAN0TX 0x00011405
#define GPIO_PB5_CCP2 0x00011406
#define GPIO_PB5_U1TX 0x00011407
#define GPIO_PB5_EPI0S22 0x00011408
//
// GPIO pin B6
//
#define GPIO_PB6_CCP1 0x00011801
#define GPIO_PB6_CCP7 0x00011802
#define GPIO_PB6_C0O 0x00011803
#define GPIO_PB6_FAULT1 0x00011804
#define GPIO_PB6_IDX0 0x00011805
#define GPIO_PB6_CCP5 0x00011806
#define GPIO_PB6_I2S0TXSCK 0x00011809
//
// GPIO pin B7
//
#define GPIO_PB7_NMI 0x00011c04
//
// GPIO pin C0
//
#define GPIO_PC0_TCK 0x00020003
//
// GPIO pin C1
//
#define GPIO_PC1_TMS 0x00020403
//
// GPIO pin C2
//
#define GPIO_PC2_TDI 0x00020803
//
// GPIO pin C3
//
#define GPIO_PC3_TDO 0x00020c03
//
// GPIO pin C4
//
#define GPIO_PC4_CCP5 0x00021001
#define GPIO_PC4_PHA0 0x00021002
#define GPIO_PC4_PWM6 0x00021004
#define GPIO_PC4_CCP2 0x00021005
#define GPIO_PC4_CCP4 0x00021006
#define GPIO_PC4_EPI0S2 0x00021008
#define GPIO_PC4_CCP1 0x00021009
//
// GPIO pin C5
//
#define GPIO_PC5_CCP1 0x00021401
#define GPIO_PC5_C1O 0x00021402
#define GPIO_PC5_C0O 0x00021403
#define GPIO_PC5_FAULT2 0x00021404
#define GPIO_PC5_CCP3 0x00021405
#define GPIO_PC5_USB0EPEN 0x00021406
#define GPIO_PC5_EPI0S3 0x00021408
//
// GPIO pin C6
//
#define GPIO_PC6_CCP3 0x00021801
#define GPIO_PC6_PHB0 0x00021802
#define GPIO_PC6_C2O 0x00021803
#define GPIO_PC6_PWM7 0x00021804
#define GPIO_PC6_U1RX 0x00021805
#define GPIO_PC6_CCP0 0x00021806
#define GPIO_PC6_USB0PFLT 0x00021807
#define GPIO_PC6_EPI0S4 0x00021808
//
// GPIO pin C7
//
#define GPIO_PC7_CCP4 0x00021c01
#define GPIO_PC7_PHB0 0x00021c02
#define GPIO_PC7_CCP0 0x00021c04
#define GPIO_PC7_U1TX 0x00021c05
#define GPIO_PC7_USB0PFLT 0x00021c06
#define GPIO_PC7_C1O 0x00021c07
#define GPIO_PC7_EPI0S5 0x00021c08
//
// GPIO pin D0
//
#define GPIO_PD0_PWM0 0x00030001
#define GPIO_PD0_CAN0RX 0x00030002
#define GPIO_PD0_IDX0 0x00030003
#define GPIO_PD0_U2RX 0x00030004
#define GPIO_PD0_U1RX 0x00030005
#define GPIO_PD0_CCP6 0x00030006
#define GPIO_PD0_I2S0RXSCK 0x00030008
#define GPIO_PD0_U1CTS 0x00030009
//
// GPIO pin D1
//
#define GPIO_PD1_PWM1 0x00030401
#define GPIO_PD1_CAN0TX 0x00030402
#define GPIO_PD1_PHA0 0x00030403
#define GPIO_PD1_U2TX 0x00030404
#define GPIO_PD1_U1TX 0x00030405
#define GPIO_PD1_CCP7 0x00030406
#define GPIO_PD1_I2S0RXWS 0x00030408
#define GPIO_PD1_U1DCD 0x00030409
#define GPIO_PD1_CCP2 0x0003040a
#define GPIO_PD1_PHB1 0x0003040b
//
// GPIO pin D2
//
#define GPIO_PD2_U1RX 0x00030801
#define GPIO_PD2_CCP6 0x00030802
#define GPIO_PD2_PWM2 0x00030803
#define GPIO_PD2_CCP5 0x00030804
#define GPIO_PD2_EPI0S20 0x00030808
//
// GPIO pin D3
//
#define GPIO_PD3_U1TX 0x00030c01
#define GPIO_PD3_CCP7 0x00030c02
#define GPIO_PD3_PWM3 0x00030c03
#define GPIO_PD3_CCP0 0x00030c04
#define GPIO_PD3_EPI0S21 0x00030c08
//
// GPIO pin D4
//
#define GPIO_PD4_CCP0 0x00031001
#define GPIO_PD4_CCP3 0x00031002
#define GPIO_PD4_I2S0RXSD 0x00031008
#define GPIO_PD4_U1RI 0x00031009
#define GPIO_PD4_EPI0S19 0x0003100a
//
// GPIO pin D5
//
#define GPIO_PD5_CCP2 0x00031401
#define GPIO_PD5_CCP4 0x00031402
#define GPIO_PD5_I2S0RXMCLK 0x00031408
#define GPIO_PD5_U2RX 0x00031409
#define GPIO_PD5_EPI0S28 0x0003140a
//
// GPIO pin D6
//
#define GPIO_PD6_FAULT0 0x00031801
#define GPIO_PD6_I2S0TXSCK 0x00031808
#define GPIO_PD6_U2TX 0x00031809
#define GPIO_PD6_EPI0S29 0x0003180a
//
// GPIO pin D7
//
#define GPIO_PD7_IDX0 0x00031c01
#define GPIO_PD7_C0O 0x00031c02
#define GPIO_PD7_CCP1 0x00031c03
#define GPIO_PD7_I2S0TXWS 0x00031c08
#define GPIO_PD7_U1DTR 0x00031c09
#define GPIO_PD7_EPI0S30 0x00031c0a
//
// GPIO pin E0
//
#define GPIO_PE0_PWM4 0x00040001
#define GPIO_PE0_SSI1CLK 0x00040002
#define GPIO_PE0_CCP3 0x00040003
#define GPIO_PE0_EPI0S8 0x00040008
#define GPIO_PE0_USB0PFLT 0x00040009
//
// GPIO pin E1
//
#define GPIO_PE1_PWM5 0x00040401
#define GPIO_PE1_SSI1FSS 0x00040402
#define GPIO_PE1_FAULT0 0x00040403
#define GPIO_PE1_CCP2 0x00040404
#define GPIO_PE1_CCP6 0x00040405
#define GPIO_PE1_EPI0S9 0x00040408
//
// GPIO pin E2
//
#define GPIO_PE2_CCP4 0x00040801
#define GPIO_PE2_SSI1RX 0x00040802
#define GPIO_PE2_PHB1 0x00040803
#define GPIO_PE2_PHA0 0x00040804
#define GPIO_PE2_CCP2 0x00040805
#define GPIO_PE2_EPI0S24 0x00040808
//
// GPIO pin E3
//
#define GPIO_PE3_CCP1 0x00040c01
#define GPIO_PE3_SSI1TX 0x00040c02
#define GPIO_PE3_PHA1 0x00040c03
#define GPIO_PE3_PHB0 0x00040c04
#define GPIO_PE3_CCP7 0x00040c05
#define GPIO_PE3_EPI0S25 0x00040c08
//
// GPIO pin E4
//
#define GPIO_PE4_CCP3 0x00041001
#define GPIO_PE4_FAULT0 0x00041004
#define GPIO_PE4_U2TX 0x00041005
#define GPIO_PE4_CCP2 0x00041006
#define GPIO_PE4_I2S0TXWS 0x00041009
//
// GPIO pin E5
//
#define GPIO_PE5_CCP5 0x00041401
#define GPIO_PE5_I2S0TXSD 0x00041409
//
// GPIO pin E6
//
#define GPIO_PE6_PWM4 0x00041801
#define GPIO_PE6_C1O 0x00041802
#define GPIO_PE6_U1CTS 0x00041809
//
// GPIO pin E7
//
#define GPIO_PE7_PWM5 0x00041c01
#define GPIO_PE7_C2O 0x00041c02
#define GPIO_PE7_U1DCD 0x00041c09
//
// GPIO pin F0
//
#define GPIO_PF0_CAN1RX 0x00050001
#define GPIO_PF0_PHB0 0x00050002
#define GPIO_PF0_PWM0 0x00050003
#define GPIO_PF0_I2S0TXSD 0x00050008
#define GPIO_PF0_U1DSR 0x00050009
//
// GPIO pin F1
//
#define GPIO_PF1_CAN1TX 0x00050401
#define GPIO_PF1_IDX1 0x00050402
#define GPIO_PF1_PWM1 0x00050403
#define GPIO_PF1_I2S0TXMCLK 0x00050408
#define GPIO_PF1_U1RTS 0x00050409
#define GPIO_PF1_CCP3 0x0005040a
//
// GPIO pin F2
//
#define GPIO_PF2_LED1 0x00050801
#define GPIO_PF2_PWM4 0x00050802
#define GPIO_PF2_PWM2 0x00050804
#define GPIO_PF2_SSI1CLK 0x00050809
//
// GPIO pin F3
//
#define GPIO_PF3_LED0 0x00050c01
#define GPIO_PF3_PWM5 0x00050c02
#define GPIO_PF3_PWM3 0x00050c04
#define GPIO_PF3_SSI1FSS 0x00050c09
//
// GPIO pin F4
//
#define GPIO_PF4_CCP0 0x00051001
#define GPIO_PF4_C0O 0x00051002
#define GPIO_PF4_FAULT0 0x00051004
#define GPIO_PF4_EPI0S12 0x00051008
#define GPIO_PF4_SSI1RX 0x00051009
//
// GPIO pin F5
//
#define GPIO_PF5_CCP2 0x00051401
#define GPIO_PF5_C1O 0x00051402
#define GPIO_PF5_EPI0S15 0x00051408
#define GPIO_PF5_SSI1TX 0x00051409
//
// GPIO pin F6
//
#define GPIO_PF6_CCP1 0x00051801
#define GPIO_PF6_C2O 0x00051802
#define GPIO_PF6_PHA0 0x00051804
#define GPIO_PF6_I2S0TXMCLK 0x00051809
#define GPIO_PF6_U1RTS 0x0005180a
//
// GPIO pin F7
//
#define GPIO_PF7_CCP4 0x00051c01
#define GPIO_PF7_PHB0 0x00051c04
#define GPIO_PF7_EPI0S12 0x00051c08
#define GPIO_PF7_FAULT1 0x00051c09
//
// GPIO pin G0
//
#define GPIO_PG0_U2RX 0x00060001
#define GPIO_PG0_PWM0 0x00060002
#define GPIO_PG0_I2C1SCL 0x00060003
#define GPIO_PG0_PWM4 0x00060004
#define GPIO_PG0_USB0EPEN 0x00060007
#define GPIO_PG0_EPI0S13 0x00060008
//
// GPIO pin G1
//
#define GPIO_PG1_U2TX 0x00060401
#define GPIO_PG1_PWM1 0x00060402
#define GPIO_PG1_I2C1SDA 0x00060403
#define GPIO_PG1_PWM5 0x00060404
#define GPIO_PG1_EPI0S14 0x00060408
//
// GPIO pin G2
//
#define GPIO_PG2_PWM0 0x00060801
#define GPIO_PG2_FAULT0 0x00060804
#define GPIO_PG2_IDX1 0x00060808
#define GPIO_PG2_I2S0RXSD 0x00060809
//
// GPIO pin G3
//
#define GPIO_PG3_PWM1 0x00060c01
#define GPIO_PG3_FAULT2 0x00060c04
#define GPIO_PG3_FAULT0 0x00060c08
#define GPIO_PG3_I2S0RXMCLK 0x00060c09
//
// GPIO pin G4
//
#define GPIO_PG4_CCP3 0x00061001
#define GPIO_PG4_FAULT1 0x00061004
#define GPIO_PG4_EPI0S15 0x00061008
#define GPIO_PG4_PWM6 0x00061009
#define GPIO_PG4_U1RI 0x0006100a
//
// GPIO pin G5
//
#define GPIO_PG5_CCP5 0x00061401
#define GPIO_PG5_IDX0 0x00061404
#define GPIO_PG5_FAULT1 0x00061405
#define GPIO_PG5_PWM7 0x00061408
#define GPIO_PG5_I2S0RXSCK 0x00061409
#define GPIO_PG5_U1DTR 0x0006140a
//
// GPIO pin G6
//
#define GPIO_PG6_PHA1 0x00061801
#define GPIO_PG6_PWM6 0x00061804
#define GPIO_PG6_FAULT1 0x00061808
#define GPIO_PG6_I2S0RXWS 0x00061809
#define GPIO_PG6_U1RI 0x0006180a
//
// GPIO pin G7
//
#define GPIO_PG7_PHB1 0x00061c01
#define GPIO_PG7_PWM7 0x00061c04
#define GPIO_PG7_CCP5 0x00061c08
#define GPIO_PG7_EPI0S31 0x00061c09
//
// GPIO pin H0
//
#define GPIO_PH0_CCP6 0x00070001
#define GPIO_PH0_PWM2 0x00070002
#define GPIO_PH0_EPI0S6 0x00070008
#define GPIO_PH0_PWM4 0x00070009
//
// GPIO pin H1
//
#define GPIO_PH1_CCP7 0x00070401
#define GPIO_PH1_PWM3 0x00070402
#define GPIO_PH1_EPI0S7 0x00070408
#define GPIO_PH1_PWM5 0x00070409
//
// GPIO pin H2
//
#define GPIO_PH2_IDX1 0x00070801
#define GPIO_PH2_C1O 0x00070802
#define GPIO_PH2_FAULT3 0x00070804
#define GPIO_PH2_EPI0S1 0x00070808
//
// GPIO pin H3
//
#define GPIO_PH3_PHB0 0x00070c01
#define GPIO_PH3_FAULT0 0x00070c02
#define GPIO_PH3_USB0EPEN 0x00070c04
#define GPIO_PH3_EPI0S0 0x00070c08
//
// GPIO pin H4
//
#define GPIO_PH4_USB0PFLT 0x00071004
#define GPIO_PH4_EPI0S10 0x00071008
#define GPIO_PH4_SSI1CLK 0x0007100b
//
// GPIO pin H5
//
#define GPIO_PH5_EPI0S11 0x00071408
#define GPIO_PH5_FAULT2 0x0007140a
#define GPIO_PH5_SSI1FSS 0x0007140b
//
// GPIO pin H6
//
#define GPIO_PH6_EPI0S26 0x00071808
#define GPIO_PH6_PWM4 0x0007180a
#define GPIO_PH6_SSI1RX 0x0007180b
//
// GPIO pin H7
//
#define GPIO_PH7_EPI0S27 0x00071c08
#define GPIO_PH7_PWM5 0x00071c0a
#define GPIO_PH7_SSI1TX 0x00071c0b
//
// GPIO pin J0
//
#define GPIO_PJ0_EPI0S16 0x00080008
#define GPIO_PJ0_PWM0 0x0008000a
#define GPIO_PJ0_I2C1SCL 0x0008000b
//
// GPIO pin J1
//
#define GPIO_PJ1_EPI0S17 0x00080408
#define GPIO_PJ1_USB0PFLT 0x00080409
#define GPIO_PJ1_PWM1 0x0008040a
#define GPIO_PJ1_I2C1SDA 0x0008040b
//
// GPIO pin J2
//
#define GPIO_PJ2_EPI0S18 0x00080808
#define GPIO_PJ2_CCP0 0x00080809
#define GPIO_PJ2_FAULT0 0x0008080a
//
// GPIO pin J3
//
#define GPIO_PJ3_EPI0S19 0x00080c08
#define GPIO_PJ3_U1CTS 0x00080c09
#define GPIO_PJ3_CCP6 0x00080c0a
//
// GPIO pin J4
//
#define GPIO_PJ4_EPI0S28 0x00081008
#define GPIO_PJ4_U1DCD 0x00081009
#define GPIO_PJ4_CCP4 0x0008100a
//
// GPIO pin J5
//
#define GPIO_PJ5_EPI0S29 0x00081408
#define GPIO_PJ5_U1DSR 0x00081409
#define GPIO_PJ5_CCP2 0x0008140a
//
// GPIO pin J6
//
#define GPIO_PJ6_EPI0S30 0x00081808
#define GPIO_PJ6_U1RTS 0x00081809
#define GPIO_PJ6_CCP1 0x0008180a
//
// GPIO pin J7
//
#define GPIO_PJ7_U1DTR 0x00081c09
#define GPIO_PJ7_CCP0 0x00081c0a
//*****************************************************************************
//
// Prototypes for the APIs.
@ -741,12 +146,18 @@ extern void GPIOPinTypeCAN(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeComparator(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeEPI(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeEthernetLED(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeEthernetMII(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeFan(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeGPIOInput(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeGPIOOutput(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeGPIOOutputOD(unsigned long ulPort,
unsigned char ucPins);
extern void GPIOPinTypeI2C(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeI2CSCL(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeI2S(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeLPC(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypePECIRx(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypePECITx(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypePWM(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeQEI(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeSSI(unsigned long ulPort, unsigned char ucPins);
@ -754,6 +165,25 @@ extern void GPIOPinTypeTimer(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeUART(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeUSBAnalog(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeUSBDigital(unsigned long ulPort, unsigned char ucPins);
extern void GPIODMATriggerEnable(unsigned long ulPort, unsigned char ucPins);
extern void GPIODMATriggerDisable(unsigned long ulPort, unsigned char ucPins);
extern void GPIOADCTriggerEnable(unsigned long ulPort, unsigned char ucPins);
extern void GPIOADCTriggerDisable(unsigned long ulPort, unsigned char ucPins);
//****************************************************************************
//
// The definitions for GPIOPinConfigure previously resided in this file but
// have been moved to pin_map.h and made part-specific (in other words, only
// those definitions that are valid based on the selected part, as defined by
// PART_<partnum>, will be made available). For backwards compatibility,
// pin_map.h is included here so that the expected definitions will still be
// available (though part-specific now, so some that were previously available
// but inappropriate for the given part will not be available).
//
//*****************************************************************************
#ifndef DEPRECATED
#include "pin_map.h"
#endif
//*****************************************************************************
//

294
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/interrupt.c
View File

@ -2,23 +2,38 @@
//
// interrupt.c - Driver for the NVIC Interrupt Controller.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -59,7 +74,58 @@ static const unsigned long g_pulRegs[] =
{
0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, NVIC_PRI0, NVIC_PRI1,
NVIC_PRI2, NVIC_PRI3, NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7,
NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, NVIC_PRI12, NVIC_PRI13
NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, NVIC_PRI12, NVIC_PRI13,
NVIC_PRI14, NVIC_PRI15, NVIC_PRI16, NVIC_PRI17, NVIC_PRI18, NVIC_PRI19,
NVIC_PRI20, NVIC_PRI21, NVIC_PRI22, NVIC_PRI23, NVIC_PRI24, NVIC_PRI25,
NVIC_PRI26, NVIC_PRI27, NVIC_PRI28, NVIC_PRI29, NVIC_PRI30, NVIC_PRI31,
NVIC_PRI32, NVIC_PRI33, NVIC_PRI34
};
//*****************************************************************************
//
// This is a mapping between interrupt number (for the peripheral interrupts
// only) and the register that contains the interrupt enable for that
// interrupt.
//
//*****************************************************************************
static const unsigned long g_pulEnRegs[] =
{
NVIC_EN0, NVIC_EN1, NVIC_EN2, NVIC_EN3, NVIC_EN4
};
//*****************************************************************************
//
// This is a mapping between interrupt number (for the peripheral interrupts
// only) and the register that contains the interrupt disable for that
// interrupt.
//
//*****************************************************************************
static const unsigned long g_pulDisRegs[] =
{
NVIC_DIS0, NVIC_DIS1, NVIC_DIS2, NVIC_DIS3, NVIC_DIS4
};
//*****************************************************************************
//
// This is a mapping between interrupt number (for the peripheral interrupts
// only) and the register that contains the interrupt pend for that interrupt.
//
//*****************************************************************************
static const unsigned long g_pulPendRegs[] =
{
NVIC_PEND0, NVIC_PEND1, NVIC_PEND2, NVIC_PEND3, NVIC_PEND4
};
//*****************************************************************************
//
// This is a mapping between interrupt number (for the peripheral interrupts
// only) and the register that contains the interrupt unpend for that
// interrupt.
//
//*****************************************************************************
static const unsigned long g_pulUnpendRegs[] =
{
NVIC_UNPEND0, NVIC_UNPEND1, NVIC_UNPEND2, NVIC_UNPEND3, NVIC_UNPEND4
};
//*****************************************************************************
@ -97,30 +163,32 @@ IntDefaultHandler(void)
//
//*****************************************************************************
#if defined(ewarm)
#pragma data_alignment=1024
static __no_init void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) @ "VTABLE";
#elif defined(sourcerygxx)
static __attribute__((section(".cs3.region-head.ram")))
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
#elif defined(ccs)
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) __attribute__ ((aligned(1024)));
#elif defined(ccs) || defined(DOXYGEN)
#pragma DATA_ALIGN(g_pfnRAMVectors, 1024)
#pragma DATA_SECTION(g_pfnRAMVectors, ".vtable")
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
#else
static __attribute__((section("vtable")))
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) __attribute__ ((aligned(1024)));
#endif
//*****************************************************************************
//
//! Enables the processor interrupt.
//!
//! Allows the processor to respond to interrupts. This does not affect the
//! set of interrupts enabled in the interrupt controller; it just gates the
//! single interrupt from the controller to the processor.
//! This function allows the processor to respond to interrupts. This function
//! does not affect the set of interrupts enabled in the interrupt controller;
//! it just gates the single interrupt from the controller to the processor.
//!
//! \note Previously, this function had no return value. As such, it was
//! possible to include <tt>interrupt.h</tt> and call this function without
//! having included <tt>hw_types.h</tt>. Now that the return is a
//! <tt>tBoolean</tt>, a compiler error will occur in this case. The solution
//! <tt>tBoolean</tt>, a compiler error occurs in this case. The solution
//! is to include <tt>hw_types.h</tt> before including <tt>interrupt.h</tt>.
//!
//! \return Returns \b true if interrupts were disabled when the function was
@ -140,14 +208,15 @@ IntMasterEnable(void)
//
//! Disables the processor interrupt.
//!
//! Prevents the processor from receiving interrupts. This does not affect the
//! set of interrupts enabled in the interrupt controller; it just gates the
//! single interrupt from the controller to the processor.
//! This function prevents the processor from receiving interrupts. This
//! function does not affect the set of interrupts enabled in the interrupt
//! controller; it just gates the single interrupt from the controller to the
//! processor.
//!
//! \note Previously, this function had no return value. As such, it was
//! possible to include <tt>interrupt.h</tt> and call this function without
//! having included <tt>hw_types.h</tt>. Now that the return is a
//! <tt>tBoolean</tt>, a compiler error will occur in this case. The solution
//! <tt>tBoolean</tt>, a compiler error occurs in this case. The solution
//! is to include <tt>hw_types.h</tt> before including <tt>interrupt.h</tt>.
//!
//! \return Returns \b true if interrupts were already disabled when the
@ -172,16 +241,16 @@ IntMasterDisable(void)
//!
//! This function is used to specify the handler function to be called when the
//! given interrupt is asserted to the processor. When the interrupt occurs,
//! if it is enabled (via IntEnable()), the handler function will be called in
//! interrupt context. Since the handler function can preempt other code, care
//! must be taken to protect memory or peripherals that are accessed by the
//! handler and other non-handler code.
//! if it is enabled (via IntEnable()), the handler function is called in
//! interrupt context. Because the handler function can preempt other code,
//! care must be taken to protect memory or peripherals that are accessed by
//! the handler and other non-handler code.
//!
//! \note The use of this function (directly or indirectly via a peripheral
//! driver interrupt register function) moves the interrupt vector table from
//! flash to SRAM. Therefore, care must be taken when linking the application
//! to ensure that the SRAM vector table is located at the beginning of SRAM;
//! otherwise NVIC will not look in the correct portion of memory for the
//! otherwise the NVIC does not look in the correct portion of memory for the
//! vector table (it requires the vector table be on a 1 kB memory alignment).
//! Normally, the SRAM vector table is so placed via the use of linker scripts.
//! See the discussion of compile-time versus run-time interrupt handler
@ -222,7 +291,7 @@ IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void))
}
//
// Point NVIC at the RAM vector table.
// Point the NVIC at the RAM vector table.
//
HWREG(NVIC_VTABLE) = (unsigned long)g_pfnRAMVectors;
}
@ -240,7 +309,7 @@ IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void))
//! \param ulInterrupt specifies the interrupt in question.
//!
//! This function is used to indicate that no handler should be called when the
//! given interrupt is asserted to the processor. The interrupt source will be
//! given interrupt is asserted to the processor. The interrupt source is
//! automatically disabled (via IntDisable()) if necessary.
//!
//! \sa IntRegister() for important information about registering interrupt
@ -270,7 +339,7 @@ IntUnregister(unsigned long ulInterrupt)
//! \param ulBits specifies the number of bits of preemptable priority.
//!
//! This function specifies the split between preemptable priority levels and
//! subpriority levels in the interrupt priority specification. The range of
//! sub-priority levels in the interrupt priority specification. The range of
//! the grouping values are dependent upon the hardware implementation; on
//! the Stellaris family, three bits are available for hardware interrupt
//! prioritization and therefore priority grouping values of three through
@ -298,7 +367,7 @@ IntPriorityGroupingSet(unsigned long ulBits)
//! Gets the priority grouping of the interrupt controller.
//!
//! This function returns the split between preemptable priority levels and
//! subpriority levels in the interrupt priority specification.
//! sub-priority levels in the interrupt priority specification.
//!
//! \return The number of bits of preemptable priority.
//
@ -346,7 +415,7 @@ IntPriorityGroupingGet(void)
//! correspond to higher interrupt priorities; priority 0 is the highest
//! interrupt priority.
//!
//! The hardware priority mechanism will only look at the upper N bits of the
//! The hardware priority mechanism only looks at the upper N bits of the
//! priority level (where N is 3 for the Stellaris family), so any
//! prioritization must be performed in those bits. The remaining bits can be
//! used to sub-prioritize the interrupt sources, and may be used by the
@ -456,19 +525,13 @@ IntEnable(unsigned long ulInterrupt)
//
HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
}
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
else if(ulInterrupt >= 16)
{
//
// Enable the general interrupt.
//
HWREG(NVIC_EN0) = 1 << (ulInterrupt - 16);
}
else if(ulInterrupt >= 48)
{
//
// Enable the general interrupt.
//
HWREG(NVIC_EN1) = 1 << (ulInterrupt - 48);
HWREG(g_pulEnRegs[(ulInterrupt - 16) / 32]) =
1 << ((ulInterrupt - 16) & 31);
}
}
@ -524,20 +587,83 @@ IntDisable(unsigned long ulInterrupt)
//
HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
}
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
else if(ulInterrupt >= 16)
{
//
// Disable the general interrupt.
//
HWREG(NVIC_DIS0) = 1 << (ulInterrupt - 16);
HWREG(g_pulDisRegs[(ulInterrupt - 16) / 32]) =
1 << ((ulInterrupt - 16) & 31);
}
else if(ulInterrupt >= 48)
}
//*****************************************************************************
//
//! Returns if a peripheral interrupt is enabled.
//!
//! \param ulInterrupt specifies the interrupt to check.
//!
//! This function checks if the specified interrupt is enabled in the interrupt
//! controller.
//!
//! \return A non-zero value if the interrupt is enabled.
//
//*****************************************************************************
unsigned long
IntIsEnabled(unsigned long ulInterrupt)
{
unsigned long ulRet;
//
// Check the arguments.
//
ASSERT(ulInterrupt < NUM_INTERRUPTS);
//
// Initialize the return value.
//
ulRet = 0;
//
// Determine the interrupt to disable.
//
if(ulInterrupt == FAULT_MPU)
{
//
// Disable the general interrupt.
// Check the MemManage interrupt.
//
HWREG(NVIC_DIS1) = 1 << (ulInterrupt - 48);
ulRet = HWREG(NVIC_SYS_HND_CTRL) & NVIC_SYS_HND_CTRL_MEM;
}
else if(ulInterrupt == FAULT_BUS)
{
//
// Check the bus fault interrupt.
//
ulRet = HWREG(NVIC_SYS_HND_CTRL) & NVIC_SYS_HND_CTRL_BUS;
}
else if(ulInterrupt == FAULT_USAGE)
{
//
// Check the usage fault interrupt.
//
ulRet = HWREG(NVIC_SYS_HND_CTRL) & NVIC_SYS_HND_CTRL_USAGE;
}
else if(ulInterrupt == FAULT_SYSTICK)
{
//
// Check the System Tick interrupt.
//
ulRet = HWREG(NVIC_ST_CTRL) & NVIC_ST_CTRL_INTEN;
}
else if(ulInterrupt >= 16)
{
//
// Check the general interrupt.
//
ulRet = HWREG(g_pulEnRegs[(ulInterrupt - 16) / 32]) &
(1 << ((ulInterrupt - 16) & 31));
}
return(ulRet);
}
//*****************************************************************************
@ -546,13 +672,13 @@ IntDisable(unsigned long ulInterrupt)
//!
//! \param ulInterrupt specifies the interrupt to be pended.
//!
//! The specified interrupt is pended in the interrupt controller. This will
//! cause the interrupt controller to execute the corresponding interrupt
//! handler at the next available time, based on the current interrupt state
//! priorities. For example, if called by a higher priority interrupt handler,
//! the specified interrupt handler will not be called until after the current
//! interrupt handler has completed execution. The interrupt must have been
//! enabled for it to be called.
//! The specified interrupt is pended in the interrupt controller. Pending an
//! interrupt causes the interrupt controller to execute the corresponding
//! interrupt handler at the next available time, based on the current
//! interrupt state priorities. For example, if called by a higher priority
//! interrupt handler, the specified interrupt handler is not called until
//! after the current interrupt handler has completed execution. The interrupt
//! must have been enabled for it to be called.
//!
//! \return None.
//
@ -589,32 +715,26 @@ IntPendSet(unsigned long ulInterrupt)
//
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTSET;
}
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
else if(ulInterrupt >= 16)
{
//
// Pend the general interrupt.
//
HWREG(NVIC_PEND0) = 1 << (ulInterrupt - 16);
}
else if(ulInterrupt >= 48)
{
//
// Pend the general interrupt.
//
HWREG(NVIC_PEND1) = 1 << (ulInterrupt - 48);
HWREG(g_pulPendRegs[(ulInterrupt - 16) / 32]) =
1 << ((ulInterrupt - 16) & 31);
}
}
//*****************************************************************************
//
//! Unpends an interrupt.
//! Un-pends an interrupt.
//!
//! \param ulInterrupt specifies the interrupt to be unpended.
//! \param ulInterrupt specifies the interrupt to be un-pended.
//!
//! The specified interrupt is unpended in the interrupt controller. This will
//! cause any previously generated interrupts that have not been handled yet
//! (due to higher priority interrupts or the interrupt no having been enabled
//! yet) to be discarded.
//! The specified interrupt is un-pended in the interrupt controller. This
//! will cause any previously generated interrupts that have not been handled
//! yet (due to higher priority interrupts or the interrupt no having been
//! enabled yet) to be discarded.
//!
//! \return None.
//
@ -644,19 +764,13 @@ IntPendClear(unsigned long ulInterrupt)
//
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTCLR;
}
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
else if(ulInterrupt >= 16)
{
//
// Unpend the general interrupt.
//
HWREG(NVIC_UNPEND0) = 1 << (ulInterrupt - 16);
}
else if(ulInterrupt >= 48)
{
//
// Unpend the general interrupt.
//
HWREG(NVIC_UNPEND1) = 1 << (ulInterrupt - 48);
HWREG(g_pulUnpendRegs[(ulInterrupt - 16) / 32]) =
1 << ((ulInterrupt - 16) & 31);
}
}
@ -664,19 +778,19 @@ IntPendClear(unsigned long ulInterrupt)
//
//! Sets the priority masking level
//!
//! \param ulPriorityMask is the priority level that will be masked.
//! \param ulPriorityMask is the priority level that is masked.
//!
//! This function sets the interrupt priority masking level so that all
//! interrupts at the specified or lesser priority level is masked. This
//! can be used to globally disable a set of interrupts with priority below
//! a predetermined threshold. A value of 0 disables priority
//! interrupts at the specified or lesser priority level are masked. Masking
//! interrupts can be used to globally disable a set of interrupts with
//! priority below a predetermined threshold. A value of 0 disables priority
//! masking.
//!
//! Smaller numbers correspond to higher interrupt priorities. So for example
//! a priority level mask of 4 will allow interrupts of priority level 0-3,
//! and interrupts with a numerical priority of 4 and greater will be blocked.
//! a priority level mask of 4 allows interrupts of priority level 0-3,
//! and interrupts with a numerical priority of 4 and greater are blocked.
//!
//! The hardware priority mechanism will only look at the upper N bits of the
//! The hardware priority mechanism only looks at the upper N bits of the
//! priority level (where N is 3 for the Stellaris family), so any
//! prioritization must be performed in those bits.
//!
@ -699,10 +813,10 @@ IntPriorityMaskSet(unsigned long ulPriorityMask)
//! masking is disabled.
//!
//! Smaller numbers correspond to higher interrupt priorities. So for example
//! a priority level mask of 4 will allow interrupts of priority level 0-3,
//! and interrupts with a numerical priority of 4 and greater will be blocked.
//! a priority level mask of 4 allows interrupts of priority level 0-3,
//! and interrupts with a numerical priority of 4 and greater are blocked.
//!
//! The hardware priority mechanism will only look at the upper N bits of the
//! The hardware priority mechanism only looks at the upper N bits of the
//! priority level (where N is 3 for the Stellaris family), so any
//! prioritization must be performed in those bits.
//!

42
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/interrupt.h
View File

@ -2,23 +2,38 @@
//
// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -60,6 +75,7 @@ extern void IntPrioritySet(unsigned long ulInterrupt,
extern long IntPriorityGet(unsigned long ulInterrupt);
extern void IntEnable(unsigned long ulInterrupt);
extern void IntDisable(unsigned long ulInterrupt);
extern unsigned long IntIsEnabled(unsigned long ulInterrupt);
extern void IntPendSet(unsigned long ulInterrupt);
extern void IntPendClear(unsigned long ulInterrupt);
extern void IntPriorityMaskSet(unsigned long ulPriorityMask);

47329
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870
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/ssi.c Normal file
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@ -0,0 +1,870 @@
//*****************************************************************************
//
// ssi.c - Driver for Synchronous Serial Interface.
//
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup ssi_api
//! @{
//
//*****************************************************************************
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_ssi.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/interrupt.h"
#include "driverlib/ssi.h"
//*****************************************************************************
//
// A mapping of timer base address to interupt number.
//
//*****************************************************************************
static const unsigned long g_ppulSSIIntMap[][2] =
{
{ SSI0_BASE, INT_SSI0 },
{ SSI1_BASE, INT_SSI1 },
{ SSI2_BASE, INT_SSI2 },
{ SSI3_BASE, INT_SSI3 },
};
//*****************************************************************************
//
//! \internal
//! Checks an SSI base address.
//!
//! \param ulBase specifies the SSI module base address.
//!
//! This function determines if a SSI module base address is valid.
//!
//! \return Returns \b true if the base address is valid and \b false
//! otherwise.
//
//*****************************************************************************
#ifdef DEBUG
static tBoolean
SSIBaseValid(unsigned long ulBase)
{
return((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE) ||
(ulBase == SSI2_BASE) || (ulBase == SSI3_BASE));
}
#endif
//*****************************************************************************
//
//! \internal
//! Gets the SSI interrupt number.
//!
//! \param ulBase specifies the SSI module base address.
//!
//! Given a SSI base address, returns the corresponding interrupt number.
//!
//! \return Returns an SSI interrupt number, or -1 if \e ulBase is invalid.
//
//*****************************************************************************
static long
SSIIntNumberGet(unsigned long ulBase)
{
unsigned long ulIdx;
//
// Loop through the table that maps SSI base addresses to interrupt
// numbers.
//
for(ulIdx = 0; ulIdx < (sizeof(g_ppulSSIIntMap) /
sizeof(g_ppulSSIIntMap[0])); ulIdx++)
{
//
// See if this base address matches.
//
if(g_ppulSSIIntMap[ulIdx][0] == ulBase)
{
//
// Return the corresponding interrupt number.
//
return(g_ppulSSIIntMap[ulIdx][1]);
}
}
//
// The base address could not be found, so return an error.
//
return(-1);
}
//*****************************************************************************
//
//! Configures the synchronous serial interface.
//!
//! \param ulBase specifies the SSI module base address.
//! \param ulSSIClk is the rate of the clock supplied to the SSI module.
//! \param ulProtocol specifies the data transfer protocol.
//! \param ulMode specifies the mode of operation.
//! \param ulBitRate specifies the clock rate.
//! \param ulDataWidth specifies number of bits transferred per frame.
//!
//! This function configures the synchronous serial interface. It sets
//! the SSI protocol, mode of operation, bit rate, and data width.
//!
//! The \e ulProtocol parameter defines the data frame format. The
//! \e ulProtocol parameter can be one of the following values:
//! \b SSI_FRF_MOTO_MODE_0, \b SSI_FRF_MOTO_MODE_1, \b SSI_FRF_MOTO_MODE_2,
//! \b SSI_FRF_MOTO_MODE_3, \b SSI_FRF_TI, or \b SSI_FRF_NMW. The Motorola
//! frame formats encode the following polarity and phase configurations:
//!
//! <pre>
//! Polarity Phase Mode
//! 0 0 SSI_FRF_MOTO_MODE_0
//! 0 1 SSI_FRF_MOTO_MODE_1
//! 1 0 SSI_FRF_MOTO_MODE_2
//! 1 1 SSI_FRF_MOTO_MODE_3
//! </pre>
//!
//! The \e ulMode parameter defines the operating mode of the SSI module. The
//! SSI module can operate as a master or slave; if it is a slave, the SSI can
//! be configured to disable output on its serial output line. The \e ulMode
//! parameter can be one of the following values: \b SSI_MODE_MASTER,
//! \b SSI_MODE_SLAVE, or \b SSI_MODE_SLAVE_OD.
//!
//! The \e ulBitRate parameter defines the bit rate for the SSI. This bit rate
//! must satisfy the following clock ratio criteria:
//!
//! - FSSI >= 2 * bit rate (master mode); this speed cannot exceed 25 MHz.
//! - FSSI >= 12 * bit rate or 6 * bit rate (slave modes), depending on the
//! capability of the specific microcontroller
//!
//! where FSSI is the frequency of the clock supplied to the SSI module.
//!
//! The \e ulDataWidth parameter defines the width of the data transfers and
//! can be a value between 4 and 16, inclusive.
//!
//! The peripheral clock is the same as the processor clock. This value is
//! returned by SysCtlClockGet(), or it can be explicitly hard coded if it is
//! constant and known (to save the code/execution overhead of a call to
//! SysCtlClockGet()).
//!
//! This function replaces the original SSIConfig() API and performs the same
//! actions. A macro is provided in <tt>ssi.h</tt> to map the original API to
//! this API.
//!
//! \return None.
//
//*****************************************************************************
void
SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,
unsigned long ulProtocol, unsigned long ulMode,
unsigned long ulBitRate, unsigned long ulDataWidth)
{
unsigned long ulMaxBitRate;
unsigned long ulRegVal;
unsigned long ulPreDiv;
unsigned long ulSCR;
unsigned long ulSPH_SPO;
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
ASSERT((ulProtocol == SSI_FRF_MOTO_MODE_0) ||
(ulProtocol == SSI_FRF_MOTO_MODE_1) ||
(ulProtocol == SSI_FRF_MOTO_MODE_2) ||
(ulProtocol == SSI_FRF_MOTO_MODE_3) ||
(ulProtocol == SSI_FRF_TI) ||
(ulProtocol == SSI_FRF_NMW));
ASSERT((ulMode == SSI_MODE_MASTER) ||
(ulMode == SSI_MODE_SLAVE) ||
(ulMode == SSI_MODE_SLAVE_OD));
ASSERT(((ulMode == SSI_MODE_MASTER) && (ulBitRate <= (ulSSIClk / 2))) ||
((ulMode != SSI_MODE_MASTER) && (ulBitRate <= (ulSSIClk / 12))));
ASSERT((ulSSIClk / ulBitRate) <= (254 * 256));
ASSERT((ulDataWidth >= 4) && (ulDataWidth <= 16));
//
// Set the mode.
//
ulRegVal = (ulMode == SSI_MODE_SLAVE_OD) ? SSI_CR1_SOD : 0;
ulRegVal |= (ulMode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS;
HWREG(ulBase + SSI_O_CR1) = ulRegVal;
//
// Set the clock predivider.
//
ulMaxBitRate = ulSSIClk / ulBitRate;
ulPreDiv = 0;
do
{
ulPreDiv += 2;
ulSCR = (ulMaxBitRate / ulPreDiv) - 1;
}
while(ulSCR > 255);
HWREG(ulBase + SSI_O_CPSR) = ulPreDiv;
//
// Set protocol and clock rate.
//
ulSPH_SPO = (ulProtocol & 3) << 6;
ulProtocol &= SSI_CR0_FRF_M;
ulRegVal = (ulSCR << 8) | ulSPH_SPO | ulProtocol | (ulDataWidth - 1);
HWREG(ulBase + SSI_O_CR0) = ulRegVal;
}
//*****************************************************************************
//
//! Enables the synchronous serial interface.
//!
//! \param ulBase specifies the SSI module base address.
//!
//! This function enables operation of the synchronous serial interface. The
//! synchronous serial interface must be configured before it is enabled.
//!
//! \return None.
//
//*****************************************************************************
void
SSIEnable(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Read-modify-write the enable bit.
//
HWREG(ulBase + SSI_O_CR1) |= SSI_CR1_SSE;
}
//*****************************************************************************
//
//! Disables the synchronous serial interface.
//!
//! \param ulBase specifies the SSI module base address.
//!
//! This function disables operation of the synchronous serial interface.
//!
//! \return None.
//
//*****************************************************************************
void
SSIDisable(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Read-modify-write the enable bit.
//
HWREG(ulBase + SSI_O_CR1) &= ~(SSI_CR1_SSE);
}
//*****************************************************************************
//
//! Registers an interrupt handler for the synchronous serial interface.
//!
//! \param ulBase specifies the SSI module base address.
//! \param pfnHandler is a pointer to the function to be called when the
//! synchronous serial interface interrupt occurs.
//!
//! This function registers the handler to be called when an SSI interrupt
//! occurs. This function enables the global interrupt in the interrupt
//! controller; specific SSI interrupts must be enabled via SSIIntEnable(). If
//! necessary, it is the interrupt handler's responsibility to clear the
//! interrupt source via SSIIntClear().
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
//!
//! \return None.
//
//*****************************************************************************
void
SSIIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
{
unsigned long ulInt;
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Determine the interrupt number based on the SSI port.
//
ulInt = SSIIntNumberGet(ulBase);
//
// Register the interrupt handler, returning an error if an error occurs.
//
IntRegister(ulInt, pfnHandler);
//
// Enable the synchronous serial interface interrupt.
//
IntEnable(ulInt);
}
//*****************************************************************************
//
//! Unregisters an interrupt handler for the synchronous serial interface.
//!
//! \param ulBase specifies the SSI module base address.
//!
//! This function clears the handler to be called when an SSI interrupt
//! occurs. This function also masks off the interrupt in the interrupt
//! controller so that the interrupt handler no longer is called.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
//!
//! \return None.
//
//*****************************************************************************
void
SSIIntUnregister(unsigned long ulBase)
{
unsigned long ulInt;
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Determine the interrupt number based on the SSI port.
//
ulInt = SSIIntNumberGet(ulBase);
//
// Disable the interrupt.
//
IntDisable(ulInt);
//
// Unregister the interrupt handler.
//
IntUnregister(ulInt);
}
//*****************************************************************************
//
//! Enables individual SSI interrupt sources.
//!
//! \param ulBase specifies the SSI module base address.
//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
//!
//! This function enables the indicated SSI interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt;
//! disabled sources have no effect on the processor. The \e ulIntFlags
//! parameter can be any of the \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, or
//! \b SSI_RXOR values.
//!
//! \return None.
//
//*****************************************************************************
void
SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Enable the specified interrupts.
//
HWREG(ulBase + SSI_O_IM) |= ulIntFlags;
}
//*****************************************************************************
//
//! Disables individual SSI interrupt sources.
//!
//! \param ulBase specifies the SSI module base address.
//! \param ulIntFlags is a bit mask of the interrupt sources to be disabled.
//!
//! This function disables the indicated SSI interrupt sources. The
//! \e ulIntFlags parameter can be any of the \b SSI_TXFF, \b SSI_RXFF,
//! \b SSI_RXTO, or \b SSI_RXOR values.
//!
//! \return None.
//
//*****************************************************************************
void
SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Disable the specified interrupts.
//
HWREG(ulBase + SSI_O_IM) &= ~(ulIntFlags);
}
//*****************************************************************************
//
//! Gets the current interrupt status.
//!
//! \param ulBase specifies the SSI module base address.
//! \param bMasked is \b false if the raw interrupt status is required or
//! \b true if the masked interrupt status is required.
//!
//! This function returns the interrupt status for the SSI module. Either the
//! raw interrupt status or the status of interrupts that are allowed to
//! reflect to the processor can be returned.
//!
//! \return The current interrupt status, enumerated as a bit field of
//! \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, and \b SSI_RXOR.
//
//*****************************************************************************
unsigned long
SSIIntStatus(unsigned long ulBase, tBoolean bMasked)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Return either the interrupt status or the raw interrupt status as
// requested.
//
if(bMasked)
{
return(HWREG(ulBase + SSI_O_MIS));
}
else
{
return(HWREG(ulBase + SSI_O_RIS));
}
}
//*****************************************************************************
//
//! Clears SSI interrupt sources.
//!
//! \param ulBase specifies the SSI module base address.
//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
//!
//! This function clears the specified SSI interrupt sources so that they no
//! longer assert. This function must be called in the interrupt handler to
//! keep the interrupts from being triggered again immediately upon exit. The
//! \e ulIntFlags parameter can consist of either or both the \b SSI_RXTO and
//! \b SSI_RXOR values.
//!
//! \note Because there is a write buffer in the Cortex-M processor, it may
//! take several clock cycles before the interrupt source is actually cleared.
//! Therefore, it is recommended that the interrupt source be cleared early in
//! the interrupt handler (as opposed to the very last action) to avoid
//! returning from the interrupt handler before the interrupt source is
//! actually cleared. Failure to do so may result in the interrupt handler
//! being immediately reentered (because the interrupt controller still sees
//! the interrupt source asserted).
//!
//! \return None.
//
//*****************************************************************************
void
SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Clear the requested interrupt sources.
//
HWREG(ulBase + SSI_O_ICR) = ulIntFlags;
}
//*****************************************************************************
//
//! Puts a data element into the SSI transmit FIFO.
//!
//! \param ulBase specifies the SSI module base address.
//! \param ulData is the data to be transmitted over the SSI interface.
//!
//! This function places the supplied data into the transmit FIFO of the
//! specified SSI module. If there is no space available in the transmit FIFO,
//! this function waits until there is space available before returning.
//!
//! \note The upper 32 - N bits of \e ulData are discarded by the hardware,
//! where N is the data width as configured by SSIConfigSetExpClk(). For
//! example, if the interface is configured for 8-bit data width, the upper 24
//! bits of \e ulData are discarded.
//!
//! \return None.
//
//*****************************************************************************
void
SSIDataPut(unsigned long ulBase, unsigned long ulData)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
ASSERT((ulData & (0xfffffffe << (HWREG(ulBase + SSI_O_CR0) &
SSI_CR0_DSS_M))) == 0);
//
// Wait until there is space.
//
while(!(HWREG(ulBase + SSI_O_SR) & SSI_SR_TNF))
{
}
//
// Write the data to the SSI.
//
HWREG(ulBase + SSI_O_DR) = ulData;
}
//*****************************************************************************
//
//! Puts a data element into the SSI transmit FIFO.
//!
//! \param ulBase specifies the SSI module base address.
//! \param ulData is the data to be transmitted over the SSI interface.
//!
//! This function places the supplied data into the transmit FIFO of the
//! specified SSI module. If there is no space in the FIFO, then this function
//! returns a zero.
//!
//! This function replaces the original SSIDataNonBlockingPut() API and
//! performs the same actions. A macro is provided in <tt>ssi.h</tt> to map
//! the original API to this API.
//!
//! \note The upper 32 - N bits of \e ulData are discarded by the hardware,
//! where N is the data width as configured by SSIConfigSetExpClk(). For
//! example, if the interface is configured for 8-bit data width, the upper 24
//! bits of \e ulData are discarded.
//!
//! \return Returns the number of elements written to the SSI transmit FIFO.
//
//*****************************************************************************
long
SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
ASSERT((ulData & (0xfffffffe << (HWREG(ulBase + SSI_O_CR0) &
SSI_CR0_DSS_M))) == 0);
//
// Check for space to write.
//
if(HWREG(ulBase + SSI_O_SR) & SSI_SR_TNF)
{
HWREG(ulBase + SSI_O_DR) = ulData;
return(1);
}
else
{
return(0);
}
}
//*****************************************************************************
//
//! Gets a data element from the SSI receive FIFO.
//!
//! \param ulBase specifies the SSI module base address.
//! \param pulData is a pointer to a storage location for data that was
//! received over the SSI interface.
//!
//! This function gets received data from the receive FIFO of the specified
//! SSI module and places that data into the location specified by the
//! \e pulData parameter. If there is no data available, this function waits
//! until data is received before returning.
//!
//! \note Only the lower N bits of the value written to \e pulData contain
//! valid data, where N is the data width as configured by
//! SSIConfigSetExpClk(). For example, if the interface is configured for
//! 8-bit data width, only the lower 8 bits of the value written to \e pulData
//! contain valid data.
//!
//! \return None.
//
//*****************************************************************************
void
SSIDataGet(unsigned long ulBase, unsigned long *pulData)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Wait until there is data to be read.
//
while(!(HWREG(ulBase + SSI_O_SR) & SSI_SR_RNE))
{
}
//
// Read data from SSI.
//
*pulData = HWREG(ulBase + SSI_O_DR);
}
//*****************************************************************************
//
//! Gets a data element from the SSI receive FIFO.
//!
//! \param ulBase specifies the SSI module base address.
//! \param pulData is a pointer to a storage location for data that was
//! received over the SSI interface.
//!
//! This function gets received data from the receive FIFO of the specified SSI
//! module and places that data into the location specified by the \e ulData
//! parameter. If there is no data in the FIFO, then this function returns a
//! zero.
//!
//! This function replaces the original SSIDataNonBlockingGet() API and
//! performs the same actions. A macro is provided in <tt>ssi.h</tt> to map
//! the original API to this API.
//!
//! \note Only the lower N bits of the value written to \e pulData contain
//! valid data, where N is the data width as configured by
//! SSIConfigSetExpClk(). For example, if the interface is configured for
//! 8-bit data width, only the lower 8 bits of the value written to \e pulData
//! contain valid data.
//!
//! \return Returns the number of elements read from the SSI receive FIFO.
//
//*****************************************************************************
long
SSIDataGetNonBlocking(unsigned long ulBase, unsigned long *pulData)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Check for data to read.
//
if(HWREG(ulBase + SSI_O_SR) & SSI_SR_RNE)
{
*pulData = HWREG(ulBase + SSI_O_DR);
return(1);
}
else
{
return(0);
}
}
//*****************************************************************************
//
//! Enables SSI DMA operation.
//!
//! \param ulBase is the base address of the SSI port.
//! \param ulDMAFlags is a bit mask of the DMA features to enable.
//!
//! This function enables the specified SSI DMA features. The SSI can be
//! configured to use DMA for transmit and/or receive data transfers.
//! The \e ulDMAFlags parameter is the logical OR of any of the following
//! values:
//!
//! - SSI_DMA_RX - enable DMA for receive
//! - SSI_DMA_TX - enable DMA for transmit
//!
//! \note The uDMA controller must also be set up before DMA can be used
//! with the SSI.
//!
//! \return None.
//
//*****************************************************************************
void
SSIDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Set the requested bits in the SSI DMA control register.
//
HWREG(ulBase + SSI_O_DMACTL) |= ulDMAFlags;
}
//*****************************************************************************
//
//! Disables SSI DMA operation.
//!
//! \param ulBase is the base address of the SSI port.
//! \param ulDMAFlags is a bit mask of the DMA features to disable.
//!
//! This function is used to disable SSI DMA features that were enabled
//! by SSIDMAEnable(). The specified SSI DMA features are disabled. The
//! \e ulDMAFlags parameter is the logical OR of any of the following values:
//!
//! - SSI_DMA_RX - disable DMA for receive
//! - SSI_DMA_TX - disable DMA for transmit
//!
//! \return None.
//
//*****************************************************************************
void
SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Clear the requested bits in the SSI DMA control register.
//
HWREG(ulBase + SSI_O_DMACTL) &= ~ulDMAFlags;
}
//*****************************************************************************
//
//! Determines whether the SSI transmitter is busy or not.
//!
//! \param ulBase is the base address of the SSI port.
//!
//! This function allows the caller to determine whether all transmitted bytes
//! have cleared the transmitter hardware. If \b false is returned, then the
//! transmit FIFO is empty and all bits of the last transmitted word have left
//! the hardware shift register.
//!
//! \return Returns \b true if the SSI is transmitting or \b false if all
//! transmissions are complete.
//
//*****************************************************************************
tBoolean
SSIBusy(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Determine if the SSI is busy.
//
return((HWREG(ulBase + SSI_O_SR) & SSI_SR_BSY) ? true : false);
}
//*****************************************************************************
//
//! Sets the data clock source for the specified SSI peripheral.
//!
//! \param ulBase is the base address of the SSI port.
//! \param ulSource is the baud clock source for the SSI.
//!
//! This function allows the baud clock source for the SSI to be selected.
//! The possible clock source are the system clock (\b SSI_CLOCK_SYSTEM) or
//! the precision internal oscillator (\b SSI_CLOCK_PIOSC).
//!
//! Changing the baud clock source changes the data rate generated by the
//! SSI. Therefore, the data rate should be reconfigured after any change to
//! the SSI clock source.
//!
//! \note The ability to specify the SSI baud clock source varies with the
//! Stellaris part and SSI in use. Please consult the data sheet for the part
//! in use to determine whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
void
SSIClockSourceSet(unsigned long ulBase, unsigned long ulSource)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
ASSERT((ulSource == SSI_CLOCK_SYSTEM) || (ulSource == SSI_CLOCK_PIOSC));
//
// Set the SSI clock source.
//
HWREG(ulBase + SSI_O_CC) = ulSource;
}
//*****************************************************************************
//
//! Gets the data clock source for the specified SSI peripheral.
//!
//! \param ulBase is the base address of the SSI port.
//!
//! This function returns the data clock source for the specified SSI. The
//! possible data clock source are the system clock (\b SSI_CLOCK_SYSTEM) or
//! the precision internal oscillator (\b SSI_CLOCK_PIOSC).
//!
//! \note The ability to specify the SSI data clock source varies with the
//! Stellaris part and SSI in use. Please consult the data sheet for the part
//! in use to determine whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
unsigned long
SSIClockSourceGet(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ulBase));
//
// Return the SSI clock source.
//
return(HWREG(ulBase + SSI_O_CC));
}
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************

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@ -0,0 +1,151 @@
//*****************************************************************************
//
// ssi.h - Prototypes for the Synchronous Serial Interface Driver.
//
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
#ifndef __SSI_H__
#define __SSI_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Values that can be passed to SSIIntEnable, SSIIntDisable, and SSIIntClear
// as the ulIntFlags parameter, and returned by SSIIntStatus.
//
//*****************************************************************************
#define SSI_TXFF 0x00000008 // TX FIFO half full or less
#define SSI_RXFF 0x00000004 // RX FIFO half full or more
#define SSI_RXTO 0x00000002 // RX timeout
#define SSI_RXOR 0x00000001 // RX overrun
//*****************************************************************************
//
// Values that can be passed to SSIConfigSetExpClk.
//
//*****************************************************************************
#define SSI_FRF_MOTO_MODE_0 0x00000000 // Moto fmt, polarity 0, phase 0
#define SSI_FRF_MOTO_MODE_1 0x00000002 // Moto fmt, polarity 0, phase 1
#define SSI_FRF_MOTO_MODE_2 0x00000001 // Moto fmt, polarity 1, phase 0
#define SSI_FRF_MOTO_MODE_3 0x00000003 // Moto fmt, polarity 1, phase 1
#define SSI_FRF_TI 0x00000010 // TI frame format
#define SSI_FRF_NMW 0x00000020 // National MicroWire frame format
#define SSI_MODE_MASTER 0x00000000 // SSI master
#define SSI_MODE_SLAVE 0x00000001 // SSI slave
#define SSI_MODE_SLAVE_OD 0x00000002 // SSI slave with output disabled
//*****************************************************************************
//
// Values that can be passed to SSIDMAEnable() and SSIDMADisable().
//
//*****************************************************************************
#define SSI_DMA_TX 0x00000002 // Enable DMA for transmit
#define SSI_DMA_RX 0x00000001 // Enable DMA for receive
//*****************************************************************************
//
// Values that can be passed to SSIClockSourceSet() or returned from
// SSIClockSourceGet().
//
//*****************************************************************************
#define SSI_CLOCK_SYSTEM 0x00000000
#define SSI_CLOCK_PIOSC 0x00000005
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern void SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,
unsigned long ulProtocol, unsigned long ulMode,
unsigned long ulBitRate,
unsigned long ulDataWidth);
extern void SSIDataGet(unsigned long ulBase, unsigned long *pulData);
extern long SSIDataGetNonBlocking(unsigned long ulBase,
unsigned long *pulData);
extern void SSIDataPut(unsigned long ulBase, unsigned long ulData);
extern long SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData);
extern void SSIDisable(unsigned long ulBase);
extern void SSIEnable(unsigned long ulBase);
extern void SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags);
extern void SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
extern void SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
extern void SSIIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
extern unsigned long SSIIntStatus(unsigned long ulBase, tBoolean bMasked);
extern void SSIIntUnregister(unsigned long ulBase);
extern void SSIDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags);
extern void SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags);
extern tBoolean SSIBusy(unsigned long ulBase);
extern void SSIClockSourceSet(unsigned long ulBase, unsigned long ulSource);
extern unsigned long SSIClockSourceGet(unsigned long ulBase);
//*****************************************************************************
//
// Several SSI APIs have been renamed, with the original function name being
// deprecated. These defines provide backward compatibility.
//
//*****************************************************************************
#ifndef DEPRECATED
#include "driverlib/sysctl.h"
#define SSIConfig(a, b, c, d, e) \
SSIConfigSetExpClk(a, SysCtlClockGet(), b, c, d, e)
#define SSIDataNonBlockingGet(a, b) \
SSIDataGetNonBlocking(a, b)
#define SSIDataNonBlockingPut(a, b) \
SSIDataPutNonBlocking(a, b)
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __SSI_H__

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@ -2,23 +2,38 @@
//
// sysctl.h - Prototypes for the system control driver.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -55,7 +70,10 @@ extern "C"
#endif
#define SYSCTL_PERIPH_ADC0 0x00100001 // ADC0
#define SYSCTL_PERIPH_ADC1 0x00100002 // ADC1
#ifndef DEPRECATED
#define SYSCTL_PERIPH_PWM 0x00100010 // PWM
#endif
#define SYSCTL_PERIPH_PWM0 0x00100010 // PWM
#define SYSCTL_PERIPH_CAN0 0x00100100 // CAN 0
#define SYSCTL_PERIPH_CAN1 0x00100200 // CAN 1
#define SYSCTL_PERIPH_CAN2 0x00100400 // CAN 2
@ -98,11 +116,82 @@ extern "C"
#define SYSCTL_PERIPH_GPIOJ 0x20000100 // GPIO J
#define SYSCTL_PERIPH_UDMA 0x20002000 // uDMA
#define SYSCTL_PERIPH_USB0 0x20100001 // USB0
#define SYSCTL_PERIPH_ETH 0x20105000 // ETH
#define SYSCTL_PERIPH_ETH 0x20105000 // Ethernet
#define SYSCTL_PERIPH_IEEE1588 0x20100100 // IEEE1588
#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
#define SYSCTL_PERIPH2_ADC0 0xf0003800 // ADC 0
#define SYSCTL_PERIPH2_ADC1 0xf0003801 // ADC 1
#define SYSCTL_PERIPH2_CAN0 0xf0003400 // CAN 0
#define SYSCTL_PERIPH2_CAN1 0xf0003401 // CAN 1
#define SYSCTL_PERIPH2_CAN2 0xf0003402 // CAN 2
#define SYSCTL_PERIPH2_COMP0 0xf0003c00 // Analog comparator 0
#define SYSCTL_PERIPH_EEPROM0 0xf0005800 // EEPROM 0
#define SYSCTL_PERIPH2_EPI0 0xf0001000 // EPI0
#define SYSCTL_PERIPH2_ETH 0xf0002c00 // ETH
#define SYSCTL_PERIPH_FAN0 0xf0005400 // FAN 0
#define SYSCTL_PERIPH2_GPIOA 0xf0000800 // GPIO A
#define SYSCTL_PERIPH2_GPIOB 0xf0000801 // GPIO B
#define SYSCTL_PERIPH2_GPIOC 0xf0000802 // GPIO C
#define SYSCTL_PERIPH2_GPIOD 0xf0000803 // GPIO D
#define SYSCTL_PERIPH2_GPIOE 0xf0000804 // GPIO E
#define SYSCTL_PERIPH2_GPIOF 0xf0000805 // GPIO F
#define SYSCTL_PERIPH2_GPIOG 0xf0000806 // GPIO G
#define SYSCTL_PERIPH2_GPIOH 0xf0000807 // GPIO H
#define SYSCTL_PERIPH2_GPIOJ 0xf0000808 // GPIO J
#define SYSCTL_PERIPH_GPIOK 0xf0000809 // GPIO K
#define SYSCTL_PERIPH_GPIOL 0xf000080a // GPIO L
#define SYSCTL_PERIPH_GPIOM 0xf000080b // GPIO M
#define SYSCTL_PERIPH_GPION 0xf000080c // GPIO N
#define SYSCTL_PERIPH_GPIOP 0xf000080d // GPIO P
#define SYSCTL_PERIPH_GPIOQ 0xf000080e // GPIO Q
#define SYSCTL_PERIPH_GPIOR 0xf000080f // GPIO R
#define SYSCTL_PERIPH_GPIOS 0xf0000810 // GPIO S
#define SYSCTL_PERIPH2_HIB 0xf0001400 // Hibernation module
#define SYSCTL_PERIPH2_I2C0 0xf0002000 // I2C 0
#define SYSCTL_PERIPH2_I2C1 0xf0002001 // I2C 1
#define SYSCTL_PERIPH_I2C2 0xf0002002 // I2C 2
#define SYSCTL_PERIPH_I2C3 0xf0002003 // I2C 3
#define SYSCTL_PERIPH_I2C4 0xf0002004 // I2C 4
#define SYSCTL_PERIPH_I2C5 0xf0002005 // I2C 5
#define SYSCTL_PERIPH2_I2S0 0xf0002400 // I2S0
#define SYSCTL_PERIPH_LPC0 0xf0004800 // LPC 0
#define SYSCTL_PERIPH_PECI0 0xf0005000 // PECI 0
#define SYSCTL_PERIPH2_PWM0 0xf0004000 // PWM 0
#define SYSCTL_PERIPH_PWM1 0xf0004001 // PWM 1
#define SYSCTL_PERIPH2_QEI0 0xf0004400 // QEI 0
#define SYSCTL_PERIPH2_QEI1 0xf0004401 // QEI 1
#define SYSCTL_PERIPH2_SSI0 0xf0001c00 // SSI 0
#define SYSCTL_PERIPH2_SSI1 0xf0001c01 // SSI 1
#define SYSCTL_PERIPH_SSI2 0xf0001c02 // SSI 2
#define SYSCTL_PERIPH_SSI3 0xf0001c03 // SSI 3
#define SYSCTL_PERIPH2_TIMER0 0xf0000400 // Timer 0
#define SYSCTL_PERIPH2_TIMER1 0xf0000401 // Timer 1
#define SYSCTL_PERIPH2_TIMER2 0xf0000402 // Timer 2
#define SYSCTL_PERIPH2_TIMER3 0xf0000403 // Timer 3
#define SYSCTL_PERIPH_TIMER4 0xf0000404 // Timer 4
#define SYSCTL_PERIPH_TIMER5 0xf0000405 // Timer 5
#define SYSCTL_PERIPH_WTIMER0 0xf0005c00 // Wide Timer 0
#define SYSCTL_PERIPH_WTIMER1 0xf0005c01 // Wide Timer 1
#define SYSCTL_PERIPH_WTIMER2 0xf0005c02 // Wide Timer 2
#define SYSCTL_PERIPH_WTIMER3 0xf0005c03 // Wide Timer 3
#define SYSCTL_PERIPH_WTIMER4 0xf0005c04 // Wide Timer 4
#define SYSCTL_PERIPH_WTIMER5 0xf0005c05 // Wide Timer 5
#define SYSCTL_PERIPH2_UART0 0xf0001800 // UART 0
#define SYSCTL_PERIPH2_UART1 0xf0001801 // UART 1
#define SYSCTL_PERIPH2_UART2 0xf0001802 // UART 2
#define SYSCTL_PERIPH_UART3 0xf0001803 // UART 3
#define SYSCTL_PERIPH_UART4 0xf0001804 // UART 4
#define SYSCTL_PERIPH_UART5 0xf0001805 // UART 5
#define SYSCTL_PERIPH_UART6 0xf0001806 // UART 6
#define SYSCTL_PERIPH_UART7 0xf0001807 // UART 7
#define SYSCTL_PERIPH2_UDMA 0xf0000c00 // uDMA
#define SYSCTL_PERIPH2_USB0 0xf0002800 // USB 0
#define SYSCTL_PERIPH2_WDOG0 0xf0000000 // Watchdog 0
#define SYSCTL_PERIPH2_WDOG1 0xf0000001 // Watchdog 1
#define SYSCTL_PERIPH2_HIBERNATE \
0xf0001400 // Hibernate
//*****************************************************************************
//
@ -194,7 +283,9 @@ extern "C"
//
//*****************************************************************************
#define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
#define SYSCTL_CAUSE_WDOG1 0x00000020 // Watchdog 1 reset
#define SYSCTL_CAUSE_SW 0x00000010 // Software reset
#define SYSCTL_CAUSE_WDOG0 0x00000008 // Watchdog 0 reset
#define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
#define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
#define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
@ -393,16 +484,95 @@ extern "C"
#define SYSCTL_XTAL_14_3MHZ 0x00000500 // External crystal is 14.31818 MHz
#define SYSCTL_XTAL_16MHZ 0x00000540 // External crystal is 16 MHz
#define SYSCTL_XTAL_16_3MHZ 0x00000580 // External crystal is 16.384 MHz
#define SYSCTL_XTAL_18MHZ 0x000005C0 // External crystal is 18.0 MHz
#define SYSCTL_XTAL_20MHZ 0x00000600 // External crystal is 20.0 MHz
#define SYSCTL_XTAL_24MHZ 0x00000640 // External crystal is 24.0 MHz
#define SYSCTL_XTAL_25MHZ 0x00000680 // External crystal is 25.0 MHz
#define SYSCTL_OSC_MAIN 0x00000000 // Osc source is main osc
#define SYSCTL_OSC_INT 0x00000010 // Osc source is int. osc
#define SYSCTL_OSC_INT4 0x00000020 // Osc source is int. osc /4
#define SYSCTL_OSC_INT30 0x00000030 // Osc source is int. 30 KHz
#define SYSCTL_OSC_EXT4_19 0x80000028 // Osc source is ext. 4.19 MHz
#define SYSCTL_OSC_EXT32 0x80000038 // Osc source is ext. 32 KHz
#define SYSCTL_INT_PIOSC_DIS 0x00000004 // Disable interal precision osc.
#define SYSCTL_INT_OSC_DIS 0x00000002 // Disable internal oscillator
#define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
//*****************************************************************************
//
// The following are values that can be passed to the SysCtlDeepSleepClockSet()
// API as the ulConfig parameter.
//
//*****************************************************************************
#define SYSCTL_DSLP_DIV_1 0x00000000 // Deep-sleep clock is osc /1
#define SYSCTL_DSLP_DIV_2 0x00800000 // Deep-sleep clock is osc /2
#define SYSCTL_DSLP_DIV_3 0x01000000 // Deep-sleep clock is osc /3
#define SYSCTL_DSLP_DIV_4 0x01800000 // Deep-sleep clock is osc /4
#define SYSCTL_DSLP_DIV_5 0x02000000 // Deep-sleep clock is osc /5
#define SYSCTL_DSLP_DIV_6 0x02800000 // Deep-sleep clock is osc /6
#define SYSCTL_DSLP_DIV_7 0x03000000 // Deep-sleep clock is osc /7
#define SYSCTL_DSLP_DIV_8 0x03800000 // Deep-sleep clock is osc /8
#define SYSCTL_DSLP_DIV_9 0x04000000 // Deep-sleep clock is osc /9
#define SYSCTL_DSLP_DIV_10 0x04800000 // Deep-sleep clock is osc /10
#define SYSCTL_DSLP_DIV_11 0x05000000 // Deep-sleep clock is osc /11
#define SYSCTL_DSLP_DIV_12 0x05800000 // Deep-sleep clock is osc /12
#define SYSCTL_DSLP_DIV_13 0x06000000 // Deep-sleep clock is osc /13
#define SYSCTL_DSLP_DIV_14 0x06800000 // Deep-sleep clock is osc /14
#define SYSCTL_DSLP_DIV_15 0x07000000 // Deep-sleep clock is osc /15
#define SYSCTL_DSLP_DIV_16 0x07800000 // Deep-sleep clock is osc /16
#define SYSCTL_DSLP_DIV_17 0x08000000 // Deep-sleep clock is osc /17
#define SYSCTL_DSLP_DIV_18 0x08800000 // Deep-sleep clock is osc /18
#define SYSCTL_DSLP_DIV_19 0x09000000 // Deep-sleep clock is osc /19
#define SYSCTL_DSLP_DIV_20 0x09800000 // Deep-sleep clock is osc /20
#define SYSCTL_DSLP_DIV_21 0x0A000000 // Deep-sleep clock is osc /21
#define SYSCTL_DSLP_DIV_22 0x0A800000 // Deep-sleep clock is osc /22
#define SYSCTL_DSLP_DIV_23 0x0B000000 // Deep-sleep clock is osc /23
#define SYSCTL_DSLP_DIV_24 0x0B800000 // Deep-sleep clock is osc /24
#define SYSCTL_DSLP_DIV_25 0x0C000000 // Deep-sleep clock is osc /25
#define SYSCTL_DSLP_DIV_26 0x0C800000 // Deep-sleep clock is osc /26
#define SYSCTL_DSLP_DIV_27 0x0D000000 // Deep-sleep clock is osc /27
#define SYSCTL_DSLP_DIV_28 0x0D800000 // Deep-sleep clock is osc /28
#define SYSCTL_DSLP_DIV_29 0x0E000000 // Deep-sleep clock is osc /29
#define SYSCTL_DSLP_DIV_30 0x0E800000 // Deep-sleep clock is osc /30
#define SYSCTL_DSLP_DIV_31 0x0F000000 // Deep-sleep clock is osc /31
#define SYSCTL_DSLP_DIV_32 0x0F800000 // Deep-sleep clock is osc /32
#define SYSCTL_DSLP_DIV_33 0x10000000 // Deep-sleep clock is osc /33
#define SYSCTL_DSLP_DIV_34 0x10800000 // Deep-sleep clock is osc /34
#define SYSCTL_DSLP_DIV_35 0x11000000 // Deep-sleep clock is osc /35
#define SYSCTL_DSLP_DIV_36 0x11800000 // Deep-sleep clock is osc /36
#define SYSCTL_DSLP_DIV_37 0x12000000 // Deep-sleep clock is osc /37
#define SYSCTL_DSLP_DIV_38 0x12800000 // Deep-sleep clock is osc /38
#define SYSCTL_DSLP_DIV_39 0x13000000 // Deep-sleep clock is osc /39
#define SYSCTL_DSLP_DIV_40 0x13800000 // Deep-sleep clock is osc /40
#define SYSCTL_DSLP_DIV_41 0x14000000 // Deep-sleep clock is osc /41
#define SYSCTL_DSLP_DIV_42 0x14800000 // Deep-sleep clock is osc /42
#define SYSCTL_DSLP_DIV_43 0x15000000 // Deep-sleep clock is osc /43
#define SYSCTL_DSLP_DIV_44 0x15800000 // Deep-sleep clock is osc /44
#define SYSCTL_DSLP_DIV_45 0x16000000 // Deep-sleep clock is osc /45
#define SYSCTL_DSLP_DIV_46 0x16800000 // Deep-sleep clock is osc /46
#define SYSCTL_DSLP_DIV_47 0x17000000 // Deep-sleep clock is osc /47
#define SYSCTL_DSLP_DIV_48 0x17800000 // Deep-sleep clock is osc /48
#define SYSCTL_DSLP_DIV_49 0x18000000 // Deep-sleep clock is osc /49
#define SYSCTL_DSLP_DIV_50 0x18800000 // Deep-sleep clock is osc /50
#define SYSCTL_DSLP_DIV_51 0x19000000 // Deep-sleep clock is osc /51
#define SYSCTL_DSLP_DIV_52 0x19800000 // Deep-sleep clock is osc /52
#define SYSCTL_DSLP_DIV_53 0x1A000000 // Deep-sleep clock is osc /53
#define SYSCTL_DSLP_DIV_54 0x1A800000 // Deep-sleep clock is osc /54
#define SYSCTL_DSLP_DIV_55 0x1B000000 // Deep-sleep clock is osc /55
#define SYSCTL_DSLP_DIV_56 0x1B800000 // Deep-sleep clock is osc /56
#define SYSCTL_DSLP_DIV_57 0x1C000000 // Deep-sleep clock is osc /57
#define SYSCTL_DSLP_DIV_58 0x1C800000 // Deep-sleep clock is osc /58
#define SYSCTL_DSLP_DIV_59 0x1D000000 // Deep-sleep clock is osc /59
#define SYSCTL_DSLP_DIV_60 0x1D800000 // Deep-sleep clock is osc /60
#define SYSCTL_DSLP_DIV_61 0x1E000000 // Deep-sleep clock is osc /61
#define SYSCTL_DSLP_DIV_62 0x1E800000 // Deep-sleep clock is osc /62
#define SYSCTL_DSLP_DIV_63 0x1F000000 // Deep-sleep clock is osc /63
#define SYSCTL_DSLP_DIV_64 0x1F800000 // Deep-sleep clock is osc /64
#define SYSCTL_DSLP_OSC_MAIN 0x00000000 // Osc source is main osc
#define SYSCTL_DSLP_OSC_INT 0x00000010 // Osc source is int. osc
#define SYSCTL_DSLP_OSC_INT30 0x00000030 // Osc source is int. 30 KHz
#define SYSCTL_DSLP_OSC_EXT32 0x00000070 // Osc source is ext. 32 KHz
#define SYSCTL_DSLP_PIOSC_PD 0x00000002 // Power down PIOSC in deep-sleep
//*****************************************************************************
//
// Prototypes for the APIs.
@ -412,6 +582,9 @@ extern unsigned long SysCtlSRAMSizeGet(void);
extern unsigned long SysCtlFlashSizeGet(void);
extern tBoolean SysCtlPinPresent(unsigned long ulPin);
extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
extern tBoolean SysCtlPeripheralReady(unsigned long ulPeripheral);
extern void SysCtlPeripheralPowerOn(unsigned long ulPeripheral);
extern void SysCtlPeripheralPowerOff(unsigned long ulPeripheral);
extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
@ -437,8 +610,11 @@ extern void SysCtlResetCauseClear(unsigned long ulCauses);
extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
unsigned long ulDelay);
extern void SysCtlDelay(unsigned long ulCount);
extern void SysCtlMOSCConfigSet(unsigned long ulConfig);
extern unsigned long SysCtlPIOSCCalibrate(unsigned long ulType);
extern void SysCtlClockSet(unsigned long ulConfig);
extern unsigned long SysCtlClockGet(void);
extern void SysCtlDeepSleepClockSet(unsigned long ulConfig);
extern void SysCtlPWMClockSet(unsigned long ulConfig);
extern unsigned long SysCtlPWMClockGet(void);
extern void SysCtlADCSpeedSet(unsigned long ulSpeed);

593
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/uartlib.c
View File

@ -2,23 +2,38 @@
//
// uart.c - Driver for the UART.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -49,6 +64,23 @@
(CLASS_IS_DUSTDEVIL && REVISION_IS_A0)) ? \
16 : 8)
//*****************************************************************************
//
// A mapping of UART base address to interupt number.
//
//*****************************************************************************
static const unsigned long g_ppulUARTIntMap[][2] =
{
{ UART0_BASE, INT_UART0 },
{ UART1_BASE, INT_UART1 },
{ UART2_BASE, INT_UART2 },
{ UART3_BASE, INT_UART3 },
{ UART4_BASE, INT_UART4 },
{ UART5_BASE, INT_UART5 },
{ UART6_BASE, INT_UART6 },
{ UART7_BASE, INT_UART7 },
};
//*****************************************************************************
//
//! \internal
@ -67,10 +99,55 @@ static tBoolean
UARTBaseValid(unsigned long ulBase)
{
return((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
(ulBase == UART2_BASE) || (ulBase == UART3_BASE) ||
(ulBase == UART4_BASE) || (ulBase == UART5_BASE) ||
(ulBase == UART6_BASE) || (ulBase == UART7_BASE));
}
#endif
//*****************************************************************************
//
//! \internal
//! Gets the UART interrupt number.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Given a UART base address, this function returns the corresponding
//! interrupt number.
//!
//! \return Returns a UART interrupt number, or -1 if \e ulBase is invalid.
//
//*****************************************************************************
static long
UARTIntNumberGet(unsigned long ulBase)
{
unsigned long ulIdx;
//
// Loop through the table that maps UART base addresses to interrupt
// numbers.
//
for(ulIdx = 0; ulIdx < (sizeof(g_ppulUARTIntMap) /
sizeof(g_ppulUARTIntMap[0])); ulIdx++)
{
//
// See if this base address matches.
//
if(g_ppulUARTIntMap[ulIdx][0] == ulBase)
{
//
// Return the corresponding interrupt number.
//
return(g_ppulUARTIntMap[ulIdx][1]);
}
}
//
// The base address could not be found, so return an error.
//
return(-1);
}
//*****************************************************************************
//
//! Sets the type of parity.
@ -78,11 +155,12 @@ UARTBaseValid(unsigned long ulBase)
//! \param ulBase is the base address of the UART port.
//! \param ulParity specifies the type of parity to use.
//!
//! Sets the type of parity to use for transmitting and expect when receiving.
//! The \e ulParity parameter must be one of \b UART_CONFIG_PAR_NONE,
//! \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD, \b UART_CONFIG_PAR_ONE,
//! or \b UART_CONFIG_PAR_ZERO. The last two allow direct control of the
//! parity bit; it is always either one or zero based on the mode.
//! This function configures the type of parity to use for transmitting and
//! expect when receiving. The \e ulParity parameter must be one of
//! \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD,
//! \b UART_CONFIG_PAR_ONE, or \b UART_CONFIG_PAR_ZERO. The last two
//! parameters allow direct control of the parity bit; it is always either one
//! or zero based on the mode.
//!
//! \return None.
//
@ -149,8 +227,8 @@ UARTParityModeGet(unsigned long ulBase)
//! \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8, \b UART_FIFO_RX4_8,
//! \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8.
//!
//! This function sets the FIFO level at which transmit and receive interrupts
//! are generated.
//! This function configures the FIFO level at which transmit and receive
//! interrupts are generated.
//!
//! \return None.
//
@ -245,10 +323,15 @@ UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,
//! select the parity mode (no parity bit, even parity bit, odd parity bit,
//! parity bit always one, and parity bit always zero, respectively).
//!
//! The peripheral clock will be the same as the processor clock. This will be
//! the value returned by SysCtlClockGet(), or it can be explicitly hard coded
//! if it is constant and known (to save the code/execution overhead of a call
//! to SysCtlClockGet()).
//! The peripheral clock is the same as the processor clock. The frequency of
//! the system clock is the value returned by SysCtlClockGet(), or it can be
//! explicitly hard coded if it is constant and known (to save the
//! code/execution overhead of a call to SysCtlClockGet()).
//!
//! For Stellaris parts that have the ability to specify the UART baud clock
//! source (via UARTClockSourceSet()), the peripheral clock can be changed to
//! PIOSC. In this case, the peripheral clock should be specified as
//! 16,000,000 (the nominal rate of PIOSC).
//!
//! This function replaces the original UARTConfigSet() API and performs the
//! same actions. A macro is provided in <tt>uart.h</tt> to map the original
@ -336,17 +419,22 @@ UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
//! \param pulBaud is a pointer to storage for the baud rate.
//! \param pulConfig is a pointer to storage for the data format.
//!
//! The baud rate and data format for the UART is determined, given an
//! explicitly provided peripheral clock (hence the ExpClk suffix). The
//! This function determines the baud rate and data format for the UART, given
//! an explicitly provided peripheral clock (hence the ExpClk suffix). The
//! returned baud rate is the actual baud rate; it may not be the exact baud
//! rate requested or an ``official'' baud rate. The data format returned in
//! \e pulConfig is enumerated the same as the \e ulConfig parameter of
//! UARTConfigSetExpClk().
//!
//! The peripheral clock will be the same as the processor clock. This will be
//! the value returned by SysCtlClockGet(), or it can be explicitly hard coded
//! if it is constant and known (to save the code/execution overhead of a call
//! to SysCtlClockGet()).
//! The peripheral clock is the same as the processor clock. The frequency of
//! the system clock is the value returned by SysCtlClockGet(), or it can be
//! explicitly hard coded if it is constant and known (to save the
//! code/execution overhead of a call to SysCtlClockGet()).
//!
//! For Stellaris parts that have the ability to specify the UART baud clock
//! source (via UARTClockSourceSet()), the peripheral clock can be changed to
//! PIOSC. In this case, the peripheral clock should be specified as
//! 16,000,000 (the nominal rate of PIOSC).
//!
//! This function replaces the original UARTConfigGet() API and performs the
//! same actions. A macro is provided in <tt>uart.h</tt> to map the original
@ -399,8 +487,8 @@ UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
//!
//! \param ulBase is the base address of the UART port.
//!
//! Sets the UARTEN, TXE, and RXE bits, and enables the transmit and receive
//! FIFOs.
//! This function sets the UARTEN, TXE, and RXE bits and enables the transmit
//! and receive FIFOs.
//!
//! \return None.
//
@ -431,7 +519,7 @@ UARTEnable(unsigned long ulBase)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Clears the UARTEN, TXE, and RXE bits, then waits for the end of
//! This function clears the UARTEN, TXE, and RXE bits, waits for the end of
//! transmission of the current character, and flushes the transmit FIFO.
//!
//! \return None.
@ -495,7 +583,7 @@ UARTFIFOEnable(unsigned long ulBase)
//!
//! \param ulBase is the base address of the UART port.
//!
//! This functions disables the transmit and receive FIFOs in the UART.
//! This function disables the transmit and receive FIFOs in the UART.
//!
//! \return None.
//
@ -521,10 +609,18 @@ UARTFIFODisable(unsigned long ulBase)
//! \param ulBase is the base address of the UART port.
//! \param bLowPower indicates if SIR Low Power Mode is to be used.
//!
//! Enables the SIREN control bit for IrDA mode on the UART. If the
//! \e bLowPower flag is set, then SIRLP bit will also be set.
//! This function enables the SIREN control bit for IrDA mode on the UART. If
//! the \e bLowPower flag is set, then SIRLP bit is also set. This
//! function only has an effect if the UART has not been enabled
//! by a call to UARTEnable(). The call UARTEnableSIR() must be made before
//! a call to UARTConfigSetExpClk() because the UARTConfigSetExpClk() function
//! calls the UARTEnable() function. Another option is to call UARTDisable()
//! followed by UARTEnableSIR() and then enable the UART by calling
//! UARTEnable().
//!
//! \note SIR (IrDA) operation is not supported on Sandstorm-class devices.
//! \note The availability of SIR (IrDA) operation varies with the Stellaris
//! part in use. Please consult the datasheet for the part you are using to
//! determine whether this support is available.
//!
//! \return None.
//
@ -556,9 +652,17 @@ UARTEnableSIR(unsigned long ulBase, tBoolean bLowPower)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Clears the SIREN (IrDA) and SIRLP (Low Power) bits.
//! This function clears the SIREN (IrDA) and SIRLP (Low Power) bits. This
//! function only has an effect if the UART has not been enabled by a
//! call to UARTEnable(). The call UARTEnableSIR() must be made before
//! a call to UARTConfigSetExpClk() because the UARTConfigSetExpClk() function
//! calls the UARTEnable() function. Another option is to call UARTDisable()
//! followed by UARTEnableSIR() and then enable the UART by calling
//! UARTEnable().
//!
//! \note SIR (IrDA) operation is not supported on Sandstorm-class devices.
//! \note The availability of SIR (IrDA) operation varies with the Stellaris
//! part in use. Please consult the datasheet for the part you are using to
//! determine whether this support is available.
//!
//! \return None.
//
@ -579,17 +683,17 @@ UARTDisableSIR(unsigned long ulBase)
//*****************************************************************************
//
//! Enables ISO 7816 smart card mode on the specified UART.
//! Enables ISO7816 smart card mode on the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Enables the SMART control bit for ISO 7816 smart card mode on the UART.
//! This call also sets 8 bit word length and even parity as required by ISO
//! 7816.
//! This function enables the SMART control bit for the ISO7816 smart card mode
//! on the UART. This call also sets 8-bit word length and even parity as
//! required by ISO7816.
//!
//! \note The availability of ISO 7816 smart card mode varies with the
//! Stellaris part and UART in use. Please consult the datasheet for the part
//! you are using to determine whether this support is available.
//! \note The availability of SIR (IrDA) operation varies with the Stellaris
//! part in use. Please consult the datasheet for the part you are using to
//! determine whether this support is available.
//!
//! \return None.
//
@ -606,9 +710,9 @@ UARTSmartCardEnable(unsigned long ulBase)
ASSERT(UARTBaseValid(ulBase));
//
// Set 8 bit word length, even parity, 2 stop bits (even though the STP2
// bit is ignored when in smartcard mode, this lets the caller read back
// the actual setting in use).
// Set 8-bit word length, even parity, 2 stop bits (note that although the
// STP2 bit is ignored when in smartcard mode, this code lets the caller
// read back the actual setting in use).
//
ulVal = HWREG(ulBase + UART_O_LCRH);
ulVal &= ~(UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN |
@ -624,15 +728,16 @@ UARTSmartCardEnable(unsigned long ulBase)
//*****************************************************************************
//
//! Disables ISO 7816 smart card mode on the specified UART.
//! Disables ISO7816 smart card mode on the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Clears the SMART (ISO 7816 smart card) bits in the UART control register.
//! This function clears the SMART (ISO7816 smart card) bit in the UART
//! control register.
//!
//! \note The availability of ISO 7816 smart card mode varies with the
//! Stellaris part and UART in use. Please consult the datasheet for the part
//! you are using to determine whether this support is available.
//! \note The availability of ISO7816 smart card mode varies with the
//! Stellaris part in use. Please consult the datasheet for the part you are
//! using to determine whether this support is available.
//!
//! \return None.
//
@ -660,16 +765,17 @@ UARTSmartCardDisable(unsigned long ulBase)
//! \param ulControl is a bit-mapped flag indicating which modem control bits
//! should be set.
//!
//! Sets the states of the DTR or RTS modem handshake outputs from the UART.
//! This function configures the states of the DTR or RTS modem handshake
//! outputs from the UART.
//!
//! The \e ulControl parameter is the logical OR of any of the following:
//!
//! - \b UART_OUTPUT_DTR - The Modem Control DTR signal
//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal
//!
//! \note The availability of hardware modem handshake signals varies with the
//! Stellaris part and UART in use. Please consult the datasheet for the part
//! you are using to determine whether this support is available.
//! \note The availability of ISO7816 smart card mode varies with the
//! Stellaris part in use. Please consult the datasheet for the part you are
//! using to determine whether this support is available.
//!
//! \return None.
//
@ -702,7 +808,8 @@ UARTModemControlSet(unsigned long ulBase, unsigned long ulControl)
//! \param ulControl is a bit-mapped flag indicating which modem control bits
//! should be set.
//!
//! Clears the states of the DTR or RTS modem handshake outputs from the UART.
//! This function clears the states of the DTR or RTS modem handshake outputs
//! from the UART.
//!
//! The \e ulControl parameter is the logical OR of any of the following:
//!
@ -742,15 +849,15 @@ UARTModemControlClear(unsigned long ulBase, unsigned long ulControl)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Returns the current states of each of the two UART modem control signals,
//! DTR and RTS.
//! This function returns the current states of each of the two UART modem
//! control signals, DTR and RTS.
//!
//! \note The availability of hardware modem handshake signals varies with the
//! Stellaris part and UART in use. Please consult the datasheet for the part
//! you are using to determine whether this support is available.
//!
//! \return Returns the states of the handshake output signals. This will be a
//! logical logical OR combination of values \b UART_OUTPUT_RTS and
//! \return Returns the states of the handshake output signals. This value is
//! a logical OR combination of values \b UART_OUTPUT_RTS and
//! \b UART_OUTPUT_DTR where the presence of each flag indicates that the
//! associated signal is asserted.
//
@ -773,16 +880,16 @@ UARTModemControlGet(unsigned long ulBase)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Returns the current states of each of the four UART modem status signals,
//! RI, DCD, DSR and CTS.
//! This function returns the current states of each of the four UART modem
//! status signals, RI, DCD, DSR and CTS.
//!
//! \note The availability of hardware modem handshake signals varies with the
//! Stellaris part and UART in use. Please consult the datasheet for the part
//! you are using to determine whether this support is available.
//!
//! \return Returns the states of the handshake output signals. This will be a
//! logical logical OR combination of values \b UART_INPUT_RI, \b
//! UART_INPUT_DCD, \b UART_INPUT_CTS and \b UART_INPUT_DSR where the
//! \return Returns the states of the handshake output signals. This value
//! is a logical OR combination of values \b UART_INPUT_RI,
//! \b UART_INPUT_DCD, \b UART_INPUT_CTS and \b UART_INPUT_DSR where the
//! presence of each flag indicates that the associated signal is asserted.
//
//*****************************************************************************
@ -804,17 +911,18 @@ UARTModemStatusGet(unsigned long ulBase)
//! Sets the UART hardware flow control mode to be used.
//!
//! \param ulBase is the base address of the UART port.
//! \param ulMode indicates the flow control modes to be used. This is a
//! logical OR combination of values \b UART_FLOWCONTROL_TX and \b
//! UART_FLOWCONTROL_RX to enable hardware transmit (CTS) and receive (RTS)
//! \param ulMode indicates the flow control modes to be used. This parameter
//! is a logical OR combination of values \b UART_FLOWCONTROL_TX and
//! \b UART_FLOWCONTROL_RX to enable hardware transmit (CTS) and receive (RTS)
//! flow control or \b UART_FLOWCONTROL_NONE to disable hardware flow control.
//!
//! Sets the required hardware flow control modes. If \e ulMode contains
//! flag \b UART_FLOWCONTROL_TX, data is only transmitted if the incoming CTS
//! signal is asserted. If \e ulMode contains flag \b UART_FLOWCONTROL_RX,
//! the RTS output is controlled by the hardware and is asserted only when
//! there is space available in the receive FIFO. If no hardware flow control
//! is required, UART_FLOWCONTROL_NONE should be passed.
//! This function configures the required hardware flow control modes. If
//! \e ulMode contains flag \b UART_FLOWCONTROL_TX, data is only transmitted
//! if the incoming CTS signal is asserted. If \e ulMode contains flag
//! \b UART_FLOWCONTROL_RX, the RTS output is controlled by the hardware and is
//! asserted only when there is space available in the receive FIFO. If no
//! hardware flow control is required, \b UART_FLOWCONTROL_NONE should be
//! passed.
//!
//! \note The availability of hardware flow control varies with the Stellaris
//! part and UART in use. Please consult the datasheet for the part you are
@ -847,17 +955,17 @@ UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Returns the current hardware flow control mode.
//! This function returns the current hardware flow control mode.
//!
//! \note The availability of hardware flow control varies with the Stellaris
//! part and UART in use. Please consult the datasheet for the part you are
//! using to determine whether this support is available.
//!
//! \return Returns the current flow control mode in use. This is a
//! \return Returns the current flow control mode in use. This value is a
//! logical OR combination of values \b UART_FLOWCONTROL_TX if transmit
//! (CTS) flow control is enabled and \b UART_FLOWCONTROL_RX if receive (RTS)
//! flow control is in use. If hardware flow control is disabled, \b
//! UART_FLOWCONTROL_NONE will be returned.
//! flow control is in use. If hardware flow control is disabled,
//! \b UART_FLOWCONTROL_NONE is returned.
//
//*****************************************************************************
unsigned long
@ -887,9 +995,9 @@ UARTFlowControlGet(unsigned long ulBase)
//! default, the transmit interrupt is asserted when the FIFO level falls past
//! a threshold set via a call to UARTFIFOLevelSet(). Alternatively, if this
//! function is called with \e ulMode set to \b UART_TXINT_MODE_EOT, the
//! transmit interrupt will only be asserted once the transmitter is completely
//! idle - the transmit FIFO is empty and all bits, including any stop bits,
//! have cleared the transmitter.
//! transmit interrupt is asserted once the transmitter is completely idle -
//! the transmit FIFO is empty and all bits, including any stop bits, have
//! cleared the transmitter.
//!
//! \note The availability of end-of-transmission mode varies with the
//! Stellaris part in use. Please consult the datasheet for the part you are
@ -923,12 +1031,12 @@ UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode)
//! \param ulBase is the base address of the UART port.
//!
//! This function returns the current operating mode for the UART transmit
//! interrupt. The return value will be \b UART_TXINT_MODE_EOT if the
//! transmit interrupt is currently set to be asserted once the transmitter is
//! interrupt. The return value is \b UART_TXINT_MODE_EOT if the transmit
//! interrupt is currently configured to be asserted once the transmitter is
//! completely idle - the transmit FIFO is empty and all bits, including any
//! stop bits, have cleared the transmitter. The return value will be \b
//! UART_TXINT_MODE_FIFO if the interrupt is set to be asserted based upon the
//! level of the transmit FIFO.
//! stop bits, have cleared the transmitter. The return value is
//! \b UART_TXINT_MODE_FIFO if the interrupt is configured to be asserted based
//! on the level of the transmit FIFO.
//!
//! \note The availability of end-of-transmission mode varies with the
//! Stellaris part in use. Please consult the datasheet for the part you are
@ -1012,7 +1120,8 @@ UARTSpaceAvail(unsigned long ulBase)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Gets a character from the receive FIFO for the specified port.
//! This function gets a character from the receive FIFO for the specified
//! port.
//!
//! This function replaces the original UARTCharNonBlockingGet() API and
//! performs the same actions. A macro is provided in <tt>uart.h</tt> to map
@ -1057,9 +1166,9 @@ UARTCharGetNonBlocking(unsigned long ulBase)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Gets a character from the receive FIFO for the specified port. If there
//! are no characters available, this function waits until a character is
//! received before returning.
//! This function gets a character from the receive FIFO for the specified
//! port. If there are no characters available, this function waits until a
//! character is received before returning.
//!
//! \return Returns the character read from the specified port, cast as a
//! \e long.
@ -1093,9 +1202,10 @@ UARTCharGet(unsigned long ulBase)
//! \param ulBase is the base address of the UART port.
//! \param ucData is the character to be transmitted.
//!
//! Writes the character \e ucData to the transmit FIFO for the specified port.
//! This function does not block, so if there is no space available, then a
//! \b false is returned, and the application must retry the function later.
//! This function writes the character \e ucData to the transmit FIFO for the
//! specified port. This function does not block, so if there is no space
//! available, then a \b false is returned and the application must retry the
//! function later.
//!
//! This function replaces the original UARTCharNonBlockingPut() API and
//! performs the same actions. A macro is provided in <tt>uart.h</tt> to map
@ -1145,9 +1255,9 @@ UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData)
//! \param ulBase is the base address of the UART port.
//! \param ucData is the character to be transmitted.
//!
//! Sends the character \e ucData to the transmit FIFO for the specified port.
//! If there is no space available in the transmit FIFO, this function waits
//! until there is space available before returning.
//! This function sends the character \e ucData to the transmit FIFO for the
//! specified port. If there is no space available in the transmit FIFO, this
//! function waits until there is space available before returning.
//!
//! \return None.
//
@ -1211,10 +1321,10 @@ UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState)
//!
//! \param ulBase is the base address of the UART port.
//!
//! Allows the caller to determine whether all transmitted bytes have cleared
//! the transmitter hardware. If \b false is returned, the transmit FIFO is
//! empty and all bits of the last transmitted character, including all stop
//! bits, have left the hardware shift register.
//! This function allows the caller to determine whether all transmitted bytes
//! have cleared the transmitter hardware. If \b false is returned, the
//! transmit FIFO is empty and all bits of the last transmitted character,
//! including all stop bits, have left the hardware shift register.
//!
//! \return Returns \b true if the UART is transmitting or \b false if all
//! transmissions are complete.
@ -1243,8 +1353,8 @@ UARTBusy(unsigned long ulBase)
//! UART interrupt occurs.
//!
//! This function does the actual registering of the interrupt handler. This
//! will enable the global interrupt in the interrupt controller; specific UART
//! interrupts must be enabled via UARTIntEnable(). It is the interrupt
//! function enables the global interrupt in the interrupt controller; specific
//! UART interrupts must be enabled via UARTIntEnable(). It is the interrupt
//! handler's responsibility to clear the interrupt source.
//!
//! \sa IntRegister() for important information about registering interrupt
@ -1266,8 +1376,7 @@ UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
//
// Determine the interrupt number based on the UART port.
//
ulInt = ((ulBase == UART0_BASE) ? INT_UART0 :
((ulBase == UART1_BASE) ? INT_UART1 : INT_UART2));
ulInt = UARTIntNumberGet(ulBase);
//
// Register the interrupt handler.
@ -1287,9 +1396,9 @@ UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
//! \param ulBase is the base address of the UART port.
//!
//! This function does the actual unregistering of the interrupt handler. It
//! will clear the handler to be called when a UART interrupt occurs. This
//! will also mask off the interrupt in the interrupt controller so that the
//! interrupt handler no longer is called.
//! clears the handler to be called when a UART interrupt occurs. This
//! function also masks off the interrupt in the interrupt controller so that
//! the interrupt handler no longer is called.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
@ -1310,8 +1419,7 @@ UARTIntUnregister(unsigned long ulBase)
//
// Determine the interrupt number based on the UART port.
//
ulInt = ((ulBase == UART0_BASE) ? INT_UART0 :
((ulBase == UART1_BASE) ? INT_UART1 : INT_UART2));
ulInt = UARTIntNumberGet(ulBase);
//
// Disable the interrupt.
@ -1331,12 +1439,13 @@ UARTIntUnregister(unsigned long ulBase)
//! \param ulBase is the base address of the UART port.
//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
//!
//! Enables the indicated UART interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//! This function enables the indicated UART interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt;
//! disabled sources have no effect on the processor.
//!
//! The \e ulIntFlags parameter is the logical OR of any of the following:
//!
//! - \b UART_INT_9BIT - 9-bit Address Match interrupt
//! - \b UART_INT_OE - Overrun Error interrupt
//! - \b UART_INT_BE - Break Error interrupt
//! - \b UART_INT_PE - Parity Error interrupt
@ -1373,9 +1482,9 @@ UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
//! \param ulBase is the base address of the UART port.
//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
//!
//! Disables the indicated UART interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//! This function disables the indicated UART interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt;
//! disabled sources have no effect on the processor.
//!
//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
//! parameter to UARTIntEnable().
@ -1405,9 +1514,9 @@ UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
//! \param bMasked is \b false if the raw interrupt status is required and
//! \b true if the masked interrupt status is required.
//!
//! This returns the interrupt status for the specified UART. Either the raw
//! interrupt status or the status of interrupts that are allowed to reflect to
//! the processor can be returned.
//! This function returns the interrupt status for the specified UART. Either
//! the raw interrupt status or the status of interrupts that are allowed to
//! reflect to the processor can be returned.
//!
//! \return Returns the current interrupt status, enumerated as a bit field of
//! values described in UARTIntEnable().
@ -1444,12 +1553,12 @@ UARTIntStatus(unsigned long ulBase, tBoolean bMasked)
//!
//! The specified UART interrupt sources are cleared, so that they no longer
//! assert. This function must be called in the interrupt handler to keep the
//! interrupt from being recognized again immediately upon exit.
//! interrupt from being triggered again immediately upon exit.
//!
//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
//! parameter to UARTIntEnable().
//!
//! \note Because there is a write buffer in the Cortex-M3 processor, it may
//! \note Because there is a write buffer in the Cortex-M processor, it may
//! take several clock cycles before the interrupt source is actually cleared.
//! Therefore, it is recommended that the interrupt source be cleared early in
//! the interrupt handler (as opposed to the very last action) to avoid
@ -1483,7 +1592,7 @@ UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags)
//! \param ulDMAFlags is a bit mask of the DMA features to enable.
//!
//! The specified UART DMA features are enabled. The UART can be
//! configured to use DMA for transmit or receive, and to disable
//! configured to use DMA for transmit or receive and to disable
//! receive if an error occurs. The \e ulDMAFlags parameter is the
//! logical OR of any of the following values:
//!
@ -1552,8 +1661,8 @@ UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags)
//! This function returns the current state of each of the 4 receiver error
//! sources. The returned errors are equivalent to the four error bits
//! returned via the previous call to UARTCharGet() or UARTCharGetNonBlocking()
//! with the exception that the overrun error is set immediately the overrun
//! occurs rather than when a character is next read.
//! with the exception that the overrun error is set immediately when the
//! overrun occurs rather than when a character is next read.
//!
//! \return Returns a logical OR combination of the receiver error flags,
//! \b UART_RXERROR_FRAMING, \b UART_RXERROR_PARITY, \b UART_RXERROR_BREAK
@ -1597,12 +1706,240 @@ UARTRxErrorClear(unsigned long ulBase)
ASSERT(UARTBaseValid(ulBase));
//
// Any write to the Error Clear Register will clear all bits which are
// Any write to the Error Clear Register clears all bits which are
// currently set.
//
HWREG(ulBase + UART_O_ECR) = 0;
}
//*****************************************************************************
//
//! Sets the baud clock source for the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//! \param ulSource is the baud clock source for the UART.
//!
//! This function allows the baud clock source for the UART to be selected.
//! The possible clock source are the system clock (\b UART_CLOCK_SYSTEM) or
//! the precision internal oscillator (\b UART_CLOCK_PIOSC).
//!
//! Changing the baud clock source changes the baud rate generated by the
//! UART. Therefore, the baud rate should be reconfigured after any change to
//! the baud clock source.
//!
//! \note The ability to specify the UART baud clock source varies with the
//! Stellaris part in use. Please consult the datasheet for the part you are
//! using to determine whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
void
UARTClockSourceSet(unsigned long ulBase, unsigned long ulSource)
{
//
// Check the arguments.
//
ASSERT(UARTBaseValid(ulBase));
ASSERT((ulSource == UART_CLOCK_SYSTEM) || (ulSource == UART_CLOCK_PIOSC));
//
// Set the UART clock source.
//
HWREG(ulBase + UART_O_CC) = ulSource;
}
//*****************************************************************************
//
//! Gets the baud clock source for the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//!
//! This function returns the baud clock source for the specified UART. The
//! possible baud clock source are the system clock (\b UART_CLOCK_SYSTEM) or
//! the precision internal oscillator (\b UART_CLOCK_PIOSC).
//!
//! \note The ability to specify the UART baud clock source varies with the
//! Stellaris part in use. Please consult the datasheet for the part you are
//! using to determine whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
unsigned long
UARTClockSourceGet(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(UARTBaseValid(ulBase));
//
// Return the UART clock source.
//
return(HWREG(ulBase + UART_O_CC));
}
//*****************************************************************************
//
//! Enables 9-bit mode on the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//!
//! This function enables the 9-bit operational mode of the UART.
//!
//! \note The availability of 9-bit mode varies with the Stellaris part in use.
//! Please consult the datasheet for the part you are using to determine
//! whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
void
UART9BitEnable(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(UARTBaseValid(ulBase));
//
// Enable 9-bit mode.
//
HWREG(ulBase + UART_O_9BITADDR) |= UART_9BITADDR_9BITEN;
}
//*****************************************************************************
//
//! Disables 9-bit mode on the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//!
//! This function disables the 9-bit operational mode of the UART.
//!
//! \note The availability of 9-bit mode varies with the Stellaris part in use.
//! Please consult the datasheet for the part you are using to determine
//! whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
void
UART9BitDisable(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(UARTBaseValid(ulBase));
//
// Disable 9-bit mode.
//
HWREG(ulBase + UART_O_9BITADDR) &= ~UART_9BITADDR_9BITEN;
}
//*****************************************************************************
//
//! Sets the device address(es) for 9-bit mode.
//!
//! \param ulBase is the base address of the UART port.
//! \param ucAddr is the device address.
//! \param ucMask is the device address mask.
//!
//! This function configures the device address or range of device addresses
//! that respond to requests on the 9-bit UART port. The received address is
//! masked with the mask and then compared against the given address, allowing
//! either a single address (if \b ucMask is 0xff) or a set of addresses to be
//! matched.
//!
//! \note The availability of 9-bit mode varies with the Stellaris part in use.
//! Please consult the datasheet for the part you are using to determine
//! whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
void
UART9BitAddrSet(unsigned long ulBase, unsigned char ucAddr,
unsigned char ucMask)
{
//
// Check the arguments.
//
ASSERT(UARTBaseValid(ulBase));
//
// Set the address and mask.
//
HWREG(ulBase + UART_O_9BITADDR) = ucAddr << UART_9BITADDR_ADDR_S;
HWREG(ulBase + UART_O_9BITAMASK) = ucMask << UART_9BITAMASK_MASK_S;
}
//*****************************************************************************
//
//! Sends an address character from the specified port when operating in 9-bit
//! mode.
//!
//! \param ulBase is the base address of the UART port.
//! \param ucAddr is the address to be transmitted.
//!
//! This function waits until all data has been sent from the specified port
//! and then sends the given address as an address byte. It then waits until
//! the address byte has been transmitted before returning.
//!
//! The normal data functions (UARTCharPut(), UARTCharPutNonBlocking(),
//! UARTCharGet(), and UARTCharGetNonBlocking()) are used to send and receive
//! data characters in 9-bit mode.
//!
//! \note The availability of 9-bit mode varies with the Stellaris part in use.
//! Please consult the datasheet for the part you are using to determine
//! whether this support is available.
//!
//! \return None.
//
//*****************************************************************************
void
UART9BitAddrSend(unsigned long ulBase, unsigned char ucAddr)
{
unsigned long ulLCRH;
//
// Check the arguments.
//
ASSERT(UARTBaseValid(ulBase));
//
// Wait until the FIFO is empty and the UART is not busy.
//
while(HWREG(ulBase + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY))
{
}
//
// Force the address/data bit to 1 to indicate this is an address byte.
//
ulLCRH = HWREG(ulBase + UART_O_LCRH);
HWREG(ulBase + UART_O_LCRH) = ((ulLCRH & ~UART_LCRH_EPS) | UART_LCRH_SPS |
UART_LCRH_PEN);
//
// Send the address.
//
HWREG(ulBase + UART_O_DR) = ucAddr;
//
// Wait until the address has been sent.
//
while(HWREG(ulBase + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY))
{
}
//
// Restore the address/data setting.
//
HWREG(ulBase + UART_O_LCRH) = ulLCRH;
}
//*****************************************************************************
//
// Close the Doxygen group.

58
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/driverlib/uartlib.h
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@ -2,23 +2,38 @@
//
// uart.h - Defines and Macros for the UART.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
@ -42,6 +57,7 @@ extern "C"
// as the ulIntFlags parameter, and returned from UARTIntStatus.
//
//*****************************************************************************
#define UART_INT_9BIT 0x1000 // 9-bit address match interrupt
#define UART_INT_OE 0x400 // Overrun Error Interrupt Mask
#define UART_INT_BE 0x200 // Break Error Interrupt Mask
#define UART_INT_PE 0x100 // Parity Error Interrupt Mask
@ -159,6 +175,15 @@ extern "C"
#define UART_TXINT_MODE_FIFO 0x00000000
#define UART_TXINT_MODE_EOT 0x00000010
//*****************************************************************************
//
// Values that can be passed to UARTClockSourceSet() or returned from
// UARTClockSourceGet().
//
//*****************************************************************************
#define UART_CLOCK_SYSTEM 0x00000000
#define UART_CLOCK_PIOSC 0x00000005
//*****************************************************************************
//
// API Function prototypes
@ -212,6 +237,13 @@ extern void UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode);
extern unsigned long UARTFlowControlGet(unsigned long ulBase);
extern void UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode);
extern unsigned long UARTTxIntModeGet(unsigned long ulBase);
extern void UARTClockSourceSet(unsigned long ulBase, unsigned long ulSource);
extern unsigned long UARTClockSourceGet(unsigned long ulBase);
extern void UART9BitEnable(unsigned long ulBase);
extern void UART9BitDisable(unsigned long ulBase);
extern void UART9BitAddrSet(unsigned long ulBase, unsigned char ucAddr,
unsigned char ucMask);
extern void UART9BitAddrSend(unsigned long ulBase, unsigned char ucAddr);
//*****************************************************************************
//

192
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/fatfs/ffconf.h Normal file
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@ -0,0 +1,192 @@
/*---------------------------------------------------------------------------/
/ FatFs - FAT file system module configuration file R0.09b (C)ChaN, 2013
/----------------------------------------------------------------------------/
/
/ CAUTION! Do not forget to make clean the project after any changes to
/ the configuration options.
/
/----------------------------------------------------------------------------*/
#ifndef _FFCONF
#define _FFCONF 82786 /* Revision ID */
/*---------------------------------------------------------------------------/
/ Functions and Buffer Configurations
/----------------------------------------------------------------------------*/
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
/ object instead of the sector buffer in the individual file object for file
/ data transfer. This reduces memory consumption 512 bytes each file object. */
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
/ f_truncate and useless f_getfree. */
#define _FS_MINIMIZE 0 /* 0 to 3 */
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
/
/ 0: Full function.
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
/ are removed.
/ 2: f_opendir and f_readdir are removed in addition to 1.
/ 3: f_lseek is removed in addition to 2. */
#define _USE_STRFUNC 2 /* 0:Disable or 1-2:Enable */
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
#define _USE_LABEL 0 /* 0:Disable or 1:Enable */
/* To enable volume label functions, set _USE_LAVEL to 1 */
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
/*---------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/----------------------------------------------------------------------------*/
#define _CODE_PAGE 437
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
/ 949 - Korean (DBCS, OEM, Windows)
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
/ 1250 - Central Europe (Windows)
/ 1251 - Cyrillic (Windows)
/ 1252 - Latin 1 (Windows)
/ 1253 - Greek (Windows)
/ 1254 - Turkish (Windows)
/ 1255 - Hebrew (Windows)
/ 1256 - Arabic (Windows)
/ 1257 - Baltic (Windows)
/ 1258 - Vietnam (OEM, Windows)
/ 437 - U.S. (OEM)
/ 720 - Arabic (OEM)
/ 737 - Greek (OEM)
/ 775 - Baltic (OEM)
/ 850 - Multilingual Latin 1 (OEM)
/ 858 - Multilingual Latin 1 + Euro (OEM)
/ 852 - Latin 2 (OEM)
/ 855 - Cyrillic (OEM)
/ 866 - Russian (OEM)
/ 857 - Turkish (OEM)
/ 862 - Hebrew (OEM)
/ 874 - Thai (OEM, Windows)
/ 1 - ASCII only (Valid for non LFN cfg.)
*/
#define _USE_LFN 1 /* 0 to 3 */
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
/* The _USE_LFN option switches the LFN support.
/
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
/ 2: Enable LFN with dynamic working buffer on the STACK.
/ 3: Enable LFN with dynamic working buffer on the HEAP.
/
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
/ to the project. When enable to use heap, memory control functions
/ ff_memalloc() and ff_memfree() must be added to the project. */
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
/* To switch the character code set on FatFs API to Unicode,
/ enable LFN feature and set _LFN_UNICODE to 1. */
#define _FS_RPATH 0 /* 0 to 2 */
/* The _FS_RPATH option configures relative path feature.
/
/ 0: Disable relative path feature and remove related functions.
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
/ 2: f_getcwd() is available in addition to 1.
/
/ Note that output of the f_readdir fnction is affected by this option. */
/*---------------------------------------------------------------------------/
/ Physical Drive Configurations
/----------------------------------------------------------------------------*/
#define _VOLUMES 1
/* Number of volumes (logical drives) to be used. */
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
/* Maximum sector size to be handled.
/ Always set 512 for memory card and hard disk but a larger value may be
/ required for on-board flash memory, floppy disk and optical disk.
/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size
/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */
#define _MULTI_PARTITION 0 /* 0:Single partition, 1:Enable multiple partition */
/* When set to 0, each volume is bound to the same physical drive number and
/ it can mount only first primaly partition. When it is set to 1, each volume
/ is tied to the partitions listed in VolToPart[]. */
#define _USE_ERASE 0 /* 0:Disable or 1:Enable */
/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command
/ should be added to the disk_ioctl functio. */
/*---------------------------------------------------------------------------/
/ System Configurations
/----------------------------------------------------------------------------*/
#define _WORD_ACCESS 0 /* 0 or 1 */
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
/ option defines which access method is used to the word data on the FAT volume.
/
/ 0: Byte-by-byte access.
/ 1: Word access. Do not choose this unless following condition is met.
/
/ When the byte order on the memory is big-endian or address miss-aligned word
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
/ If it is not the case, the value can also be set to 1 to improve the
/ performance and code size.
*/
/* A header file that defines sync object types on the O/S, such as
/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module.
/
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
/ 1: Enable reentrancy. Also user provided synchronization handlers,
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
/ function must be added to the project. */
#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */
/* To enable file lock control feature, set _FS_LOCK to 1 or greater.
The value defines how many files can be opened simultaneously. */
#endif /* _FFCONFIG */

672
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/fatfs/mmc.c Normal file
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@ -0,0 +1,672 @@
/*------------------------------------------------------------------------/
/ MMCv3/SDv1/SDv2 (in SPI mode) control module
/-------------------------------------------------------------------------/
/
/ Copyright (C) 2013, ChaN, all right reserved.
/
/ * This software is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/-------------------------------------------------------------------------*/
/*
* This file was modified from a sample available from the FatFs
* web site. It was modified to work with a Stellaris EK-LM3S6965
* evaluation board.
*
* Note that the SSI port is shared with the osram display. The code
* in this file does not attempt to share the SSI port with the osram,
* it assumes the osram is not being used.
*/
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/gpio.h"
#include "driverlib/ssi.h"
#include "driverlib/sysctl.h"
#include "diskio.h"
#include "boot.h"
/*--------------------------------------------------------------------------
Module Private Functions
---------------------------------------------------------------------------*/
/* Definitions for MMC/SDC command */
#define CMD0 (0) /* GO_IDLE_STATE */
#define CMD1 (1) /* SEND_OP_COND */
#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */
#define CMD8 (8) /* SEND_IF_COND */
#define CMD9 (9) /* SEND_CSD */
#define CMD10 (10) /* SEND_CID */
#define CMD12 (12) /* STOP_TRANSMISSION */
#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */
#define CMD16 (16) /* SET_BLOCKLEN */
#define CMD17 (17) /* READ_SINGLE_BLOCK */
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
#define CMD23 (23) /* SET_BLOCK_COUNT */
#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */
#define CMD24 (24) /* WRITE_BLOCK */
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
#define CMD41 (41) /* SEND_OP_COND (ACMD) */
#define CMD55 (55) /* APP_CMD */
#define CMD58 (58) /* READ_OCR */
/* Peripheral definitions for EK-LM3S6965 board */
// SSI port
#define SDC_SSI_BASE SSI0_BASE
#define SDC_SSI_SYSCTL_PERIPH SYSCTL_PERIPH_SSI0
// GPIO for SSI pins
#define SDC_GPIO_PORT_BASE GPIO_PORTA_BASE
#define SDC_GPIO_SYSCTL_PERIPH SYSCTL_PERIPH_GPIOA
#define SDC_SSI_CLK GPIO_PIN_2
#define SDC_SSI_TX GPIO_PIN_5
#define SDC_SSI_RX GPIO_PIN_4
#define SDC_SSI_FSS GPIO_PIN_3
#define SDC_SSI_PINS (SDC_SSI_TX | SDC_SSI_RX | SDC_SSI_CLK)
// GPIO for card chip select
#define SDC_CS_GPIO_PORT_BASE GPIO_PORTD_BASE
#define SDC_CS_GPIO_SYSCTL_PERIPH SYSCTL_PERIPH_GPIOD
#define SDC_CS GPIO_PIN_0
/* Control signals (Platform dependent) */
#define CS_LOW() GPIOPinWrite(SDC_CS_GPIO_PORT_BASE, SDC_CS, 0) /* MMC CS = L */
#define CS_HIGH() GPIOPinWrite(SDC_CS_GPIO_PORT_BASE, SDC_CS, SDC_CS) /* MMC CS = H */
#define FCLK_SLOW() /* Set slow clock (100k-400k) */
#define FCLK_FAST() set_max_speed() /* Set fast clock (depends on the CSD) */
static volatile
DSTATUS Stat = STA_NOINIT; /* Disk status */
static
UINT CardType;
/*-----------------------------------------------------------------------*/
/* Send 80 or so clock transitions with CS and DI held high. This is */
/* required after card power up to get it into SPI mode */
/*-----------------------------------------------------------------------*/
static
void send_initial_clock_train(void)
{
unsigned int i;
DWORD dat;
/* Ensure CS is held high. */
CS_HIGH();
/* Switch the SSI TX line to a GPIO and drive it high too. */
GPIOPinTypeGPIOOutput(SDC_GPIO_PORT_BASE, SDC_SSI_TX);
GPIOPinWrite(SDC_GPIO_PORT_BASE, SDC_SSI_TX, SDC_SSI_TX);
/* Send 10 bytes over the SSI. This causes the clock to wiggle the */
/* required number of times. */
for(i = 0 ; i < 10 ; i++)
{
/* Write DUMMY data. SSIDataPut() waits until there is room in the */
/* FIFO. */
SSIDataPut(SDC_SSI_BASE, 0xFF);
/* Flush data read during data write. */
SSIDataGet(SDC_SSI_BASE, &dat);
}
/* Revert to hardware control of the SSI TX line. */
GPIOPinTypeSSI(SDC_GPIO_PORT_BASE, SDC_SSI_TX);
}
/*-----------------------------------------------------------------------*/
/* Power Control (Platform dependent) */
/*-----------------------------------------------------------------------*/
/* When the target system does not support socket power control, there */
/* is nothing to do in these functions. */
static
void power_on (void)
{
/*
* This doesn't really turn the power on, but initializes the
* SSI port and pins needed to talk to the card.
*/
/* Enable the peripherals used to drive the SDC on SSI, and the CS */
SysCtlPeripheralEnable(SDC_SSI_SYSCTL_PERIPH);
SysCtlPeripheralEnable(SDC_GPIO_SYSCTL_PERIPH);
SysCtlPeripheralEnable(SDC_CS_GPIO_SYSCTL_PERIPH);
/* Configure the appropriate pins to be SSI instead of GPIO */
GPIOPinTypeSSI(SDC_GPIO_PORT_BASE, SDC_SSI_PINS);
GPIOPinTypeGPIOOutput(SDC_CS_GPIO_PORT_BASE, SDC_CS);
GPIOPadConfigSet(SDC_GPIO_PORT_BASE, SDC_SSI_PINS, GPIO_STRENGTH_4MA,
GPIO_PIN_TYPE_STD_WPU);
GPIOPadConfigSet(SDC_CS_GPIO_PORT_BASE, SDC_CS, GPIO_STRENGTH_4MA,
GPIO_PIN_TYPE_STD_WPU);
/* Deassert the SSI0 chip select */
GPIOPinWrite(SDC_CS_GPIO_PORT_BASE, SDC_CS, SDC_CS);
/* Configure the SSI0 port */
SSIConfigSetExpClk(SDC_SSI_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 400000, 8);
SSIEnable(SDC_SSI_BASE);
/* Set DI and CS high and apply more than 74 pulses to SCLK for the card */
/* to be able to accept a native command. */
send_initial_clock_train();
}
// set the SSI speed to the max setting
static
void set_max_speed(void)
{
unsigned long i;
/* Disable the SSI */
SSIDisable(SDC_SSI_BASE);
/* Set the maximum speed as half the system clock, with a max of 12.5 MHz. */
i = SysCtlClockGet() / 2;
if(i > 12500000)
{
i = 12500000;
}
/* Configure the SSI0 port */
SSIConfigSetExpClk(SDC_SSI_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, i, 8);
/* Enable the SSI */
SSIEnable(SDC_SSI_BASE);
}
static
void power_off (void)
{
Stat |= STA_NOINIT; /* Force uninitialized */
}
/*-----------------------------------------------------------------------*/
/* Transmit/Receive data to/from MMC via SPI (Platform dependent) */
/*-----------------------------------------------------------------------*/
static
BYTE xchg_spi (BYTE dat)
{
DWORD rcvdat;
SSIDataPut(SDC_SSI_BASE, dat); /* write data */
SSIDataGet(SDC_SSI_BASE, &rcvdat); /* read data frm rx fifo */
return (BYTE)rcvdat;
}
static
void rcvr_spi_m (BYTE *dst)
{
*dst = xchg_spi(0xFF);
}
/*-----------------------------------------------------------------------*/
/* Wait for card ready */
/*-----------------------------------------------------------------------*/
static
int wait_ready (void)
{
BYTE d;
ULONG timeOutTime;
/* set timeout for 500 ms from now */
timeOutTime = TimerGet() + 500;
do {
d = xchg_spi(0xFF);
} while ((d != 0xFF) && (TimerGet() < timeOutTime));
return (d == 0xFF) ? 1 : 0;
}
/*-----------------------------------------------------------------------*/
/* Deselect the card and release SPI bus */
/*-----------------------------------------------------------------------*/
static
void deselect (void)
{
CS_HIGH();
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
}
/*-----------------------------------------------------------------------*/
/* Select the card and wait ready */
/*-----------------------------------------------------------------------*/
static
int select (void) /* 1:Successful, 0:Timeout */
{
CS_LOW();
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
if (wait_ready()) return 1; /* OK */
deselect();
return 0; /* Timeout */
}
/*-----------------------------------------------------------------------*/
/* Receive a data packet from MMC */
/*-----------------------------------------------------------------------*/
static
int rcvr_datablock ( /* 1:OK, 0:Failed */
BYTE *buff, /* Data buffer to store received data */
UINT btr /* Byte count (must be multiple of 4) */
)
{
BYTE token;
ULONG timeOutTime;
/* set timeout for 100 ms from now */
timeOutTime = TimerGet() + 100;
do { /* Wait for data packet in timeout of 100ms */
token = xchg_spi(0xFF);
} while ((token == 0xFF) && (TimerGet() < timeOutTime));
if(token != 0xFE) return 0; /* If not valid data token, retutn with error */
do { /* Receive the data block into buffer */
rcvr_spi_m(buff++);
rcvr_spi_m(buff++);
} while (btr -= 2);
xchg_spi(0xFF); /* Discard CRC */
xchg_spi(0xFF);
return 1; /* Return with success */
}
/*-----------------------------------------------------------------------*/
/* Send a data packet to MMC */
/*-----------------------------------------------------------------------*/
#if _USE_WRITE
static
int xmit_datablock ( /* 1:OK, 0:Failed */
const BYTE *buff, /* 512 byte data block to be transmitted */
BYTE token /* Data token */
)
{
BYTE resp;
UINT wc;
if (!wait_ready()) return 0;
xchg_spi(token); /* Xmit a token */
if (token != 0xFD) { /* Not StopTran token */
wc = 512;
do { /* Xmit the 512 byte data block to MMC */
xchg_spi(*buff++);
xchg_spi(*buff++);
} while (wc -= 2);
xchg_spi(0xFF); /* CRC (Dummy) */
xchg_spi(0xFF);
resp = xchg_spi(0xFF); /* Receive a data response */
if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
return 0;
}
return 1;
}
#endif
/*-----------------------------------------------------------------------*/
/* Send a command packet to MMC */
/*-----------------------------------------------------------------------*/
static
BYTE send_cmd (
BYTE cmd, /* Command byte */
DWORD arg /* Argument */
)
{
BYTE n, res;
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
cmd &= 0x7F;
res = send_cmd(CMD55, 0);
if (res > 1) return res;
}
/* Select the card and wait for ready */
deselect();
if (!select()) return 0xFF;
/* Send command packet */
xchg_spi(0x40 | cmd); /* Start + Command index */
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
xchg_spi((BYTE)arg); /* Argument[7..0] */
n = 0x01; /* Dummy CRC + Stop */
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) + Stop */
xchg_spi(n);
/* Receive command response */
if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte on stop to read */
n = 10; /* Wait for a valid response in timeout of 10 attempts */
do
res = xchg_spi(0xFF);
while ((res & 0x80) && --n);
return res; /* Return with the response value */
}
/*--------------------------------------------------------------------------
Public Functions
---------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------*/
/* Initialize Disk Drive */
/*-----------------------------------------------------------------------*/
DSTATUS disk_initialize (
BYTE pdrv /* Physical drive nmuber (0) */
)
{
BYTE n, cmd, ty, ocr[4];
ULONG timeOutTime;
if (pdrv) return STA_NOINIT; /* Supports only single drive */
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
power_on(); /* Force socket power on */
CS_LOW(); /* CS = L */
ty = 0;
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
timeOutTime = TimerGet() + 1000; /* Initialization timeout of 1000 msec */
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
while ((TimerGet() < timeOutTime) && send_cmd(ACMD41, 0x40000000)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
if ((TimerGet() < timeOutTime) && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
ty = (ocr[0] & 0x40) ? CT_SD2|CT_BLOCK : CT_SD2; /* SDv2 */
}
}
} else { /* SDv1 or MMCv3 */
if (send_cmd(ACMD41, 0) <= 1) {
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
} else {
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
}
while ((TimerGet() < timeOutTime) && send_cmd(cmd, 0)); /* Wait for leaving idle state */
if (!(TimerGet() < timeOutTime) || send_cmd(CMD16, 512) != 0) /* Set read/write block length to 512 */
ty = 0;
}
}
CardType = ty;
deselect();
if (ty) { /* Initialization succeded */
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
FCLK_FAST();
} else { /* Initialization failed */
power_off();
}
return Stat;
}
/*-----------------------------------------------------------------------*/
/* Get Disk Status */
/*-----------------------------------------------------------------------*/
DSTATUS disk_status (
BYTE pdrv /* Physical drive nmuber (0) */
)
{
if (pdrv) return STA_NOINIT; /* Supports only single drive */
return Stat;
}
/*-----------------------------------------------------------------------*/
/* Read Sector(s) */
/*-----------------------------------------------------------------------*/
DRESULT disk_read (
BYTE pdrv, /* Physical drive nmuber (0) */
BYTE *buff, /* Pointer to the data buffer to store read data */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
{
if (pdrv || !count) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
if (count == 1) { /* Single block read */
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
&& rcvr_datablock(buff, 512))
count = 0;
}
else { /* Multiple block read */
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
do {
if (!rcvr_datablock(buff, 512)) break;
buff += 512;
} while (--count);
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
}
}
deselect();
return count ? RES_ERROR : RES_OK;
}
/*-----------------------------------------------------------------------*/
/* Write Sector(s) */
/*-----------------------------------------------------------------------*/
#if _USE_WRITE
DRESULT disk_write (
BYTE pdrv, /* Physical drive nmuber (0) */
const BYTE *buff, /* Pointer to the data to be written */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
{
if (pdrv || !count) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
if (Stat & STA_PROTECT) return RES_WRPRT;
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
if (count == 1) { /* Single block write */
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
&& xmit_datablock(buff, 0xFE))
count = 0;
}
else { /* Multiple block write */
if (CardType & CT_SDC) send_cmd(ACMD23, count);
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
do {
if (!xmit_datablock(buff, 0xFC)) break;
buff += 512;
} while (--count);
if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
count = 1;
}
}
deselect();
return count ? RES_ERROR : RES_OK;
}
#endif
/*-----------------------------------------------------------------------*/
/* Miscellaneous Functions */
/*-----------------------------------------------------------------------*/
#if _USE_IOCTL
DRESULT disk_ioctl (
BYTE pdrv, /* Physical drive nmuber (0) */
BYTE cmd, /* Control code */
void *buff /* Buffer to send/receive data block */
)
{
DRESULT res;
BYTE n, csd[16], *ptr = buff;
DWORD csz;
if (pdrv) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
res = RES_ERROR;
switch (cmd) {
case CTRL_SYNC : /* Flush write-back cache, Wait for end of internal process */
if (select()) res = RES_OK;
break;
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (WORD) */
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
if ((csd[0] >> 6) == 1) { /* SDv2? */
csz = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
*(DWORD*)buff = csz << 10;
} else { /* SDv1 or MMCv3 */
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
csz = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
*(DWORD*)buff = csz << (n - 9);
}
res = RES_OK;
}
break;
case GET_BLOCK_SIZE : /* Get erase block size in unit of sectors (DWORD) */
if (CardType & CT_SD2) { /* SDv2? */
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
xchg_spi(0xFF);
if (rcvr_datablock(csd, 16)) { /* Read partial block */
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
*(DWORD*)buff = 16UL << (csd[10] >> 4);
res = RES_OK;
}
}
} else { /* SDv1 or MMCv3 */
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
if (CardType & CT_SD1) { /* SDv1 */
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
} else { /* MMCv3 */
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
}
res = RES_OK;
}
}
break;
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
*ptr = CardType;
res = RES_OK;
break;
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
if ((send_cmd(CMD9, 0) == 0) /* READ_CSD */
&& rcvr_datablock(buff, 16))
res = RES_OK;
break;
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
if ((send_cmd(CMD10, 0) == 0) /* READ_CID */
&& rcvr_datablock(buff, 16))
res = RES_OK;
break;
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
for (n = 0; n < 4; n++)
*((BYTE*)buff+n) = xchg_spi(0xFF);
res = RES_OK;
}
break;
case MMC_GET_SDSTAT : /* Receive SD statsu as a data block (64 bytes) */
if ((CardType & CT_SD2) && send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
xchg_spi(0xFF);
if (rcvr_datablock(buff, 64))
res = RES_OK;
}
break;
default:
res = RES_PARERR;
}
deselect();
return res;
}
#endif
/*---------------------------------------------------------*/
/* User Provided Timer Function for FatFs module */
/*---------------------------------------------------------*/
/* This is a real time clock service to be called from */
/* FatFs module. Any valid time must be returned even if */
/* the system does not support a real time clock. */
/* This is not required in read-only configuration. */
DWORD get_fattime (void)
{
/* No RTC supprt. Return a fixed value 2010/4/26 0:00:00 */
return ((DWORD)(2013 - 1980) << 25) /* Y */
| ((DWORD)5 << 21) /* M */
| ((DWORD)10 << 16) /* D */
| ((DWORD)0 << 11) /* H */
| ((DWORD)0 << 5) /* M */
| ((DWORD)0 >> 1); /* S */
}

131
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/inc/hw_flash.h
View File

@ -2,23 +2,38 @@
//
// hw_flash.h - Macros used when accessing the flash controller.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -42,6 +57,9 @@
#define FLASH_FWBVAL 0x400FD030 // Flash Write Buffer Valid
#define FLASH_FCTL 0x400FD0F8 // Flash Control
#define FLASH_FWBN 0x400FD100 // Flash Write Buffer n
#define FLASH_FSIZE 0x400FDFC0 // Flash Size
#define FLASH_SSIZE 0x400FDFC4 // SRAM Size
#define FLASH_ROMSWMAP 0x400FDFCC // ROM Software Map
#define FLASH_RMCTL 0x400FE0F0 // ROM Control
#define FLASH_FMPRE 0x400FE130 // Flash Memory Protection Read
// Enable
@ -62,6 +80,14 @@
// Enable 2
#define FLASH_FMPRE3 0x400FE20C // Flash Memory Protection Read
// Enable 3
#define FLASH_FMPRE4 0x400FE210 // Flash Memory Protection Read
// Enable 4
#define FLASH_FMPRE5 0x400FE214 // Flash Memory Protection Read
// Enable 5
#define FLASH_FMPRE6 0x400FE218 // Flash Memory Protection Read
// Enable 6
#define FLASH_FMPRE7 0x400FE21C // Flash Memory Protection Read
// Enable 7
#define FLASH_FMPPE0 0x400FE400 // Flash Memory Protection Program
// Enable 0
#define FLASH_FMPPE1 0x400FE404 // Flash Memory Protection Program
@ -70,13 +96,21 @@
// Enable 2
#define FLASH_FMPPE3 0x400FE40C // Flash Memory Protection Program
// Enable 3
#define FLASH_FMPPE4 0x400FE410 // Flash Memory Protection Program
// Enable 4
#define FLASH_FMPPE5 0x400FE414 // Flash Memory Protection Program
// Enable 5
#define FLASH_FMPPE6 0x400FE418 // Flash Memory Protection Program
// Enable 6
#define FLASH_FMPPE7 0x400FE41C // Flash Memory Protection Program
// Enable 7
//*****************************************************************************
//
// The following are defines for the bit fields in the FLASH_FMA register.
//
//*****************************************************************************
#define FLASH_FMA_OFFSET_M 0x0003FFFF // Address Offset
#define FLASH_FMA_OFFSET_M 0x0007FFFF // Address Offset
#define FLASH_FMA_OFFSET_S 0
//*****************************************************************************
@ -103,6 +137,12 @@
// The following are defines for the bit fields in the FLASH_FCRIS register.
//
//*****************************************************************************
#define FLASH_FCRIS_PROGRIS 0x00002000 // PROGVER Raw Interrupt Status
#define FLASH_FCRIS_ERRIS 0x00000800 // ERVER Raw Interrupt Status
#define FLASH_FCRIS_INVDRIS 0x00000400 // Invalid Data Raw Interrupt
// Status
#define FLASH_FCRIS_VOLTRIS 0x00000200 // VOLTSTAT Raw Interrupt Status
#define FLASH_FCRIS_ERIS 0x00000004 // EEPROM Raw Interrupt Status
#define FLASH_FCRIS_PRIS 0x00000002 // Programming Raw Interrupt Status
#define FLASH_FCRIS_ARIS 0x00000001 // Access Raw Interrupt Status
@ -111,6 +151,11 @@
// The following are defines for the bit fields in the FLASH_FCIM register.
//
//*****************************************************************************
#define FLASH_FCIM_PROGMASK 0x00002000 // PROGVER Interrupt Mask
#define FLASH_FCIM_ERMASK 0x00000800 // ERVER Interrupt Mask
#define FLASH_FCIM_INVDMASK 0x00000400 // Invalid Data Interrupt Mask
#define FLASH_FCIM_VOLTMASK 0x00000200 // VOLT Interrupt Mask
#define FLASH_FCIM_EMASK 0x00000004 // EEPROM Interrupt Mask
#define FLASH_FCIM_PMASK 0x00000002 // Programming Interrupt Mask
#define FLASH_FCIM_AMASK 0x00000001 // Access Interrupt Mask
@ -119,6 +164,16 @@
// The following are defines for the bit fields in the FLASH_FCMISC register.
//
//*****************************************************************************
#define FLASH_FCMISC_PROGMISC 0x00002000 // PROGVER Masked Interrupt Status
// and Clear
#define FLASH_FCMISC_ERMISC 0x00000800 // ERVER Masked Interrupt Status
// and Clear
#define FLASH_FCMISC_INVDMISC 0x00000400 // Invalid Data Masked Interrupt
// Status and Clear
#define FLASH_FCMISC_VOLTMISC 0x00000200 // VOLT Masked Interrupt Status and
// Clear
#define FLASH_FCMISC_EMISC 0x00000004 // EEPROM Masked Interrupt Status
// and Clear
#define FLASH_FCMISC_PMISC 0x00000002 // Programming Masked Interrupt
// Status and Clear
#define FLASH_FCMISC_AMISC 0x00000001 // Access Masked Interrupt Status
@ -154,6 +209,44 @@
//*****************************************************************************
#define FLASH_FWBN_DATA_M 0xFFFFFFFF // Data
//*****************************************************************************
//
// The following are defines for the bit fields in the FLASH_FSIZE register.
//
//*****************************************************************************
#define FLASH_FSIZE_SIZE_M 0x0000FFFF // Flash Size
#define FLASH_FSIZE_SIZE_8KB 0x00000003 // 8 KB of Flash
#define FLASH_FSIZE_SIZE_16KB 0x00000007 // 16 KB of Flash
#define FLASH_FSIZE_SIZE_32KB 0x0000000F // 32 KB of Flash
#define FLASH_FSIZE_SIZE_64KB 0x0000001F // 64 KB of Flash
#define FLASH_FSIZE_SIZE_96KB 0x0000002F // 96 KB of Flash
#define FLASH_FSIZE_SIZE_128KB 0x0000003F // 128 KB of Flash
#define FLASH_FSIZE_SIZE_192KB 0x0000005F // 192 KB of Flash
#define FLASH_FSIZE_SIZE_256KB 0x0000007F // 256 KB of Flash
//*****************************************************************************
//
// The following are defines for the bit fields in the FLASH_SSIZE register.
//
//*****************************************************************************
#define FLASH_SSIZE_SIZE_M 0x0000FFFF // SRAM Size
#define FLASH_SSIZE_SIZE_2KB 0x00000007 // 2 KB of SRAM
#define FLASH_SSIZE_SIZE_4KB 0x0000000F // 4 KB of SRAM
#define FLASH_SSIZE_SIZE_6KB 0x00000017 // 6 KB of SRAM
#define FLASH_SSIZE_SIZE_8KB 0x0000001F // 8 KB of SRAM
#define FLASH_SSIZE_SIZE_12KB 0x0000002F // 12 KB of SRAM
#define FLASH_SSIZE_SIZE_16KB 0x0000003F // 16 KB of SRAM
#define FLASH_SSIZE_SIZE_20KB 0x0000004F // 20 KB of SRAM
#define FLASH_SSIZE_SIZE_24KB 0x0000005F // 24 KB of SRAM
#define FLASH_SSIZE_SIZE_32KB 0x0000007F // 32 KB of SRAM
//*****************************************************************************
//
// The following are defines for the bit fields in the FLASH_ROMSWMAP register.
//
//*****************************************************************************
#define FLASH_ROMSWMAP_SAFERTOS 0x00000001 // SafeRTOS Present
//*****************************************************************************
//
// The following are defines for the bit fields in the FLASH_RMCTL register.
@ -214,8 +307,8 @@
// The following are defines for the bit fields in the FLASH_USERREG0 register.
//
//*****************************************************************************
#define FLASH_USERREG0_DATA_M 0xFFFFFFFF // User Data
#define FLASH_USERREG0_NW 0x80000000 // Not Written
#define FLASH_USERREG0_DATA_M 0x7FFFFFFF // User Data
#define FLASH_USERREG0_DATA_S 0
//*****************************************************************************
@ -223,8 +316,8 @@
// The following are defines for the bit fields in the FLASH_USERREG1 register.
//
//*****************************************************************************
#define FLASH_USERREG1_DATA_M 0xFFFFFFFF // User Data
#define FLASH_USERREG1_NW 0x80000000 // Not Written
#define FLASH_USERREG1_DATA_M 0x7FFFFFFF // User Data
#define FLASH_USERREG1_DATA_S 0
//*****************************************************************************
@ -232,8 +325,8 @@
// The following are defines for the bit fields in the FLASH_USERREG2 register.
//
//*****************************************************************************
#define FLASH_USERREG2_DATA_M 0xFFFFFFFF // User Data
#define FLASH_USERREG2_NW 0x80000000 // Not Written
#define FLASH_USERREG2_DATA_M 0x7FFFFFFF // User Data
#define FLASH_USERREG2_DATA_S 0
//*****************************************************************************
@ -241,8 +334,8 @@
// The following are defines for the bit fields in the FLASH_USERREG3 register.
//
//*****************************************************************************
#define FLASH_USERREG3_DATA_M 0xFFFFFFFF // User Data
#define FLASH_USERREG3_NW 0x80000000 // Not Written
#define FLASH_USERREG3_DATA_M 0x7FFFFFFF // User Data
#define FLASH_USERREG3_DATA_S 0
//*****************************************************************************
@ -314,8 +407,8 @@
// register.
//
//*****************************************************************************
#define FLASH_FMC_WRKEY_MASK 0xFFFF0000 // FLASH write key mask
#define FLASH_FMC_WRKEY_M 0xFFFF0000 // Flash Memory Write Key
#define FLASH_FMC_WRKEY_MASK 0xFFFF0000 // FLASH write key mask
#define FLASH_FMC_WRKEY_S 16
//*****************************************************************************

530
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/inc/hw_gpio.h
View File

@ -2,23 +2,38 @@
//
// hw_gpio.h - Defines and Macros for GPIO hardware.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -52,6 +67,41 @@
#define GPIO_O_CR 0x00000524 // GPIO Commit
#define GPIO_O_AMSEL 0x00000528 // GPIO Analog Mode Select
#define GPIO_O_PCTL 0x0000052C // GPIO Port Control
#define GPIO_O_ADCCTL 0x00000530 // GPIO ADC Control
#define GPIO_O_DMACTL 0x00000534 // GPIO DMA Control
#define GPIO_O_SI 0x00000538 // GPIO Select Interrupt
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_O_IM register.
//
//*****************************************************************************
#define GPIO_IM_GPIO_M 0x000000FF // GPIO Interrupt Mask Enable
#define GPIO_IM_GPIO_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_O_RIS register.
//
//*****************************************************************************
#define GPIO_RIS_GPIO_M 0x000000FF // GPIO Interrupt Raw Status
#define GPIO_RIS_GPIO_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_O_MIS register.
//
//*****************************************************************************
#define GPIO_MIS_GPIO_M 0x000000FF // GPIO Masked Interrupt Status
#define GPIO_MIS_GPIO_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_O_ICR register.
//
//*****************************************************************************
#define GPIO_ICR_GPIO_M 0x000000FF // GPIO Interrupt Clear
#define GPIO_ICR_GPIO_S 0
//*****************************************************************************
//
@ -70,460 +120,10 @@
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port A.
// The following are defines for the bit fields in the GPIO_O_SI register.
//
//*****************************************************************************
#define GPIO_PCTL_PA0_M 0x0000000F // PA0 mask
#define GPIO_PCTL_PA0_U0RX 0x00000001 // U0RX on PA0
#define GPIO_PCTL_PA0_I2C1SCL 0x00000008 // I2C1SCL on PA0
#define GPIO_PCTL_PA0_U1RX 0x00000009 // U1RX on PA0
#define GPIO_PCTL_PA1_M 0x000000F0 // PA1 mask
#define GPIO_PCTL_PA1_U0TX 0x00000010 // U0TX on PA1
#define GPIO_PCTL_PA1_I2C1SDA 0x00000080 // I2C1SDA on PA1
#define GPIO_PCTL_PA1_U1TX 0x00000090 // U1TX on PA1
#define GPIO_PCTL_PA2_M 0x00000F00 // PA2 mask
#define GPIO_PCTL_PA2_SSI0CLK 0x00000100 // SSI0CLK on PA2
#define GPIO_PCTL_PA2_PWM4 0x00000400 // PWM4 on PA2
#define GPIO_PCTL_PA2_I2S0RXSD 0x00000900 // I2S0RXSD on PA2
#define GPIO_PCTL_PA3_M 0x0000F000 // PA3 mask
#define GPIO_PCTL_PA3_SSI0FSS 0x00001000 // SSI0FSS on PA3
#define GPIO_PCTL_PA3_PWM5 0x00004000 // PWM5 on PA3
#define GPIO_PCTL_PA3_I2S0RXMCLK \
0x00009000 // I2S0RXMCLK on PA3
#define GPIO_PCTL_PA4_M 0x000F0000 // PA4 mask
#define GPIO_PCTL_PA4_SSI0RX 0x00010000 // SSI0RX on PA4
#define GPIO_PCTL_PA4_PWM6 0x00040000 // PWM6 on PA4
#define GPIO_PCTL_PA4_CAN0RX 0x00050000 // CAN0RX on PA4
#define GPIO_PCTL_PA4_I2S0TXSCK 0x00090000 // I2S0TXSCK on PA4
#define GPIO_PCTL_PA5_M 0x00F00000 // PA5 mask
#define GPIO_PCTL_PA5_SSI0TX 0x00100000 // SSI0TX on PA5
#define GPIO_PCTL_PA5_PWM7 0x00400000 // PWM7 on PA5
#define GPIO_PCTL_PA5_CAN0TX 0x00500000 // CAN0TX on PA5
#define GPIO_PCTL_PA5_I2S0TXWS 0x00900000 // I2S0TXWS on PA5
#define GPIO_PCTL_PA6_M 0x0F000000 // PA6 mask
#define GPIO_PCTL_PA6_I2C1SCL 0x01000000 // I2C1SCL on PA6
#define GPIO_PCTL_PA6_CCP1 0x02000000 // CCP1 on PA6
#define GPIO_PCTL_PA6_PWM0 0x04000000 // PWM0 on PA6
#define GPIO_PCTL_PA6_PWM4 0x05000000 // PWM4 on PA6
#define GPIO_PCTL_PA6_CAN0RX 0x06000000 // CAN0RX on PA6
#define GPIO_PCTL_PA6_USB0EPEN 0x08000000 // USB0EPEN on PA6
#define GPIO_PCTL_PA6_U1CTS 0x09000000 // U1CTS on PA6
#define GPIO_PCTL_PA7_M 0xF0000000 // PA7 mask
#define GPIO_PCTL_PA7_I2C1SDA 0x10000000 // I2C1SDA on PA7
#define GPIO_PCTL_PA7_CCP4 0x20000000 // CCP4 on PA7
#define GPIO_PCTL_PA7_PWM1 0x40000000 // PWM1 on PA7
#define GPIO_PCTL_PA7_PWM5 0x50000000 // PWM5 on PA7
#define GPIO_PCTL_PA7_CAN0TX 0x60000000 // CAN0TX on PA7
#define GPIO_PCTL_PA7_CCP3 0x70000000 // CCP3 on PA7
#define GPIO_PCTL_PA7_USB0PFLT 0x80000000 // USB0PFLT on PA7
#define GPIO_PCTL_PA7_U1DCD 0x90000000 // U1DCD on PA7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port B.
//
//*****************************************************************************
#define GPIO_PCTL_PB0_M 0x0000000F // PB0 mask
#define GPIO_PCTL_PB0_CCP0 0x00000001 // CCP0 on PB0
#define GPIO_PCTL_PB0_PWM2 0x00000002 // PWM2 on PB0
#define GPIO_PCTL_PB0_U1RX 0x00000005 // U1RX on PB0
#define GPIO_PCTL_PB1_M 0x000000F0 // PB1 mask
#define GPIO_PCTL_PB1_CCP2 0x00000010 // CCP2 on PB1
#define GPIO_PCTL_PB1_PWM3 0x00000020 // PWM3 on PB1
#define GPIO_PCTL_PB1_CCP1 0x00000040 // CCP1 on PB1
#define GPIO_PCTL_PB1_U1TX 0x00000050 // U1TX on PB1
#define GPIO_PCTL_PB2_M 0x00000F00 // PB2 mask
#define GPIO_PCTL_PB2_I2C0SCL 0x00000100 // I2C0SCL on PB2
#define GPIO_PCTL_PB2_IDX0 0x00000200 // IDX0 on PB2
#define GPIO_PCTL_PB2_CCP3 0x00000400 // CCP3 on PB2
#define GPIO_PCTL_PB2_CCP0 0x00000500 // CCP0 on PB2
#define GPIO_PCTL_PB2_USB0EPEN 0x00000800 // USB0EPEN on PB2
#define GPIO_PCTL_PB3_M 0x0000F000 // PB3 mask
#define GPIO_PCTL_PB3_I2C0SDA 0x00001000 // I2C0SDA on PB3
#define GPIO_PCTL_PB3_FAULT0 0x00002000 // FAULT0 on PB3
#define GPIO_PCTL_PB3_FAULT3 0x00004000 // FAULT3 on PB3
#define GPIO_PCTL_PB3_USB0PFLT 0x00008000 // USB0PFLT on PB3
#define GPIO_PCTL_PB4_M 0x000F0000 // PB4 mask
#define GPIO_PCTL_PB4_U2RX 0x00040000 // U2RX on PB4
#define GPIO_PCTL_PB4_CAN0RX 0x00050000 // CAN0RX on PB4
#define GPIO_PCTL_PB4_IDX0 0x00060000 // IDX0 on PB4
#define GPIO_PCTL_PB4_U1RX 0x00070000 // U1RX on PB4
#define GPIO_PCTL_PB4_EPI0S23 0x00080000 // EPI0S23 on PB4
#define GPIO_PCTL_PB5_M 0x00F00000 // PB5 mask
#define GPIO_PCTL_PB5_C0O 0x00100000 // C0O on PB5
#define GPIO_PCTL_PB5_CCP5 0x00200000 // CCP5 on PB5
#define GPIO_PCTL_PB5_CCP6 0x00300000 // CCP6 on PB5
#define GPIO_PCTL_PB5_CCP0 0x00400000 // CCP0 on PB5
#define GPIO_PCTL_PB5_CAN0TX 0x00500000 // CAN0TX on PB5
#define GPIO_PCTL_PB5_CCP2 0x00600000 // CCP2 on PB5
#define GPIO_PCTL_PB5_U1TX 0x00700000 // U1TX on PB5
#define GPIO_PCTL_PB5_EPI0S22 0x00800000 // EPI0S22 on PB5
#define GPIO_PCTL_PB6_M 0x0F000000 // PB6 mask
#define GPIO_PCTL_PB6_CCP1 0x01000000 // CCP1 on PB6
#define GPIO_PCTL_PB6_CCP7 0x02000000 // CCP7 on PB6
#define GPIO_PCTL_PB6_C0O 0x03000000 // C0O on PB6
#define GPIO_PCTL_PB6_FAULT1 0x04000000 // FAULT1 on PB6
#define GPIO_PCTL_PB6_IDX0 0x05000000 // IDX0 on PB6
#define GPIO_PCTL_PB6_CCP5 0x06000000 // CCP5 on PB6
#define GPIO_PCTL_PB6_I2S0TXSCK 0x09000000 // I2S0TXSCK on PB6
#define GPIO_PCTL_PB7_M 0xF0000000 // PB7 mask
#define GPIO_PCTL_PB7_NMI 0x40000000 // NMI on PB7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port C.
//
//*****************************************************************************
#define GPIO_PCTL_PC0_M 0x0000000F // PC0 mask
#define GPIO_PCTL_PC0_TCK 0x00000003 // TCK on PC0
#define GPIO_PCTL_PC1_M 0x000000F0 // PC1 mask
#define GPIO_PCTL_PC1_TMS 0x00000030 // TMS on PC1
#define GPIO_PCTL_PC2_M 0x00000F00 // PC2 mask
#define GPIO_PCTL_PC2_TDI 0x00000300 // TDI on PC2
#define GPIO_PCTL_PC3_M 0x0000F000 // PC3 mask
#define GPIO_PCTL_PC3_TDO 0x00003000 // TDO on PC3
#define GPIO_PCTL_PC4_M 0x000F0000 // PC4 mask
#define GPIO_PCTL_PC4_CCP5 0x00010000 // CCP5 on PC4
#define GPIO_PCTL_PC4_PHA0 0x00020000 // PHA0 on PC4
#define GPIO_PCTL_PC4_PWM6 0x00040000 // PWM6 on PC4
#define GPIO_PCTL_PC4_CCP2 0x00050000 // CCP2 on PC4
#define GPIO_PCTL_PC4_CCP4 0x00060000 // CCP4 on PC4
#define GPIO_PCTL_PC4_EPI0S2 0x00080000 // EPI0S2 on PC4
#define GPIO_PCTL_PC4_CCP1 0x00090000 // CCP1 on PC4
#define GPIO_PCTL_PC5_M 0x00F00000 // PC5 mask
#define GPIO_PCTL_PC5_CCP1 0x00100000 // CCP1 on PC5
#define GPIO_PCTL_PC5_C1O 0x00200000 // C1O on PC5
#define GPIO_PCTL_PC5_C0O 0x00300000 // C0O on PC5
#define GPIO_PCTL_PC5_FAULT2 0x00400000 // FAULT2 on PC5
#define GPIO_PCTL_PC5_CCP3 0x00500000 // CCP3 on PC5
#define GPIO_PCTL_PC5_USB0EPEN 0x00600000 // USB0EPEN on PC5
#define GPIO_PCTL_PC5_EPI0S3 0x00800000 // EPI0S3 on PC5
#define GPIO_PCTL_PC6_M 0x0F000000 // PC6 mask
#define GPIO_PCTL_PC6_CCP3 0x01000000 // CCP3 on PC6
#define GPIO_PCTL_PC6_PHB0 0x02000000 // PHB0 on PC6
#define GPIO_PCTL_PC6_C2O 0x03000000 // C2O on PC6
#define GPIO_PCTL_PC6_PWM7 0x04000000 // PWM7 on PC6
#define GPIO_PCTL_PC6_U1RX 0x05000000 // U1RX on PC6
#define GPIO_PCTL_PC6_CCP0 0x06000000 // CCP0 on PC6
#define GPIO_PCTL_PC6_USB0PFLT 0x07000000 // USB0PFLT on PC6
#define GPIO_PCTL_PC6_EPI0S4 0x08000000 // EPI0S4 on PC6
#define GPIO_PCTL_PC7_M 0xF0000000 // PC7 mask
#define GPIO_PCTL_PC7_CCP4 0x10000000 // CCP4 on PC7
#define GPIO_PCTL_PC7_PHB0 0x20000000 // PHB0 on PC7
#define GPIO_PCTL_PC7_CCP0 0x40000000 // CCP0 on PC7
#define GPIO_PCTL_PC7_U1TX 0x50000000 // U1TX on PC7
#define GPIO_PCTL_PC7_USB0PFLT 0x60000000 // USB0PFLT on PC7
#define GPIO_PCTL_PC7_C1O 0x70000000 // C1O on PC7
#define GPIO_PCTL_PC7_EPI0S5 0x80000000 // EPI0S5 on PC7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port D.
//
//*****************************************************************************
#define GPIO_PCTL_PD0_M 0x0000000F // PD0 mask
#define GPIO_PCTL_PD0_PWM0 0x00000001 // PWM0 on PD0
#define GPIO_PCTL_PD0_CAN0RX 0x00000002 // CAN0RX on PD0
#define GPIO_PCTL_PD0_IDX0 0x00000003 // IDX0 on PD0
#define GPIO_PCTL_PD0_U2RX 0x00000004 // U2RX on PD0
#define GPIO_PCTL_PD0_U1RX 0x00000005 // U1RX on PD0
#define GPIO_PCTL_PD0_CCP6 0x00000006 // CCP6 on PD0
#define GPIO_PCTL_PD0_I2S0RXSCK 0x00000008 // I2S0RXSCK on PD0
#define GPIO_PCTL_PD0_U1CTS 0x00000009 // U1CTS on PD0
#define GPIO_PCTL_PD1_M 0x000000F0 // PD1 mask
#define GPIO_PCTL_PD1_PWM1 0x00000010 // PWM1 on PD1
#define GPIO_PCTL_PD1_CAN0TX 0x00000020 // CAN0TX on PD1
#define GPIO_PCTL_PD1_PHA0 0x00000030 // PHA0 on PD1
#define GPIO_PCTL_PD1_U2TX 0x00000040 // U2TX on PD1
#define GPIO_PCTL_PD1_U1TX 0x00000050 // U1TX on PD1
#define GPIO_PCTL_PD1_CCP7 0x00000060 // CCP7 on PD1
#define GPIO_PCTL_PD1_I2S0RXWS 0x00000080 // I2S0RXWS on PD1
#define GPIO_PCTL_PD1_U1DCD 0x00000090 // U1DCD on PD1
#define GPIO_PCTL_PD1_CCP2 0x000000A0 // CCP2 on PD1
#define GPIO_PCTL_PD1_PHB1 0x000000B0 // PHB1 on PD1
#define GPIO_PCTL_PD2_M 0x00000F00 // PD2 mask
#define GPIO_PCTL_PD2_U1RX 0x00000100 // U1RX on PD2
#define GPIO_PCTL_PD2_CCP6 0x00000200 // CCP6 on PD2
#define GPIO_PCTL_PD2_PWM2 0x00000300 // PWM2 on PD2
#define GPIO_PCTL_PD2_CCP5 0x00000400 // CCP5 on PD2
#define GPIO_PCTL_PD2_EPI0S20 0x00000800 // EPI0S20 on PD2
#define GPIO_PCTL_PD3_M 0x0000F000 // PD3 mask
#define GPIO_PCTL_PD3_U1TX 0x00001000 // U1TX on PD3
#define GPIO_PCTL_PD3_CCP7 0x00002000 // CCP7 on PD3
#define GPIO_PCTL_PD3_PWM3 0x00003000 // PWM3 on PD3
#define GPIO_PCTL_PD3_CCP0 0x00004000 // CCP0 on PD3
#define GPIO_PCTL_PD3_EPI0S21 0x00008000 // EPI0S21 on PD3
#define GPIO_PCTL_PD4_M 0x000F0000 // PD4 mask
#define GPIO_PCTL_PD4_CCP0 0x00010000 // CCP0 on PD4
#define GPIO_PCTL_PD4_CCP3 0x00020000 // CCP3 on PD4
#define GPIO_PCTL_PD4_I2S0RXSD 0x00080000 // I2S0RXSD on PD4
#define GPIO_PCTL_PD4_U1RI 0x00090000 // U1RI on PD4
#define GPIO_PCTL_PD4_EPI0S19 0x000A0000 // EPI0S19 on PD4
#define GPIO_PCTL_PD5_M 0x00F00000 // PD5 mask
#define GPIO_PCTL_PD5_CCP2 0x00100000 // CCP2 on PD5
#define GPIO_PCTL_PD5_CCP4 0x00200000 // CCP4 on PD5
#define GPIO_PCTL_PD5_I2S0RXMCLK \
0x00800000 // I2S0RXMCLK on PD5
#define GPIO_PCTL_PD5_U2RX 0x00900000 // U2RX on PD5
#define GPIO_PCTL_PD5_EPI0S28 0x00A00000 // EPI0S28 on PD5
#define GPIO_PCTL_PD6_M 0x0F000000 // PD6 mask
#define GPIO_PCTL_PD6_FAULT0 0x01000000 // FAULT0 on PD6
#define GPIO_PCTL_PD6_I2S0TXSCK 0x08000000 // I2S0TXSCK on PD6
#define GPIO_PCTL_PD6_U2TX 0x09000000 // U2TX on PD6
#define GPIO_PCTL_PD6_EPI0S29 0x0A000000 // EPI0S29 on PD6
#define GPIO_PCTL_PD7_M 0xF0000000 // PD7 mask
#define GPIO_PCTL_PD7_IDX0 0x10000000 // IDX0 on PD7
#define GPIO_PCTL_PD7_C0O 0x20000000 // C0O on PD7
#define GPIO_PCTL_PD7_CCP1 0x30000000 // CCP1 on PD7
#define GPIO_PCTL_PD7_I2S0TXWS 0x80000000 // I2S0TXWS on PD7
#define GPIO_PCTL_PD7_U1DTR 0x90000000 // U1DTR on PD7
#define GPIO_PCTL_PD7_EPI0S30 0xA0000000 // EPI0S30 on PD7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port E.
//
//*****************************************************************************
#define GPIO_PCTL_PE0_M 0x0000000F // PE0 mask
#define GPIO_PCTL_PE0_PWM4 0x00000001 // PWM4 on PE0
#define GPIO_PCTL_PE0_SSI1CLK 0x00000002 // SSI1CLK on PE0
#define GPIO_PCTL_PE0_CCP3 0x00000003 // CCP3 on PE0
#define GPIO_PCTL_PE0_EPI0S8 0x00000008 // EPI0S8 on PE0
#define GPIO_PCTL_PE0_USB0PFLT 0x00000009 // USB0PFLT on PE0
#define GPIO_PCTL_PE1_M 0x000000F0 // PE1 mask
#define GPIO_PCTL_PE1_PWM5 0x00000010 // PWM5 on PE1
#define GPIO_PCTL_PE1_SSI1FSS 0x00000020 // SSI1FSS on PE1
#define GPIO_PCTL_PE1_FAULT0 0x00000030 // FAULT0 on PE1
#define GPIO_PCTL_PE1_CCP2 0x00000040 // CCP2 on PE1
#define GPIO_PCTL_PE1_CCP6 0x00000050 // CCP6 on PE1
#define GPIO_PCTL_PE1_EPI0S9 0x00000080 // EPI0S9 on PE1
#define GPIO_PCTL_PE2_M 0x00000F00 // PE2 mask
#define GPIO_PCTL_PE2_CCP4 0x00000100 // CCP4 on PE2
#define GPIO_PCTL_PE2_SSI1RX 0x00000200 // SSI1RX on PE2
#define GPIO_PCTL_PE2_PHB1 0x00000300 // PHB1 on PE2
#define GPIO_PCTL_PE2_PHA0 0x00000400 // PHA0 on PE2
#define GPIO_PCTL_PE2_CCP2 0x00000500 // CCP2 on PE2
#define GPIO_PCTL_PE2_EPI0S24 0x00000800 // EPI0S24 on PE2
#define GPIO_PCTL_PE3_M 0x0000F000 // PE3 mask
#define GPIO_PCTL_PE3_CCP1 0x00001000 // CCP1 on PE3
#define GPIO_PCTL_PE3_SSI1TX 0x00002000 // SSI1TX on PE3
#define GPIO_PCTL_PE3_PHA1 0x00003000 // PHA1 on PE3
#define GPIO_PCTL_PE3_PHB0 0x00004000 // PHB0 on PE3
#define GPIO_PCTL_PE3_CCP7 0x00005000 // CCP7 on PE3
#define GPIO_PCTL_PE3_EPI0S25 0x00008000 // EPI0S25 on PE3
#define GPIO_PCTL_PE4_M 0x000F0000 // PE4 mask
#define GPIO_PCTL_PE4_CCP3 0x00010000 // CCP3 on PE4
#define GPIO_PCTL_PE4_FAULT0 0x00040000 // FAULT0 on PE4
#define GPIO_PCTL_PE4_U2TX 0x00050000 // U2TX on PE4
#define GPIO_PCTL_PE4_CCP2 0x00060000 // CCP2 on PE4
#define GPIO_PCTL_PE4_I2S0TXWS 0x00090000 // I2S0TXWS on PE4
#define GPIO_PCTL_PE5_M 0x00F00000 // PE5 mask
#define GPIO_PCTL_PE5_CCP5 0x00100000 // CCP5 on PE5
#define GPIO_PCTL_PE5_I2S0TXSD 0x00900000 // I2S0TXSD on PE5
#define GPIO_PCTL_PE6_M 0x0F000000 // PE6 mask
#define GPIO_PCTL_PE6_PWM4 0x01000000 // PWM4 on PE6
#define GPIO_PCTL_PE6_C1O 0x02000000 // C1O on PE6
#define GPIO_PCTL_PE6_U1CTS 0x09000000 // U1CTS on PE6
#define GPIO_PCTL_PE7_M 0xF0000000 // PE7 mask
#define GPIO_PCTL_PE7_PWM5 0x10000000 // PWM5 on PE7
#define GPIO_PCTL_PE7_C2O 0x20000000 // C2O on PE7
#define GPIO_PCTL_PE7_U1DCD 0x90000000 // U1DCD on PE7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port F.
//
//*****************************************************************************
#define GPIO_PCTL_PF0_M 0x0000000F // PF0 mask
#define GPIO_PCTL_PF0_CAN1RX 0x00000001 // CAN1RX on PF0
#define GPIO_PCTL_PF0_PHB0 0x00000002 // PHB0 on PF0
#define GPIO_PCTL_PF0_PWM0 0x00000003 // PWM0 on PF0
#define GPIO_PCTL_PF0_I2S0TXSD 0x00000008 // I2S0TXSD on PF0
#define GPIO_PCTL_PF0_U1DSR 0x00000009 // U1DSR on PF0
#define GPIO_PCTL_PF1_M 0x000000F0 // PF1 mask
#define GPIO_PCTL_PF1_CAN1TX 0x00000010 // CAN1TX on PF1
#define GPIO_PCTL_PF1_IDX1 0x00000020 // IDX1 on PF1
#define GPIO_PCTL_PF1_PWM1 0x00000030 // PWM1 on PF1
#define GPIO_PCTL_PF1_I2S0TXMCLK \
0x00000080 // I2S0TXMCLK on PF1
#define GPIO_PCTL_PF1_U1RTS 0x00000090 // U1RTS on PF1
#define GPIO_PCTL_PF1_CCP3 0x000000A0 // CCP3 on PF1
#define GPIO_PCTL_PF2_M 0x00000F00 // PF2 mask
#define GPIO_PCTL_PF2_LED1 0x00000100 // LED1 on PF2
#define GPIO_PCTL_PF2_PWM4 0x00000200 // PWM4 on PF2
#define GPIO_PCTL_PF2_PWM2 0x00000400 // PWM2 on PF2
#define GPIO_PCTL_PF2_SSI1CLK 0x00000900 // SSI1CLK on PF2
#define GPIO_PCTL_PF3_M 0x0000F000 // PF3 mask
#define GPIO_PCTL_PF3_LED0 0x00001000 // LED0 on PF3
#define GPIO_PCTL_PF3_PWM5 0x00002000 // PWM5 on PF3
#define GPIO_PCTL_PF3_PWM3 0x00004000 // PWM3 on PF3
#define GPIO_PCTL_PF3_SSI1FSS 0x00009000 // SSI1FSS on PF3
#define GPIO_PCTL_PF4_M 0x000F0000 // PF4 mask
#define GPIO_PCTL_PF4_CCP0 0x00010000 // CCP0 on PF4
#define GPIO_PCTL_PF4_C0O 0x00020000 // C0O on PF4
#define GPIO_PCTL_PF4_FAULT0 0x00040000 // FAULT0 on PF4
#define GPIO_PCTL_PF4_EPI0S12 0x00080000 // EPI0S12 on PF4
#define GPIO_PCTL_PF4_SSI1RX 0x00090000 // SSI1RX on PF4
#define GPIO_PCTL_PF5_M 0x00F00000 // PF5 mask
#define GPIO_PCTL_PF5_CCP2 0x00100000 // CCP2 on PF5
#define GPIO_PCTL_PF5_C1O 0x00200000 // C1O on PF5
#define GPIO_PCTL_PF5_EPI0S15 0x00800000 // EPI0S15 on PF5
#define GPIO_PCTL_PF5_SSI1TX 0x00900000 // SSI1TX on PF5
#define GPIO_PCTL_PF6_M 0x0F000000 // PF6 mask
#define GPIO_PCTL_PF6_CCP1 0x01000000 // CCP1 on PF6
#define GPIO_PCTL_PF6_C2O 0x02000000 // C2O on PF6
#define GPIO_PCTL_PF6_PHA0 0x04000000 // PHA0 on PF6
#define GPIO_PCTL_PF6_I2S0TXMCLK \
0x09000000 // I2S0TXMCLK on PF6
#define GPIO_PCTL_PF6_U1RTS 0x0A000000 // U1RTS on PF6
#define GPIO_PCTL_PF7_M 0xF0000000 // PF7 mask
#define GPIO_PCTL_PF7_CCP4 0x10000000 // CCP4 on PF7
#define GPIO_PCTL_PF7_PHB0 0x40000000 // PHB0 on PF7
#define GPIO_PCTL_PF7_EPI0S12 0x80000000 // EPI0S12 on PF7
#define GPIO_PCTL_PF7_FAULT1 0x90000000 // FAULT1 on PF7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port G.
//
//*****************************************************************************
#define GPIO_PCTL_PG0_M 0x0000000F // PG0 mask
#define GPIO_PCTL_PG0_U2RX 0x00000001 // U2RX on PG0
#define GPIO_PCTL_PG0_PWM0 0x00000002 // PWM0 on PG0
#define GPIO_PCTL_PG0_I2C1SCL 0x00000003 // I2C1SCL on PG0
#define GPIO_PCTL_PG0_PWM4 0x00000004 // PWM4 on PG0
#define GPIO_PCTL_PG0_USB0EPEN 0x00000007 // USB0EPEN on PG0
#define GPIO_PCTL_PG0_EPI0S13 0x00000008 // EPI0S13 on PG0
#define GPIO_PCTL_PG1_M 0x000000F0 // PG1 mask
#define GPIO_PCTL_PG1_U2TX 0x00000010 // U2TX on PG1
#define GPIO_PCTL_PG1_PWM1 0x00000020 // PWM1 on PG1
#define GPIO_PCTL_PG1_I2C1SDA 0x00000030 // I2C1SDA on PG1
#define GPIO_PCTL_PG1_PWM5 0x00000040 // PWM5 on PG1
#define GPIO_PCTL_PG1_EPI0S14 0x00000080 // EPI0S14 on PG1
#define GPIO_PCTL_PG2_M 0x00000F00 // PG2 mask
#define GPIO_PCTL_PG2_PWM0 0x00000100 // PWM0 on PG2
#define GPIO_PCTL_PG2_FAULT0 0x00000400 // FAULT0 on PG2
#define GPIO_PCTL_PG2_IDX1 0x00000800 // IDX1 on PG2
#define GPIO_PCTL_PG2_I2S0RXSD 0x00000900 // I2S0RXSD on PG2
#define GPIO_PCTL_PG3_M 0x0000F000 // PG3 mask
#define GPIO_PCTL_PG3_PWM1 0x00001000 // PWM1 on PG3
#define GPIO_PCTL_PG3_FAULT2 0x00004000 // FAULT2 on PG3
#define GPIO_PCTL_PG3_FAULT0 0x00008000 // FAULT0 on PG3
#define GPIO_PCTL_PG3_I2S0RXMCLK \
0x00009000 // I2S0RXMCLK on PG3
#define GPIO_PCTL_PG4_M 0x000F0000 // PG4 mask
#define GPIO_PCTL_PG4_CCP3 0x00010000 // CCP3 on PG4
#define GPIO_PCTL_PG4_FAULT1 0x00040000 // FAULT1 on PG4
#define GPIO_PCTL_PG4_EPI0S15 0x00080000 // EPI0S15 on PG4
#define GPIO_PCTL_PG4_PWM6 0x00090000 // PWM6 on PG4
#define GPIO_PCTL_PG4_U1RI 0x000A0000 // U1RI on PG4
#define GPIO_PCTL_PG5_M 0x00F00000 // PG5 mask
#define GPIO_PCTL_PG5_CCP5 0x00100000 // CCP5 on PG5
#define GPIO_PCTL_PG5_IDX0 0x00400000 // IDX0 on PG5
#define GPIO_PCTL_PG5_FAULT1 0x00500000 // FAULT1 on PG5
#define GPIO_PCTL_PG5_PWM7 0x00800000 // PWM7 on PG5
#define GPIO_PCTL_PG5_I2S0RXSCK 0x00900000 // I2S0RXSCK on PG5
#define GPIO_PCTL_PG5_U1DTR 0x00A00000 // U1DTR on PG5
#define GPIO_PCTL_PG6_M 0x0F000000 // PG6 mask
#define GPIO_PCTL_PG6_PHA1 0x01000000 // PHA1 on PG6
#define GPIO_PCTL_PG6_PWM6 0x04000000 // PWM6 on PG6
#define GPIO_PCTL_PG6_FAULT1 0x08000000 // FAULT1 on PG6
#define GPIO_PCTL_PG6_I2S0RXWS 0x09000000 // I2S0RXWS on PG6
#define GPIO_PCTL_PG6_U1RI 0x0A000000 // U1RI on PG6
#define GPIO_PCTL_PG7_M 0xF0000000 // PG7 mask
#define GPIO_PCTL_PG7_PHB1 0x10000000 // PHB1 on PG7
#define GPIO_PCTL_PG7_PWM7 0x40000000 // PWM7 on PG7
#define GPIO_PCTL_PG7_CCP5 0x80000000 // CCP5 on PG7
#define GPIO_PCTL_PG7_EPI0S31 0x90000000 // EPI0S31 on PG7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port H.
//
//*****************************************************************************
#define GPIO_PCTL_PH0_M 0x0000000F // PH0 mask
#define GPIO_PCTL_PH0_CCP6 0x00000001 // CCP6 on PH0
#define GPIO_PCTL_PH0_PWM2 0x00000002 // PWM2 on PH0
#define GPIO_PCTL_PH0_EPI0S6 0x00000008 // EPI0S6 on PH0
#define GPIO_PCTL_PH0_PWM4 0x00000009 // PWM4 on PH0
#define GPIO_PCTL_PH1_M 0x000000F0 // PH1 mask
#define GPIO_PCTL_PH1_CCP7 0x00000010 // CCP7 on PH1
#define GPIO_PCTL_PH1_PWM3 0x00000020 // PWM3 on PH1
#define GPIO_PCTL_PH1_EPI0S7 0x00000080 // EPI0S7 on PH1
#define GPIO_PCTL_PH1_PWM5 0x00000090 // PWM5 on PH1
#define GPIO_PCTL_PH2_M 0x00000F00 // PH2 mask
#define GPIO_PCTL_PH2_IDX1 0x00000100 // IDX1 on PH2
#define GPIO_PCTL_PH2_C1O 0x00000200 // C1O on PH2
#define GPIO_PCTL_PH2_FAULT3 0x00000400 // FAULT3 on PH2
#define GPIO_PCTL_PH2_EPI0S1 0x00000800 // EPI0S1 on PH2
#define GPIO_PCTL_PH3_M 0x0000F000 // PH3 mask
#define GPIO_PCTL_PH3_PHB0 0x00001000 // PHB0 on PH3
#define GPIO_PCTL_PH3_FAULT0 0x00002000 // FAULT0 on PH3
#define GPIO_PCTL_PH3_USB0EPEN 0x00004000 // USB0EPEN on PH3
#define GPIO_PCTL_PH3_EPI0S0 0x00008000 // EPI0S0 on PH3
#define GPIO_PCTL_PH4_M 0x000F0000 // PH4 mask
#define GPIO_PCTL_PH4_USB0PFLT 0x00040000 // USB0PFLT on PH4
#define GPIO_PCTL_PH4_EPI0S10 0x00080000 // EPI0S10 on PH4
#define GPIO_PCTL_PH4_SSI1CLK 0x000B0000 // SSI1CLK on PH4
#define GPIO_PCTL_PH5_M 0x00F00000 // PH5 mask
#define GPIO_PCTL_PH5_EPI0S11 0x00800000 // EPI0S11 on PH5
#define GPIO_PCTL_PH5_FAULT2 0x00A00000 // FAULT2 on PH5
#define GPIO_PCTL_PH5_SSI1FSS 0x00B00000 // SSI1FSS on PH5
#define GPIO_PCTL_PH6_M 0x0F000000 // PH6 mask
#define GPIO_PCTL_PH6_EPI0S26 0x08000000 // EPI0S26 on PH6
#define GPIO_PCTL_PH6_PWM4 0x0A000000 // PWM4 on PH6
#define GPIO_PCTL_PH6_SSI1RX 0x0B000000 // SSI1RX on PH6
#define GPIO_PCTL_PH7_M 0xF0000000 // PH7 mask
#define GPIO_PCTL_PH7_EPI0S27 0x80000000 // EPI0S27 on PH7
#define GPIO_PCTL_PH7_PWM5 0xA0000000 // PWM5 on PH7
#define GPIO_PCTL_PH7_SSI1TX 0xB0000000 // SSI1TX on PH7
//*****************************************************************************
//
// The following are defines for the bit fields in the GPIO_PCTL register for
// port J.
//
//*****************************************************************************
#define GPIO_PCTL_PJ0_M 0x0000000F // PJ0 mask
#define GPIO_PCTL_PJ0_EPI0S16 0x00000008 // EPI0S16 on PJ0
#define GPIO_PCTL_PJ0_PWM0 0x0000000A // PWM0 on PJ0
#define GPIO_PCTL_PJ0_I2C1SCL 0x0000000B // I2C1SCL on PJ0
#define GPIO_PCTL_PJ1_M 0x000000F0 // PJ1 mask
#define GPIO_PCTL_PJ1_EPI0S17 0x00000080 // EPI0S17 on PJ1
#define GPIO_PCTL_PJ1_USB0PFLT 0x00000090 // USB0PFLT on PJ1
#define GPIO_PCTL_PJ1_PWM1 0x000000A0 // PWM1 on PJ1
#define GPIO_PCTL_PJ1_I2C1SDA 0x000000B0 // I2C1SDA on PJ1
#define GPIO_PCTL_PJ2_M 0x00000F00 // PJ2 mask
#define GPIO_PCTL_PJ2_EPI0S18 0x00000800 // EPI0S18 on PJ2
#define GPIO_PCTL_PJ2_CCP0 0x00000900 // CCP0 on PJ2
#define GPIO_PCTL_PJ2_FAULT0 0x00000A00 // FAULT0 on PJ2
#define GPIO_PCTL_PJ3_M 0x0000F000 // PJ3 mask
#define GPIO_PCTL_PJ3_EPI0S19 0x00008000 // EPI0S19 on PJ3
#define GPIO_PCTL_PJ3_U1CTS 0x00009000 // U1CTS on PJ3
#define GPIO_PCTL_PJ3_CCP6 0x0000A000 // CCP6 on PJ3
#define GPIO_PCTL_PJ4_M 0x000F0000 // PJ4 mask
#define GPIO_PCTL_PJ4_EPI0S28 0x00080000 // EPI0S28 on PJ4
#define GPIO_PCTL_PJ4_U1DCD 0x00090000 // U1DCD on PJ4
#define GPIO_PCTL_PJ4_CCP4 0x000A0000 // CCP4 on PJ4
#define GPIO_PCTL_PJ5_M 0x00F00000 // PJ5 mask
#define GPIO_PCTL_PJ5_EPI0S29 0x00800000 // EPI0S29 on PJ5
#define GPIO_PCTL_PJ5_U1DSR 0x00900000 // U1DSR on PJ5
#define GPIO_PCTL_PJ5_CCP2 0x00A00000 // CCP2 on PJ5
#define GPIO_PCTL_PJ6_M 0x0F000000 // PJ6 mask
#define GPIO_PCTL_PJ6_EPI0S30 0x08000000 // EPI0S30 on PJ6
#define GPIO_PCTL_PJ6_U1RTS 0x09000000 // U1RTS on PJ6
#define GPIO_PCTL_PJ6_CCP1 0x0A000000 // CCP1 on PJ6
#define GPIO_PCTL_PJ7_M 0xF0000000 // PJ7 mask
#define GPIO_PCTL_PJ7_U1DTR 0x90000000 // U1DTR on PJ7
#define GPIO_PCTL_PJ7_CCP0 0xA0000000 // CCP0 on PJ7
#define GPIO_SI_SUM 0x00000001 // Summary Interrupt
//*****************************************************************************
//

114
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@ -2,23 +2,38 @@
//
// hw_ints.h - Macros that define the interrupt assignment on Stellaris.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -54,10 +69,10 @@
#define INT_UART1 22 // UART1 Rx and Tx
#define INT_SSI0 23 // SSI0 Rx and Tx
#define INT_I2C0 24 // I2C0 Master and Slave
#define INT_PWM_FAULT 25 // PWM Fault
#define INT_PWM0 26 // PWM Generator 0
#define INT_PWM1 27 // PWM Generator 1
#define INT_PWM2 28 // PWM Generator 2
#define INT_PWM0_FAULT 25 // PWM0 Fault
#define INT_PWM0_0 26 // PWM0 Generator 0
#define INT_PWM0_1 27 // PWM0 Generator 1
#define INT_PWM0_2 28 // PWM0 Generator 2
#define INT_QEI0 29 // Quadrature Encoder 0
#define INT_ADC0SS0 30 // ADC0 Sequence 0
#define INT_ADC0SS1 31 // ADC0 Sequence 1
@ -90,7 +105,7 @@
#define INT_ETH 58 // Ethernet
#define INT_HIBERNATE 59 // Hibernation module
#define INT_USB0 60 // USB 0 Controller
#define INT_PWM3 61 // PWM Generator 3
#define INT_PWM0_3 61 // PWM0 Generator 3
#define INT_UDMA 62 // uDMA controller
#define INT_UDMAERR 63 // uDMA Error
#define INT_ADC1SS0 64 // ADC1 Sequence 0
@ -100,13 +115,69 @@
#define INT_I2S0 68 // I2S0
#define INT_EPI0 69 // EPI0
#define INT_GPIOJ 70 // GPIO Port J
#define INT_GPIOK 71 // GPIO Port K
#define INT_GPIOL 72 // GPIO Port L
#define INT_SSI2 73 // SSI2
#define INT_SSI3 74 // SSI3
#define INT_UART3 75 // UART3
#define INT_UART4 76 // UART4
#define INT_UART5 77 // UART5
#define INT_UART6 78 // UART6
#define INT_UART7 79 // UART7
#define INT_I2C2 84 // I2C2
#define INT_I2C3 85 // I2C3
#define INT_TIMER4A 86 // Timer 4A
#define INT_TIMER4B 87 // Timer 4B
#define INT_TIMER5A 108 // Timer 5A
#define INT_TIMER5B 109 // Timer 5B
#define INT_WTIMER0A 110 // Wide Timer 0A
#define INT_WTIMER0B 111 // Wide Timer 0B
#define INT_WTIMER1A 112 // Wide Timer 1A
#define INT_WTIMER1B 113 // Wide Timer 1B
#define INT_WTIMER2A 114 // Wide Timer 2A
#define INT_WTIMER2B 115 // Wide Timer 2B
#define INT_WTIMER3A 116 // Wide Timer 3A
#define INT_WTIMER3B 117 // Wide Timer 3B
#define INT_WTIMER4A 118 // Wide Timer 4A
#define INT_WTIMER4B 119 // Wide Timer 4B
#define INT_WTIMER5A 120 // Wide Timer 5A
#define INT_WTIMER5B 121 // Wide Timer 5B
#define INT_SYSEXC 122 // System Exception (imprecise)
#define INT_PECI0 123 // PECI 0
#define INT_LPC0 124 // LPC 0
#define INT_I2C4 125 // I2C4
#define INT_I2C5 126 // I2C5
#define INT_GPIOM 127 // GPIO Port M
#define INT_GPION 128 // GPIO Port N
#define INT_FAN0 130 // FAN 0
#define INT_GPIOP0 132 // GPIO Port P (Summary or P0)
#define INT_GPIOP1 133 // GPIO Port P1
#define INT_GPIOP2 134 // GPIO Port P2
#define INT_GPIOP3 135 // GPIO Port P3
#define INT_GPIOP4 136 // GPIO Port P4
#define INT_GPIOP5 137 // GPIO Port P5
#define INT_GPIOP6 138 // GPIO Port P6
#define INT_GPIOP7 139 // GPIO Port P7
#define INT_GPIOQ0 140 // GPIO Port Q (Summary or Q0)
#define INT_GPIOQ1 141 // GPIO Port Q1
#define INT_GPIOQ2 142 // GPIO Port Q2
#define INT_GPIOQ3 143 // GPIO Port Q3
#define INT_GPIOQ4 144 // GPIO Port Q4
#define INT_GPIOQ5 145 // GPIO Port Q5
#define INT_GPIOQ6 146 // GPIO Port Q6
#define INT_GPIOQ7 147 // GPIO Port Q7
#define INT_PWM1_0 150 // PWM1 Generator 0
#define INT_PWM1_1 151 // PWM1 Generator 1
#define INT_PWM1_2 152 // PWM1 Generator 2
#define INT_PWM1_3 153 // PWM1 Generator 3
#define INT_PWM1_FAULT 154 // PWM1 Fault
//*****************************************************************************
//
// The following are defines for the total number of interrupts.
//
//*****************************************************************************
#define NUM_INTERRUPTS 71
#define NUM_INTERRUPTS 155
//*****************************************************************************
//
@ -130,11 +201,16 @@
//*****************************************************************************
#define INT_SSI 23 // SSI Rx and Tx
#define INT_I2C 24 // I2C Master and Slave
#define INT_PWM_FAULT 25 // PWM Fault
#define INT_PWM0 26 // PWM Generator 0
#define INT_PWM1 27 // PWM Generator 1
#define INT_PWM2 28 // PWM Generator 2
#define INT_QEI 29 // Quadrature Encoder
#define INT_ADC0 30 // ADC Sequence 0
#define INT_ADC1 31 // ADC Sequence 1
#define INT_ADC2 32 // ADC Sequence 2
#define INT_ADC3 33 // ADC Sequence 3
#define INT_PWM3 61 // PWM Generator 3
#endif

80
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@ -2,23 +2,38 @@
//
// hw_memmap.h - Macros defining the memory map of Stellaris.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -41,24 +56,40 @@
#define GPIO_PORTD_BASE 0x40007000 // GPIO Port D
#define SSI0_BASE 0x40008000 // SSI0
#define SSI1_BASE 0x40009000 // SSI1
#define SSI2_BASE 0x4000A000 // SSI2
#define SSI3_BASE 0x4000B000 // SSI3
#define UART0_BASE 0x4000C000 // UART0
#define UART1_BASE 0x4000D000 // UART1
#define UART2_BASE 0x4000E000 // UART2
#define UART3_BASE 0x4000F000 // UART3
#define UART4_BASE 0x40010000 // UART4
#define UART5_BASE 0x40011000 // UART5
#define UART6_BASE 0x40012000 // UART6
#define UART7_BASE 0x40013000 // UART7
#define I2C0_MASTER_BASE 0x40020000 // I2C0 Master
#define I2C0_SLAVE_BASE 0x40020800 // I2C0 Slave
#define I2C1_MASTER_BASE 0x40021000 // I2C1 Master
#define I2C1_SLAVE_BASE 0x40021800 // I2C1 Slave
#define I2C2_MASTER_BASE 0x40022000 // I2C2 Master
#define I2C2_SLAVE_BASE 0x40022800 // I2C2 Slave
#define I2C3_MASTER_BASE 0x40023000 // I2C3 Master
#define I2C3_SLAVE_BASE 0x40023800 // I2C3 Slave
#define GPIO_PORTE_BASE 0x40024000 // GPIO Port E
#define GPIO_PORTF_BASE 0x40025000 // GPIO Port F
#define GPIO_PORTG_BASE 0x40026000 // GPIO Port G
#define GPIO_PORTH_BASE 0x40027000 // GPIO Port H
#define PWM_BASE 0x40028000 // PWM
#define PWM0_BASE 0x40028000 // Pulse Width Modulator (PWM)
#define PWM1_BASE 0x40029000 // Pulse Width Modulator (PWM)
#define QEI0_BASE 0x4002C000 // QEI0
#define QEI1_BASE 0x4002D000 // QEI1
#define TIMER0_BASE 0x40030000 // Timer0
#define TIMER1_BASE 0x40031000 // Timer1
#define TIMER2_BASE 0x40032000 // Timer2
#define TIMER3_BASE 0x40033000 // Timer3
#define TIMER4_BASE 0x40034000 // Timer4
#define TIMER5_BASE 0x40035000 // Timer5
#define WTIMER0_BASE 0x40036000 // Wide Timer0
#define WTIMER1_BASE 0x40037000 // Wide Timer1
#define ADC0_BASE 0x40038000 // ADC0
#define ADC1_BASE 0x40039000 // ADC1
#define COMP_BASE 0x4003C000 // Analog comparators
@ -68,6 +99,10 @@
#define CAN2_BASE 0x40042000 // CAN2
#define ETH_BASE 0x40048000 // Ethernet
#define MAC_BASE 0x40048000 // Ethernet
#define WTIMER2_BASE 0x4004C000 // Wide Timer2
#define WTIMER3_BASE 0x4004D000 // Wide Timer3
#define WTIMER4_BASE 0x4004E000 // Wide Timer4
#define WTIMER5_BASE 0x4004F000 // Wide Timer5
#define USB0_BASE 0x40050000 // USB 0 Controller
#define I2S0_BASE 0x40054000 // I2S0
#define GPIO_PORTA_AHB_BASE 0x40058000 // GPIO Port A (high speed)
@ -79,7 +114,23 @@
#define GPIO_PORTG_AHB_BASE 0x4005E000 // GPIO Port G (high speed)
#define GPIO_PORTH_AHB_BASE 0x4005F000 // GPIO Port H (high speed)
#define GPIO_PORTJ_AHB_BASE 0x40060000 // GPIO Port J (high speed)
#define GPIO_PORTK_BASE 0x40061000 // GPIO Port K
#define GPIO_PORTL_BASE 0x40062000 // GPIO Port L
#define GPIO_PORTM_BASE 0x40063000 // GPIO Port M
#define GPIO_PORTN_BASE 0x40064000 // GPIO Port N
#define GPIO_PORTP_BASE 0x40065000 // GPIO Port P
#define GPIO_PORTQ_BASE 0x40066000 // GPIO Port Q
#define LPC0_BASE 0x40080000 // Low Pin Count Interface (LPC)
#define FAN0_BASE 0x40084000 // Fan Control (FAN)
#define EEPROM_BASE 0x400AF000 // EEPROM memory
#define PECI0_BASE 0x400B0000 // Platform Environment Control
// Interface (PECI)
#define I2C4_MASTER_BASE 0x400C0000 // I2C4 Master
#define I2C4_SLAVE_BASE 0x400C0800 // I2C4 Slave
#define I2C5_MASTER_BASE 0x400C1000 // I2C5 Master
#define I2C5_SLAVE_BASE 0x400C1800 // I2C5 Slave
#define EPI0_BASE 0x400D0000 // EPI0
#define SYSEXC_BASE 0x400F9000 // System Exception Module
#define HIB_BASE 0x400FC000 // Hibernation Module
#define FLASH_CTRL_BASE 0x400FD000 // FLASH Controller
#define SYSCTL_BASE 0x400FE000 // System Control
@ -107,6 +158,7 @@
#define SSI_BASE 0x40008000 // SSI
#define I2C_MASTER_BASE 0x40020000 // I2C Master
#define I2C_SLAVE_BASE 0x40020800 // I2C Slave
#define PWM_BASE 0x40028000 // PWM
#define QEI_BASE 0x4002C000 // QEI
#define ADC_BASE 0x40038000 // ADC

576
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@ -2,23 +2,38 @@
//
// hw_nvic.h - Macros used when accessing the NVIC hardware.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -39,14 +54,29 @@
#define NVIC_ST_CAL 0xE000E01C // SysTick Calibration Value Reg
#define NVIC_EN0 0xE000E100 // Interrupt 0-31 Set Enable
#define NVIC_EN1 0xE000E104 // Interrupt 32-54 Set Enable
#define NVIC_EN2 0xE000E108 // Interrupt 64-95 Set Enable
#define NVIC_EN3 0xE000E10C // Interrupt 96-127 Set Enable
#define NVIC_EN4 0xE000E110 // Interrupt 128-131 Set Enable
#define NVIC_DIS0 0xE000E180 // Interrupt 0-31 Clear Enable
#define NVIC_DIS1 0xE000E184 // Interrupt 32-54 Clear Enable
#define NVIC_DIS2 0xE000E188 // Interrupt 64-95 Clear Enable
#define NVIC_DIS3 0xE000E18C // Interrupt 96-127 Clear Enable
#define NVIC_DIS4 0xE000E190 // Interrupt 128-131 Clear Enable
#define NVIC_PEND0 0xE000E200 // Interrupt 0-31 Set Pending
#define NVIC_PEND1 0xE000E204 // Interrupt 32-54 Set Pending
#define NVIC_PEND2 0xE000E208 // Interrupt 64-95 Set Pending
#define NVIC_PEND3 0xE000E20C // Interrupt 96-127 Set Pending
#define NVIC_PEND4 0xE000E210 // Interrupt 128-131 Set Pending
#define NVIC_UNPEND0 0xE000E280 // Interrupt 0-31 Clear Pending
#define NVIC_UNPEND1 0xE000E284 // Interrupt 32-54 Clear Pending
#define NVIC_UNPEND2 0xE000E288 // Interrupt 64-95 Clear Pending
#define NVIC_UNPEND3 0xE000E28C // Interrupt 96-127 Clear Pending
#define NVIC_UNPEND4 0xE000E290 // Interrupt 128-131 Clear Pending
#define NVIC_ACTIVE0 0xE000E300 // Interrupt 0-31 Active Bit
#define NVIC_ACTIVE1 0xE000E304 // Interrupt 32-54 Active Bit
#define NVIC_ACTIVE2 0xE000E308 // Interrupt 64-95 Active Bit
#define NVIC_ACTIVE3 0xE000E30C // Interrupt 96-127 Active Bit
#define NVIC_ACTIVE4 0xE000E310 // Interrupt 128-131 Active Bit
#define NVIC_PRI0 0xE000E400 // Interrupt 0-3 Priority
#define NVIC_PRI1 0xE000E404 // Interrupt 4-7 Priority
#define NVIC_PRI2 0xE000E408 // Interrupt 8-11 Priority
@ -60,7 +90,28 @@
#define NVIC_PRI10 0xE000E428 // Interrupt 40-43 Priority
#define NVIC_PRI11 0xE000E42C // Interrupt 44-47 Priority
#define NVIC_PRI12 0xE000E430 // Interrupt 48-51 Priority
#define NVIC_PRI13 0xE000E434 // Interrupt 52-53 Priority
#define NVIC_PRI13 0xE000E434 // Interrupt 52-55 Priority
#define NVIC_PRI14 0xE000E438 // Interrupt 56-59 Priority
#define NVIC_PRI15 0xE000E43C // Interrupt 60-63 Priority
#define NVIC_PRI16 0xE000E440 // Interrupt 64-67 Priority
#define NVIC_PRI17 0xE000E444 // Interrupt 68-71 Priority
#define NVIC_PRI18 0xE000E448 // Interrupt 72-75 Priority
#define NVIC_PRI19 0xE000E44C // Interrupt 76-79 Priority
#define NVIC_PRI20 0xE000E450 // Interrupt 80-83 Priority
#define NVIC_PRI21 0xE000E454 // Interrupt 84-87 Priority
#define NVIC_PRI22 0xE000E458 // Interrupt 88-91 Priority
#define NVIC_PRI23 0xE000E45C // Interrupt 92-95 Priority
#define NVIC_PRI24 0xE000E460 // Interrupt 96-99 Priority
#define NVIC_PRI25 0xE000E464 // Interrupt 100-103 Priority
#define NVIC_PRI26 0xE000E468 // Interrupt 104-107 Priority
#define NVIC_PRI27 0xE000E46C // Interrupt 108-111 Priority
#define NVIC_PRI28 0xE000E470 // Interrupt 112-115 Priority
#define NVIC_PRI29 0xE000E474 // Interrupt 116-119 Priority
#define NVIC_PRI30 0xE000E478 // Interrupt 120-123 Priority
#define NVIC_PRI31 0xE000E47C // Interrupt 124-127 Priority
#define NVIC_PRI32 0xE000E480 // Interrupt 128-131 Priority
#define NVIC_PRI33 0xE000E484 // Interrupt 132-135 Priority
#define NVIC_PRI34 0xE000E488 // Interrupt 136-138 Priority
#define NVIC_CPUID 0xE000ED00 // CPU ID Base
#define NVIC_INT_CTRL 0xE000ED04 // Interrupt Control and State
#define NVIC_VTABLE 0xE000ED08 // Vector Table Offset
@ -77,6 +128,7 @@
#define NVIC_DEBUG_STAT 0xE000ED30 // Debug Status Register
#define NVIC_MM_ADDR 0xE000ED34 // Memory Management Fault Address
#define NVIC_FAULT_ADDR 0xE000ED38 // Bus Fault Address
#define NVIC_CPAC 0xE000ED88 // Coprocessor Access Control
#define NVIC_MPU_TYPE 0xE000ED90 // MPU Type
#define NVIC_MPU_CTRL 0xE000ED94 // MPU Control
#define NVIC_MPU_NUMBER 0xE000ED98 // MPU Region Number
@ -96,6 +148,10 @@
#define NVIC_DBG_DATA 0xE000EDF8 // Debug Core Register Data
#define NVIC_DBG_INT 0xE000EDFC // Debug Reset Interrupt Control
#define NVIC_SW_TRIG 0xE000EF00 // Software Trigger Interrupt
#define NVIC_FPCC 0xE000EF34 // Floating-Point Context Control
#define NVIC_FPCA 0xE000EF38 // Floating-Point Context Address
#define NVIC_FPDSC 0xE000EF3C // Floating-Point Default Status
// Control
//*****************************************************************************
//
@ -110,6 +166,9 @@
// The following are defines for the bit fields in the NVIC_ACTLR register.
//
//*****************************************************************************
#define NVIC_ACTLR_DISOOFP 0x00000200 // Disable Out-Of-Order Floating
// Point
#define NVIC_ACTLR_DISFPCA 0x00000100 // Disable CONTROL
#define NVIC_ACTLR_DISFOLD 0x00000004 // Disable IT Folding
#define NVIC_ACTLR_DISWBUF 0x00000002 // Disable Write Buffer
#define NVIC_ACTLR_DISMCYC 0x00000001 // Disable Interrupts of Multiple
@ -196,7 +255,7 @@
// The following are defines for the bit fields in the NVIC_EN1 register.
//
//*****************************************************************************
#define NVIC_EN1_INT_M 0x007FFFFF // Interrupt Enable
#define NVIC_EN1_INT_M 0xFFFFFFFF // Interrupt Enable
#define NVIC_EN1_INT32 0x00000001 // Interrupt 32 enable
#define NVIC_EN1_INT33 0x00000002 // Interrupt 33 enable
#define NVIC_EN1_INT34 0x00000004 // Interrupt 34 enable
@ -221,6 +280,27 @@
#define NVIC_EN1_INT53 0x00200000 // Interrupt 53 enable
#define NVIC_EN1_INT54 0x00400000 // Interrupt 54 enable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_EN2 register.
//
//*****************************************************************************
#define NVIC_EN2_INT_M 0xFFFFFFFF // Interrupt Enable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_EN3 register.
//
//*****************************************************************************
#define NVIC_EN3_INT_M 0xFFFFFFFF // Interrupt Enable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_EN4 register.
//
//*****************************************************************************
#define NVIC_EN4_INT_M 0x000007FF // Interrupt Enable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_DIS0 register.
@ -265,7 +345,7 @@
// The following are defines for the bit fields in the NVIC_DIS1 register.
//
//*****************************************************************************
#define NVIC_DIS1_INT_M 0x00FFFFFF // Interrupt Disable
#define NVIC_DIS1_INT_M 0xFFFFFFFF // Interrupt Disable
#define NVIC_DIS1_INT32 0x00000001 // Interrupt 32 disable
#define NVIC_DIS1_INT33 0x00000002 // Interrupt 33 disable
#define NVIC_DIS1_INT34 0x00000004 // Interrupt 34 disable
@ -291,6 +371,27 @@
#define NVIC_DIS1_INT54 0x00400000 // Interrupt 54 disable
#define NVIC_DIS1_INT55 0x00800000 // Interrupt 55 disable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_DIS2 register.
//
//*****************************************************************************
#define NVIC_DIS2_INT_M 0xFFFFFFFF // Interrupt Disable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_DIS3 register.
//
//*****************************************************************************
#define NVIC_DIS3_INT_M 0xFFFFFFFF // Interrupt Disable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_DIS4 register.
//
//*****************************************************************************
#define NVIC_DIS4_INT_M 0x000007FF // Interrupt Disable
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PEND0 register.
@ -335,7 +436,7 @@
// The following are defines for the bit fields in the NVIC_PEND1 register.
//
//*****************************************************************************
#define NVIC_PEND1_INT_M 0x00FFFFFF // Interrupt Set Pending
#define NVIC_PEND1_INT_M 0xFFFFFFFF // Interrupt Set Pending
#define NVIC_PEND1_INT32 0x00000001 // Interrupt 32 pend
#define NVIC_PEND1_INT33 0x00000002 // Interrupt 33 pend
#define NVIC_PEND1_INT34 0x00000004 // Interrupt 34 pend
@ -361,6 +462,27 @@
#define NVIC_PEND1_INT54 0x00400000 // Interrupt 54 pend
#define NVIC_PEND1_INT55 0x00800000 // Interrupt 55 pend
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PEND2 register.
//
//*****************************************************************************
#define NVIC_PEND2_INT_M 0xFFFFFFFF // Interrupt Set Pending
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PEND3 register.
//
//*****************************************************************************
#define NVIC_PEND3_INT_M 0xFFFFFFFF // Interrupt Set Pending
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PEND4 register.
//
//*****************************************************************************
#define NVIC_PEND4_INT_M 0x000007FF // Interrupt Set Pending
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_UNPEND0 register.
@ -405,7 +527,7 @@
// The following are defines for the bit fields in the NVIC_UNPEND1 register.
//
//*****************************************************************************
#define NVIC_UNPEND1_INT_M 0x00FFFFFF // Interrupt Clear Pending
#define NVIC_UNPEND1_INT_M 0xFFFFFFFF // Interrupt Clear Pending
#define NVIC_UNPEND1_INT32 0x00000001 // Interrupt 32 unpend
#define NVIC_UNPEND1_INT33 0x00000002 // Interrupt 33 unpend
#define NVIC_UNPEND1_INT34 0x00000004 // Interrupt 34 unpend
@ -431,6 +553,27 @@
#define NVIC_UNPEND1_INT54 0x00400000 // Interrupt 54 unpend
#define NVIC_UNPEND1_INT55 0x00800000 // Interrupt 55 unpend
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_UNPEND2 register.
//
//*****************************************************************************
#define NVIC_UNPEND2_INT_M 0xFFFFFFFF // Interrupt Clear Pending
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_UNPEND3 register.
//
//*****************************************************************************
#define NVIC_UNPEND3_INT_M 0xFFFFFFFF // Interrupt Clear Pending
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_UNPEND4 register.
//
//*****************************************************************************
#define NVIC_UNPEND4_INT_M 0x000007FF // Interrupt Clear Pending
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_ACTIVE0 register.
@ -475,7 +618,7 @@
// The following are defines for the bit fields in the NVIC_ACTIVE1 register.
//
//*****************************************************************************
#define NVIC_ACTIVE1_INT_M 0x00FFFFFF // Interrupt Active
#define NVIC_ACTIVE1_INT_M 0xFFFFFFFF // Interrupt Active
#define NVIC_ACTIVE1_INT32 0x00000001 // Interrupt 32 active
#define NVIC_ACTIVE1_INT33 0x00000002 // Interrupt 33 active
#define NVIC_ACTIVE1_INT34 0x00000004 // Interrupt 34 active
@ -501,6 +644,27 @@
#define NVIC_ACTIVE1_INT54 0x00400000 // Interrupt 54 active
#define NVIC_ACTIVE1_INT55 0x00800000 // Interrupt 55 active
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_ACTIVE2 register.
//
//*****************************************************************************
#define NVIC_ACTIVE2_INT_M 0xFFFFFFFF // Interrupt Active
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_ACTIVE3 register.
//
//*****************************************************************************
#define NVIC_ACTIVE3_INT_M 0xFFFFFFFF // Interrupt Active
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_ACTIVE4 register.
//
//*****************************************************************************
#define NVIC_ACTIVE4_INT_M 0x000007FF // Interrupt Active
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI0 register.
@ -697,6 +861,308 @@
#define NVIC_PRI13_INT53_S 13
#define NVIC_PRI13_INT52_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI14 register.
//
//*****************************************************************************
#define NVIC_PRI14_INTD_M 0xE0000000 // Interrupt 59 Priority Mask
#define NVIC_PRI14_INTC_M 0x00E00000 // Interrupt 58 Priority Mask
#define NVIC_PRI14_INTB_M 0x0000E000 // Interrupt 57 Priority Mask
#define NVIC_PRI14_INTA_M 0x000000E0 // Interrupt 56 Priority Mask
#define NVIC_PRI14_INTD_S 29
#define NVIC_PRI14_INTC_S 21
#define NVIC_PRI14_INTB_S 13
#define NVIC_PRI14_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI15 register.
//
//*****************************************************************************
#define NVIC_PRI15_INTD_M 0xE0000000 // Interrupt 63 Priority Mask
#define NVIC_PRI15_INTC_M 0x00E00000 // Interrupt 62 Priority Mask
#define NVIC_PRI15_INTB_M 0x0000E000 // Interrupt 61 Priority Mask
#define NVIC_PRI15_INTA_M 0x000000E0 // Interrupt 60 Priority Mask
#define NVIC_PRI15_INTD_S 29
#define NVIC_PRI15_INTC_S 21
#define NVIC_PRI15_INTB_S 13
#define NVIC_PRI15_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI16 register.
//
//*****************************************************************************
#define NVIC_PRI16_INTD_M 0xE0000000 // Interrupt 67 Priority Mask
#define NVIC_PRI16_INTC_M 0x00E00000 // Interrupt 66 Priority Mask
#define NVIC_PRI16_INTB_M 0x0000E000 // Interrupt 65 Priority Mask
#define NVIC_PRI16_INTA_M 0x000000E0 // Interrupt 64 Priority Mask
#define NVIC_PRI16_INTD_S 29
#define NVIC_PRI16_INTC_S 21
#define NVIC_PRI16_INTB_S 13
#define NVIC_PRI16_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI17 register.
//
//*****************************************************************************
#define NVIC_PRI17_INTD_M 0xE0000000 // Interrupt 71 Priority Mask
#define NVIC_PRI17_INTC_M 0x00E00000 // Interrupt 70 Priority Mask
#define NVIC_PRI17_INTB_M 0x0000E000 // Interrupt 69 Priority Mask
#define NVIC_PRI17_INTA_M 0x000000E0 // Interrupt 68 Priority Mask
#define NVIC_PRI17_INTD_S 29
#define NVIC_PRI17_INTC_S 21
#define NVIC_PRI17_INTB_S 13
#define NVIC_PRI17_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI18 register.
//
//*****************************************************************************
#define NVIC_PRI18_INTD_M 0xE0000000 // Interrupt 75 Priority Mask
#define NVIC_PRI18_INTC_M 0x00E00000 // Interrupt 74 Priority Mask
#define NVIC_PRI18_INTB_M 0x0000E000 // Interrupt 73 Priority Mask
#define NVIC_PRI18_INTA_M 0x000000E0 // Interrupt 72 Priority Mask
#define NVIC_PRI18_INTD_S 29
#define NVIC_PRI18_INTC_S 21
#define NVIC_PRI18_INTB_S 13
#define NVIC_PRI18_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI19 register.
//
//*****************************************************************************
#define NVIC_PRI19_INTD_M 0xE0000000 // Interrupt 79 Priority Mask
#define NVIC_PRI19_INTC_M 0x00E00000 // Interrupt 78 Priority Mask
#define NVIC_PRI19_INTB_M 0x0000E000 // Interrupt 77 Priority Mask
#define NVIC_PRI19_INTA_M 0x000000E0 // Interrupt 76 Priority Mask
#define NVIC_PRI19_INTD_S 29
#define NVIC_PRI19_INTC_S 21
#define NVIC_PRI19_INTB_S 13
#define NVIC_PRI19_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI20 register.
//
//*****************************************************************************
#define NVIC_PRI20_INTD_M 0xE0000000 // Interrupt 83 Priority Mask
#define NVIC_PRI20_INTC_M 0x00E00000 // Interrupt 82 Priority Mask
#define NVIC_PRI20_INTB_M 0x0000E000 // Interrupt 81 Priority Mask
#define NVIC_PRI20_INTA_M 0x000000E0 // Interrupt 80 Priority Mask
#define NVIC_PRI20_INTD_S 29
#define NVIC_PRI20_INTC_S 21
#define NVIC_PRI20_INTB_S 13
#define NVIC_PRI20_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI21 register.
//
//*****************************************************************************
#define NVIC_PRI21_INTD_M 0xE0000000 // Interrupt 87 Priority Mask
#define NVIC_PRI21_INTC_M 0x00E00000 // Interrupt 86 Priority Mask
#define NVIC_PRI21_INTB_M 0x0000E000 // Interrupt 85 Priority Mask
#define NVIC_PRI21_INTA_M 0x000000E0 // Interrupt 84 Priority Mask
#define NVIC_PRI21_INTD_S 29
#define NVIC_PRI21_INTC_S 21
#define NVIC_PRI21_INTB_S 13
#define NVIC_PRI21_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI22 register.
//
//*****************************************************************************
#define NVIC_PRI22_INTD_M 0xE0000000 // Interrupt 91 Priority Mask
#define NVIC_PRI22_INTC_M 0x00E00000 // Interrupt 90 Priority Mask
#define NVIC_PRI22_INTB_M 0x0000E000 // Interrupt 89 Priority Mask
#define NVIC_PRI22_INTA_M 0x000000E0 // Interrupt 88 Priority Mask
#define NVIC_PRI22_INTD_S 29
#define NVIC_PRI22_INTC_S 21
#define NVIC_PRI22_INTB_S 13
#define NVIC_PRI22_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI23 register.
//
//*****************************************************************************
#define NVIC_PRI23_INTD_M 0xE0000000 // Interrupt 95 Priority Mask
#define NVIC_PRI23_INTC_M 0x00E00000 // Interrupt 94 Priority Mask
#define NVIC_PRI23_INTB_M 0x0000E000 // Interrupt 93 Priority Mask
#define NVIC_PRI23_INTA_M 0x000000E0 // Interrupt 92 Priority Mask
#define NVIC_PRI23_INTD_S 29
#define NVIC_PRI23_INTC_S 21
#define NVIC_PRI23_INTB_S 13
#define NVIC_PRI23_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI24 register.
//
//*****************************************************************************
#define NVIC_PRI24_INTD_M 0xE0000000 // Interrupt 99 Priority Mask
#define NVIC_PRI24_INTC_M 0x00E00000 // Interrupt 98 Priority Mask
#define NVIC_PRI24_INTB_M 0x0000E000 // Interrupt 97 Priority Mask
#define NVIC_PRI24_INTA_M 0x000000E0 // Interrupt 96 Priority Mask
#define NVIC_PRI24_INTD_S 29
#define NVIC_PRI24_INTC_S 21
#define NVIC_PRI24_INTB_S 13
#define NVIC_PRI24_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI25 register.
//
//*****************************************************************************
#define NVIC_PRI25_INTD_M 0xE0000000 // Interrupt 103 Priority Mask
#define NVIC_PRI25_INTC_M 0x00E00000 // Interrupt 102 Priority Mask
#define NVIC_PRI25_INTB_M 0x0000E000 // Interrupt 101 Priority Mask
#define NVIC_PRI25_INTA_M 0x000000E0 // Interrupt 100 Priority Mask
#define NVIC_PRI25_INTD_S 29
#define NVIC_PRI25_INTC_S 21
#define NVIC_PRI25_INTB_S 13
#define NVIC_PRI25_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI26 register.
//
//*****************************************************************************
#define NVIC_PRI26_INTD_M 0xE0000000 // Interrupt 107 Priority Mask
#define NVIC_PRI26_INTC_M 0x00E00000 // Interrupt 106 Priority Mask
#define NVIC_PRI26_INTB_M 0x0000E000 // Interrupt 105 Priority Mask
#define NVIC_PRI26_INTA_M 0x000000E0 // Interrupt 104 Priority Mask
#define NVIC_PRI26_INTD_S 29
#define NVIC_PRI26_INTC_S 21
#define NVIC_PRI26_INTB_S 13
#define NVIC_PRI26_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI27 register.
//
//*****************************************************************************
#define NVIC_PRI27_INTD_M 0xE0000000 // Interrupt 111 Priority Mask
#define NVIC_PRI27_INTC_M 0x00E00000 // Interrupt 110 Priority Mask
#define NVIC_PRI27_INTB_M 0x0000E000 // Interrupt 109 Priority Mask
#define NVIC_PRI27_INTA_M 0x000000E0 // Interrupt 108 Priority Mask
#define NVIC_PRI27_INTD_S 29
#define NVIC_PRI27_INTC_S 21
#define NVIC_PRI27_INTB_S 13
#define NVIC_PRI27_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI28 register.
//
//*****************************************************************************
#define NVIC_PRI28_INTD_M 0xE0000000 // Interrupt 115 Priority Mask
#define NVIC_PRI28_INTC_M 0x00E00000 // Interrupt 114 Priority Mask
#define NVIC_PRI28_INTB_M 0x0000E000 // Interrupt 113 Priority Mask
#define NVIC_PRI28_INTA_M 0x000000E0 // Interrupt 112 Priority Mask
#define NVIC_PRI28_INTD_S 29
#define NVIC_PRI28_INTC_S 21
#define NVIC_PRI28_INTB_S 13
#define NVIC_PRI28_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI29 register.
//
//*****************************************************************************
#define NVIC_PRI29_INTD_M 0xE0000000 // Interrupt 119 Priority Mask
#define NVIC_PRI29_INTC_M 0x00E00000 // Interrupt 118 Priority Mask
#define NVIC_PRI29_INTB_M 0x0000E000 // Interrupt 117 Priority Mask
#define NVIC_PRI29_INTA_M 0x000000E0 // Interrupt 116 Priority Mask
#define NVIC_PRI29_INTD_S 29
#define NVIC_PRI29_INTC_S 21
#define NVIC_PRI29_INTB_S 13
#define NVIC_PRI29_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI30 register.
//
//*****************************************************************************
#define NVIC_PRI30_INTD_M 0xE0000000 // Interrupt 123 Priority Mask
#define NVIC_PRI30_INTC_M 0x00E00000 // Interrupt 122 Priority Mask
#define NVIC_PRI30_INTB_M 0x0000E000 // Interrupt 121 Priority Mask
#define NVIC_PRI30_INTA_M 0x000000E0 // Interrupt 120 Priority Mask
#define NVIC_PRI30_INTD_S 29
#define NVIC_PRI30_INTC_S 21
#define NVIC_PRI30_INTB_S 13
#define NVIC_PRI30_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI31 register.
//
//*****************************************************************************
#define NVIC_PRI31_INTD_M 0xE0000000 // Interrupt 127 Priority Mask
#define NVIC_PRI31_INTC_M 0x00E00000 // Interrupt 126 Priority Mask
#define NVIC_PRI31_INTB_M 0x0000E000 // Interrupt 125 Priority Mask
#define NVIC_PRI31_INTA_M 0x000000E0 // Interrupt 124 Priority Mask
#define NVIC_PRI31_INTD_S 29
#define NVIC_PRI31_INTC_S 21
#define NVIC_PRI31_INTB_S 13
#define NVIC_PRI31_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI32 register.
//
//*****************************************************************************
#define NVIC_PRI32_INTD_M 0xE0000000 // Interrupt 131 Priority Mask
#define NVIC_PRI32_INTC_M 0x00E00000 // Interrupt 130 Priority Mask
#define NVIC_PRI32_INTB_M 0x0000E000 // Interrupt 129 Priority Mask
#define NVIC_PRI32_INTA_M 0x000000E0 // Interrupt 128 Priority Mask
#define NVIC_PRI32_INTD_S 29
#define NVIC_PRI32_INTC_S 21
#define NVIC_PRI32_INTB_S 13
#define NVIC_PRI32_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI33 register.
//
//*****************************************************************************
#define NVIC_PRI33_INTD_M 0xE0000000 // Interrupt Priority for Interrupt
// [4n+3]
#define NVIC_PRI33_INTC_M 0x00E00000 // Interrupt Priority for Interrupt
// [4n+2]
#define NVIC_PRI33_INTB_M 0x0000E000 // Interrupt Priority for Interrupt
// [4n+1]
#define NVIC_PRI33_INTA_M 0x000000E0 // Interrupt Priority for Interrupt
// [4n]
#define NVIC_PRI33_INTD_S 29
#define NVIC_PRI33_INTC_S 21
#define NVIC_PRI33_INTB_S 13
#define NVIC_PRI33_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_PRI34 register.
//
//*****************************************************************************
#define NVIC_PRI34_INTD_M 0xE0000000 // Interrupt Priority for Interrupt
// [4n+3]
#define NVIC_PRI34_INTC_M 0x00E00000 // Interrupt Priority for Interrupt
// [4n+2]
#define NVIC_PRI34_INTB_M 0x0000E000 // Interrupt Priority for Interrupt
// [4n+1]
#define NVIC_PRI34_INTA_M 0x000000E0 // Interrupt Priority for Interrupt
// [4n]
#define NVIC_PRI34_INTD_S 29
#define NVIC_PRI34_INTC_S 21
#define NVIC_PRI34_INTB_S 13
#define NVIC_PRI34_INTA_S 5
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_CPUID register.
@ -708,6 +1174,7 @@
#define NVIC_CPUID_CON_M 0x000F0000 // Constant
#define NVIC_CPUID_PARTNO_M 0x0000FFF0 // Part Number
#define NVIC_CPUID_PARTNO_CM3 0x0000C230 // Cortex-M3 processor
#define NVIC_CPUID_PARTNO_CM4 0x0000C240 // Cortex-M4 processor
#define NVIC_CPUID_REV_M 0x0000000F // Revision Number
//*****************************************************************************
@ -722,7 +1189,7 @@
#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 // SysTick Clear Pending
#define NVIC_INT_CTRL_ISR_PRE 0x00800000 // Debug Interrupt Handling
#define NVIC_INT_CTRL_ISR_PEND 0x00400000 // Interrupt Pending
#define NVIC_INT_CTRL_VEC_PEN_M 0x0007F000 // Interrupt Pending Vector Number
#define NVIC_INT_CTRL_VEC_PEN_M 0x000FF000 // Interrupt Pending Vector Number
#define NVIC_INT_CTRL_VEC_PEN_NMI \
0x00002000 // NMI
#define NVIC_INT_CTRL_VEC_PEN_HARD \
@ -740,7 +1207,7 @@
#define NVIC_INT_CTRL_VEC_PEN_TICK \
0x0000F000 // SysTick
#define NVIC_INT_CTRL_RET_BASE 0x00000800 // Return to Base
#define NVIC_INT_CTRL_VEC_ACT_M 0x0000007F // Interrupt Pending Vector Number
#define NVIC_INT_CTRL_VEC_ACT_M 0x000000FF // Interrupt Pending Vector Number
#define NVIC_INT_CTRL_VEC_PEN_S 12
#define NVIC_INT_CTRL_VEC_ACT_S 0
@ -750,8 +1217,8 @@
//
//*****************************************************************************
#define NVIC_VTABLE_BASE 0x20000000 // Vector Table Base
#define NVIC_VTABLE_OFFSET_M 0x1FFFFE00 // Vector Table Offset
#define NVIC_VTABLE_OFFSET_S 9
#define NVIC_VTABLE_OFFSET_M 0x1FFFFC00 // Vector Table Offset
#define NVIC_VTABLE_OFFSET_S 10
//*****************************************************************************
//
@ -865,6 +1332,8 @@
#define NVIC_FAULT_STAT_UNDEF 0x00010000 // Undefined Instruction Usage
// Fault
#define NVIC_FAULT_STAT_BFARV 0x00008000 // Bus Fault Address Register Valid
#define NVIC_FAULT_STAT_BLSPERR 0x00002000 // Bus Fault on Floating-Point Lazy
// State Preservation
#define NVIC_FAULT_STAT_BSTKE 0x00001000 // Stack Bus Fault
#define NVIC_FAULT_STAT_BUSTKE 0x00000800 // Unstack Bus Fault
#define NVIC_FAULT_STAT_IMPRE 0x00000400 // Imprecise Data Bus Error
@ -872,6 +1341,9 @@
#define NVIC_FAULT_STAT_IBUS 0x00000100 // Instruction Bus Error
#define NVIC_FAULT_STAT_MMARV 0x00000080 // Memory Management Fault Address
// Register Valid
#define NVIC_FAULT_STAT_MLSPERR 0x00000020 // Memory Management Fault on
// Floating-Point Lazy State
// Preservation
#define NVIC_FAULT_STAT_MSTKE 0x00000010 // Stack Access Violation
#define NVIC_FAULT_STAT_MUSTKE 0x00000008 // Unstack Access Violation
#define NVIC_FAULT_STAT_DERR 0x00000002 // Data Access Violation
@ -916,6 +1388,22 @@
#define NVIC_FAULT_ADDR_M 0xFFFFFFFF // Fault Address
#define NVIC_FAULT_ADDR_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_CPAC register.
//
//*****************************************************************************
#define NVIC_CPAC_CP11_M 0x00C00000 // CP11 Coprocessor Access
// Privilege
#define NVIC_CPAC_CP11_DIS 0x00000000 // Access Denied
#define NVIC_CPAC_CP11_PRIV 0x00400000 // Privileged Access Only
#define NVIC_CPAC_CP11_FULL 0x00C00000 // Full Access
#define NVIC_CPAC_CP10_M 0x00300000 // CP10 Coprocessor Access
// Privilege
#define NVIC_CPAC_CP10_DIS 0x00000000 // Access Denied
#define NVIC_CPAC_CP10_PRIV 0x00100000 // Privileged Access Only
#define NVIC_CPAC_CP10_FULL 0x00300000 // Full Access
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_MPU_TYPE register.
@ -1183,7 +1671,47 @@
// The following are defines for the bit fields in the NVIC_SW_TRIG register.
//
//*****************************************************************************
#define NVIC_SW_TRIG_INTID_M 0x0000003F // Interrupt ID
#define NVIC_SW_TRIG_INTID_M 0x000000FF // Interrupt ID
#define NVIC_SW_TRIG_INTID_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_FPCC register.
//
//*****************************************************************************
#define NVIC_FPCC_ASPEN 0x80000000 // Automatic State Preservation
// Enable
#define NVIC_FPCC_LSPEN 0x40000000 // Lazy State Preservation Enable
#define NVIC_FPCC_MONRDY 0x00000100 // Monitor Ready
#define NVIC_FPCC_BFRDY 0x00000040 // Bus Fault Ready
#define NVIC_FPCC_MMRDY 0x00000020 // Memory Management Fault Ready
#define NVIC_FPCC_HFRDY 0x00000010 // Hard Fault Ready
#define NVIC_FPCC_THREAD 0x00000008 // Thread Mode
#define NVIC_FPCC_USER 0x00000002 // User Privilege Level
#define NVIC_FPCC_LSPACT 0x00000001 // Lazy State Preservation Active
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_FPCA register.
//
//*****************************************************************************
#define NVIC_FPCA_ADDRESS_M 0xFFFFFFF8 // Address
#define NVIC_FPCA_ADDRESS_S 3
//*****************************************************************************
//
// The following are defines for the bit fields in the NVIC_FPDSC register.
//
//*****************************************************************************
#define NVIC_FPDSC_AHP 0x04000000 // AHP Bit Default
#define NVIC_FPDSC_DN 0x02000000 // DN Bit Default
#define NVIC_FPDSC_FZ 0x01000000 // FZ Bit Default
#define NVIC_FPDSC_RMODE_M 0x00C00000 // RMODE Bit Default
#define NVIC_FPDSC_RMODE_RN 0x00000000 // Round to Nearest (RN) mode
#define NVIC_FPDSC_RMODE_RP 0x00400000 // Round towards Plus Infinity (RP)
// mode
#define NVIC_FPDSC_RMODE_RM 0x00800000 // Round towards Minus Infinity
// (RM) mode
#define NVIC_FPDSC_RMODE_RZ 0x00C00000 // Round towards Zero (RZ) mode
#endif // __HW_NVIC_H__

244
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@ -0,0 +1,244 @@
//*****************************************************************************
//
// hw_ssi.h - Macros used when accessing the SSI hardware.
//
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
#ifndef __HW_SSI_H__
#define __HW_SSI_H__
//*****************************************************************************
//
// The following are defines for the SSI register offsets.
//
//*****************************************************************************
#define SSI_O_CR0 0x00000000 // SSI Control 0
#define SSI_O_CR1 0x00000004 // SSI Control 1
#define SSI_O_DR 0x00000008 // SSI Data
#define SSI_O_SR 0x0000000C // SSI Status
#define SSI_O_CPSR 0x00000010 // SSI Clock Prescale
#define SSI_O_IM 0x00000014 // SSI Interrupt Mask
#define SSI_O_RIS 0x00000018 // SSI Raw Interrupt Status
#define SSI_O_MIS 0x0000001C // SSI Masked Interrupt Status
#define SSI_O_ICR 0x00000020 // SSI Interrupt Clear
#define SSI_O_DMACTL 0x00000024 // SSI DMA Control
#define SSI_O_CC 0x00000FC8 // SSI Clock Configuration
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_CR0 register.
//
//*****************************************************************************
#define SSI_CR0_SCR_M 0x0000FF00 // SSI Serial Clock Rate
#define SSI_CR0_SPH 0x00000080 // SSI Serial Clock Phase
#define SSI_CR0_SPO 0x00000040 // SSI Serial Clock Polarity
#define SSI_CR0_FRF_M 0x00000030 // SSI Frame Format Select
#define SSI_CR0_FRF_MOTO 0x00000000 // Freescale SPI Frame Format
#define SSI_CR0_FRF_TI 0x00000010 // Texas Instruments Synchronous
// Serial Frame Format
#define SSI_CR0_FRF_NMW 0x00000020 // MICROWIRE Frame Format
#define SSI_CR0_DSS_M 0x0000000F // SSI Data Size Select
#define SSI_CR0_DSS_4 0x00000003 // 4-bit data
#define SSI_CR0_DSS_5 0x00000004 // 5-bit data
#define SSI_CR0_DSS_6 0x00000005 // 6-bit data
#define SSI_CR0_DSS_7 0x00000006 // 7-bit data
#define SSI_CR0_DSS_8 0x00000007 // 8-bit data
#define SSI_CR0_DSS_9 0x00000008 // 9-bit data
#define SSI_CR0_DSS_10 0x00000009 // 10-bit data
#define SSI_CR0_DSS_11 0x0000000A // 11-bit data
#define SSI_CR0_DSS_12 0x0000000B // 12-bit data
#define SSI_CR0_DSS_13 0x0000000C // 13-bit data
#define SSI_CR0_DSS_14 0x0000000D // 14-bit data
#define SSI_CR0_DSS_15 0x0000000E // 15-bit data
#define SSI_CR0_DSS_16 0x0000000F // 16-bit data
#define SSI_CR0_SCR_S 8
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_CR1 register.
//
//*****************************************************************************
#define SSI_CR1_EOT 0x00000010 // End of Transmission
#define SSI_CR1_SOD 0x00000008 // SSI Slave Mode Output Disable
#define SSI_CR1_MS 0x00000004 // SSI Master/Slave Select
#define SSI_CR1_SSE 0x00000002 // SSI Synchronous Serial Port
// Enable
#define SSI_CR1_LBM 0x00000001 // SSI Loopback Mode
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_DR register.
//
//*****************************************************************************
#define SSI_DR_DATA_M 0x0000FFFF // SSI Receive/Transmit Data
#define SSI_DR_DATA_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_SR register.
//
//*****************************************************************************
#define SSI_SR_BSY 0x00000010 // SSI Busy Bit
#define SSI_SR_RFF 0x00000008 // SSI Receive FIFO Full
#define SSI_SR_RNE 0x00000004 // SSI Receive FIFO Not Empty
#define SSI_SR_TNF 0x00000002 // SSI Transmit FIFO Not Full
#define SSI_SR_TFE 0x00000001 // SSI Transmit FIFO Empty
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_CPSR register.
//
//*****************************************************************************
#define SSI_CPSR_CPSDVSR_M 0x000000FF // SSI Clock Prescale Divisor
#define SSI_CPSR_CPSDVSR_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_IM register.
//
//*****************************************************************************
#define SSI_IM_TXIM 0x00000008 // SSI Transmit FIFO Interrupt Mask
#define SSI_IM_RXIM 0x00000004 // SSI Receive FIFO Interrupt Mask
#define SSI_IM_RTIM 0x00000002 // SSI Receive Time-Out Interrupt
// Mask
#define SSI_IM_RORIM 0x00000001 // SSI Receive Overrun Interrupt
// Mask
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_RIS register.
//
//*****************************************************************************
#define SSI_RIS_TXRIS 0x00000008 // SSI Transmit FIFO Raw Interrupt
// Status
#define SSI_RIS_RXRIS 0x00000004 // SSI Receive FIFO Raw Interrupt
// Status
#define SSI_RIS_RTRIS 0x00000002 // SSI Receive Time-Out Raw
// Interrupt Status
#define SSI_RIS_RORRIS 0x00000001 // SSI Receive Overrun Raw
// Interrupt Status
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_MIS register.
//
//*****************************************************************************
#define SSI_MIS_TXMIS 0x00000008 // SSI Transmit FIFO Masked
// Interrupt Status
#define SSI_MIS_RXMIS 0x00000004 // SSI Receive FIFO Masked
// Interrupt Status
#define SSI_MIS_RTMIS 0x00000002 // SSI Receive Time-Out Masked
// Interrupt Status
#define SSI_MIS_RORMIS 0x00000001 // SSI Receive Overrun Masked
// Interrupt Status
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_ICR register.
//
//*****************************************************************************
#define SSI_ICR_RTIC 0x00000002 // SSI Receive Time-Out Interrupt
// Clear
#define SSI_ICR_RORIC 0x00000001 // SSI Receive Overrun Interrupt
// Clear
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_DMACTL register.
//
//*****************************************************************************
#define SSI_DMACTL_TXDMAE 0x00000002 // Transmit DMA Enable
#define SSI_DMACTL_RXDMAE 0x00000001 // Receive DMA Enable
//*****************************************************************************
//
// The following are defines for the bit fields in the SSI_O_CC register.
//
//*****************************************************************************
#define SSI_CC_CS_M 0x0000000F // SSI Baud Clock Source
#define SSI_CC_CS_SYSPLL 0x00000000 // Either the system clock (if the
// PLL bypass is in effect) or the
// PLL output (default)
#define SSI_CC_CS_PIOSC 0x00000005 // PIOSC
//*****************************************************************************
//
// The following definitions are deprecated.
//
//*****************************************************************************
#ifndef DEPRECATED
//*****************************************************************************
//
// The following are deprecated defines for the bit fields in the SSI_O_CR0
// register.
//
//*****************************************************************************
#define SSI_CR0_SCR 0x0000FF00 // Serial clock rate
#define SSI_CR0_FRF_MASK 0x00000030 // Frame format mask
#define SSI_CR0_DSS 0x0000000F // Data size select
//*****************************************************************************
//
// The following are deprecated defines for the bit fields in the SSI_O_CPSR
// register.
//
//*****************************************************************************
#define SSI_CPSR_CPSDVSR_MASK 0x000000FF // Clock prescale
//*****************************************************************************
//
// The following are deprecated defines for the SSI controller's FIFO size.
//
//*****************************************************************************
#define TX_FIFO_SIZE (8) // Number of entries in the TX FIFO
#define RX_FIFO_SIZE (8) // Number of entries in the RX FIFO
//*****************************************************************************
//
// The following are deprecated defines for the bit fields in the interrupt
// mask set and clear, raw interrupt, masked interrupt, and interrupt clear
// registers.
//
//*****************************************************************************
#define SSI_INT_TXFF 0x00000008 // TX FIFO interrupt
#define SSI_INT_RXFF 0x00000004 // RX FIFO interrupt
#define SSI_INT_RXTO 0x00000002 // RX timeout interrupt
#define SSI_INT_RXOR 0x00000001 // RX overrun interrupt
#endif
#endif // __HW_SSI_H__

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@ -2,23 +2,38 @@
//
// hw_sysctl.h - Macros used when accessing the system control hardware.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -77,6 +92,7 @@
#define SYSCTL_DCGC2 0x400FE128 // Deep Sleep Mode Clock Gating
// Control Register 2
#define SYSCTL_DSLPCLKCFG 0x400FE144 // Deep Sleep Clock Configuration
#define SYSCTL_SYSPROP 0x400FE14C // System Properties
#define SYSCTL_PIOSCCAL 0x400FE150 // Precision Internal Oscillator
// Calibration
#define SYSCTL_CLKVCLR 0x400FE150 // Clock Verification Clear
@ -84,6 +100,9 @@
// Statistics
#define SYSCTL_LDOARST 0x400FE160 // Allow Unregulated LDO to Reset
// the Part
#define SYSCTL_PLLFREQ0 0x400FE160 // PLL Frequency 0
#define SYSCTL_PLLFREQ1 0x400FE164 // PLL Frequency 1
#define SYSCTL_PLLSTAT 0x400FE168 // PLL Status
#define SYSCTL_I2SMCLKCFG 0x400FE170 // I2S MCLK Configuration
#define SYSCTL_DC9 0x400FE190 // Device Capabilities 9 ADC
// Digital Comparators
@ -110,6 +129,9 @@
#define SYSCTL_DID0_CLASS_TEMPEST \
0x00040000 // Stellaris(R) Tempest-class
// microcontrollers
#define SYSCTL_DID0_CLASS_FIRESTORM \
0x00060000 // Stellaris(R) Firestorm-class
// microcontrollers
#define SYSCTL_DID0_MAJ_M 0x0000FF00 // Major Revision
#define SYSCTL_DID0_MAJ_REVA 0x00000000 // Revision A (initial device)
#define SYSCTL_DID0_MAJ_REVB 0x00000100 // Revision B (first base layer
@ -179,6 +201,7 @@
#define SYSCTL_DID1_PRTNO_1150 0x00C10000 // LM3S1150
#define SYSCTL_DID1_PRTNO_1162 0x00C40000 // LM3S1162
#define SYSCTL_DID1_PRTNO_1165 0x00C20000 // LM3S1165
#define SYSCTL_DID1_PRTNO_1166 0x00EC0000 // LM3S1166
#define SYSCTL_DID1_PRTNO_1332 0x00C60000 // LM3S1332
#define SYSCTL_DID1_PRTNO_1435 0x00BC0000 // LM3S1435
#define SYSCTL_DID1_PRTNO_1439 0x00BA0000 // LM3S1439
@ -188,10 +211,12 @@
#define SYSCTL_DID1_PRTNO_1607 0x00060000 // LM3S1607
#define SYSCTL_DID1_PRTNO_1608 0x00DA0000 // LM3S1608
#define SYSCTL_DID1_PRTNO_1620 0x00C00000 // LM3S1620
#define SYSCTL_DID1_PRTNO_1621 0x00CD0000 // LM3S1621
#define SYSCTL_DID1_PRTNO_1625 0x00030000 // LM3S1625
#define SYSCTL_DID1_PRTNO_1626 0x00040000 // LM3S1626
#define SYSCTL_DID1_PRTNO_1627 0x00050000 // LM3S1627
#define SYSCTL_DID1_PRTNO_1635 0x00B30000 // LM3S1635
#define SYSCTL_DID1_PRTNO_1636 0x00EB0000 // LM3S1636
#define SYSCTL_DID1_PRTNO_1637 0x00BD0000 // LM3S1637
#define SYSCTL_DID1_PRTNO_1651 0x00B10000 // LM3S1651
#define SYSCTL_DID1_PRTNO_1751 0x00B90000 // LM3S1751
@ -205,14 +230,29 @@
#define SYSCTL_DID1_PRTNO_1958 0x00BE0000 // LM3S1958
#define SYSCTL_DID1_PRTNO_1960 0x00B50000 // LM3S1960
#define SYSCTL_DID1_PRTNO_1968 0x00B80000 // LM3S1968
#define SYSCTL_DID1_PRTNO_1969 0x00EA0000 // LM3S1969
#define SYSCTL_DID1_PRTNO_1B21 0x00CE0000 // LM3S1B21
#define SYSCTL_DID1_PRTNO_1C21 0x00CA0000 // LM3S1C21
#define SYSCTL_DID1_PRTNO_1C26 0x00CB0000 // LM3S1C26
#define SYSCTL_DID1_PRTNO_1C58 0x00980000 // LM3S1C58
#define SYSCTL_DID1_PRTNO_1D21 0x00B00000 // LM3S1D21
#define SYSCTL_DID1_PRTNO_1D26 0x00CC0000 // LM3S1D26
#define SYSCTL_DID1_PRTNO_1F11 0x001D0000 // LM3S1F11
#define SYSCTL_DID1_PRTNO_1F16 0x001B0000 // LM3S1F16
#define SYSCTL_DID1_PRTNO_1G21 0x00AF0000 // LM3S1G21
#define SYSCTL_DID1_PRTNO_1G58 0x00950000 // LM3S1G58
#define SYSCTL_DID1_PRTNO_1H11 0x001E0000 // LM3S1H11
#define SYSCTL_DID1_PRTNO_1H16 0x001C0000 // LM3S1H16
#define SYSCTL_DID1_PRTNO_1J11 0x000F0000 // LM3S1J11
#define SYSCTL_DID1_PRTNO_1J16 0x003C0000 // LM3S1J16
#define SYSCTL_DID1_PRTNO_1N11 0x000E0000 // LM3S1N11
#define SYSCTL_DID1_PRTNO_1N16 0x003B0000 // LM3S1N16
#define SYSCTL_DID1_PRTNO_1P51 0x00B20000 // LM3S1P51
#define SYSCTL_DID1_PRTNO_1R21 0x009E0000 // LM3S1R21
#define SYSCTL_DID1_PRTNO_1R26 0x00C90000 // LM3S1R26
#define SYSCTL_DID1_PRTNO_1W16 0x00300000 // LM3S1W16
#define SYSCTL_DID1_PRTNO_1Z16 0x002F0000 // LM3S1Z16
#define SYSCTL_DID1_PRTNO_2016 0x00D40000 // LM3S2016
#define SYSCTL_DID1_PRTNO_2110 0x00510000 // LM3S2110
#define SYSCTL_DID1_PRTNO_2139 0x00840000 // LM3S2139
#define SYSCTL_DID1_PRTNO_2276 0x00390000 // LM3S2276
@ -234,13 +274,17 @@
#define SYSCTL_DID1_PRTNO_2793 0x006D0000 // LM3S2793
#define SYSCTL_DID1_PRTNO_2911 0x00E30000 // LM3S2911
#define SYSCTL_DID1_PRTNO_2918 0x00E20000 // LM3S2918
#define SYSCTL_DID1_PRTNO_2919 0x00ED0000 // LM3S2919
#define SYSCTL_DID1_PRTNO_2939 0x00540000 // LM3S2939
#define SYSCTL_DID1_PRTNO_2948 0x008F0000 // LM3S2948
#define SYSCTL_DID1_PRTNO_2950 0x00580000 // LM3S2950
#define SYSCTL_DID1_PRTNO_2965 0x00550000 // LM3S2965
#define SYSCTL_DID1_PRTNO_2B93 0x006C0000 // LM3S2B93
#define SYSCTL_DID1_PRTNO_2D93 0x00940000 // LM3S2D93
#define SYSCTL_DID1_PRTNO_2U93 0x00930000 // LM3S2U93
#define SYSCTL_DID1_PRTNO_3634 0x00080000 // LM3S3634
#define SYSCTL_DID1_PRTNO_3651 0x00430000 // LM3S3651
#define SYSCTL_DID1_PRTNO_3654 0x00C80000 // LM3S3654
#define SYSCTL_DID1_PRTNO_3739 0x00440000 // LM3S3739
#define SYSCTL_DID1_PRTNO_3748 0x00490000 // LM3S3748
#define SYSCTL_DID1_PRTNO_3749 0x00450000 // LM3S3749
@ -265,15 +309,28 @@
#define SYSCTL_DID1_PRTNO_5951 0x000B0000 // LM3S5951
#define SYSCTL_DID1_PRTNO_5956 0x004E0000 // LM3S5956
#define SYSCTL_DID1_PRTNO_5B91 0x00680000 // LM3S5B91
#define SYSCTL_DID1_PRTNO_5C31 0x002E0000 // LM3S5C31
#define SYSCTL_DID1_PRTNO_5C36 0x002C0000 // LM3S5C36
#define SYSCTL_DID1_PRTNO_5C51 0x005E0000 // LM3S5C51
#define SYSCTL_DID1_PRTNO_5C56 0x005B0000 // LM3S5C56
#define SYSCTL_DID1_PRTNO_5D51 0x005F0000 // LM3S5D51
#define SYSCTL_DID1_PRTNO_5D56 0x005C0000 // LM3S5D56
#define SYSCTL_DID1_PRTNO_5D91 0x00870000 // LM3S5D91
#define SYSCTL_DID1_PRTNO_5G31 0x002D0000 // LM3S5G31
#define SYSCTL_DID1_PRTNO_5G36 0x001F0000 // LM3S5G36
#define SYSCTL_DID1_PRTNO_5G51 0x005D0000 // LM3S5G51
#define SYSCTL_DID1_PRTNO_5G56 0x004F0000 // LM3S5G56
#define SYSCTL_DID1_PRTNO_5K31 0x00090000 // LM3S5K31
#define SYSCTL_DID1_PRTNO_5K36 0x004A0000 // LM3S5K36
#define SYSCTL_DID1_PRTNO_5P31 0x000A0000 // LM3S5P31
#define SYSCTL_DID1_PRTNO_5P36 0x00480000 // LM3S5P36
#define SYSCTL_DID1_PRTNO_5P3B 0x00B60000 // LM3S5P3B
#define SYSCTL_DID1_PRTNO_5P51 0x000D0000 // LM3S5P51
#define SYSCTL_DID1_PRTNO_5P56 0x004C0000 // LM3S5P56
#define SYSCTL_DID1_PRTNO_5R31 0x00070000 // LM3S5R31
#define SYSCTL_DID1_PRTNO_5R36 0x004B0000 // LM3S5R36
#define SYSCTL_DID1_PRTNO_5T36 0x00470000 // LM3S5T36
#define SYSCTL_DID1_PRTNO_5U91 0x007F0000 // LM3S5U91
#define SYSCTL_DID1_PRTNO_5Y36 0x00460000 // LM3S5Y36
#define SYSCTL_DID1_PRTNO_6100 0x00A10000 // LM3S6100
#define SYSCTL_DID1_PRTNO_6110 0x00740000 // LM3S6110
@ -288,12 +345,18 @@
#define SYSCTL_DID1_PRTNO_6637 0x008B0000 // LM3S6637
#define SYSCTL_DID1_PRTNO_6730 0x00A30000 // LM3S6730
#define SYSCTL_DID1_PRTNO_6753 0x00770000 // LM3S6753
#define SYSCTL_DID1_PRTNO_6816 0x00D10000 // LM3S6816
#define SYSCTL_DID1_PRTNO_6911 0x00E90000 // LM3S6911
#define SYSCTL_DID1_PRTNO_6916 0x00D30000 // LM3S6916
#define SYSCTL_DID1_PRTNO_6918 0x00E80000 // LM3S6918
#define SYSCTL_DID1_PRTNO_6938 0x00890000 // LM3S6938
#define SYSCTL_DID1_PRTNO_6950 0x00720000 // LM3S6950
#define SYSCTL_DID1_PRTNO_6952 0x00780000 // LM3S6952
#define SYSCTL_DID1_PRTNO_6965 0x00730000 // LM3S6965
#define SYSCTL_DID1_PRTNO_6C11 0x00AA0000 // LM3S6C11
#define SYSCTL_DID1_PRTNO_6C65 0x00AC0000 // LM3S6C65
#define SYSCTL_DID1_PRTNO_6G11 0x009F0000 // LM3S6G11
#define SYSCTL_DID1_PRTNO_6G65 0x00AB0000 // LM3S6G65
#define SYSCTL_DID1_PRTNO_8530 0x00640000 // LM3S8530
#define SYSCTL_DID1_PRTNO_8538 0x008E0000 // LM3S8538
#define SYSCTL_DID1_PRTNO_8630 0x00610000 // LM3S8630
@ -306,16 +369,41 @@
#define SYSCTL_DID1_PRTNO_8962 0x00A60000 // LM3S8962
#define SYSCTL_DID1_PRTNO_8970 0x00620000 // LM3S8970
#define SYSCTL_DID1_PRTNO_8971 0x00D70000 // LM3S8971
#define SYSCTL_DID1_PRTNO_8C62 0x00AE0000 // LM3S8C62
#define SYSCTL_DID1_PRTNO_8G62 0x00AD0000 // LM3S8G62
#define SYSCTL_DID1_PRTNO_9781 0x00CF0000 // LM3S9781
#define SYSCTL_DID1_PRTNO_9790 0x00670000 // LM3S9790
#define SYSCTL_DID1_PRTNO_9792 0x006B0000 // LM3S9792
#define SYSCTL_DID1_PRTNO_9971 0x002D0000 // LM3S9971
#define SYSCTL_DID1_PRTNO_9997 0x00200000 // LM3S9997
#define SYSCTL_DID1_PRTNO_9B81 0x00D00000 // LM3S9B81
#define SYSCTL_DID1_PRTNO_9B90 0x00660000 // LM3S9B90
#define SYSCTL_DID1_PRTNO_9B92 0x006A0000 // LM3S9B92
#define SYSCTL_DID1_PRTNO_9B95 0x006E0000 // LM3S9B95
#define SYSCTL_DID1_PRTNO_9B96 0x006F0000 // LM3S9B96
#define SYSCTL_DID1_PRTNO_9BN2 0x001D0000 // LM3S9BN2
#define SYSCTL_DID1_PRTNO_9BN5 0x001E0000 // LM3S9BN5
#define SYSCTL_DID1_PRTNO_9BN6 0x001F0000 // LM3S9BN6
#define SYSCTL_DID1_PRTNO_9C97 0x00700000 // LM3S9C97
#define SYSCTL_DID1_PRTNO_9CN5 0x007A0000 // LM3S9CN5
#define SYSCTL_DID1_PRTNO_9D81 0x00A90000 // LM3S9D81
#define SYSCTL_DID1_PRTNO_9D90 0x007E0000 // LM3S9D90
#define SYSCTL_DID1_PRTNO_9D92 0x00920000 // LM3S9D92
#define SYSCTL_DID1_PRTNO_9D95 0x00C80000 // LM3S9D95
#define SYSCTL_DID1_PRTNO_9D96 0x009D0000 // LM3S9D96
#define SYSCTL_DID1_PRTNO_9DN5 0x007B0000 // LM3S9DN5
#define SYSCTL_DID1_PRTNO_9DN6 0x007C0000 // LM3S9DN6
#define SYSCTL_DID1_PRTNO_9G97 0x00600000 // LM3S9G97
#define SYSCTL_DID1_PRTNO_9GN5 0x00790000 // LM3S9GN5
#define SYSCTL_DID1_PRTNO_9L71 0x001B0000 // LM3S9L71
#define SYSCTL_DID1_PRTNO_9L97 0x00180000 // LM3S9L97
#define SYSCTL_DID1_PRTNO_9U81 0x00A80000 // LM3S9U81
#define SYSCTL_DID1_PRTNO_9U90 0x007D0000 // LM3S9U90
#define SYSCTL_DID1_PRTNO_9U92 0x00900000 // LM3S9U92
#define SYSCTL_DID1_PRTNO_9U95 0x00B70000 // LM3S9U95
#define SYSCTL_DID1_PRTNO_9U96 0x009B0000 // LM3S9U96
#define SYSCTL_DID1_PINCNT_M 0x0000E000 // Package Pin Count
#define SYSCTL_DID1_PINCNT_28 0x00000000 // 28 pin package
#define SYSCTL_DID1_PINCNT_28 0x00000000 // 28-pin package
#define SYSCTL_DID1_PINCNT_48 0x00002000 // 48-pin package
#define SYSCTL_DID1_PINCNT_100 0x00004000 // 100-pin package
#define SYSCTL_DID1_PINCNT_64 0x00006000 // 64-pin package
@ -353,6 +441,7 @@
#define SYSCTL_DC0_SRAMSZ_20KB 0x004F0000 // 20 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_24KB 0x005F0000 // 24 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_32KB 0x007F0000 // 32 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_48KB 0x00BF0000 // 48 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_64KB 0x00FF0000 // 64 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_96KB 0x017F0000 // 96 KB of SRAM
#define SYSCTL_DC0_FLASHSZ_M 0x0000FFFF // Flash Size
@ -362,7 +451,10 @@
#define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F // 64 KB of Flash
#define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F // 96 KB of Flash
#define SYSCTL_DC0_FLASHSZ_128K 0x0000003F // 128 KB of Flash
#define SYSCTL_DC0_FLASHSZ_192K 0x0000005F // 192 KB of Flash
#define SYSCTL_DC0_FLASHSZ_256K 0x0000007F // 256 KB of Flash
#define SYSCTL_DC0_FLASHSZ_384K 0x000000BF // 384 KB of Flash
#define SYSCTL_DC0_FLASHSZ_512K 0x000000FF // 512 KB of Flash
#define SYSCTL_DC0_SRAMSZ_S 16 // SRAM size shift
#define SYSCTL_DC0_FLASHSZ_S 0 // Flash size shift
@ -375,7 +467,8 @@
#define SYSCTL_DC1_CAN2 0x04000000 // CAN Module 2 Present
#define SYSCTL_DC1_CAN1 0x02000000 // CAN Module 1 Present
#define SYSCTL_DC1_CAN0 0x01000000 // CAN Module 0 Present
#define SYSCTL_DC1_PWM 0x00100000 // PWM Module Present
#define SYSCTL_DC1_PWM1 0x00200000 // PWM Module 1 Present
#define SYSCTL_DC1_PWM0 0x00100000 // PWM Module 0 Present
#define SYSCTL_DC1_ADC1 0x00020000 // ADC Module 1 Present
#define SYSCTL_DC1_ADC0 0x00010000 // ADC Module 0 Present
#define SYSCTL_DC1_MINSYSDIV_M 0x0000F000 // System Clock Divider
@ -385,18 +478,21 @@
// 6 minimum
#define SYSCTL_DC1_MINSYSDIV_50 0x00003000 // Specifies a 50-MHz CPU clock
// with a PLL divider of 4
#define SYSCTL_DC1_MINSYSDIV_40 0x00004000 // Specifies a 40-MHz CPU clock
// with a PLL divider of 5
#define SYSCTL_DC1_MINSYSDIV_25 0x00007000 // Specifies a 25-MHz clock with a
// PLL divider of 8
#define SYSCTL_DC1_MINSYSDIV_20 0x00009000 // Specifies a 20-MHz clock with a
// PLL divider of 10
#define SYSCTL_DC1_ADCSPD_M 0x00000F00 // Max ADC Speed
#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250K samples/second
#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500K samples/second
#define SYSCTL_DC1_ADCSPD_1M 0x00000300 // 1M samples/second
#define SYSCTL_DC1_ADC1SPD_M 0x00000C00 // Max ADC1 Speed
#define SYSCTL_DC1_ADC1SPD_125K 0x00000000 // 125K samples/second
#define SYSCTL_DC1_ADC1SPD_250K 0x00000400 // 250K samples/second
#define SYSCTL_DC1_ADC1SPD_500K 0x00000800 // 500K samples/second
#define SYSCTL_DC1_ADC1SPD_1M 0x00000C00 // 1M samples/second
#define SYSCTL_DC1_ADC0SPD_M 0x00000300 // Max ADC0 Speed
#define SYSCTL_DC1_ADC0SPD_125K 0x00000000 // 125K samples/second
#define SYSCTL_DC1_ADC0SPD_250K 0x00000100 // 250K samples/second
#define SYSCTL_DC1_ADC0SPD_500K 0x00000200 // 500K samples/second
#define SYSCTL_DC1_ADC0SPD_1M 0x00000300 // 1M samples/second
#define SYSCTL_DC1_MPU 0x00000080 // MPU Present
#define SYSCTL_DC1_HIB 0x00000040 // Hibernation Module Present
@ -421,7 +517,9 @@
#define SYSCTL_DC2_TIMER2 0x00040000 // Timer Module 2 Present
#define SYSCTL_DC2_TIMER1 0x00020000 // Timer Module 1 Present
#define SYSCTL_DC2_TIMER0 0x00010000 // Timer Module 0 Present
#define SYSCTL_DC2_I2C1HS 0x00008000 // I2C Module 1 Speed
#define SYSCTL_DC2_I2C1 0x00004000 // I2C Module 1 Present
#define SYSCTL_DC2_I2C0HS 0x00002000 // I2C Module 0 Speed
#define SYSCTL_DC2_I2C0 0x00001000 // I2C Module 0 Present
#define SYSCTL_DC2_QEI1 0x00000200 // QEI Module 1 Present
#define SYSCTL_DC2_QEI0 0x00000100 // QEI Module 0 Present
@ -650,7 +748,7 @@
#define SYSCTL_SRCR0_CAN2 0x04000000 // CAN2 Reset Control
#define SYSCTL_SRCR0_CAN1 0x02000000 // CAN1 Reset Control
#define SYSCTL_SRCR0_CAN0 0x01000000 // CAN0 Reset Control
#define SYSCTL_SRCR0_PWM 0x00100000 // PWM Reset Control
#define SYSCTL_SRCR0_PWM0 0x00100000 // PWM Reset Control
#define SYSCTL_SRCR0_ADC1 0x00020000 // ADC1 Reset Control
#define SYSCTL_SRCR0_ADC0 0x00010000 // ADC0 Reset Control
#define SYSCTL_SRCR0_HIB 0x00000040 // HIB Reset Control
@ -831,6 +929,10 @@
#define SYSCTL_RCC_XTAL_14_3MHZ 0x00000500 // 14.31818 MHz
#define SYSCTL_RCC_XTAL_16MHZ 0x00000540 // 16 MHz
#define SYSCTL_RCC_XTAL_16_3MHZ 0x00000580 // 16.384 MHz
#define SYSCTL_RCC_XTAL_18MHZ 0x000005C0 // 18.0 MHz
#define SYSCTL_RCC_XTAL_20MHZ 0x00000600 // 20.0 MHz
#define SYSCTL_RCC_XTAL_24MHZ 0x00000640 // 24.0 MHz
#define SYSCTL_RCC_XTAL_25MHZ 0x00000680 // 25.0 MHz
#define SYSCTL_RCC_PLLVER 0x00000400 // PLL Verification
#define SYSCTL_RCC_OSCSRC_M 0x00000030 // Oscillator Source
#define SYSCTL_RCC_OSCSRC_MAIN 0x00000000 // MOSC
@ -977,6 +1079,8 @@
// The following are defines for the bit fields in the SYSCTL_MOSCCTL register.
//
//*****************************************************************************
#define SYSCTL_MOSCCTL_NOXTAL 0x00000004 // No Crystal Connected
#define SYSCTL_MOSCCTL_MOSCIM 0x00000002 // MOSC Failure Action
#define SYSCTL_MOSCCTL_CVAL 0x00000001 // Clock Validation for MOSC
//*****************************************************************************
@ -988,7 +1092,7 @@
#define SYSCTL_RCGC0_CAN2 0x04000000 // CAN2 Clock Gating Control
#define SYSCTL_RCGC0_CAN1 0x02000000 // CAN1 Clock Gating Control
#define SYSCTL_RCGC0_CAN0 0x01000000 // CAN0 Clock Gating Control
#define SYSCTL_RCGC0_PWM 0x00100000 // PWM Clock Gating Control
#define SYSCTL_RCGC0_PWM0 0x00100000 // PWM Clock Gating Control
#define SYSCTL_RCGC0_ADC1 0x00020000 // ADC1 Clock Gating Control
#define SYSCTL_RCGC0_ADC0 0x00010000 // ADC0 Clock Gating Control
#define SYSCTL_RCGC0_ADCSPD_M 0x00000F00 // ADC Sample Speed
@ -1067,7 +1171,7 @@
#define SYSCTL_SCGC0_CAN2 0x04000000 // CAN2 Clock Gating Control
#define SYSCTL_SCGC0_CAN1 0x02000000 // CAN1 Clock Gating Control
#define SYSCTL_SCGC0_CAN0 0x01000000 // CAN0 Clock Gating Control
#define SYSCTL_SCGC0_PWM 0x00100000 // PWM Clock Gating Control
#define SYSCTL_SCGC0_PWM0 0x00100000 // PWM Clock Gating Control
#define SYSCTL_SCGC0_ADC1 0x00020000 // ADC1 Clock Gating Control
#define SYSCTL_SCGC0_ADC0 0x00010000 // ADC0 Clock Gating Control
#define SYSCTL_SCGC0_ADCSPD_M 0x00000F00 // ADC Sample Speed
@ -1146,7 +1250,7 @@
#define SYSCTL_DCGC0_CAN2 0x04000000 // CAN2 Clock Gating Control
#define SYSCTL_DCGC0_CAN1 0x02000000 // CAN1 Clock Gating Control
#define SYSCTL_DCGC0_CAN0 0x01000000 // CAN0 Clock Gating Control
#define SYSCTL_DCGC0_PWM 0x00100000 // PWM Clock Gating Control
#define SYSCTL_DCGC0_PWM0 0x00100000 // PWM Clock Gating Control
#define SYSCTL_DCGC0_ADC1 0x00020000 // ADC1 Clock Gating Control
#define SYSCTL_DCGC0_ADC0 0x00010000 // ADC0 Clock Gating Control
#define SYSCTL_DCGC0_HIB 0x00000040 // HIB Clock Gating Control
@ -1271,9 +1375,18 @@
#define SYSCTL_DSLPCLKCFG_O_IO 0x00000010 // PIOSC
#define SYSCTL_DSLPCLKCFG_O_30 0x00000030 // 30 kHz
#define SYSCTL_DSLPCLKCFG_O_32 0x00000070 // 32.768 kHz
#define SYSCTL_DSLPCLKCFG_PIOSCPD \
0x00000002 // PIOSC Power Down Request
#define SYSCTL_DSLPCLKCFG_IOSC 0x00000001 // IOSC Clock Source
#define SYSCTL_DSLPCLKCFG_D_S 23
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_SYSPROP register.
//
//*****************************************************************************
#define SYSCTL_SYSPROP_FPU 0x00000001 // FPU Present
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_PIOSCCAL
@ -1318,6 +1431,35 @@
//*****************************************************************************
#define SYSCTL_LDOARST_LDOARST 0x00000001 // LDO Reset
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_PLLFREQ0
// register.
//
//*****************************************************************************
#define SYSCTL_PLLFREQ0_MFRAC_M 0x000FFC00 // PLL M Fractional Value
#define SYSCTL_PLLFREQ0_MINT_M 0x000003FF // PLL M Integer Value
#define SYSCTL_PLLFREQ0_MFRAC_S 10
#define SYSCTL_PLLFREQ0_MINT_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_PLLFREQ1
// register.
//
//*****************************************************************************
#define SYSCTL_PLLFREQ1_Q_M 0x00001F00 // PLL Q Value
#define SYSCTL_PLLFREQ1_N_M 0x0000001F // PLL N Value
#define SYSCTL_PLLFREQ1_Q_S 8
#define SYSCTL_PLLFREQ1_N_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_PLLSTAT register.
//
//*****************************************************************************
#define SYSCTL_PLLSTAT_LOCK 0x00000001 // PLL Lock
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG
@ -1430,9 +1572,15 @@
// register.
//
//*****************************************************************************
#define SYSCTL_DC1_PWM 0x00100000 // PWM Module Present
#define SYSCTL_DC1_ADC 0x00010000 // ADC Module Present
#define SYSCTL_DC1_SYSDIV_MASK 0x0000F000 // Minimum system divider mask
#define SYSCTL_DC1_ADCSPD_MASK 0x00000F00 // ADC speed mask
#define SYSCTL_DC1_ADCSPD_M 0x00000F00 // Max ADC Speed
#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250K samples/second
#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500K samples/second
#define SYSCTL_DC1_ADCSPD_1M 0x00000300 // 1M samples/second
#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
#define SYSCTL_DC1_WDT 0x00000008 // Watchdog Timer Present
@ -1485,6 +1633,7 @@
// register.
//
//*****************************************************************************
#define SYSCTL_SRCR0_PWM 0x00100000 // PWM Reset Control
#define SYSCTL_SRCR0_ADC 0x00010000 // ADC0 Reset Control
#define SYSCTL_SRCR0_WDT 0x00000008 // WDT Reset Control
@ -1561,6 +1710,7 @@
// register.
//
//*****************************************************************************
#define SYSCTL_RCGC0_PWM 0x00100000 // PWM Clock Gating Control
#define SYSCTL_RCGC0_ADC 0x00010000 // ADC0 Clock Gating Control
#define SYSCTL_RCGC0_WDT 0x00000008 // WDT Clock Gating Control
@ -1570,6 +1720,7 @@
// register.
//
//*****************************************************************************
#define SYSCTL_SCGC0_PWM 0x00100000 // PWM Clock Gating Control
#define SYSCTL_SCGC0_ADC 0x00010000 // ADC0 Clock Gating Control
#define SYSCTL_SCGC0_WDT 0x00000008 // WDT Clock Gating Control
@ -1579,6 +1730,7 @@
// register.
//
//*****************************************************************************
#define SYSCTL_DCGC0_PWM 0x00100000 // PWM Clock Gating Control
#define SYSCTL_DCGC0_ADC 0x00010000 // ADC0 Clock Gating Control
#define SYSCTL_DCGC0_WDT 0x00000008 // WDT Clock Gating Control

53
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/inc/hw_types.h
View File

@ -2,23 +2,38 @@
//
// hw_types.h - Common types and macros.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -115,6 +130,12 @@ typedef unsigned char tBoolean;
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_TEMPEST))
#endif
#ifndef CLASS_IS_FIRESTORM
#define CLASS_IS_FIRESTORM \
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FIRESTORM))
#endif
#ifndef REVISION_IS_A0
#define REVISION_IS_A0 \
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
@ -169,6 +190,12 @@ typedef unsigned char tBoolean;
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_3))
#endif
#ifndef REVISION_IS_C5
#define REVISION_IS_C5 \
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_5))
#endif
//*****************************************************************************
//
// Deprecated silicon class and revision detection macros.

96
Target/Demo/ARMCM3_LM3S_EK_LM3S6965_Crossworks/Boot/lib/inc/hw_uart.h
View File

@ -2,23 +2,38 @@
//
// hw_uart.h - Macros and defines used when accessing the UART hardware.
//
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// This is part of revision 6852 of the Stellaris Firmware Development Package.
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 10636 of the Stellaris Firmware Development Package.
//
//*****************************************************************************
@ -49,6 +64,10 @@
#define UART_O_LCTL 0x00000090 // UART LIN Control
#define UART_O_LSS 0x00000094 // UART LIN Snap Shot
#define UART_O_LTIM 0x00000098 // UART LIN Timer
#define UART_O_9BITADDR 0x000000A4 // UART 9-Bit Self Address
#define UART_O_9BITAMASK 0x000000A8 // UART 9-Bit Self Address Mask
#define UART_O_PP 0x00000FC0 // UART Peripheral Properties
#define UART_O_CC 0x00000FC8 // UART Clock Configuration
//*****************************************************************************
//
@ -185,6 +204,7 @@
#define UART_IM_LME1IM 0x00004000 // LIN Mode Edge 1 Interrupt Mask
#define UART_IM_LMSBIM 0x00002000 // LIN Mode Sync Break Interrupt
// Mask
#define UART_IM_9BITIM 0x00001000 // 9-Bit Mode Interrupt Mask
#define UART_IM_OEIM 0x00000400 // UART Overrun Error Interrupt
// Mask
#define UART_IM_BEIM 0x00000200 // UART Break Error Interrupt Mask
@ -215,6 +235,7 @@
// Status
#define UART_RIS_LMSBRIS 0x00002000 // LIN Mode Sync Break Raw
// Interrupt Status
#define UART_RIS_9BITRIS 0x00001000 // 9-Bit Mode Raw Interrupt Status
#define UART_RIS_OERIS 0x00000400 // UART Overrun Error Raw Interrupt
// Status
#define UART_RIS_BERIS 0x00000200 // UART Break Error Raw Interrupt
@ -249,6 +270,8 @@
// Status
#define UART_MIS_LMSBMIS 0x00002000 // LIN Mode Sync Break Masked
// Interrupt Status
#define UART_MIS_9BITMIS 0x00001000 // 9-Bit Mode Masked Interrupt
// Status
#define UART_MIS_OEMIS 0x00000400 // UART Overrun Error Masked
// Interrupt Status
#define UART_MIS_BEMIS 0x00000200 // UART Break Error Masked
@ -277,10 +300,11 @@
// The following are defines for the bit fields in the UART_O_ICR register.
//
//*****************************************************************************
#define UART_ICR_LME5MIC 0x00008000 // LIN Mode Edge 5 Interrupt Clear
#define UART_ICR_LME1MIC 0x00004000 // LIN Mode Edge 1 Interrupt Clear
#define UART_ICR_LMSBMIC 0x00002000 // LIN Mode Sync Break Interrupt
#define UART_ICR_LME5IC 0x00008000 // LIN Mode Edge 5 Interrupt Clear
#define UART_ICR_LME1IC 0x00004000 // LIN Mode Edge 1 Interrupt Clear
#define UART_ICR_LMSBIC 0x00002000 // LIN Mode Sync Break Interrupt
// Clear
#define UART_ICR_9BITIC 0x00001000 // 9-Bit Mode Interrupt Clear
#define UART_ICR_OEIC 0x00000400 // Overrun Error Interrupt Clear
#define UART_ICR_BEIC 0x00000200 // Break Error Interrupt Clear
#define UART_ICR_PEIC 0x00000100 // Parity Error Interrupt Clear
@ -335,6 +359,42 @@
#define UART_LTIM_TIMER_M 0x0000FFFF // Timer Value
#define UART_LTIM_TIMER_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the UART_O_9BITADDR
// register.
//
//*****************************************************************************
#define UART_9BITADDR_9BITEN 0x00008000 // Enable 9-Bit Mode
#define UART_9BITADDR_ADDR_M 0x000000FF // Self Address for 9-Bit Mode
#define UART_9BITADDR_ADDR_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the UART_O_9BITAMASK
// register.
//
//*****************************************************************************
#define UART_9BITAMASK_MASK_M 0x000000FF // Self Address Mask for 9-Bit Mode
#define UART_9BITAMASK_MASK_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the UART_O_PP register.
//
//*****************************************************************************
#define UART_PP_NB 0x00000002 // 9-Bit Support
#define UART_PP_SC 0x00000001 // Smart Card Support
//*****************************************************************************
//
// The following are defines for the bit fields in the UART_O_CC register.
//
//*****************************************************************************
#define UART_CC_CS_M 0x0000000F // UART Baud Clock Source
#define UART_CC_CS_SYSCLK 0x00000000 // The system clock (default)
#define UART_CC_CS_PIOSC 0x00000005 // PIOSC
//*****************************************************************************
//
// The following definitions are deprecated.
@ -418,6 +478,10 @@
// register.
//
//*****************************************************************************
#define UART_ICR_LME5MIC 0x00008000 // LIN Mode Edge 5 Interrupt Clear
#define UART_ICR_LME1MIC 0x00004000 // LIN Mode Edge 1 Interrupt Clear
#define UART_ICR_LMSBMIC 0x00002000 // LIN Mode Sync Break Interrupt
// Clear
#define UART_RSR_ANY (UART_RSR_OE | UART_RSR_BE | UART_RSR_PE | \
UART_RSR_FE)

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