mirror of https://github.com/FOME-Tech/openblt.git
140 lines
8.9 KiB
C
140 lines
8.9 KiB
C
/************************************************************************************//**
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* \file Source\ARMCM3_LM3S\Crossworks\vectors.c
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* \brief Bootloader interrupt vector table source file.
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* \ingroup Target_ARMCM3_LM3S
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */
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/****************************************************************************************
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* External functions
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****************************************************************************************/
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extern void reset_handler(void); /* implemented in cstart.s */
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/****************************************************************************************
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* External data declarations
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****************************************************************************************/
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/** \brief Stack end address (memory.x) */
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extern blt_int32u __stack_end__;
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/************************************************************************************//**
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** \brief Catch-all for unused interrrupt service routines.
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** \return none.
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**
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****************************************************************************************/
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void UnusedISR(void)
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{
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/* unexpected interrupt occured, so trigger an assertion to halt the system */
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ASSERT_RT(BLT_FALSE);
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} /*** end of UnusedISR ***/
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/****************************************************************************************
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* I N T E R R U P T V E C T O R T A B L E
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****************************************************************************************/
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/** \brief Structure type for vector table entries. */
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typedef union
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{
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void (*func)(void); /**< for ISR function pointers */
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blt_int32u ptr; /**< for stack pointer entry */
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} tIsrFunc;
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/** \brief Interrupt vector table. */
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__attribute__((section(".vectors")))
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const tIsrFunc _vectors[] =
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{
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{ .ptr = (blt_int32u) &__stack_end__ }, /* the initial stack pointer */
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reset_handler, /* the reset handler */
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UnusedISR, /* NMI Handler */
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UnusedISR, /* Hard Fault Handler */
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UnusedISR, /* MPU Fault Handler */
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UnusedISR, /* Bus Fault Handler */
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UnusedISR, /* Usage Fault Handler */
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UnusedISR, /* Reserved */
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UnusedISR, /* Reserved */
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UnusedISR, /* Reserved */
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UnusedISR, /* Reserved */
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UnusedISR, /* SVCall Handler */
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UnusedISR, /* Debug Monitor Handler */
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UnusedISR, /* Reserved */
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UnusedISR, /* PendSV Handler */
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UnusedISR, /* SysTick Handler */
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UnusedISR, /* GPIO Port A */
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UnusedISR, /* GPIO Port B */
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UnusedISR, /* GPIO Port C */
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UnusedISR, /* GPIO Port D */
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UnusedISR, /* GPIO Port E */
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UnusedISR, /* UART0 Rx and Tx */
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UnusedISR, /* UART1 Rx and Tx */
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UnusedISR, /* SSI Rx and Tx */
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UnusedISR, /* I2C Master and Slave */
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UnusedISR, /* PWM Fault */
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UnusedISR, /* PWM Generator 0 */
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UnusedISR, /* PWM Generator 1 */
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UnusedISR, /* PWM Generator 2 */
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UnusedISR, /* Quadrature Encoder */
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UnusedISR, /* ADC Sequence 0 */
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UnusedISR, /* ADC Sequence 1 */
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UnusedISR, /* ADC Sequence 2 */
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UnusedISR, /* ADC Sequence 3 */
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UnusedISR, /* Watchdog timer */
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UnusedISR, /* Timer 0 subtimer A */
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UnusedISR, /* Timer 0 subtimer B */
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UnusedISR, /* Timer 1 subtimer A */
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UnusedISR, /* Timer 1 subtimer B */
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UnusedISR, /* Timer 2 subtimer A */
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UnusedISR, /* Timer 2 subtimer B */
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UnusedISR, /* Analog Comparator 0 */
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UnusedISR, /* Analog Comparator 1 */
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UnusedISR, /* Analog Comparator 2 */
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UnusedISR, /* System Control (PLL, OSC, BO) */
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UnusedISR, /* FLASH Control */
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UnusedISR, /* GPIO Port F */
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UnusedISR, /* GPIO Port G */
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UnusedISR, /* GPIO Port H */
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UnusedISR, /* UART2 Rx and Tx */
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UnusedISR, /* SSI1 Rx and Tx */
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UnusedISR, /* Timer 3 subtimer A */
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UnusedISR, /* Timer 3 subtimer B */
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UnusedISR, /* I2C1 Master and Slave */
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UnusedISR, /* Quadrature Encoder 1 */
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UnusedISR, /* CAN0 */
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UnusedISR, /* CAN1 */
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UnusedISR, /* CAN2 */
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UnusedISR, /* Ethernet */
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UnusedISR /* Hibernate */
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};
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/************************************ end of vectors.c *********************************/
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