diff --git a/USB ALDL Adapter V1/Eagle/GM-UART-V1.brd b/USB ALDL Adapter V1/Eagle/GM-UART-V1.brd new file mode 100644 index 0000000..669c5f0 --- /dev/null +++ b/USB ALDL Adapter V1/Eagle/GM-UART-V1.brd @@ -0,0 +1,1046 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +8192 ALDL/UART Interface +CrashChips.com + + + + + + + +Testing Only + + + +Default symbols for import LTspice schematics<p> +2012-10-29 alf@cadsoft.de<br> + + +<b>RESISTOR</b> + + + + + + + + + + + +>NAME +>VALUE + + +<b>RESISTOR</b> + + + + + + + + + + + +>NAME +>VALUE + + +<b>CAPACITOR</b> + + + + + + + + + + + +>NAME +>VALUE + + +<b>RESISTOR</b><p> +type 0207, grid 10 mm + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +RESISTOR + + + + + +RESISTOR + + + + + +CAPACITOR + + + + + +RESISTOR +type 0207, grid 10 mm + + + + + + + +<b>Pin Headers</b><p> +Naming:<p> +MA = male<p> +# contacts - # rows<p> +W = angled<p> +<author>Created by librarian@cadsoft.de</author> + + +<b>PIN HEADER</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +1 +10 +>VALUE + + + + + + + + + + + + + + +PIN HEADER + + + + + + + +<b>FTDI (TM) CHIP</b> Future Technology Devices International Ltd.<p> +http://www.ftdichip.com + + +<b>SSOP-16</b><p> +Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 43</i><br> +Source: <a href="http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT230X.pdf"> Data sheet </a> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +SSOP-16 +Auto generated by make-symbol-device-package-bsdl.ulp Rev. 43 +Source: Data sheet + + + + + + + +<b>Diodes</b><p> +Based on the following sources: +<ul> +<li>Motorola : www.onsemi.com +<li>Fairchild : www.fairchildsemi.com +<li>Philips : www.semiconductors.com +<li>Vishay : www.vishay.de +</ul> +<author>Created by librarian@cadsoft.de</author> + + +<B>DIODE</B> + + + + + + +>NAME +>VALUE + + + + + + + +DIODE + + + + + + + +<Micro Mini USB Receptacle Mid Mount Assy Molex Right Angle SMT Type B Version 2.0 Micro USB Connector Socket, 30 V ac, 1A 47579 MICRO-USB</b><p> +<author>Created by SamacSys</author> + + +<b>47491-0001</b><br> + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + +<b>LEDs</b><p> +<author>Created by librarian@cadsoft.de</author><br> +Extended by Federico Battaglin <author>&lt;federico.rd@fdpinternational.com&gt;</author> with DUOLED + + +<B>LED</B><p> +3 mm, round + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +LED +3 mm, round + + + + + + + +<b>Test Pins/Pads</b><p> +Cream on SMD OFF.<br> +new: Attribute TP_SIGNAL_NAME<br> +<author>Created by librarian@cadsoft.de</author> + + +<b>TEST PAD</b> + +>NAME +>VALUE +>TP_SIGNAL_NAME + + + + +TEST PAD + + + + + + + + + + + + + + + + +<b>EAGLE Design Rules</b> +<p> +Die Standard-Design-Rules sind so gewählt, dass sie für +die meisten Anwendungen passen. Sollte ihre Platine +besondere Anforderungen haben, treffen Sie die erforderlichen +Einstellungen hier und speichern die Design Rules unter +einem neuen Namen ab. +<b>EAGLE Design Rules</b> +<p> +The default Design Rules have been set to cover +a wide range of applications. Your particular design +may have different requirements, so please make the +necessary adjustments and save your customized +design rules under a new name. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Since Version 6.2.2 text objects can contain more than one line, +which will not be processed correctly with this version. + + +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. + + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + + +