mirror of https://github.com/PentHertz/srsLTE.git
now the CA testing generation and simulation happen simultaneously. This way we can do more tti/event specific checks
This commit is contained in:
parent
b319f8dfcd
commit
518f813f13
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@ -854,10 +854,11 @@ void sf_sched::set_ul_sched_result(const pdcch_grid_t::alloc_result_t& dci_resul
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}
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// Print Resulting UL Allocation
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log_h->info("SCHED: %s %s rnti=0x%x, pid=%d, dci=(%d,%d), prb=(%d,%d), n_rtx=%d, tbs=%d, bsr=%d (%d-%d)\n",
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log_h->info("SCHED: %s %s rnti=0x%x, cc=%d, pid=%d, dci=(%d,%d), prb=(%d,%d), n_rtx=%d, tbs=%d, bsr=%d (%d-%d)\n",
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ul_alloc.is_msg3() ? "Msg3" : "UL",
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ul_alloc.is_retx() ? "retx" : "tx",
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user->get_rnti(),
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cc_cfg->enb_cc_idx,
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h->get_id(),
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pusch->dci.location.L,
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pusch->dci.location.ncce,
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@ -133,7 +133,7 @@ void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
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}
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if (scell_activation_state_changed) {
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pending_ces.emplace_back(srslte::sch_subh::SCELL_ACTIVATION);
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log_h->info("SCHED: Scheduling SCell Activation CMD for rnti=0x%x\n", rnti);
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log_h->info("SCHED: Enqueueing SCell Activation CMD for rnti=0x%x\n", rnti);
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}
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}
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}
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@ -169,12 +169,14 @@ void sched_ue::reset()
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void sched_ue::set_bearer_cfg(uint32_t lc_id, sched_interface::ue_bearer_cfg_t* cfg_)
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{
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std::lock_guard<std::mutex> lock(mutex);
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cfg.ue_bearers[lc_id] = *cfg_;
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set_bearer_cfg_unlocked(lc_id, *cfg_);
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}
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void sched_ue::rem_bearer(uint32_t lc_id)
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{
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std::lock_guard<std::mutex> lock(mutex);
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cfg.ue_bearers[lc_id] = sched_interface::ue_bearer_cfg_t{};
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set_bearer_cfg_unlocked(lc_id, sched_interface::ue_bearer_cfg_t{});
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}
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@ -870,9 +872,12 @@ void sched_ue::set_bearer_cfg_unlocked(uint32_t lc_id, const sched_interface::ue
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{
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if (lc_id < sched_interface::MAX_LC) {
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bool is_idle = lch[lc_id].cfg.direction == sched_interface::ue_bearer_cfg_t::IDLE;
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bool is_equal = memcmp(&cfg_, &lch[lc_id].cfg, sizeof(cfg_)) == 0;
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lch[lc_id].cfg = cfg_;
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if (lch[lc_id].cfg.direction != sched_interface::ue_bearer_cfg_t::IDLE) {
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Info("SCHED: Set bearer config lc_id=%d, direction=%d\n", lc_id, (int)lch[lc_id].cfg.direction);
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if (not is_equal) {
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Info("SCHED: Set bearer config lc_id=%d, direction=%d\n", lc_id, (int)lch[lc_id].cfg.direction);
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}
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} else if (not is_idle) {
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Info("SCHED: Removed bearer config lc_id=%d, direction=%d\n", lc_id, (int)lch[lc_id].cfg.direction);
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}
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@ -444,6 +444,7 @@ void ue::allocate_ce(srslte::sch_pdu* pdu, uint32_t lcid)
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} else {
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Error("CE: Setting SCell Activation CE. No space for a subheader\n");
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}
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break;
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default:
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Error("CE: Allocating CE=0x%x. Not supported\n", lcid);
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break;
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@ -19,6 +19,7 @@
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*
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*/
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#include "lib/include/srslte/common/pdu.h"
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#include "scheduler_test_common.h"
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#include "scheduler_test_utils.h"
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#include "srsenb/hdr/stack/mac/scheduler.h"
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@ -56,109 +57,6 @@ public:
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};
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srslte::scoped_log<sched_test_log> log_global{};
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/******************************
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* Setup Scheduler Tester Args
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*****************************/
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sched_sim_events generate_default_sim_events(uint32_t nof_prb, uint32_t nof_ccs)
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{
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sched_sim_events sim_events;
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sim_sched_args& sim_args = sim_events.sim_args;
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sim_args.nof_ttis = 10240 + 10;
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sim_args.P_retx = 0.1;
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sim_args.ue_cfg = generate_default_ue_cfg();
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// setup two cells
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std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg(nof_ccs, generate_default_cell_cfg(nof_prb));
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cell_cfg[0].scell_list.resize(1);
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cell_cfg[0].scell_list[0].enb_cc_idx = 1;
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cell_cfg[0].scell_list[0].cross_carrier_scheduling = false;
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cell_cfg[0].scell_list[0].ul_allowed = true;
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cell_cfg[1].cell.id = 2; // id=2
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cell_cfg[1].scell_list = cell_cfg[0].scell_list;
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cell_cfg[1].scell_list[0].enb_cc_idx = 0;
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sim_args.cell_cfg = std::move(cell_cfg);
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sim_args.bearer_cfg = {};
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sim_args.bearer_cfg.direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
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/* Setup Derived Params */
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sim_args.ue_cfg.supported_cc_list.resize(nof_ccs);
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for (uint32_t i = 0; i < sim_args.ue_cfg.supported_cc_list.size(); ++i) {
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sim_args.ue_cfg.supported_cc_list[i].active = true;
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sim_args.ue_cfg.supported_cc_list[i].enb_cc_idx = i;
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}
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return sim_events;
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}
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sched_sim_events generate_sim1()
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{
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/* Simulation Configuration */
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uint32_t nof_prb = 25;
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uint32_t nof_ccs = 2;
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sched_sim_events sim_events = generate_default_sim_events(nof_prb, nof_ccs);
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/* Internal configurations. Do not touch */
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float ul_sr_exps[] = {1, 4}; // log rand
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float dl_data_exps[] = {1, 4}; // log rand
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float P_ul_sr = randf() * 0.5, P_dl = randf() * 0.5;
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sched_sim_event_generator generator;
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/* Setup Events */
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uint32_t prach_tti = 1, msg4_tot_delay = 10; // TODO: check correct value
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uint32_t msg4_size = 20; // TODO: Check
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uint32_t duration = 1000;
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// Event PRACH: at prach_tti
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generator.step_until(prach_tti);
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tti_ev::user_cfg_ev* user = generator.add_new_default_user(duration);
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uint16_t rnti = user->rnti;
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// Event (TTI=prach_tti+msg4_tot_delay): First Tx (Msg4). Goes in SRB0 and contains ConRes
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generator.step_tti(msg4_tot_delay);
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generator.add_dl_data(rnti, msg4_size);
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// Event (20 TTIs): Data back and forth
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auto generate_data = [&](uint32_t nof_ttis) {
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for (uint32_t i = 0; i < nof_ttis; ++i) {
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generator.step_tti();
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bool ul_flag = randf() < P_ul_sr, dl_flag = randf() < P_dl;
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if (dl_flag) {
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float exp = dl_data_exps[0] + randf() * (dl_data_exps[1] - dl_data_exps[0]);
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generator.add_dl_data(rnti, pow(10, exp));
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}
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if (ul_flag) {
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float exp = ul_sr_exps[0] + randf() * (ul_sr_exps[1] - ul_sr_exps[0]);
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generator.add_ul_data(rnti, pow(10, exp));
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}
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}
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};
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generate_data(20);
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// Event: Reconf Complete. Activate SCells
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user = generator.user_reconf(rnti);
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user->ue_cfg->supported_cc_list.resize(nof_ccs);
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for (uint32_t i = 0; i < user->ue_cfg->supported_cc_list.size(); ++i) {
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user->ue_cfg->supported_cc_list[i].active = true;
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user->ue_cfg->supported_cc_list[i].enb_cc_idx = i;
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}
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// now we have two CCs
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// Generate a bit more data, now it should go through both cells
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generate_data(20);
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// We should have scheduled the SCell Activation by now
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sim_events.tti_events = std::move(generator.tti_events);
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sim_events.sim_args.nof_ttis = sim_events.tti_events.size();
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return sim_events;
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}
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/******************************
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* Scheduler Tester for CA
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*****************************/
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@ -189,10 +87,12 @@ public:
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// tti specific params
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tti_info_t tti_info;
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uint32_t tti_counter = 0;
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// testers
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std::vector<output_sched_tester> output_tester;
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std::unique_ptr<user_state_sched_tester> ue_tester;
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std::unique_ptr<sched_result_stats> sched_stats;
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private:
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struct ack_info_t {
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@ -219,6 +119,7 @@ int sched_ca_tester::cell_cfg(const std::vector<cell_cfg_t>& cell_params)
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{
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sched::cell_cfg(cell_params); // call parent
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ue_tester.reset(new user_state_sched_tester{cell_params});
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sched_stats.reset(new sched_result_stats{cell_params});
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output_tester.clear();
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output_tester.reserve(cell_params.size());
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for (uint32_t i = 0; i < cell_params.size(); ++i) {
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@ -435,6 +336,8 @@ void sched_ca_tester::run_tti(uint32_t tti_rx, const tti_ev& tti_events)
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process_results();
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set_acks();
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tti_counter++;
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}
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int sched_ca_tester::process_results()
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@ -444,6 +347,7 @@ int sched_ca_tester::process_results()
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TESTASSERT(output_tester[i].test_all(
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tti_info.tti_params, tti_info.dl_sched_result[i], tti_info.ul_sched_result[i]) == SRSLTE_SUCCESS);
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}
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sched_stats->process_results(tti_info.tti_params, tti_info.dl_sched_result, tti_info.ul_sched_result);
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return SRSLTE_SUCCESS;
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}
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@ -504,22 +408,144 @@ int sched_ca_tester::set_acks()
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return SRSLTE_SUCCESS;
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}
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int test_scheduler_ca(const sched_sim_events& sim_events)
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/******************************
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* Scheduler Tests
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*****************************/
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sim_sched_args generate_default_sim_args(uint32_t nof_prb, uint32_t nof_ccs)
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{
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sched_ca_tester tester;
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tester.sim_args = sim_events.sim_args;
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sim_sched_args sim_args;
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// Setup scheduler
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tester.init(nullptr);
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TESTASSERT(tester.cell_cfg(sim_events.sim_args.cell_cfg) == SRSLTE_SUCCESS);
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sim_args.nof_ttis = 10240 + 10;
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sim_args.P_retx = 0.1;
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uint32_t tti_start = 0; // rand_int(0, 10240);
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for (uint32_t nof_ttis = 0; nof_ttis < sim_events.sim_args.nof_ttis; ++nof_ttis) {
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uint32_t tti = (tti_start + nof_ttis) % 10240;
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log_global->step(tti);
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tester.run_tti(tti, sim_events.tti_events[nof_ttis]);
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sim_args.ue_cfg = generate_default_ue_cfg();
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// setup two cells
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std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg(nof_ccs, generate_default_cell_cfg(nof_prb));
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cell_cfg[0].scell_list.resize(1);
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cell_cfg[0].scell_list[0].enb_cc_idx = 1;
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cell_cfg[0].scell_list[0].cross_carrier_scheduling = false;
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cell_cfg[0].scell_list[0].ul_allowed = true;
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cell_cfg[1].cell.id = 2; // id=2
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cell_cfg[1].scell_list = cell_cfg[0].scell_list;
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cell_cfg[1].scell_list[0].enb_cc_idx = 0;
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sim_args.cell_cfg = std::move(cell_cfg);
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sim_args.bearer_cfg = {};
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sim_args.bearer_cfg.direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
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/* Setup Derived Params */
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sim_args.ue_cfg.supported_cc_list.resize(nof_ccs);
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for (uint32_t i = 0; i < sim_args.ue_cfg.supported_cc_list.size(); ++i) {
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sim_args.ue_cfg.supported_cc_list[i].active = true;
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sim_args.ue_cfg.supported_cc_list[i].enb_cc_idx = i;
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}
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return sim_args;
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}
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int run_sim1()
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{
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/* Simulation Configuration Arguments */
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uint32_t nof_prb = 25;
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uint32_t nof_ccs = 2;
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/* Simulation Objects Setup */
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sched_sim_event_generator generator;
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// Setup scheduler
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sched_ca_tester tester;
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tester.sim_args = generate_default_sim_args(nof_prb, nof_ccs);
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tester.init(nullptr);
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TESTASSERT(tester.cell_cfg(tester.sim_args.cell_cfg) == SRSLTE_SUCCESS);
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/* Internal configurations. Do not touch */
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float ul_sr_exps[] = {1, 4}; // log rand
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float dl_data_exps[] = {1, 4}; // log rand
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float P_ul_sr = randf() * 0.5, P_dl = randf() * 0.5;
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uint32_t tti_start = 0; // rand_int(0, 10240);
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const uint16_t rnti1 = 70;
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uint32_t pcell_idx = 0;
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/* Setup Simulation */
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uint32_t prach_tti = 1, msg4_tot_delay = 10; // TODO: check correct value
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uint32_t msg4_size = 20; // TODO: Check
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uint32_t duration = 1000;
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auto process_ttis = [&generator, &tti_start, &tester]() {
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for (; tester.tti_counter <= generator.tti_counter;) {
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uint32_t tti = (tti_start + tester.tti_counter) % 10240;
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log_global->step(tti);
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tester.run_tti(tti, generator.tti_events[tester.tti_counter]);
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}
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};
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/* Simulation */
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// Event PRACH: PRACH takes place for "rnti1", and carrier "pcell_idx"
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generator.step_until(prach_tti);
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tti_ev::user_cfg_ev* user = generator.add_new_default_user(duration);
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user->ue_cfg->supported_cc_list[0].enb_cc_idx = pcell_idx;
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user->rnti = rnti1;
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process_ttis();
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TESTASSERT(tester.ue_tester->user_exists(rnti1));
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// Event (TTI=prach_tti+msg4_tot_delay): First Tx (Msg4). Goes in SRB0 and contains ConRes
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generator.step_tti(msg4_tot_delay);
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generator.add_dl_data(rnti1, msg4_size);
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process_ttis();
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// Event (20 TTIs): Data back and forth
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auto generate_data = [&](uint32_t nof_ttis, float prob_dl, float prob_ul) {
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for (uint32_t i = 0; i < nof_ttis; ++i) {
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generator.step_tti();
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bool ul_flag = randf() < prob_ul, dl_flag = randf() < prob_dl;
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if (dl_flag) {
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float exp = dl_data_exps[0] + randf() * (dl_data_exps[1] - dl_data_exps[0]);
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generator.add_dl_data(rnti1, pow(10, exp));
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}
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if (ul_flag) {
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float exp = ul_sr_exps[0] + randf() * (ul_sr_exps[1] - ul_sr_exps[0]);
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generator.add_ul_data(rnti1, pow(10, exp));
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}
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}
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};
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generate_data(20, P_dl, P_ul_sr);
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process_ttis();
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// Event: Reconf Complete. Activate SCells. Check if CE correctly transmitted
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generator.step_tti();
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user = generator.user_reconf(rnti1);
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*user->ue_cfg = *tester.get_ue_cfg(rnti1); // use current cfg as starting point, and add more supported ccs
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user->ue_cfg->supported_cc_list.resize(nof_ccs);
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for (uint32_t i = 0; i < user->ue_cfg->supported_cc_list.size(); ++i) {
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user->ue_cfg->supported_cc_list[i].active = true;
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user->ue_cfg->supported_cc_list[i].enb_cc_idx = i;
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}
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process_ttis();
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// When a new DL tx takes place, it should also encode the CE
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for (uint32_t i = 0; i < 100; ++i) {
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TESTASSERT(tester.tti_info.dl_sched_result[pcell_idx].nof_data_elems > 0);
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if (tester.tti_info.dl_sched_result[pcell_idx].data[0].nof_pdu_elems[0] > 0) {
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// it is a new DL tx
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TESTASSERT(tester.tti_info.dl_sched_result[pcell_idx].data[0].pdu[0][0].lcid ==
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srslte::sch_subh::cetype::SCELL_ACTIVATION);
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break;
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}
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generator.step_tti();
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process_ttis();
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// now we have two CCs
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}
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// now we have two CCs
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// Event: Generate a bit more data, now it should go through both cells
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generate_data(10, 1.0, 1.0);
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process_ttis();
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TESTASSERT(tester.sched_stats->users[rnti1].tot_dl_sched_data[0] > 0);
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TESTASSERT(tester.sched_stats->users[rnti1].tot_dl_sched_data[1] > 0);
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TESTASSERT(tester.sched_stats->users[rnti1].tot_ul_sched_data[0] > 0);
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TESTASSERT(tester.sched_stats->users[rnti1].tot_ul_sched_data[1] > 0);
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log_global->info("[TESTER] Sim1 finished successfully\n");
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return SRSLTE_SUCCESS;
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}
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@ -530,9 +556,7 @@ int main()
|
|||
uint32_t N_runs = 1;
|
||||
for (uint32_t n = 0; n < N_runs; ++n) {
|
||||
printf("Sim run number: %u\n", n + 1);
|
||||
sched_sim_events sim_events = generate_sim1();
|
||||
|
||||
TESTASSERT(test_scheduler_ca(sim_events) == SRSLTE_SUCCESS);
|
||||
TESTASSERT(run_sim1() == SRSLTE_SUCCESS);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -522,3 +522,31 @@ int user_state_sched_tester::test_all(uint32_t enb
|
|||
TESTASSERT(test_scell_activation(enb_cc_idx, dl_result, ul_result) == SRSLTE_SUCCESS);
|
||||
return SRSLTE_SUCCESS;
|
||||
}
|
||||
|
||||
void sched_result_stats::process_results(const tti_params_t& tti_params,
|
||||
const std::vector<sched_interface::dl_sched_res_t>& dl_result,
|
||||
const std::vector<sched_interface::ul_sched_res_t>& ul_result)
|
||||
{
|
||||
for (uint32_t ccidx = 0; ccidx < dl_result.size(); ++ccidx) {
|
||||
for (uint32_t i = 0; i < dl_result[ccidx].nof_data_elems; ++i) {
|
||||
user_stats* user = get_user(dl_result[ccidx].data[i].dci.rnti);
|
||||
user->tot_dl_sched_data[ccidx] += dl_result[ccidx].data[i].tbs[0];
|
||||
user->tot_dl_sched_data[ccidx] += dl_result[ccidx].data[i].tbs[1];
|
||||
}
|
||||
for (uint32_t i = 0; i < ul_result[ccidx].nof_dci_elems; ++i) {
|
||||
user_stats* user = get_user(ul_result[ccidx].pusch[i].dci.rnti);
|
||||
user->tot_ul_sched_data[ccidx] += ul_result[ccidx].pusch[i].tbs;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sched_result_stats::user_stats* sched_result_stats::get_user(uint16_t rnti)
|
||||
{
|
||||
if (users.count(rnti) != 0) {
|
||||
return &users[rnti];
|
||||
}
|
||||
users[rnti].rnti = rnti;
|
||||
users[rnti].tot_dl_sched_data.resize(cell_params.size(), 0);
|
||||
users[rnti].tot_ul_sched_data.resize(cell_params.size(), 0);
|
||||
return &users[rnti];
|
||||
}
|
||||
|
|
|
@ -123,6 +123,32 @@ private:
|
|||
tti_params_t tti_params{10241};
|
||||
};
|
||||
|
||||
class sched_result_stats
|
||||
{
|
||||
public:
|
||||
explicit sched_result_stats(std::vector<srsenb::sched::cell_cfg_t> cell_params_) :
|
||||
cell_params(std::move(cell_params_))
|
||||
{
|
||||
}
|
||||
|
||||
void process_results(const tti_params_t& tti_params,
|
||||
const std::vector<sched_interface::dl_sched_res_t>& dl_result,
|
||||
const std::vector<sched_interface::ul_sched_res_t>& ul_result);
|
||||
|
||||
struct user_stats {
|
||||
uint16_t rnti;
|
||||
std::vector<uint64_t> tot_dl_sched_data; // includes retxs
|
||||
std::vector<uint64_t> tot_ul_sched_data;
|
||||
};
|
||||
|
||||
std::map<uint16_t, user_stats> users;
|
||||
|
||||
private:
|
||||
user_stats* get_user(uint16_t rnti);
|
||||
|
||||
const std::vector<srsenb::sched::cell_cfg_t> cell_params;
|
||||
};
|
||||
|
||||
} // namespace srsenb
|
||||
|
||||
#endif // SRSLTE_SCHEDULER_TEST_COMMON_H
|
||||
|
|
|
@ -33,8 +33,8 @@
|
|||
* Setup Random generators
|
||||
**************************/
|
||||
|
||||
// uint32_t const seed = std::chrono::system_clock::now().time_since_epoch().count();
|
||||
uint32_t const seed = 2452071795;
|
||||
uint32_t const seed = std::chrono::system_clock::now().time_since_epoch().count();
|
||||
// uint32_t const seed = 2452071795;
|
||||
// uint32_t const seed = 1581009287; // prb==25
|
||||
std::default_random_engine rand_gen(seed);
|
||||
std::uniform_real_distribution<float> unif_dist(0, 1.0);
|
||||
|
@ -134,7 +134,7 @@ struct sched_sim_events {
|
|||
|
||||
struct sched_sim_event_generator {
|
||||
uint16_t next_rnti = 70;
|
||||
uint32_t current_tti = 0;
|
||||
uint32_t tti_counter = 0;
|
||||
|
||||
struct user_data {
|
||||
uint16_t rnti;
|
||||
|
@ -148,29 +148,31 @@ struct sched_sim_event_generator {
|
|||
|
||||
void step_tti(uint32_t nof_ttis = 1)
|
||||
{
|
||||
current_tti += nof_ttis;
|
||||
if (current_tti >= tti_events.size()) {
|
||||
tti_events.resize(current_tti + 1);
|
||||
tti_counter += nof_ttis;
|
||||
if (tti_counter >= tti_events.size()) {
|
||||
tti_events.resize(tti_counter + 1);
|
||||
}
|
||||
rem_old_users();
|
||||
}
|
||||
|
||||
void step_until(uint32_t tti)
|
||||
int step_until(uint32_t tti)
|
||||
{
|
||||
if (current_tti >= tti) {
|
||||
if (tti_counter >= tti) {
|
||||
// error
|
||||
return;
|
||||
return -1;
|
||||
}
|
||||
current_tti = tti;
|
||||
if (current_tti >= tti_events.size()) {
|
||||
tti_events.resize(current_tti + 1);
|
||||
int jump = tti - tti_counter;
|
||||
tti_counter = tti;
|
||||
if (tti_counter >= tti_events.size()) {
|
||||
tti_events.resize(tti_counter + 1);
|
||||
}
|
||||
rem_old_users();
|
||||
return jump;
|
||||
}
|
||||
|
||||
tti_ev::user_cfg_ev* add_new_default_user(uint32_t duration)
|
||||
{
|
||||
std::vector<tti_ev::user_cfg_ev>& user_updates = tti_events[current_tti].user_updates;
|
||||
std::vector<tti_ev::user_cfg_ev>& user_updates = tti_events[tti_counter].user_updates;
|
||||
user_updates.emplace_back();
|
||||
auto& user = user_updates.back();
|
||||
user.rnti = next_rnti++;
|
||||
|
@ -178,7 +180,7 @@ struct sched_sim_event_generator {
|
|||
user.ue_cfg.reset(new srsenb::sched_interface::ue_cfg_t{generate_default_ue_cfg()});
|
||||
current_users.emplace_back();
|
||||
current_users.back().rnti = user.rnti;
|
||||
current_users.back().tti_start = current_tti;
|
||||
current_users.back().tti_start = tti_counter;
|
||||
current_users.back().tti_duration = duration;
|
||||
return &user;
|
||||
}
|
||||
|
@ -187,7 +189,9 @@ struct sched_sim_event_generator {
|
|||
{
|
||||
TESTASSERT(user_exists(rnti));
|
||||
tti_ev::user_cfg_ev* user = get_user_cfg(rnti);
|
||||
user->buffer_ev.reset(new tti_ev::user_buffer_ev{});
|
||||
if (user->buffer_ev == nullptr) {
|
||||
user->buffer_ev.reset(new tti_ev::user_buffer_ev{});
|
||||
}
|
||||
user->buffer_ev->dl_data = new_data;
|
||||
return SRSLTE_SUCCESS;
|
||||
}
|
||||
|
@ -196,8 +200,9 @@ struct sched_sim_event_generator {
|
|||
{
|
||||
TESTASSERT(user_exists(rnti));
|
||||
tti_ev::user_cfg_ev* user = get_user_cfg(rnti);
|
||||
TESTASSERT(user != nullptr);
|
||||
user->buffer_ev.reset(new tti_ev::user_buffer_ev{});
|
||||
if (user->buffer_ev == nullptr) {
|
||||
user->buffer_ev.reset(new tti_ev::user_buffer_ev{});
|
||||
}
|
||||
user->buffer_ev->sr_data = new_data;
|
||||
return SRSLTE_SUCCESS;
|
||||
}
|
||||
|
@ -217,7 +222,7 @@ struct sched_sim_event_generator {
|
|||
private:
|
||||
tti_ev::user_cfg_ev* get_user_cfg(uint16_t rnti)
|
||||
{
|
||||
std::vector<tti_ev::user_cfg_ev>& user_updates = tti_events[current_tti].user_updates;
|
||||
std::vector<tti_ev::user_cfg_ev>& user_updates = tti_events[tti_counter].user_updates;
|
||||
auto it = std::find_if(
|
||||
user_updates.begin(), user_updates.end(), [&rnti](tti_ev::user_cfg_ev& user) { return user.rnti == rnti; });
|
||||
if (it == user_updates.end()) {
|
||||
|
@ -239,7 +244,7 @@ private:
|
|||
{
|
||||
// remove users that pass their connection duration
|
||||
auto rem_it = std::remove_if(current_users.begin(), current_users.end(), [this](const user_data& u) {
|
||||
return u.tti_start + u.tti_duration < current_tti;
|
||||
return u.tti_start + u.tti_duration < tti_counter;
|
||||
});
|
||||
|
||||
// set the call rem_user(...) at the right tti
|
||||
|
|
Loading…
Reference in New Issue