mirror of https://github.com/PentHertz/srsLTE.git
SRSENB: fixes, srsUE attaches srsENB
This commit is contained in:
parent
a4135e41a5
commit
5893f66364
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@ -209,8 +209,9 @@ static int get_pucch(srslte_enb_ul_t* q, srslte_ul_sf_cfg_t* ul_sf, srslte_pucch
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ERROR("Error decoding PUCCH\n");
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} else {
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// If channel selection enabled
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if (uci_cfg_total_ack > 0 && cfg->ack_nack_feedback_mode == SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_CS) {
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// Get PUCCH Format 1b with channel selection if used
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if (uci_cfg_total_ack > 0 && cfg->format == SRSLTE_PUCCH_FORMAT_1B &&
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cfg->ack_nack_feedback_mode == SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_CS) {
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uint8_t b[2] = {pucch_res.uci_data.ack.ack_value[0], pucch_res.uci_data.ack.ack_value[1]};
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srslte_pucch_cs_get_ack(cfg, &cfg->uci_cfg, i, b, &pucch_res.uci_data);
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}
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@ -993,7 +993,13 @@ static void gen_ack_fdd(const srslte_pdsch_ack_t* ack_info, srslte_uci_data_t* u
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uint32_t total_uci_bits =
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tb_count + srslte_cqi_size(&uci_data->cfg.cqi) + (uci_data->value.scheduling_request ? 1 : 0);
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if (ack_info->nof_cc == 1) {
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if (tb_count == 0) {
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// If no PDSCH TB detected, set all to zeros and do not modify the UCI configuration
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for (int i = 0; i < ack_info->nof_cc; i++) {
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uci_data->cfg.ack[i].nof_acks = 0;
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}
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} else if (ack_info->nof_cc == 1) {
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// If only 1 configured cell, report 1 or 2 bits depending on number of detected TB
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uci_data->cfg.ack[0].nof_acks = tb_count;
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} else if (ack_info->ack_nack_feedback_mode == SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_PUCCH3 &&
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@ -1031,7 +1037,7 @@ static void gen_ack_fdd(const srslte_pdsch_ack_t* ack_info, srslte_uci_data_t* u
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// and the CSI is not larger than 22 then the periodic CSI report is multiplexed with HARQ-ACK on PUCCH
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// using the determined PUCCH format 3 resource according to [4]
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for (int i = 0; i < ack_info->nof_cc; i++) {
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uci_data->cfg.ack[i].nof_acks = (tb_count != 0) ? nof_tb : 0;
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uci_data->cfg.ack[i].nof_acks = nof_tb;
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}
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} else {
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// - otherwise, CSI is dropped
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@ -1039,14 +1045,14 @@ static void gen_ack_fdd(const srslte_pdsch_ack_t* ack_info, srslte_uci_data_t* u
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//
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for (int i = 0; i < ack_info->nof_cc; i++) {
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uci_data->cfg.ack[i].nof_acks = (tb_count != 0) ? nof_tb : 0;
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uci_data->cfg.ack[i].nof_acks = nof_tb;
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}
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}
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} else {
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// For 2 or more configured cells, report nof_tb per carrier except if there are no HARQ-ACK bits to report, in
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// which case we set to 0
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for (int i = 0; i < ack_info->nof_cc; i++) {
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uci_data->cfg.ack[i].nof_acks = (tb_count != 0) ? nof_tb : 0;
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uci_data->cfg.ack[i].nof_acks = nof_tb;
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}
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}
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}
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@ -310,7 +310,7 @@ int cc_worker::decode_pusch(stack_interface_phy_lte::ul_sched_grant_t* grants, u
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ue_db[rnti]->is_grant_available = true;
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// Fill UCI configuration
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phy->ue_db.fill_uci_cfg(tti_rx, cc_idx, rnti, grants->dci.cqi_request, phy_cfg.ul_cfg.pucch.uci_cfg);
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phy->ue_db.fill_uci_cfg(tti_rx, cc_idx, rnti, grants->dci.cqi_request, phy_cfg.ul_cfg.pusch.uci_cfg);
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// Compute UL grant
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srslte_pusch_grant_t& grant = phy_cfg.ul_cfg.pusch.grant;
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@ -153,8 +153,8 @@ void phy_ue_db::addmod_rnti(uint16_t
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// Set SCell state, all deactivated by default except PCell
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scell_info.state = scell_idx == 0 ? scell_state_active : scell_state_deactivated;
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} else {
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// Cell without configuration shall be default
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scell_info.state = scell_state_default;
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// Cell without configuration shall be default except if it PCell
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scell_info.state = scell_idx == 0 ? scell_state_active : scell_state_default;
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}
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}
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@ -215,7 +215,6 @@ void phy_ue_db::rem_rnti(uint16_t rnti)
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/* Check SCell is active */ \
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auto& scell_info = ue_db.at(RNTI).scell_info[_get_scell_idx(RNTI, CC_IDX)]; \
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if (scell_info.state != scell_state_active) { \
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ERROR("Failed to assert active cell/carrier %d for RNTI x%x", CC_IDX, RNTI); \
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return RET; \
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} \
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} while (false)
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@ -248,9 +247,9 @@ void phy_ue_db::rem_rnti(uint16_t rnti)
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/* Assert RNTI exists and eNb cell/carrier is configured */ \
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UE_DB_ASSERT_SCELL(RNTI, SCELL_IDX, RET); \
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\
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/* Check SCell is active */ \
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/* Check SCell is active, ignore PCell state */ \
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auto& scell_info = ue_db.at(RNTI).scell_info[SCELL_IDX]; \
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if (scell_info.state != scell_state_active) { \
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if (SCELL_IDX != 0 && scell_info.state != scell_state_active) { \
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ERROR("Failed to assert active SCell %d for RNTI x%x", SCELL_IDX, RNTI); \
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return RET; \
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} \
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@ -291,7 +290,13 @@ srslte::phy_cfg_t phy_ue_db::get_config(uint16_t rnti, uint32_t cc_idx) const
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{
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std::lock_guard<std::mutex> lock(mutex);
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UE_DB_ASSERT_ACTIVE_CELL(rnti, cc_idx, {});
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srslte::phy_cfg_t default_cfg = {};
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default_cfg.set_defaults();
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default_cfg.dl_cfg.pdsch.rnti = rnti;
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default_cfg.ul_cfg.pusch.rnti = rnti;
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default_cfg.ul_cfg.pucch.rnti = rnti;
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UE_DB_ASSERT_ACTIVE_CELL(rnti, cc_idx, default_cfg);
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return ue_db.at(rnti).scell_info[_get_scell_idx(rnti, cc_idx)].phy_cfg;
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}
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@ -334,6 +339,9 @@ bool phy_ue_db::fill_uci_cfg(uint32_t tti,
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{
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std::lock_guard<std::mutex> lock(mutex);
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// Reset UCI CFG, avoid returning carrying cached information
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uci_cfg = {};
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// Assert rnti and cell exits and it is active
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UE_DB_ASSERT_PCELL(rnti, cc_idx, false);
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@ -344,8 +352,6 @@ bool phy_ue_db::fill_uci_cfg(uint32_t tti,
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const auto& pcell_cfg = ue.scell_info[0].phy_cfg;
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bool uci_required = false;
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uci_cfg = {};
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// Check if SR opportunity (will only be used in PUCCH)
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uci_cfg.is_scheduling_request_tti = (srslte_ue_ul_sr_send_tti(&pcell_cfg.ul_cfg.pucch, tti) == 1);
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uci_required |= uci_cfg.is_scheduling_request_tti;
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@ -254,13 +254,15 @@ class dummy_stack : public srsenb::stack_interface_phy_lte
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{
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private:
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static constexpr float prob_dl_grant = 0.50f;
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static constexpr float prob_ul_grant = 0.10f;
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srsenb::phy_cfg_t phy_cfg;
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std::mutex mutex;
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std::condition_variable cvar;
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srslte::log_filter log_h;
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srslte::tti_sync_cv tti_sync;
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srslte_softbuffer_tx_t softbuffer_tx = {};
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srslte_softbuffer_rx_t softbuffer_rx = {};
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srslte_softbuffer_rx_t softbuffer_rx[SRSLTE_FDD_NOF_HARQ] = {};
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uint8_t* data = nullptr;
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uint16_t ue_rnti = 0;
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srslte_random_t random_gen = nullptr;
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@ -285,8 +287,15 @@ private:
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uint32_t tti;
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uint32_t cc_idx;
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uint32_t tb_idx;
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uint32_t ack;
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} tti_dl_info_t;
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typedef struct {
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uint32_t tti;
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uint32_t cc_idx;
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bool crc;
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} tti_ul_info_t;
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typedef struct {
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uint32_t tti;
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} tti_sr_info_t;
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@ -299,15 +308,20 @@ private:
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std::queue<tti_dl_info_t> tti_dl_info_sched_queue;
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std::queue<tti_dl_info_t> tti_dl_info_ack_queue;
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std::queue<tti_ul_info_t> tti_ul_info_sched_queue;
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std::queue<tti_ul_info_t> tti_ul_info_ack_queue;
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std::queue<tti_sr_info_t> tti_sr_info_queue;
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std::queue<tti_cqi_info_t> tti_cqi_info_queue;
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public:
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explicit dummy_stack(uint16_t rnti_) : log_h("STACK"), ue_rnti(rnti_), random_gen(srslte_random_init(0))
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explicit dummy_stack(uint16_t rnti_, srsenb::phy_cfg_t& phy_cfg_) :
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log_h("STACK"), ue_rnti(rnti_), random_gen(srslte_random_init(0)), phy_cfg(phy_cfg_)
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{
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log_h.set_level("info");
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srslte_softbuffer_tx_init(&softbuffer_tx, SRSLTE_MAX_PRB);
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srslte_softbuffer_rx_init(&softbuffer_rx, SRSLTE_MAX_PRB);
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for (auto& sb : softbuffer_rx) {
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srslte_softbuffer_rx_init(&sb, SRSLTE_MAX_PRB);
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}
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data = srslte_vec_u8_malloc(150000);
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memset(data, 0, 150000);
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}
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@ -315,8 +329,9 @@ public:
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~dummy_stack()
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{
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srslte_softbuffer_tx_free(&softbuffer_tx);
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srslte_softbuffer_rx_free(&softbuffer_rx);
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for (auto& sb : softbuffer_rx) {
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srslte_softbuffer_rx_free(&sb);
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}
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if (data) {
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free(data);
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}
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@ -377,15 +392,25 @@ public:
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tti_dl_info.tti = tti;
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tti_dl_info.cc_idx = cc_idx;
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tti_dl_info.tb_idx = 0;
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tti_dl_info.ack = ack;
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tti_dl_info_ack_queue.push(tti_dl_info);
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log_h.info("Received ACK tti=%d; rnti=x%x; cc=%d; tb=%d; ack=%d;\n", tti, rnti, cc_idx, tb_idx, ack);
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log_h.info("Received DL ACK tti=%d; rnti=x%x; cc=%d; tb=%d; ack=%d;\n", tti, rnti, cc_idx, tb_idx, ack);
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notify_ack_info();
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return 0;
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}
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int crc_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t nof_bytes, bool crc_res) override
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{
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// Push grant info in queue
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tti_ul_info_t tti_ul_info = {};
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tti_ul_info.tti = tti;
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tti_ul_info.cc_idx = cc_idx;
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tti_ul_info.crc = crc_res;
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tti_ul_info_ack_queue.push(tti_ul_info);
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log_h.info("Received UL ACK tti=%d; rnti=x%x; cc=%d; ack=%d;\n", tti, rnti, cc_idx, crc_res);
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notify_crc_info();
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return 0;
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}
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int get_dl_sched(uint32_t tti, dl_sched_list_t& dl_sched_res) override
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@ -396,11 +421,12 @@ public:
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// Wait for UE
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tti_sync.wait();
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// Iterate for each carrier
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for (uint32_t cc_idx = 0; cc_idx < dl_sched_res.size(); cc_idx++) {
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auto& dl_sched = dl_sched_res[cc_idx];
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// Required
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dl_sched.cfi = 1;
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dl_sched.cfi = 2; ///< Make sure it works in the smallest PRB size
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// Random decision on whether transmit or not
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if (srslte_random_bool(random_gen, prob_dl_grant)) {
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@ -429,6 +455,7 @@ public:
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tti_dl_info.tti = tti;
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tti_dl_info.cc_idx = cc_idx;
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tti_dl_info.tb_idx = 0;
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tti_dl_info.ack = true;
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// Push to queue
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tti_dl_info_sched_queue.push(tti_dl_info);
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@ -446,7 +473,54 @@ public:
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}
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int get_ul_sched(uint32_t tti, ul_sched_list_t& ul_sched_res) override
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{
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// Notify test engine
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notify_get_ul_sched();
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// Iterate for each carrier
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for (uint32_t cc_idx = 0; cc_idx < ul_sched_res.size(); cc_idx++) {
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auto& ul_sched = ul_sched_res[cc_idx];
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// Random decision on whether transmit or not (Do not give grants for TTI when SR shall be transmitted)
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if (srslte_random_bool(random_gen, prob_ul_grant) && (tti % 20 != 0)) {
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uint32_t nof_prb = phy_cfg.phy_cell_cfg[cc_idx].cell.nof_prb;
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ul_sched.nof_grants = 1;
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ul_sched.pusch[0] = {};
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ul_sched.pusch[0].dci.rnti = ue_rnti;
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ul_sched.pusch[0].dci.format = SRSLTE_DCI_FORMAT0;
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ul_sched.pusch[0].dci.location.ncce = 1;
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ul_sched.pusch[0].dci.location.L = 1;
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ul_sched.pusch[0].dci.type2_alloc.riv = srslte_ra_type2_to_riv(nof_prb - 2, 1, nof_prb);
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ul_sched.pusch[0].dci.type2_alloc.n_prb1a = srslte_ra_type2_t::SRSLTE_RA_TYPE2_NPRB1A_2;
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ul_sched.pusch[0].dci.type2_alloc.n_gap = srslte_ra_type2_t::SRSLTE_RA_TYPE2_NG1;
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ul_sched.pusch[0].dci.type2_alloc.mode = srslte_ra_type2_t::SRSLTE_RA_TYPE2_LOC;
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ul_sched.pusch[0].dci.freq_hop_fl = srslte_dci_ul_t::SRSLTE_RA_PUSCH_HOP_DISABLED;
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ul_sched.pusch[0].dci.tb.mcs_idx = 20;
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ul_sched.pusch[0].dci.tb.rv = 0;
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ul_sched.pusch[0].dci.tb.ndi = false;
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ul_sched.pusch[0].dci.tb.cw_idx = 0;
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ul_sched.pusch[0].dci.n_dmrs = 0;
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ul_sched.pusch[0].dci.cqi_request = false;
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ul_sched.pusch[0].data = data;
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ul_sched.pusch[0].needs_pdcch = true;
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ul_sched.pusch[0].softbuffer_rx = &softbuffer_rx[tti % SRSLTE_FDD_NOF_HARQ];
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// Reset Rx softbuffer
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srslte_softbuffer_rx_reset(ul_sched.pusch[0].softbuffer_rx);
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// Push grant info in queue
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tti_ul_info_t tti_ul_info = {};
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tti_ul_info.tti = tti;
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tti_ul_info.cc_idx = cc_idx;
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tti_ul_info.crc = true;
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// Push to queue
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tti_ul_info_sched_queue.push(tti_ul_info);
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} else {
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ul_sched.nof_grants = 0;
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}
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}
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return 0;
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}
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void set_sched_dl_tti_mask(uint8_t* tti_mask, uint32_t nof_sfs) override { notify_set_sched_dl_tti_mask(); }
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@ -459,7 +533,7 @@ public:
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}
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int run_tti()
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{
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// Check ACKs match with grants
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// Check DL ACKs match with grants
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while (!tti_dl_info_ack_queue.empty()) {
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// Get both Info
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tti_dl_info_t& tti_dl_sched = tti_dl_info_sched_queue.front();
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@ -472,11 +546,27 @@ public:
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TESTASSERT(tti_dl_sched.tti == tti_dl_ack.tti);
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TESTASSERT(tti_dl_sched.cc_idx == tti_dl_ack.cc_idx);
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TESTASSERT(tti_dl_sched.tb_idx == tti_dl_ack.tb_idx);
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TESTASSERT(tti_dl_sched.ack == tti_dl_ack.ack);
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tti_dl_info_sched_queue.pop();
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tti_dl_info_ack_queue.pop();
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}
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// Check UL ACKs match with grants
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while (!tti_ul_info_ack_queue.empty()) {
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// Get both Info
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tti_ul_info_t& tti_ul_sched = tti_ul_info_sched_queue.front();
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tti_ul_info_t& tti_ul_ack = tti_ul_info_ack_queue.front();
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// Assert that ACKs have been received
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TESTASSERT(tti_ul_sched.tti == tti_ul_ack.tti);
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TESTASSERT(tti_ul_sched.cc_idx == tti_ul_ack.cc_idx);
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TESTASSERT(tti_ul_sched.crc == tti_ul_ack.crc);
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tti_ul_info_sched_queue.pop();
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tti_ul_info_ack_queue.pop();
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}
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// Check SR match with TTI
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while (tti_sr_info_queue.size() > 1) {
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tti_sr_info_t tti_sr_info1 = tti_sr_info_queue.front();
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@ -593,11 +683,14 @@ public:
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}
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// Initialise dummy tx data
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tx_data = srslte_vec_u8_malloc(150000);
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tx_data = srslte_vec_u8_malloc(SRSENB_MAX_BUFFER_SIZE_BYTES);
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if (!tx_data) {
|
||||
ERROR("Allocating Tx data\n");
|
||||
}
|
||||
memset(tx_data, 0, 150000);
|
||||
|
||||
for (uint32_t i = 0; i < SRSENB_MAX_BUFFER_SIZE_BYTES; i++) {
|
||||
tx_data[i] = static_cast<uint8_t>(((i + 257) * (i + 373)) % 255); ///< Creative random data generator
|
||||
}
|
||||
|
||||
// Push HARQ delay to radio
|
||||
for (uint32_t i = 0; i < TX_DELAY; i++) {
|
||||
|
@ -636,9 +729,8 @@ public:
|
|||
|
||||
int run_tti()
|
||||
{
|
||||
srslte_dci_ul_t dci_ul[SRSLTE_MAX_DCI_MSG] = {};
|
||||
int ret = SRSLTE_SUCCESS;
|
||||
srslte_uci_data_t uci_data = {};
|
||||
int ret = SRSLTE_SUCCESS;
|
||||
srslte_uci_data_t uci_data = {};
|
||||
|
||||
// Set logging TTI
|
||||
log_h.step(sf_dl_cfg.tti);
|
||||
|
@ -648,6 +740,10 @@ public:
|
|||
srslte_pdsch_ack_t pdsch_ack = {};
|
||||
pdsch_ack.ack_nack_feedback_mode = dedicated.ul_cfg.pucch.ack_nack_feedback_mode;
|
||||
pdsch_ack.nof_cc = (uint32_t)buffers.size();
|
||||
pdsch_ack.transmission_mode = dedicated.dl_cfg.tm;
|
||||
pdsch_ack.nof_cc = buffers.size();
|
||||
pdsch_ack.ack_nack_feedback_mode = dedicated.ul_cfg.pucch.ack_nack_feedback_mode;
|
||||
pdsch_ack.simul_cqi_ack = dedicated.ul_cfg.pucch.simul_cqi_ack;
|
||||
|
||||
// Read DL
|
||||
TESTASSERT(radio->read_tx(buffers, sf_len) >= SRSLTE_SUCCESS);
|
||||
|
@ -695,20 +791,41 @@ public:
|
|||
pdsch_ack.cc[i].m[0].present = false;
|
||||
}
|
||||
|
||||
// Get UL grants
|
||||
int nof_ul_grants = srslte_ue_dl_find_ul_dci(ue_dl_v[i], &sf_dl_cfg, &ue_dl_cfg, rnti, &dci_ul[i]);
|
||||
TESTASSERT(nof_ul_grants >= SRSLTE_SUCCESS);
|
||||
|
||||
// Generate CQI periodic if required
|
||||
srslte_ue_dl_gen_cqi_periodic(ue_dl_v[i], &ue_dl_cfg, 0x0f, sf_ul_cfg.tti, &uci_data);
|
||||
}
|
||||
|
||||
// Work UL
|
||||
for (uint32_t i = 0; i < buffers.size(); i++) {
|
||||
srslte_dci_ul_t dci_ul[SRSLTE_MAX_DCI_MSG] = {};
|
||||
|
||||
srslte_ue_ul_cfg_t ue_ul_cfg = {};
|
||||
ue_ul_cfg.ul_cfg = dedicated.ul_cfg;
|
||||
ue_ul_cfg.ul_cfg.pusch.softbuffers.tx = &softbuffer_tx;
|
||||
ue_ul_cfg.ul_cfg.pusch.rnti = rnti;
|
||||
ue_ul_cfg.ul_cfg.pucch.rnti = rnti;
|
||||
ue_ul_cfg.cc_idx = i;
|
||||
|
||||
srslte_ue_dl_cfg_t ue_dl_cfg = {};
|
||||
ue_dl_cfg.cfg = dedicated.dl_cfg;
|
||||
ue_dl_cfg.cfg.cqi_report.periodic_mode = SRSLTE_CQI_MODE_12;
|
||||
ue_dl_cfg.cfg.cqi_report.pmi_idx += i;
|
||||
ue_dl_cfg.cfg.pdsch.rnti = rnti;
|
||||
|
||||
// Get UL grants
|
||||
int nof_ul_grants = srslte_ue_dl_find_ul_dci(ue_dl_v[i], &sf_dl_cfg, &ue_dl_cfg, rnti, dci_ul);
|
||||
TESTASSERT(nof_ul_grants >= SRSLTE_SUCCESS);
|
||||
|
||||
srslte_pusch_data_t pusch_data = {};
|
||||
pusch_data.ptr = tx_data;
|
||||
|
||||
if (nof_ul_grants > SRSLTE_SUCCESS) {
|
||||
TESTASSERT(srslte_ue_ul_dci_to_pusch_grant(
|
||||
ue_ul_v[i], &sf_ul_cfg, &ue_ul_cfg, dci_ul, &ue_ul_cfg.ul_cfg.pusch.grant) >= SRSLTE_SUCCESS);
|
||||
|
||||
ue_ul_cfg.ul_cfg.pusch.softbuffers.tx = &softbuffer_tx;
|
||||
ue_ul_cfg.grant_available = true;
|
||||
}
|
||||
|
||||
// Generate
|
||||
if (i == 0) {
|
||||
|
@ -716,12 +833,9 @@ public:
|
|||
srslte_ue_ul_gen_sr(&ue_ul_cfg, &sf_ul_cfg, &uci_data, (bool)(sf_ul_cfg.tti % 20 == 0));
|
||||
|
||||
// Generate Acknowledgements
|
||||
srslte_ue_dl_gen_ack(&ue_dl_v[0]->cell, &sf_dl_cfg, &pdsch_ack, &uci_data);
|
||||
srslte_ue_dl_gen_ack(&ue_dl_v[i]->cell, &sf_dl_cfg, &pdsch_ack, &uci_data);
|
||||
}
|
||||
|
||||
srslte_pusch_data_t pusch_data = {};
|
||||
pusch_data.ptr = tx_data;
|
||||
|
||||
// Set UCI only for PCel
|
||||
if (i == 0) {
|
||||
pusch_data.uci = uci_data.value;
|
||||
|
@ -772,7 +886,7 @@ public:
|
|||
uint32_t pcell_index,
|
||||
const srslte::phy_cfg_t& dedicated_) :
|
||||
log_h("TEST BENCH"),
|
||||
stack(rnti_),
|
||||
stack(rnti_, phy_cfg),
|
||||
rnti(rnti_),
|
||||
radio(phy_cfg.phy_cell_cfg.size()),
|
||||
enb_phy(&logger_stdout),
|
||||
|
@ -794,7 +908,7 @@ public:
|
|||
bool activation[SRSLTE_MAX_CARRIERS] = {};
|
||||
uint32_t pcell_idx = 0;
|
||||
srsenb::phy_interface_rrc_lte::phy_rrc_dedicated_list_t dedicated_list(4);
|
||||
for (uint32_t i = 0; i < 4; i++) {
|
||||
for (uint32_t i = 0; i < phy_cfg.phy_cell_cfg.size(); i++) {
|
||||
dedicated_list[i].cc_idx = (i + pcell_idx) % phy_cfg.phy_cell_cfg.size();
|
||||
dedicated_list[i].configured = true;
|
||||
dedicated_list[i].phy_cfg = common_dedicated;
|
||||
|
@ -833,13 +947,15 @@ public:
|
|||
|
||||
int main(int argc, char** argv)
|
||||
{
|
||||
uint32_t nof_carriers = 2;
|
||||
|
||||
srsenb::phy_args_t phy_args;
|
||||
|
||||
phy_args.log.phy_level = "info";
|
||||
phy_args.nof_phy_threads = 1; ///< Set number of phy threads to 1 for avoiding concurrency issues
|
||||
|
||||
srsenb::phy_cfg_t phy_cfg = {};
|
||||
for (uint32_t i = 0; i < 4; i++) {
|
||||
for (uint32_t i = 0; i < nof_carriers; i++) {
|
||||
srsenb::phy_cell_cfg_t phy_cell_cfg = {};
|
||||
|
||||
phy_cell_cfg.cell.nof_prb = 6;
|
||||
|
@ -854,7 +970,7 @@ int main(int argc, char** argv)
|
|||
phy_cfg.phy_cell_cfg.push_back(phy_cell_cfg);
|
||||
}
|
||||
|
||||
phy_cfg.pucch_cnfg.delta_pucch_shift = asn1::rrc::pucch_cfg_common_s::delta_pucch_shift_e_::ds1;
|
||||
phy_cfg.pucch_cnfg.delta_pucch_shift = asn1::rrc::pucch_cfg_common_s::delta_pucch_shift_e_::ds3;
|
||||
phy_cfg.prach_cnfg.root_seq_idx = 0;
|
||||
phy_cfg.prach_cnfg.prach_cfg_info.high_speed_flag = false;
|
||||
phy_cfg.prach_cnfg.prach_cfg_info.prach_cfg_idx = 3;
|
||||
|
@ -863,8 +979,8 @@ int main(int argc, char** argv)
|
|||
|
||||
// Set UE dedicated configuration
|
||||
srslte::phy_cfg_t dedicated = {};
|
||||
dedicated.ul_cfg.pucch.ack_nack_feedback_mode = SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_PUCCH3;
|
||||
dedicated.ul_cfg.pucch.delta_pucch_shift = 1;
|
||||
dedicated.ul_cfg.pucch.ack_nack_feedback_mode = SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_CS;
|
||||
dedicated.ul_cfg.pucch.delta_pucch_shift = 2;
|
||||
dedicated.ul_cfg.pucch.n_rb_2 = 2;
|
||||
dedicated.ul_cfg.pucch.N_cs = 0;
|
||||
dedicated.ul_cfg.pucch.n_pucch_sr = 1;
|
||||
|
@ -873,10 +989,21 @@ int main(int argc, char** argv)
|
|||
dedicated.ul_cfg.pucch.simul_cqi_ack = true;
|
||||
dedicated.ul_cfg.pucch.sr_configured = true;
|
||||
dedicated.ul_cfg.pucch.I_sr = 5;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[0][0] = 6;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[1][0] = 6;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[2][0] = 6;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[3][0] = 6;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[0][1] = 7;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[1][1] = 7;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[2][1] = 7;
|
||||
dedicated.ul_cfg.pucch.n1_pucch_an_cs[3][1] = 7;
|
||||
dedicated.dl_cfg.cqi_report.periodic_configured = true;
|
||||
dedicated.dl_cfg.cqi_report.pmi_idx = 25;
|
||||
dedicated.dl_cfg.cqi_report.periodic_mode = SRSLTE_CQI_MODE_20;
|
||||
|
||||
// Asssert PUCCH dedicated configuration has PUCCH 1b collisions
|
||||
TESTASSERT(srslte_pucch_cfg_assert(&phy_cfg.phy_cell_cfg[0].cell, &dedicated.ul_cfg.pucch) == SRSLTE_SUCCESS);
|
||||
|
||||
std::unique_ptr<phy_test_bench> test_bench =
|
||||
std::unique_ptr<phy_test_bench>(new phy_test_bench(phy_args, phy_cfg, 0x1234, 0, dedicated));
|
||||
|
||||
|
|
Loading…
Reference in New Issue