diff --git a/lib/src/phy/ue/test/CMakeLists.txt b/lib/src/phy/ue/test/CMakeLists.txt index 9f611f57e..efa8c232b 100644 --- a/lib/src/phy/ue/test/CMakeLists.txt +++ b/lib/src/phy/ue/test/CMakeLists.txt @@ -57,4 +57,5 @@ endforeach () #add_test(ue_dl_nr_pci500_rb52_n4_ra_L2_ncce0 ue_dl_nr_file_test -f ${CMAKE_CURRENT_SOURCE_DIR}/ue_dl_nr_pci500_rb52_n4_ra_L2_ncce0.dat -i 1 -P 52 -n 4 -R 7f) add_test(ue_dl_nr_pci500_rb52_si_coreset0_idx6 ue_dl_nr_file_test -f ${CMAKE_CURRENT_SOURCE_DIR}/ue_dl_nr_pci500_rb52_si_coreset0_idx6_s15.36e6.dat -S -i 500 -P 52 -n 0 -R ffff -T si -c 6 -s common0 -A 368500 -a 368410) #add_test(ue_dl_nr_pci500_rb52_si_coreset0_idx7 ue_dl_nr_file_test -f ${CMAKE_CURRENT_SOURCE_DIR}/ue_dl_nr_pci500_rb52_si_coreset0_idx7_s15.36e6.dat -S -i 500 -P 52 -n 0 -R ffff -T si -c 7 -s common0 -A 161200 -a 161290) -#add_test(ue_dl_nr_pci500_rb52_pdsch ue_dl_nr_file_test -f ${CMAKE_CURRENT_SOURCE_DIR}/ue_dl_nr_pci500_rb52_rnti0x100_s15.36e6.dat -S -i 500 -P 52 -n 0 -R ffff -T si -o 2 -s common3) \ No newline at end of file +#add_test(ue_dl_nr_pci500_rb52_pdsch ue_dl_nr_file_test -f ${CMAKE_CURRENT_SOURCE_DIR}/ue_dl_nr_pci500_rb52_rnti0x100_s15.36e6.dat -S -i 500 -P 52 -n 0 -R ffff -T si -o 2 -s common3) +add_test(ue_dl_nr_pci500_rb52_rar ue_dl_nr_file_test -f ${CMAKE_CURRENT_SOURCE_DIR}/ue_dl_nr_pci500_rb52_rar_s15.36e6.dat -i 500 -P 52 -n 5 -R f -T ra -c 6 -S -s common1 -A 368500 -a 368410) diff --git a/lib/src/phy/ue/test/ue_dl_nr_file_test.cc b/lib/src/phy/ue/test/ue_dl_nr_file_test.cc index 103e48545..b437e9559 100644 --- a/lib/src/phy/ue/test/ue_dl_nr_file_test.cc +++ b/lib/src/phy/ue/test/ue_dl_nr_file_test.cc @@ -194,6 +194,13 @@ static int work_ue_dl(srsran_ue_dl_nr_t* ue_dl, srsran_slot_cfg_t* slot) // Convert DCI to PDSCH transmission srsran_sch_cfg_nr_t pdsch_cfg = {}; + if (rnti_type == srsran_rnti_type_ra) { + pdsch_hl_cfg.common_time_ra[0].k = 0; + pdsch_hl_cfg.common_time_ra[0].mapping_type = srsran_sch_mapping_type_A; + pdsch_hl_cfg.common_time_ra[0].sliv = + srsran_ra_type2_to_riv(SRSRAN_NSYMB_PER_SLOT_NR - 1, 1, SRSRAN_NSYMB_PER_SLOT_NR); + pdsch_hl_cfg.nof_common_time_ra = 1; + } if (srsran_ra_dl_dci_to_grant_nr(&carrier, slot, &pdsch_hl_cfg, &dci_dl_rx, &pdsch_cfg, &pdsch_cfg.grant) < SRSRAN_SUCCESS) { ERROR("Error decoding PDSCH search"); @@ -314,7 +321,7 @@ int main(int argc, char** argv) srsran_coreset_t* coreset = NULL; // Configure CORESET - if (rnti_type == srsran_rnti_type_si) { + if (rnti_type == srsran_rnti_type_si || rnti_type == srsran_rnti_type_ra) { // configure to use coreset0 coreset = &pdcch_cfg.coreset[0]; pdcch_cfg.coreset_present[0] = true; @@ -346,7 +353,7 @@ int main(int argc, char** argv) pdsch_hl_cfg.typeA_pos = srsran_dmrs_sch_typeA_pos_2; // set coreset0 bandwidth - dci_cfg.coreset0_bw = srsran_coreset_get_bw(coreset); + dci_cfg.coreset0_bw = srsran_coreset_get_bw(coreset); } else { // configure to use coreset1 coreset = &pdcch_cfg.coreset[1]; @@ -368,7 +375,7 @@ int main(int argc, char** argv) srsran_search_space_t* search_space = &pdcch_cfg.search_space[0]; pdcch_cfg.search_space_present[0] = true; search_space->id = 0; - search_space->coreset_id = (rnti_type == srsran_rnti_type_si) ? 0 : 1; + search_space->coreset_id = (rnti_type == srsran_rnti_type_si || rnti_type == srsran_rnti_type_ra) ? 0 : 1; search_space->type = ss_type; search_space->formats[0] = srsran_dci_format_nr_0_0; search_space->formats[1] = srsran_dci_format_nr_1_0; diff --git a/lib/src/phy/ue/test/ue_dl_nr_pci500_rb52_rar_s15.36e6.dat b/lib/src/phy/ue/test/ue_dl_nr_pci500_rb52_rar_s15.36e6.dat new file mode 100644 index 000000000..3b96f8307 Binary files /dev/null and b/lib/src/phy/ue/test/ue_dl_nr_pci500_rb52_rar_s15.36e6.dat differ