mirror of https://github.com/PentHertz/srsLTE.git
Added SCS to string and corrected coreset0
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@ -410,11 +410,8 @@ typedef struct SRSRAN_API {
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uint32_t duration;
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bool freq_resources[SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE];
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srsran_coreset_bundle_size_t interleaver_size;
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uint32_t offset_rb; ///< Defined by TS 36.213 section 13 UE procedure for monitoring Type0-PDCCH CSS sets:
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///< Offset respect to the SCS of the CORESET for Type0-PDCCH CSS set, provided by
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///< subCarrierSpacingCommon, from the smallest RB index of the CORESET for Type0-PDCCH CSS set
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///< to the smallest RB index of the common RB overlapping with the first RB of the
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///< corresponding SS/PBCH block.
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uint32_t offset_rb; ///< Integer offset in resource blocks from the pointA (lowest subcarrier of resource grid) to the
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///< lowest resource block of the CORESET region (used by CORESET Zero only)
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bool dmrs_scrambling_id_present;
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uint32_t dmrs_scrambling_id;
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srsran_coreset_precoder_granularity_t precoder_granularity;
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@ -605,6 +602,13 @@ SRSRAN_API uint32_t srsran_csi_meas_info(const srsran_csi_trs_measurements_t* me
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*/
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SRSRAN_API srsran_subcarrier_spacing_t srsran_subcarrier_spacing_from_str(const char* str);
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/**
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* @brief Converts a given subcarrier spacing to string
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* @param scs Subcarrier spacing
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* @return A constant string pointer
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*/
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SRSRAN_API const char* srsran_subcarrier_spacing_to_str(srsran_subcarrier_spacing_t scs);
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/**
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* @brief Combine Channel State Information from Tracking Reference Signals (CSI-TRS)
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* @param[in] a CSI-RS measurement
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@ -618,13 +622,15 @@ SRSRAN_API void srsran_combine_csi_trs_measurements(const srsran_csi_trs_measure
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/**
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* @brief Setup CORESET Zero from a configuration index
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* @remark Defined by TS 38.213 tables 13-1, 13-2, 13-3, 13-4, 13-5, 13-6, 13-7, 13-8, 13-9, 13-10
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* @param ssb_pointA_freq_offset_Hz Integer frequency offset in Hz between the SS/PBCH block center and pointA
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* @param ssb_scs SS/PBCH block subcarrier spacing
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* @param pdcch_scs PDCCH subcarrier spacing
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* @param idx CORESET Zero configuration index
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* @param[out] coreset Points to the resultant CORESET
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* @return SRSLTE_SUCCESS if the given inputs lead to a valid CORESET configuration, otherise SRSLTE_ERROR code
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*/
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SRSRAN_API int srsran_coreset_zero(srsran_subcarrier_spacing_t ssb_scs,
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SRSRAN_API int srsran_coreset_zero(uint32_t ssb_pointA_freq_offset_Hz,
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srsran_subcarrier_spacing_t ssb_scs,
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srsran_subcarrier_spacing_t pdcch_scs,
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uint32_t idx,
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srsran_coreset_t* coreset);
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@ -361,6 +361,25 @@ srsran_subcarrier_spacing_t srsran_subcarrier_spacing_from_str(const char* str)
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return srsran_subcarrier_spacing_invalid;
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}
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const char* srsran_subcarrier_spacing_to_str(srsran_subcarrier_spacing_t scs)
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{
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switch (scs) {
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case srsran_subcarrier_spacing_15kHz:
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return "15kHz";
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case srsran_subcarrier_spacing_30kHz:
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return "30kHz";
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case srsran_subcarrier_spacing_60kHz:
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return "60kHz";
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case srsran_subcarrier_spacing_120kHz:
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return "120kHz";
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case srsran_subcarrier_spacing_240kHz:
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return "240kHz";
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case srsran_subcarrier_spacing_invalid:
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default:
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return "invalid";
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}
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}
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void srsran_combine_csi_trs_measurements(const srsran_csi_trs_measurements_t* a,
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const srsran_csi_trs_measurements_t* b,
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srsran_csi_trs_measurements_t* dst)
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@ -395,7 +414,11 @@ typedef struct {
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uint32_t mux_pattern;
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uint32_t nof_prb;
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uint32_t nof_symb;
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uint32_t offset_rb;
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uint32_t offset_rb; ///< Defined by TS 36.213 section 13 UE procedure for monitoring Type0-PDCCH CSS sets:
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///< Offset respect to the SCS of the CORESET for Type0-PDCCH CSS set, provided by
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///< subCarrierSpacingCommon, from the smallest RB index of the CORESET for Type0-PDCCH CSS set
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///< to the smallest RB index of the common RB overlapping with the first RB of the
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///< corresponding SS/PBCH block.
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} coreset_zero_entry_t;
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static const coreset_zero_entry_t coreset_zero_15_15[16] = {
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@ -455,13 +478,15 @@ static const coreset_zero_entry_t coreset_zero_30_15[16] = {
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{},
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};
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int srsran_coreset_zero(srsran_subcarrier_spacing_t ssb_scs,
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int srsran_coreset_zero(uint32_t ssb_pointA_freq_offset_Hz,
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srsran_subcarrier_spacing_t ssb_scs,
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srsran_subcarrier_spacing_t pdcch_scs,
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uint32_t idx,
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srsran_coreset_t* coreset)
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{
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// Verify inputs
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if (coreset == NULL || idx >= 16) {
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ERROR("Invalid CORESET Zero inputs. coreset=%p, idx=%d", coreset, idx);
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return SRSRAN_ERROR_INVALID_INPUTS;
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}
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@ -490,21 +515,39 @@ int srsran_coreset_zero(srsran_subcarrier_spacing_t ssb_scs,
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// Check a valid entry has been selected
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if (entry == NULL) {
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ERROR("Unhandled case ssb_scs=%d, pdcch_scs=%d", (int)ssb_scs, (int)pdcch_scs);
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ERROR("Unhandled case ssb_scs=%s, pdcch_scs=%s",
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srsran_subcarrier_spacing_to_str(ssb_scs),
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srsran_subcarrier_spacing_to_str(pdcch_scs));
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return SRSRAN_ERROR;
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}
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if (entry->nof_prb == 0) {
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ERROR("Reserved case ssb_scs=%d, pdcch_scs=%d, idx=%d", (int)ssb_scs, (int)pdcch_scs, idx);
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ERROR("Reserved case ssb_scs=%s, pdcch_scs=%s, idx=%d",
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srsran_subcarrier_spacing_to_str(ssb_scs),
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srsran_subcarrier_spacing_to_str(pdcch_scs),
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idx);
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return SRSRAN_ERROR;
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}
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// Calculate CORESET offset in RB
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uint32_t ssb_half_bw_Hz = SRSRAN_SUBC_SPACING_NR(ssb_scs) * (SRSRAN_SSB_BW_SUBC / 2U);
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if (ssb_pointA_freq_offset_Hz > ssb_half_bw_Hz) {
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// Move SSB center to lowest SSB subcarrier
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ssb_pointA_freq_offset_Hz -= ssb_half_bw_Hz;
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} else {
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ssb_pointA_freq_offset_Hz = 0;
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}
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uint32_t ssb_pointA_freq_offset_rb =
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SRSRAN_FLOOR(ssb_pointA_freq_offset_Hz, SRSRAN_NRE * SRSRAN_SUBC_SPACING_NR(pdcch_scs));
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uint32_t offset_rb =
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(ssb_pointA_freq_offset_rb > entry->offset_rb) ? (ssb_pointA_freq_offset_rb - entry->offset_rb) : 0;
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// Set CORESET fields
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coreset->id = 0;
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coreset->dmrs_scrambling_id_present = false;
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coreset->mapping_type = srsran_coreset_mapping_type_non_interleaved;
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coreset->duration = entry->nof_symb;
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coreset->offset_rb = entry->offset_rb;
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coreset->offset_rb = offset_rb;
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// Set CORESET frequency resource mask
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for (uint32_t i = 0; i < SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE; i++) {
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