mirror of https://github.com/PentHertz/srsLTE.git
implemented a DFS-based PDCCH allocator
This commit is contained in:
Francisco
Francisco Paisana
parent
a2e2501424
commit
8347cabe4f
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@ -14,6 +14,7 @@
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#define SRSLTE_SCHED_GRID_H
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#include "lib/include/srslte/interfaces/sched_interface.h"
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#include "sched_phy_ch/sched_result.h"
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#include "sched_phy_ch/sf_cch_allocator.h"
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#include "sched_ue.h"
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#include "srslte/adt/bounded_bitset.h"
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@ -37,16 +38,6 @@ enum class alloc_result {
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};
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const char* to_string(alloc_result res);
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//! Result of a Subframe sched computation
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struct cc_sched_result {
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bool generated = false;
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rbgmask_t dl_mask = {}; ///< Accumulation of all DL RBG allocations
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prbmask_t ul_mask = {}; ///< Accumulation of all UL PRB allocations
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pdcch_mask_t pdcch_mask = {}; ///< Accumulation of all CCE allocations
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sched_interface::dl_sched_res_t dl_sched_result = {};
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sched_interface::ul_sched_res_t ul_sched_result = {};
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};
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struct sf_sched_result {
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tti_point tti_rx;
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std::vector<cc_sched_result> enb_cc_list;
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@ -0,0 +1,41 @@
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/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2020 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#ifndef SRSLTE_SCHED_RESULT_H
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#define SRSLTE_SCHED_RESULT_H
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#include "../sched_common.h"
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namespace srsenb {
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/// Result of a Subframe sched computation
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struct cc_sched_result {
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bool generated = false;
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tti_point tti_rx{};
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/// Accumulation of all DL RBG allocations
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rbgmask_t dl_mask = {};
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/// Accumulation of all UL PRB allocations
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prbmask_t ul_mask = {};
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/// Accumulation of all CCE allocations
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pdcch_mask_t pdcch_mask = {};
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/// Individual allocations information
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sched_interface::dl_sched_res_t dl_sched_result = {};
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sched_interface::ul_sched_res_t ul_sched_result = {};
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};
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} // namespace srsenb
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#endif // SRSLTE_SCHED_RESULT_H
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@ -11,6 +11,7 @@
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*/
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#include "../sched_common.h"
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#include "sched_result.h"
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#ifndef SRSLTE_PDCCH_SCHED_H
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#define SRSLTE_PDCCH_SCHED_H
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@ -19,6 +20,81 @@ namespace srsenb {
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class sched_ue;
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class sf_cch_allocator2
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{
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public:
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const static uint32_t MAX_CFI = 3;
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struct tree_node {
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int8_t pucch_n_prb = -1; ///< this PUCCH resource identifier
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uint16_t rnti = SRSLTE_INVALID_RNTI;
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uint32_t record_idx = 0;
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uint32_t dci_pos_idx = 0;
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srslte_dci_location_t dci_pos = {0, 0};
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/// Accumulation of all PDCCH masks for the current solution (DFS path)
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pdcch_mask_t total_mask, current_mask;
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prbmask_t total_pucch_mask;
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};
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// struct alloc_t {
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// int8_t pucch_n_prb; ///< this PUCCH resource identifier
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// uint16_t rnti = 0;
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// srslte_dci_location_t dci_pos = {0, 0};
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// pdcch_mask_t current_mask; ///< this allocation PDCCH mask
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// pdcch_mask_t total_mask; ///< Accumulation of all PDCCH masks for the current solution (tree
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// route) prbmask_t total_pucch_mask; ///< Accumulation of all PUCCH masks for the current
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// solution/tree route
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// };
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using alloc_result_t = srslte::bounded_vector<const tree_node*, 16>;
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sf_cch_allocator2() : logger(srslog::fetch_basic_logger("MAC")) {}
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void init(const sched_cell_params_t& cell_params_);
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void new_tti(tti_point tti_rx_);
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/**
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* Allocates DCI space in PDCCH and PUCCH, avoiding in the process collisions with other users
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* @param alloc_type allocation type (e.g. DL data, UL data, ctrl)
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* @param aggr_idx Aggregation level index (0..3)
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* @param user UE object or null in case of broadcast/RAR/paging allocation
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* @param has_pusch_grant If the UE has already an PUSCH grant for UCI allocated
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* @return if the allocation was successful
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*/
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bool alloc_dci(alloc_type_t alloc_type, uint32_t aggr_idx, sched_ue* user = nullptr, bool has_pusch_grant = false);
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void rem_last_dci();
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// getters
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uint32_t get_cfi() const { return current_cfix + 1; }
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void get_allocs(alloc_result_t* vec = nullptr, pdcch_mask_t* tot_mask = nullptr, size_t idx = 0) const;
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uint32_t nof_cces() const { return cc_cfg->nof_cce_table[current_cfix]; }
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size_t nof_allocs() const { return dci_record_list.size(); }
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std::string result_to_string(bool verbose = false) const;
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private:
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/// DCI allocation parameters
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struct alloc_record {
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bool pusch_uci;
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uint32_t aggr_idx;
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alloc_type_t alloc_type;
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sched_ue* user;
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};
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const cce_cfi_position_table* get_cce_loc_table(alloc_type_t alloc_type, sched_ue* user, uint32_t cfix) const;
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// PDCCH allocation algorithm
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bool alloc_dfs_node(const alloc_record& record, uint32_t start_child_idx);
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bool get_next_dfs();
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// consts
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const sched_cell_params_t* cc_cfg = nullptr;
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srslog::basic_logger& logger;
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srslte_pucch_cfg_t pucch_cfg_common = {};
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// tti vars
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tti_point tti_rx;
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uint32_t current_cfix = 0;
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uint32_t current_max_cfix = 0;
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std::vector<tree_node> last_dci_dfs, temp_dci_dfs;
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std::vector<alloc_record> dci_record_list; ///< Keeps a record of all the PDCCH allocations done so far
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};
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/// Class responsible for managing a PDCCH CCE grid, namely CCE allocs, and avoid collisions.
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class sf_cch_allocator
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{
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@ -16,6 +16,231 @@
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namespace srsenb {
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bool is_pucch_sr_collision(const srslte_pucch_cfg_t& ue_pucch_cfg, tti_point tti_tx_dl_ack, uint32_t n1_pucch)
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{
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if (ue_pucch_cfg.sr_configured && srslte_ue_ul_sr_send_tti(&ue_pucch_cfg, tti_tx_dl_ack.to_uint())) {
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return n1_pucch == ue_pucch_cfg.n_pucch_sr;
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}
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return false;
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}
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void sf_cch_allocator2::init(const sched_cell_params_t& cell_params_)
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{
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cc_cfg = &cell_params_;
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pucch_cfg_common = cc_cfg->pucch_cfg_common;
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}
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void sf_cch_allocator2::new_tti(tti_point tti_rx_)
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{
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tti_rx = tti_rx_;
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dci_record_list.clear();
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last_dci_dfs.clear();
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current_cfix = cc_cfg->sched_cfg->min_nof_ctrl_symbols - 1;
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current_max_cfix = cc_cfg->sched_cfg->max_nof_ctrl_symbols - 1;
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}
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const cce_cfi_position_table*
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sf_cch_allocator2::get_cce_loc_table(alloc_type_t alloc_type, sched_ue* user, uint32_t cfix) const
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{
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switch (alloc_type) {
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case alloc_type_t::DL_BC:
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return &cc_cfg->common_locations[cfix];
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case alloc_type_t::DL_PCCH:
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return &cc_cfg->common_locations[cfix];
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case alloc_type_t::DL_RAR:
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return &cc_cfg->rar_locations[to_tx_dl(tti_rx).sf_idx()][cfix];
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case alloc_type_t::DL_DATA:
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return user->get_locations(cc_cfg->enb_cc_idx, cfix + 1, to_tx_dl(tti_rx).sf_idx());
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case alloc_type_t::UL_DATA:
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return user->get_locations(cc_cfg->enb_cc_idx, cfix + 1, to_tx_dl(tti_rx).sf_idx());
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default:
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break;
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}
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return nullptr;
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}
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bool sf_cch_allocator2::alloc_dci(alloc_type_t alloc_type, uint32_t aggr_idx, sched_ue* user, bool has_pusch_grant)
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{
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temp_dci_dfs.clear();
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uint32_t start_cfix = current_cfix;
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alloc_record record;
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record.user = user;
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record.aggr_idx = aggr_idx;
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record.alloc_type = alloc_type;
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record.pusch_uci = has_pusch_grant;
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// Try to allocate grant. If it fails, attempt the same grant, but using a different permutation of past grant DCI
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// positions
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do {
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bool success = alloc_dfs_node(record, 0);
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if (success) {
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// DCI record allocation successful
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dci_record_list.push_back(record);
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return true;
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}
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if (temp_dci_dfs.empty()) {
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temp_dci_dfs = last_dci_dfs;
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}
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} while (get_next_dfs());
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// Revert steps to initial state, before dci record allocation was attempted
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last_dci_dfs.swap(temp_dci_dfs);
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current_cfix = start_cfix;
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return false;
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}
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// bool sf_cch_allocator2::get_next_dfs()
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//{
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// if (last_dci_dfs.empty()) {
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// // If we reach root, increase CFI
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// if (current_cfix < cc_cfg->sched_cfg->max_nof_ctrl_symbols - 1) {
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// current_cfix++;
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// return true;
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// }
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// return false;
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// }
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//
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// uint32_t dfs_level = last_dci_dfs.size() - 1;
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// uint32_t start_child_idx = last_dci_dfs.back().dci_pos_idx + 1;
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// last_dci_dfs.pop_back();
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// while (not alloc_dfs_node(dci_record_list[dfs_level], start_child_idx)) {
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// start_child_idx = 0;
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// // If failed to allocate record, go one level lower in DFS
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// if (not get_next_dfs()) {
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// // If no more options in DFS, return false
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// return false;
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// }
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// }
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//}
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bool sf_cch_allocator2::get_next_dfs()
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{
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do {
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uint32_t start_child_idx = 0;
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if (last_dci_dfs.empty()) {
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// If we reach root, increase CFI
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current_cfix++;
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if (current_cfix > cc_cfg->sched_cfg->max_nof_ctrl_symbols - 1) {
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return false;
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}
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} else {
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// Attempt to re-add last tree node, but with a higher node child index
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start_child_idx = last_dci_dfs.back().dci_pos_idx + 1;
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last_dci_dfs.pop_back();
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}
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while (last_dci_dfs.size() < dci_record_list.size() and
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alloc_dfs_node(dci_record_list[last_dci_dfs.size()], start_child_idx)) {
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start_child_idx = 0;
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}
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} while (last_dci_dfs.size() < dci_record_list.size());
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// Finished computation of next DFS node
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return true;
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}
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bool sf_cch_allocator2::alloc_dfs_node(const alloc_record& record, uint32_t start_dci_idx)
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{
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// Get DCI Location Table
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const cce_cfi_position_table* dci_locs = get_cce_loc_table(record.alloc_type, record.user, current_cfix);
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if (dci_locs == nullptr or (*dci_locs)[record.aggr_idx].empty()) {
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return false;
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}
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const cce_position_list& dci_pos_list = (*dci_locs)[record.aggr_idx];
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if (start_dci_idx >= dci_pos_list.size()) {
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return false;
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}
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tree_node node;
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node.dci_pos_idx = start_dci_idx;
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node.dci_pos.L = record.aggr_idx;
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node.rnti = record.user != nullptr ? record.user->get_rnti() : SRSLTE_INVALID_RNTI;
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node.current_mask.resize(nof_cces());
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// get cumulative pdcch & pucch masks
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if (not last_dci_dfs.empty()) {
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node.total_mask = last_dci_dfs.back().total_mask;
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node.total_pucch_mask = last_dci_dfs.back().total_pucch_mask;
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} else {
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node.total_mask.resize(nof_cces());
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node.total_pucch_mask.resize(cc_cfg->nof_prb());
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}
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for (; node.dci_pos_idx < dci_pos_list.size(); ++node.dci_pos_idx) {
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node.dci_pos.ncce = dci_pos_list[node.dci_pos_idx];
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if (record.alloc_type == alloc_type_t::DL_DATA and not record.pusch_uci) {
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// The UE needs to allocate space in PUCCH for HARQ-ACK
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pucch_cfg_common.n_pucch = node.dci_pos.ncce + pucch_cfg_common.N_pucch_1;
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if (is_pucch_sr_collision(record.user->get_ue_cfg().pucch_cfg, to_tx_dl_ack(tti_rx), pucch_cfg_common.n_pucch)) {
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// avoid collision of HARQ-ACK with own SR n(1)_pucch
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continue;
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}
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node.pucch_n_prb = srslte_pucch_n_prb(&cc_cfg->cfg.cell, &pucch_cfg_common, 0);
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if (not cc_cfg->sched_cfg->pucch_mux_enabled and node.total_pucch_mask.test(node.pucch_n_prb)) {
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// PUCCH allocation would collide with other PUCCH/PUSCH grants. Try another CCE position
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continue;
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}
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}
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node.current_mask.reset();
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node.current_mask.fill(node.dci_pos.ncce, node.dci_pos.ncce + (1U << record.aggr_idx));
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if ((node.total_mask & node.current_mask).any()) {
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// there is a PDCCH collision. Try another CCE position
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continue;
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}
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// Allocation successful
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node.total_mask |= node.current_mask;
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if (node.pucch_n_prb >= 0) {
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node.total_pucch_mask.set(node.pucch_n_prb);
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}
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last_dci_dfs.push_back(node);
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return true;
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}
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return false;
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}
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void sf_cch_allocator2::rem_last_dci()
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{
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assert(not dci_record_list.empty());
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// Remove DCI record
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last_dci_dfs.pop_back();
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dci_record_list.pop_back();
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}
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void sf_cch_allocator2::get_allocs(alloc_result_t* vec, pdcch_mask_t* tot_mask, size_t idx) const
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{
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if (vec != nullptr) {
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vec->clear();
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vec->resize(last_dci_dfs.size());
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for (uint32_t i = 0; i < last_dci_dfs.size(); ++i) {
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(*vec)[i] = &last_dci_dfs[i];
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}
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}
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if (tot_mask != nullptr) {
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if (last_dci_dfs.empty()) {
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tot_mask->resize(nof_cces());
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tot_mask->reset();
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} else {
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*tot_mask = last_dci_dfs.back().total_mask;
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}
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}
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}
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std::string sf_cch_allocator2::result_to_string(bool verbose) const
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{
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return "";
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}
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/////////////////////////
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void sf_cch_allocator::init(const sched_cell_params_t& cell_params_)
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{
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cc_cfg = &cell_params_;
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@ -226,14 +451,6 @@ void sf_cch_allocator::alloc_tree_t::reset()
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dci_alloc_tree.clear();
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}
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bool is_pucch_sr_collision(const srslte_pucch_cfg_t& ue_pucch_cfg, tti_point tti_tx_dl_ack, uint32_t n1_pucch)
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{
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if (ue_pucch_cfg.sr_configured && srslte_ue_ul_sr_send_tti(&ue_pucch_cfg, tti_tx_dl_ack.to_uint())) {
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return n1_pucch == ue_pucch_cfg.n_pucch_sr;
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}
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return false;
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}
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/// Algorithm to compute a valid PDCCH allocation
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bool sf_cch_allocator::alloc_tree_t::add_tree_node_leaves(int parent_node_idx,
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const alloc_record_t& dci_record,
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@ -45,11 +45,10 @@ int test_pdcch_one_ue()
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sched_interface::sched_args_t sched_args{};
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TESTASSERT(cell_params[ENB_CC_IDX].set_cfg(ENB_CC_IDX, cell_cfg, sched_args));
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sf_cch_allocator pdcch;
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sched_ue sched_ue{rnti, cell_params, ue_cfg};
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sf_cch_allocator2 pdcch;
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||||
sched_ue sched_ue{rnti, cell_params, ue_cfg};
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||||
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||||
pdcch.init(cell_params[PCell_IDX]);
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||||
TESTASSERT(pdcch.nof_alloc_combinations() == 0);
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||||
TESTASSERT(pdcch.nof_allocs() == 0);
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||||
|
||||
uint32_t tti_counter = 0;
|
||||
|
|
@ -85,8 +84,8 @@ int test_pdcch_one_ue()
|
|||
const cce_position_list& dci_locs = (*dci_cce)[aggr_idx];
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||||
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||||
// TEST: Check the first alloc of the pdcch result (e.g. rnti, valid cce mask, etc.)
|
||||
sf_cch_allocator::alloc_result_t pdcch_result;
|
||||
pdcch_mask_t pdcch_mask;
|
||||
sf_cch_allocator2::alloc_result_t pdcch_result;
|
||||
pdcch_mask_t pdcch_mask;
|
||||
pdcch.get_allocs(&pdcch_result, &pdcch_mask, 0);
|
||||
TESTASSERT(pdcch_result.size() == 1);
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||||
TESTASSERT(pdcch_result[0]->rnti == sched_ue.get_rnti());
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||||
|
|
@ -142,11 +141,10 @@ int test_pdcch_ue_and_sibs()
|
|||
sched_interface::sched_args_t sched_args{};
|
||||
TESTASSERT(cell_params[0].set_cfg(0, cell_cfg, sched_args));
|
||||
|
||||
sf_cch_allocator pdcch;
|
||||
sched_ue sched_ue{0x46, cell_params, ue_cfg};
|
||||
sf_cch_allocator2 pdcch;
|
||||
sched_ue sched_ue{0x46, cell_params, ue_cfg};
|
||||
|
||||
pdcch.init(cell_params[PCell_IDX]);
|
||||
TESTASSERT(pdcch.nof_alloc_combinations() == 0);
|
||||
TESTASSERT(pdcch.nof_allocs() == 0);
|
||||
|
||||
tti_point tti_rx{std::uniform_int_distribution<uint32_t>(0, 9)(get_rand_gen())};
|
||||
|
|
@ -154,10 +152,10 @@ int test_pdcch_ue_and_sibs()
|
|||
pdcch.new_tti(tti_rx);
|
||||
TESTASSERT(pdcch.nof_cces() == cell_params[0].nof_cce_table[0]);
|
||||
TESTASSERT(pdcch.get_cfi() == 1); // Start at CFI=1
|
||||
TESTASSERT(pdcch.nof_alloc_combinations() == 0);
|
||||
TESTASSERT(pdcch.nof_allocs() == 0);
|
||||
|
||||
TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_BC, 2));
|
||||
TESTASSERT(pdcch.nof_alloc_combinations() == 4);
|
||||
TESTASSERT(pdcch.nof_allocs() == 1);
|
||||
TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_RAR, 2));
|
||||
TESTASSERT(pdcch.nof_allocs() == 2);
|
||||
TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_DATA, 2, &sched_ue, false));
|
||||
|
|
@ -168,9 +166,9 @@ int test_pdcch_ue_and_sibs()
|
|||
TESTASSERT(pdcch.nof_allocs() == 2);
|
||||
|
||||
// TEST: DCI positions
|
||||
uint32_t cfi = pdcch.get_cfi();
|
||||
sf_cch_allocator::alloc_result_t dci_result;
|
||||
pdcch_mask_t result_pdcch_mask;
|
||||
uint32_t cfi = pdcch.get_cfi();
|
||||
sf_cch_allocator2::alloc_result_t dci_result;
|
||||
pdcch_mask_t result_pdcch_mask;
|
||||
pdcch.get_allocs(&dci_result, &result_pdcch_mask);
|
||||
TESTASSERT(dci_result.size() == 2);
|
||||
const cce_position_list& bc_dci_locs = cell_params[0].common_locations[cfi - 1][2];
|
||||
|
|
@ -191,13 +189,12 @@ int test_6prbs()
|
|||
sched_interface::sched_args_t sched_args{};
|
||||
TESTASSERT(cell_params[0].set_cfg(0, cell_cfg, sched_args));
|
||||
|
||||
sf_cch_allocator pdcch;
|
||||
sched_ue sched_ue{0x46, cell_params, ue_cfg}, sched_ue2{0x47, cell_params, ue_cfg};
|
||||
sf_cch_allocator::alloc_result_t dci_result;
|
||||
pdcch_mask_t result_pdcch_mask;
|
||||
sf_cch_allocator2 pdcch;
|
||||
sched_ue sched_ue{0x46, cell_params, ue_cfg}, sched_ue2{0x47, cell_params, ue_cfg};
|
||||
sf_cch_allocator2::alloc_result_t dci_result;
|
||||
pdcch_mask_t result_pdcch_mask;
|
||||
|
||||
pdcch.init(cell_params[PCell_IDX]);
|
||||
TESTASSERT(pdcch.nof_alloc_combinations() == 0);
|
||||
TESTASSERT(pdcch.nof_allocs() == 0);
|
||||
|
||||
uint32_t opt_cfi = 3;
|
||||
|
|
|
|||
Loading…
Reference in New Issue