diff --git a/lib/test/phy/CMakeLists.txt b/lib/test/phy/CMakeLists.txt index fdaee2cb6..a2b79455c 100644 --- a/lib/test/phy/CMakeLists.txt +++ b/lib/test/phy/CMakeLists.txt @@ -54,11 +54,25 @@ add_lte_test(pucch_ca_test pucch_ca_test) add_executable(phy_dl_nr_test phy_dl_nr_test.c) target_link_libraries(phy_dl_nr_test srsran_phy srsran_common srsran_phy ${SEC_LIBRARIES} ${CMAKE_THREAD_LIBS_INIT}) -add_nr_test(phy_dl_nr_test phy_dl_nr_test -p 100 -m 28 ) -add_nr_test(phy_dl_nr_test_rvd phy_dl_nr_test -P 52 -p 52 -m 0 - -R 0 52 1 010010010010 00000000010000 - -R 0 52 1 100100100100 00000010000000) -add_nr_test(phy_dl_nr_test_cfo_delay phy_dl_nr_test -P 52 -p 52 -m 27 -C 100.0 -D 4 -n 10) -add_nr_test(phy_dl_nr_test_52prb phy_dl_nr_test -P 52 -p 52 -m 27 -T 256qam -d 1 1 -n 10) -add_nr_test(phy_dl_nr_test_270prb phy_dl_nr_test -P 270 -p 270 -m 27 -T 256qam -d 1 1 -n 10) +# Create a test case for each possible bandwidth described in TS 38.104 Table 5.3.2-1: Transmission bandwidth +# configuration N RB for FR1 +foreach(rb 25 52 79 106 133 160 216 270) + # Basic test with 25 RB grant, maximum MCS, 64QAM + add_nr_test(phy_dl_nr_test_${rb}prb phy_dl_nr_test -P ${rb} -p 25 -m 28) + + # Full BW grant, minimum MCS, with reserved RE + add_nr_test(phy_dl_nr_test_${rb}prb_rvd phy_dl_nr_test -P ${rb} -p ${rb} -m 0 + -R 0 ${rb} 1 010010010010 00000000010000 + -R 0 ${rb} 1 100100100100 00000010000000) + + # 25 RB grant with interleaved PDCCH + add_nr_test(phy_dl_nr_test_${rb}prb_interleaved phy_dl_nr_test -P ${rb} -p 25 -m 10 -I) + + # Maximum throughput with 256QAM + add_nr_test(phy_dl_nr_test_${rb}prb_256qam phy_dl_nr_test -P ${rb} -p ${rb} -m 27 -T 256qam -v -d 1 1 -n 10) + + # Maximum throughput with 64QAM and CFO+Delay impairments + add_nr_test(phy_dl_nr_test_${rb}prb_cfo_delay phy_dl_nr_test -P ${rb} -p ${rb} -m 27 -C 100.0 -D 4 -n 10) + +endforeach() diff --git a/lib/test/phy/phy_dl_nr_test.c b/lib/test/phy/phy_dl_nr_test.c index 163975925..2b477f160 100644 --- a/lib/test/phy/phy_dl_nr_test.c +++ b/lib/test/phy/phy_dl_nr_test.c @@ -30,19 +30,20 @@ static srsran_carrier_nr_t carrier = { 1 // max_mimo_layers }; -static uint32_t n_prb = 0; // Set to 0 for steering -static uint32_t mcs = 30; // Set to 30 for steering -static srsran_sch_cfg_nr_t pdsch_cfg = {}; -static uint32_t nof_slots = 10; -static uint32_t rv_idx = 0; -static uint32_t delay_n = 0; // Integer delay -static float cfo_hz = 0.0f; // CFO Hz -static srsran_dmrs_sch_type_t dmrs_type = srsran_dmrs_sch_type_1; -static srsran_dmrs_sch_add_pos_t dmrs_add_pos = srsran_dmrs_sch_add_pos_2; +static uint32_t n_prb = 0; // Set to 0 for steering +static uint32_t mcs = 30; // Set to 30 for steering +static srsran_sch_cfg_nr_t pdsch_cfg = {}; +static uint32_t nof_slots = 10; +static uint32_t rv_idx = 0; +static uint32_t delay_n = 0; // Integer delay +static float cfo_hz = 0.0f; // CFO Hz +static srsran_dmrs_sch_type_t dmrs_type = srsran_dmrs_sch_type_1; +static srsran_dmrs_sch_add_pos_t dmrs_add_pos = srsran_dmrs_sch_add_pos_2; +static bool interleaved_pdcch = false; static void usage(char* prog) { - printf("Usage: %s [rRPdpmnTLDCv] \n", prog); + printf("Usage: %s [rRPdpmnTILDCv] \n", prog); printf("\t-P Number of BWP (Carrier) PRB [Default %d]\n", carrier.nof_prb); printf("\t-p Number of grant PRB, set to 0 for steering [Default %d]\n", n_prb); printf("\t-n Number of slots to simulate [Default %d]\n", nof_slots); @@ -52,6 +53,7 @@ static void usage(char* prog) printf("\t-T Provide MCS table (64qam, 256qam, 64qamLowSE) [Default %s]\n", srsran_mcs_table_to_str(pdsch_cfg.sch_cfg.mcs_table)); printf("\t-R Reserve RE: [rb_begin] [rb_end] [rb_stride] [sc_mask] [symbol_mask]\n"); + printf("\t-I Enable interleaved CCE-to-REG [Default %s]\n", interleaved_pdcch ? "Enabled" : "Disabled"); printf("\t-L Provide number of layers [Default %d]\n", carrier.max_mimo_layers); printf("\t-D Delay signal an integer number of samples [Default %d samples]\n", delay_n); printf("\t-C Frequency shift (CFO) signal in Hz [Default %+.0f Hz]\n", cfo_hz); @@ -61,7 +63,7 @@ static void usage(char* prog) static int parse_args(int argc, char** argv) { int opt; - while ((opt = getopt(argc, argv, "rRPdpmnTLDCv")) != -1) { + while ((opt = getopt(argc, argv, "rRIPdpmnTLDCv")) != -1) { switch (opt) { case 'P': carrier.nof_prb = (uint32_t)strtol(argv[optind], NULL, 10); @@ -123,6 +125,9 @@ static int parse_args(int argc, char** argv) return SRSRAN_ERROR; } } break; + case 'I': + interleaved_pdcch ^= true; + break; case 'L': carrier.max_mimo_layers = (uint32_t)strtol(argv[optind], NULL, 10); break; @@ -263,8 +268,20 @@ int main(int argc, char** argv) srsran_coreset_t* coreset = &pdcch_cfg.coreset[1]; pdcch_cfg.coreset_present[1] = true; coreset->duration = 1; + + uint32_t coreset_bw_rb = carrier.nof_prb; + + if (interleaved_pdcch) { + coreset->mapping_type = srsran_coreset_mapping_type_interleaved; + coreset->reg_bundle_size = srsran_coreset_bundle_size_n6; + coreset->interleaver_size = srsran_coreset_bundle_size_n2; + coreset->precoder_granularity = srsran_coreset_precoder_granularity_reg_bundle; + coreset->shift_index = carrier.pci; + coreset_bw_rb = SRSRAN_FLOOR(carrier.nof_prb, 12) * 12; + } + for (uint32_t i = 0; i < SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE; i++) { - coreset->freq_resources[i] = i < carrier.nof_prb / 6; + coreset->freq_resources[i] = i < coreset_bw_rb / 6; } // Configure Search Space