mirror of https://github.com/PentHertz/srsLTE.git
sched - wrote benchmark to detect regressions in DL/UL data rates, and to analyse the total latency of the scheduler
This commit is contained in:
Francisco
Francisco Paisana
parent
5f954ab379
commit
d334907afe
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@ -58,3 +58,7 @@ add_test(sched_tpc_test sched_tpc_test)
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add_executable(sched_dci_test sched_dci_test.cc)
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target_link_libraries(sched_dci_test srslte_common srsenb_mac srslte_mac sched_test_common)
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add_test(sched_dci_test sched_dci_test)
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add_executable(sched_benchmark_test sched_benchmark.cc)
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target_link_libraries(sched_benchmark_test srslte_common srsenb_mac srslte_mac sched_test_common)
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add_test(sched_benchmark_test sched_benchmark_test)
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@ -0,0 +1,401 @@
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/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2020 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#include "sched_test_common.h"
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#include "srsenb/hdr/stack/mac/sched.h"
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#include "srslte/adt/accumulators.h"
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#include <chrono>
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const uint32_t seed = std::chrono::system_clock::now().time_since_epoch().count();
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namespace srsenb {
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struct run_params {
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uint32_t nof_prbs;
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uint32_t nof_ues;
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uint32_t nof_ttis;
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uint32_t cqi;
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const char* sched_policy;
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};
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struct run_params_range {
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std::vector<uint32_t> nof_prbs = {6, 15, 25, 50, 75, 100};
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std::vector<uint32_t> nof_ues = {1, 2, 5};
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uint32_t nof_ttis = 10000;
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std::vector<uint32_t> cqi = {5, 10, 15};
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std::vector<const char*> sched_policy = {"time_rr", "time_pf"};
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size_t nof_runs() const { return nof_prbs.size() * nof_ues.size() * cqi.size() * sched_policy.size(); }
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run_params get_params(size_t idx) const
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{
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run_params r = {};
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r.nof_ttis = nof_ttis;
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r.nof_prbs = nof_prbs[idx % nof_prbs.size()];
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idx /= nof_prbs.size();
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r.nof_ues = nof_ues[idx % nof_ues.size()];
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idx /= nof_ues.size();
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r.cqi = cqi[idx % cqi.size()];
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idx /= cqi.size();
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r.sched_policy = sched_policy.at(idx);
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return r;
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}
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};
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class sched_tester : public sched_sim_base
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{
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static std::vector<sched_interface::cell_cfg_t> get_cell_cfg(srslte::span<const sched_cell_params_t> cell_params)
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{
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std::vector<sched_interface::cell_cfg_t> cell_cfg_list;
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for (auto& c : cell_params) {
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cell_cfg_list.push_back(c.cfg);
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}
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return cell_cfg_list;
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}
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public:
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explicit sched_tester(sched* sched_obj_,
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const sched_interface::sched_args_t& sched_args,
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const std::vector<sched_interface::cell_cfg_t>& cell_cfg_list) :
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sched_sim_base(sched_obj_, sched_args, cell_cfg_list),
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sched_ptr(sched_obj_),
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dl_result(cell_cfg_list.size()),
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ul_result(cell_cfg_list.size())
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{}
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srslog::basic_logger& mac_logger = srslog::fetch_basic_logger("MAC");
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sched* sched_ptr;
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uint32_t dl_bytes_per_tti = 100000;
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uint32_t ul_bytes_per_tti = 100000;
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run_params current_run_params = {};
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std::vector<sched_interface::dl_sched_res_t> dl_result;
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std::vector<sched_interface::ul_sched_res_t> ul_result;
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struct throughput_stats {
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srslte::rolling_average<float> mean_dl_tbs, mean_ul_tbs, avg_dl_mcs, avg_ul_mcs;
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srslte::rolling_average<float> avg_latency;
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};
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throughput_stats total_stats;
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int advance_tti()
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{
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tti_point tti_rx = get_tti_rx().is_valid() ? get_tti_rx() + 1 : tti_point(0);
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mac_logger.set_context(tti_rx.to_uint());
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new_tti(tti_rx);
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for (uint32_t cc = 0; cc < get_cell_params().size(); ++cc) {
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std::chrono::time_point<std::chrono::steady_clock> tp = std::chrono::steady_clock::now();
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TESTASSERT(sched_ptr->dl_sched(to_tx_dl(tti_rx).to_uint(), cc, dl_result[cc]) == SRSLTE_SUCCESS);
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TESTASSERT(sched_ptr->ul_sched(to_tx_ul(tti_rx).to_uint(), cc, ul_result[cc]) == SRSLTE_SUCCESS);
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std::chrono::time_point<std::chrono::steady_clock> tp2 = std::chrono::steady_clock::now();
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std::chrono::nanoseconds tdur = std::chrono::duration_cast<std::chrono::nanoseconds>(tp2 - tp);
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total_stats.avg_latency.push(tdur.count());
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}
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sf_output_res_t sf_out{get_cell_params(), tti_rx, ul_result, dl_result};
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update(sf_out);
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process_stats(sf_out);
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return SRSLTE_SUCCESS;
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}
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void set_external_tti_events(const sim_ue_ctxt_t& ue_ctxt, ue_tti_events& pending_events) override
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{
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// do nothing
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if (ue_ctxt.conres_rx) {
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sched_ptr->ul_bsr(ue_ctxt.rnti, 1, dl_bytes_per_tti);
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sched_ptr->dl_rlc_buffer_state(ue_ctxt.rnti, 3, ul_bytes_per_tti, 0);
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if (get_tti_rx().to_uint() % 5 == 0) {
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for (uint32_t cc = 0; cc < pending_events.cc_list.size(); ++cc) {
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pending_events.cc_list[cc].dl_cqi = current_run_params.cqi;
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pending_events.cc_list[cc].ul_snr = 40;
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}
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}
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}
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}
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void process_stats(sf_output_res_t& sf_out)
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{
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for (uint32_t cc = 0; cc < get_cell_params().size(); ++cc) {
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uint32_t dl_tbs = 0, ul_tbs = 0, dl_mcs = 0, ul_mcs = 0;
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for (uint32_t i = 0; i < sf_out.dl_cc_result[cc].nof_data_elems; ++i) {
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dl_tbs += sf_out.dl_cc_result[cc].data[i].tbs[0];
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dl_tbs += sf_out.dl_cc_result[cc].data[i].tbs[1];
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dl_mcs = std::max(dl_mcs, sf_out.dl_cc_result[cc].data[i].dci.tb[0].mcs_idx);
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}
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total_stats.mean_dl_tbs.push(dl_tbs);
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if (sf_out.dl_cc_result[cc].nof_data_elems > 0) {
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total_stats.avg_dl_mcs.push(dl_mcs);
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}
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for (uint32_t i = 0; i < sf_out.ul_cc_result[cc].nof_dci_elems; ++i) {
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ul_tbs += sf_out.ul_cc_result[cc].pusch[i].tbs;
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ul_mcs = std::max(ul_mcs, sf_out.ul_cc_result[cc].pusch[i].dci.tb.mcs_idx);
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}
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total_stats.mean_ul_tbs.push(ul_tbs);
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if (sf_out.ul_cc_result[cc].nof_dci_elems) {
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total_stats.avg_ul_mcs.push(ul_mcs);
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}
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}
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}
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};
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int run_sched_new_ue(sched_tester& sched_tester,
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const run_params& params,
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uint16_t rnti,
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const sched_interface::ue_cfg_t& ue_cfg)
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{
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const uint32_t ENB_CC_IDX = 0;
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sched_tester.total_stats = {};
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sched_tester.current_run_params = params;
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// Add user (first need to advance to a PRACH TTI)
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while (not srslte_prach_tti_opportunity_config_fdd(
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sched_tester.get_cell_params()[ue_cfg.supported_cc_list[0].enb_cc_idx].cfg.prach_config,
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sched_tester.get_tti_rx().to_uint(),
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-1)) {
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TESTASSERT(sched_tester.advance_tti() == SRSLTE_SUCCESS);
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}
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TESTASSERT(sched_tester.add_user(rnti, ue_cfg, 16) == SRSLTE_SUCCESS);
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// Ignore stats of the first TTIs until UE DRB1 is added
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while (not sched_tester.get_enb_ctxt().ue_db.at(rnti)->conres_rx) {
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sched_tester.advance_tti();
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}
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sched_tester.total_stats = {};
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for (uint32_t count = 0; count < params.nof_ttis; ++count) {
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sched_tester.advance_tti();
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}
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return SRSLTE_SUCCESS;
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}
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struct run_data {
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run_params params;
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float avg_dl_throughput;
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float avg_ul_throughput;
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float avg_dl_mcs;
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float avg_ul_mcs;
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std::chrono::microseconds avg_latency;
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};
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int run_benchmark_scenario(run_params params, std::vector<run_data>& run_results)
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{
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std::vector<sched_interface::cell_cfg_t> cell_list(1, generate_default_cell_cfg(params.nof_prbs));
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sched_interface::ue_cfg_t ue_cfg_default = generate_default_ue_cfg();
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sched_interface::sched_args_t sched_args = {};
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sched_args.sched_policy = params.sched_policy;
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sched sched_obj;
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sched_obj.init(nullptr, sched_args);
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sched_tester tester(&sched_obj, sched_args, cell_list);
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tester.total_stats = {};
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tester.current_run_params = params;
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for (uint32_t ue_idx = 0; ue_idx < params.nof_ues; ++ue_idx) {
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uint16_t rnti = 0x46 + ue_idx;
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// Add user (first need to advance to a PRACH TTI)
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while (not srslte_prach_tti_opportunity_config_fdd(
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tester.get_cell_params()[ue_cfg_default.supported_cc_list[0].enb_cc_idx].cfg.prach_config,
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tester.get_tti_rx().to_uint(),
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-1)) {
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TESTASSERT(tester.advance_tti() == SRSLTE_SUCCESS);
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}
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TESTASSERT(tester.add_user(rnti, ue_cfg_default, 16) == SRSLTE_SUCCESS);
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TESTASSERT(tester.advance_tti() == SRSLTE_SUCCESS);
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}
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// Ignore stats of the first TTIs until all UEs DRB1 are created
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auto ue_db_ctxt = tester.get_enb_ctxt().ue_db;
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while (not std::all_of(ue_db_ctxt.begin(), ue_db_ctxt.end(), [](std::pair<uint16_t, const sim_ue_ctxt_t*> p) {
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return p.second->conres_rx;
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})) {
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tester.advance_tti();
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ue_db_ctxt = tester.get_enb_ctxt().ue_db;
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}
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tester.total_stats = {};
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// Run benchmark
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for (uint32_t count = 0; count < params.nof_ttis; ++count) {
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tester.advance_tti();
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}
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run_data run_result = {};
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run_result.params = params;
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run_result.avg_dl_throughput = tester.total_stats.mean_dl_tbs.value() * 8.0 / 1e-3;
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run_result.avg_ul_throughput = tester.total_stats.mean_ul_tbs.value() * 8.0 / 1e-3;
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run_result.avg_dl_mcs = tester.total_stats.avg_dl_mcs.value();
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run_result.avg_ul_mcs = tester.total_stats.avg_ul_mcs.value();
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run_result.avg_latency = std::chrono::microseconds(static_cast<int>(tester.total_stats.avg_latency.value() / 1000));
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run_results.push_back(run_result);
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return SRSLTE_SUCCESS;
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}
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run_data expected_run_result(run_params params)
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{
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assert(params.cqi == 15 && "only cqi=15 supported for now");
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run_data ret{};
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float dl_overhead = 0.9, ul_overhead = 0.75;
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switch (params.nof_prbs) {
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case 6:
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ret.avg_dl_mcs = 25;
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ret.avg_ul_mcs = 22;
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dl_overhead = 0.8;
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ul_overhead = 0.4;
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break;
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default:
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ret.avg_dl_mcs = 26;
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ret.avg_ul_mcs = 22;
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}
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int tbs_idx = srslte_ra_tbs_idx_from_mcs(ret.avg_dl_mcs, false, false);
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int tbs = srslte_ra_tbs_from_idx(tbs_idx, params.nof_prbs);
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ret.avg_dl_throughput = tbs * 1e3 * dl_overhead; // bps
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tbs_idx = srslte_ra_tbs_idx_from_mcs(ret.avg_ul_mcs, false, true);
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tbs = srslte_ra_tbs_from_idx(tbs_idx, params.nof_prbs - 2);
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ret.avg_ul_throughput = tbs * 1e3 * ul_overhead; // bps
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return ret;
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}
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int run_rate_test()
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{
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run_params_range run_param_list{};
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srslog::basic_logger& mac_logger = srslog::fetch_basic_logger("MAC");
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run_param_list.nof_ues = {1};
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run_param_list.cqi = {15};
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std::vector<run_data> run_results;
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size_t nof_runs = run_param_list.nof_runs();
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for (size_t r = 0; r < nof_runs; ++r) {
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run_params runparams = run_param_list.get_params(r);
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mac_logger.info("\n### New run {} ###\n", r);
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TESTASSERT(run_benchmark_scenario(runparams, run_results) == SRSLTE_SUCCESS);
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}
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const std::array<float, 6> expected_dl_rate_Mbps{2.5, 8.8, 15, 31, 47, 64};
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const std::array<float, 6> expected_ul_rate_Mbps{0.1, 1.8, 4, 8.3, 13, 19};
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bool success = true;
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for (auto& run : run_results) {
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run_data expected = expected_run_result(run.params);
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if (run.avg_dl_mcs < expected.avg_dl_mcs) {
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fmt::print(
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"Nprb={:>2d}: DL mcs below expected ({} < {})\n", run.params.nof_prbs, run.avg_dl_mcs, expected.avg_dl_mcs);
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success = false;
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}
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if (run.avg_dl_throughput < expected.avg_dl_throughput) {
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fmt::print("Nprb={:>2d}: DL rate below expected ({:.2} < {:.2}) Mbps\n",
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run.params.nof_prbs,
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run.avg_dl_throughput / 1e6,
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expected.avg_dl_throughput / 1e6);
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success = false;
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}
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if (run.avg_ul_mcs < expected.avg_ul_mcs) {
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fmt::print(
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"Nprb={:>2d}: UL mcs below expected ({} < {})\n", run.params.nof_prbs, run.avg_ul_mcs, expected.avg_ul_mcs);
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success = false;
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}
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if (run.avg_ul_throughput < expected.avg_ul_throughput) {
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fmt::print("Nprb={:>2d}: UL rate below expected ({:.2} < {:.2}) Mbps\n",
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run.params.nof_prbs,
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run.avg_ul_throughput / 1e6,
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expected.avg_ul_throughput / 1e6);
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success = false;
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}
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}
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return success ? SRSLTE_SUCCESS : SRSLTE_ERROR;
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}
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void print_benchmark_results(const std::vector<run_data>& run_results)
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{
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srslog::flush();
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fmt::print("run | Nprb | cqi | sched pol | Nue | DL [Mbps] | UL [Mbps] | DL mcs | UL mcs | latency [usec]\n");
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fmt::print("---------------------------------------------------------------------------------------------\n");
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for (uint32_t i = 0; i < run_results.size(); ++i) {
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const run_data& r = run_results[i];
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fmt::print("{:>3d}{:>6d}{:>6d}{:>12}{:>6d}{:12.2}{:12.2}{:9.1f}{:9.1f}{:12d}\n",
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i,
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r.params.nof_prbs,
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r.params.cqi,
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r.params.sched_policy,
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r.params.nof_ues,
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r.avg_dl_throughput / 1e6,
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r.avg_ul_throughput / 1e6,
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r.avg_dl_mcs,
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r.avg_ul_mcs,
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r.avg_latency.count());
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}
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}
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int run_benchmark()
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{
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run_params_range run_param_list{};
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srslog::basic_logger& mac_logger = srslog::fetch_basic_logger("MAC");
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std::vector<run_data> run_results;
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size_t nof_runs = run_param_list.nof_runs();
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for (size_t r = 0; r < nof_runs; ++r) {
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run_params runparams = run_param_list.get_params(r);
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mac_logger.info("\n### New run {} ###\n", r);
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TESTASSERT(run_benchmark_scenario(runparams, run_results) == SRSLTE_SUCCESS);
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}
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print_benchmark_results(run_results);
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return SRSLTE_SUCCESS;
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}
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} // namespace srsenb
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int main()
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{
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// Setup seed
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srsenb::set_randseed(seed);
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printf("This is the chosen seed: %u\n", seed);
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// Setup the log spy to intercept error and warning log entries.
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if (!srslog::install_custom_sink(
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srslte::log_sink_spy::name(),
|
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std::unique_ptr<srslte::log_sink_spy>(new srslte::log_sink_spy(srslog::get_default_log_formatter())))) {
|
||||
return SRSLTE_ERROR;
|
||||
}
|
||||
|
||||
auto* spy = static_cast<srslte::log_sink_spy*>(srslog::find_sink(srslte::log_sink_spy::name()));
|
||||
if (!spy) {
|
||||
return SRSLTE_ERROR;
|
||||
}
|
||||
|
||||
auto& mac_log = srslog::fetch_basic_logger("MAC");
|
||||
mac_log.set_level(srslog::basic_levels::warning);
|
||||
auto& test_log = srslog::fetch_basic_logger("TEST", *spy, false);
|
||||
test_log.set_level(srslog::basic_levels::warning);
|
||||
|
||||
// Start the log backend.
|
||||
srslog::init();
|
||||
|
||||
bool run_benchmark = false;
|
||||
|
||||
TESTASSERT(srsenb::run_rate_test() == SRSLTE_SUCCESS);
|
||||
if (run_benchmark) {
|
||||
TESTASSERT(srsenb::run_benchmark() == SRSLTE_SUCCESS);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -211,10 +211,21 @@ void ue_sim::update_conn_state(const sf_output_res_t& sf_out)
|
|||
}
|
||||
}
|
||||
|
||||
sched_sim_base::sched_sim_base(sched_interface* sched_ptr_,
|
||||
const sched_interface::sched_args_t& sched_args,
|
||||
const std::vector<sched_interface::cell_cfg_t>& cell_cfg_list) :
|
||||
logger(srslog::fetch_basic_logger("TEST")), sched_ptr(sched_ptr_), cell_params(cell_cfg_list.size())
|
||||
{
|
||||
for (uint32_t cc = 0; cc < cell_params.size(); ++cc) {
|
||||
cell_params[cc].set_cfg(cc, cell_cfg_list[cc], sched_args);
|
||||
}
|
||||
sched_ptr->cell_cfg(cell_cfg_list); // call parent cfg
|
||||
}
|
||||
|
||||
int sched_sim_base::add_user(uint16_t rnti, const sched_interface::ue_cfg_t& ue_cfg_, uint32_t preamble_idx)
|
||||
{
|
||||
CONDERROR(!srslte_prach_tti_opportunity_config_fdd(
|
||||
(*cell_params)[ue_cfg_.supported_cc_list[0].enb_cc_idx].prach_config, current_tti_rx.to_uint(), -1),
|
||||
cell_params[ue_cfg_.supported_cc_list[0].enb_cc_idx].cfg.prach_config, current_tti_rx.to_uint(), -1),
|
||||
"New user added in a non-PRACH TTI");
|
||||
TESTASSERT(ue_db.count(rnti) == 0);
|
||||
|
||||
|
|
@ -278,7 +289,7 @@ sim_enb_ctxt_t sched_sim_base::get_enb_ctxt() const
|
|||
int sched_sim_base::set_default_tti_events(const sim_ue_ctxt_t& ue_ctxt, ue_tti_events& pending_events)
|
||||
{
|
||||
pending_events.cc_list.clear();
|
||||
pending_events.cc_list.resize(cell_params->size());
|
||||
pending_events.cc_list.resize(cell_params.size());
|
||||
pending_events.tti_rx = current_tti_rx;
|
||||
|
||||
for (uint32_t enb_cc_idx = 0; enb_cc_idx < pending_events.cc_list.size(); ++enb_cc_idx) {
|
||||
|
|
@ -371,8 +382,8 @@ int sched_sim_base::apply_tti_events(sim_ue_ctxt_t& ue_ctxt, const ue_tti_events
|
|||
sched_ptr->dl_cqi_info(events.tti_rx.to_uint(), ue_ctxt.rnti, enb_cc_idx, cc_feedback.dl_cqi);
|
||||
}
|
||||
|
||||
if (cc_feedback.ul_cqi >= 0) {
|
||||
sched_ptr->ul_snr_info(events.tti_rx.to_uint(), ue_ctxt.rnti, enb_cc_idx, cc_feedback.ul_cqi, 0);
|
||||
if (cc_feedback.ul_snr >= 0) {
|
||||
sched_ptr->ul_snr_info(events.tti_rx.to_uint(), ue_ctxt.rnti, enb_cc_idx, cc_feedback.ul_snr, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -52,8 +52,8 @@ struct sim_ue_ctxt_t {
|
|||
};
|
||||
|
||||
struct sim_enb_ctxt_t {
|
||||
const std::vector<sched_interface::cell_cfg_t>* cell_params;
|
||||
std::map<uint16_t, const sim_ue_ctxt_t*> ue_db;
|
||||
srslte::span<const sched_cell_params_t> cell_params;
|
||||
std::map<uint16_t, const sim_ue_ctxt_t*> ue_db;
|
||||
};
|
||||
struct ue_tti_events {
|
||||
struct cc_data {
|
||||
|
|
@ -65,7 +65,7 @@ struct ue_tti_events {
|
|||
int ul_pid = -1;
|
||||
bool ul_ack = false;
|
||||
int dl_cqi = -1;
|
||||
int ul_cqi = -1;
|
||||
int ul_snr = -1;
|
||||
};
|
||||
srslte::tti_point tti_rx;
|
||||
std::vector<cc_data> cc_list;
|
||||
|
|
@ -99,11 +99,9 @@ private:
|
|||
class sched_sim_base
|
||||
{
|
||||
public:
|
||||
sched_sim_base(sched_interface* sched_ptr_, const std::vector<sched_interface::cell_cfg_t>& cell_params_) :
|
||||
logger(srslog::fetch_basic_logger("MAC")), sched_ptr(sched_ptr_), cell_params(&cell_params_)
|
||||
{
|
||||
sched_ptr->cell_cfg(cell_params_); // call parent cfg
|
||||
}
|
||||
sched_sim_base(sched_interface* sched_ptr_,
|
||||
const sched_interface::sched_args_t& sched_args,
|
||||
const std::vector<sched_interface::cell_cfg_t>& cell_params_);
|
||||
virtual ~sched_sim_base() = default;
|
||||
|
||||
int add_user(uint16_t rnti, const sched_interface::ue_cfg_t& ue_cfg_, uint32_t preamble_idx);
|
||||
|
|
@ -133,6 +131,9 @@ public:
|
|||
const ue_sim* ret = find_rnti(rnti);
|
||||
return ret == nullptr ? nullptr : &ret->get_ctxt().ue_cfg;
|
||||
}
|
||||
sched_interface* get_sched() { return sched_ptr; }
|
||||
srslte::const_span<sched_cell_params_t> get_cell_params() { return cell_params; }
|
||||
tti_point get_tti_rx() const { return current_tti_rx; }
|
||||
|
||||
std::map<uint16_t, ue_sim>::iterator begin() { return ue_db.begin(); }
|
||||
std::map<uint16_t, ue_sim>::iterator end() { return ue_db.end(); }
|
||||
|
|
@ -144,9 +145,9 @@ private:
|
|||
int set_default_tti_events(const sim_ue_ctxt_t& ue_ctxt, ue_tti_events& pending_events);
|
||||
int apply_tti_events(sim_ue_ctxt_t& ue_ctxt, const ue_tti_events& events);
|
||||
|
||||
srslog::basic_logger& logger;
|
||||
sched_interface* sched_ptr;
|
||||
const std::vector<sched_interface::cell_cfg_t>* cell_params;
|
||||
srslog::basic_logger& logger;
|
||||
sched_interface* sched_ptr;
|
||||
std::vector<sched_cell_params_t> cell_params;
|
||||
|
||||
srslte::tti_point current_tti_rx;
|
||||
std::map<uint16_t, ue_sim> ue_db;
|
||||
|
|
|
|||
|
|
@ -74,8 +74,8 @@ void sched_sim_random::set_external_tti_events(const sim_ue_ctxt_t& ue_ctxt, ue_
|
|||
}
|
||||
|
||||
// UL CQI
|
||||
if (cc_feedback.ul_cqi >= 0) {
|
||||
cc_feedback.ul_cqi = std::uniform_int_distribution<uint32_t>{5, 40}(get_rand_gen());
|
||||
if (cc_feedback.ul_snr >= 0) {
|
||||
cc_feedback.ul_snr = std::uniform_int_distribution<uint32_t>{5, 40}(get_rand_gen());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -131,7 +131,7 @@ int common_sched_tester::sim_cfg(sim_sched_args args)
|
|||
|
||||
sched::init(&rrc_ptr, sim_args0.sched_args);
|
||||
|
||||
sched_sim.reset(new sched_sim_random{this, sim_args0.cell_cfg});
|
||||
sched_sim.reset(new sched_sim_random{this, sim_args0.sched_args, sim_args0.cell_cfg});
|
||||
sched_stats.reset(new sched_result_stats{sim_args0.cell_cfg});
|
||||
|
||||
return SRSLTE_SUCCESS;
|
||||
|
|
|
|||
|
|
@ -65,7 +65,7 @@ int test_pdsch_grant(const sim_enb_ctxt_t& enb_ctxt,
|
|||
tti_point tti_rx = sf_out.tti_rx;
|
||||
const sim_ue_ctxt_t& ue_ctxt = *enb_ctxt.ue_db.at(pdsch.dci.rnti);
|
||||
const sched_interface::ue_cfg_t::cc_cfg_t* cc_cfg = ue_ctxt.get_cc_cfg(enb_cc_idx);
|
||||
const sched_interface::cell_cfg_t& cell_params = (*enb_ctxt.cell_params)[enb_cc_idx];
|
||||
const sched_cell_params_t& cell_params = enb_ctxt.cell_params[enb_cc_idx];
|
||||
bool has_pusch_grant = find_pusch_grant(pdsch.dci.rnti, sf_out.ul_cc_result[enb_cc_idx]) != nullptr;
|
||||
|
||||
// TEST: Check if CC is configured and active
|
||||
|
|
@ -100,8 +100,8 @@ int test_pdsch_grant(const sim_enb_ctxt_t& enb_ctxt,
|
|||
srslte_dl_sf_cfg_t dl_sf = {};
|
||||
dl_sf.cfi = sf_out.dl_cc_result[enb_cc_idx].cfi;
|
||||
dl_sf.tti = to_tx_dl(tti_rx).to_uint();
|
||||
srslte_ra_dl_grant_to_grant_prb_allocation(&pdsch.dci, &grant, cell_params.cell.nof_prb);
|
||||
uint32_t nof_re = srslte_ra_dl_grant_nof_re(&cell_params.cell, &dl_sf, &grant);
|
||||
srslte_ra_dl_grant_to_grant_prb_allocation(&pdsch.dci, &grant, cell_params.nof_prb());
|
||||
uint32_t nof_re = srslte_ra_dl_grant_nof_re(&cell_params.cfg.cell, &dl_sf, &grant);
|
||||
float coderate = srslte_coderate(pdsch.tbs[0] * 8, nof_re);
|
||||
srslte_mod_t mod = srslte_ra_dl_mod_from_mcs(pdsch.dci.tb[0].mcs_idx, ue_ctxt.ue_cfg.use_tbs_index_alt);
|
||||
uint32_t max_Qm = ue_ctxt.ue_cfg.use_tbs_index_alt ? 8 : 6;
|
||||
|
|
@ -112,7 +112,7 @@ int test_pdsch_grant(const sim_enb_ctxt_t& enb_ctxt,
|
|||
// TEST: PUCCH-ACK will not collide with SR
|
||||
CONDERROR(not has_pusch_grant and is_pucch_sr_collision(ue_ctxt.ue_cfg.pucch_cfg,
|
||||
to_tx_dl_ack(sf_out.tti_rx),
|
||||
pdsch.dci.location.ncce + cell_params.n1pucch_an),
|
||||
pdsch.dci.location.ncce + cell_params.cfg.n1pucch_an),
|
||||
"Collision detected between UE PUCCH-ACK and SR");
|
||||
|
||||
return SRSLTE_SUCCESS;
|
||||
|
|
@ -120,7 +120,7 @@ int test_pdsch_grant(const sim_enb_ctxt_t& enb_ctxt,
|
|||
|
||||
int test_dl_sched_result(const sim_enb_ctxt_t& enb_ctxt, const sf_output_res_t& sf_out)
|
||||
{
|
||||
for (uint32_t cc = 0; cc < enb_ctxt.cell_params->size(); ++cc) {
|
||||
for (uint32_t cc = 0; cc < enb_ctxt.cell_params.size(); ++cc) {
|
||||
for (uint32_t i = 0; i < sf_out.dl_cc_result[cc].nof_data_elems; ++i) {
|
||||
const sched_interface::dl_sched_data_t& data = sf_out.dl_cc_result[cc].data[i];
|
||||
CONDERROR(
|
||||
|
|
@ -135,7 +135,7 @@ int test_ul_sched_result(const sim_enb_ctxt_t& enb_ctxt, const sf_output_res_t&
|
|||
{
|
||||
uint32_t pid = to_tx_ul(sf_out.tti_rx).to_uint() % (FDD_HARQ_DELAY_UL_MS + FDD_HARQ_DELAY_DL_MS);
|
||||
|
||||
for (size_t cc = 0; cc < enb_ctxt.cell_params->size(); ++cc) {
|
||||
for (size_t cc = 0; cc < enb_ctxt.cell_params.size(); ++cc) {
|
||||
const auto* phich_begin = &sf_out.ul_cc_result[cc].phich[0];
|
||||
const auto* phich_end = &sf_out.ul_cc_result[cc].phich[sf_out.ul_cc_result[cc].nof_phich_elems];
|
||||
const auto* pusch_begin = &sf_out.ul_cc_result[cc].pusch[0];
|
||||
|
|
@ -228,7 +228,7 @@ int test_ul_sched_result(const sim_enb_ctxt_t& enb_ctxt, const sf_output_res_t&
|
|||
|
||||
int test_ra(const sim_enb_ctxt_t& enb_ctxt, const sf_output_res_t& sf_out)
|
||||
{
|
||||
for (uint32_t cc = 0; cc < enb_ctxt.cell_params->size(); ++cc) {
|
||||
for (uint32_t cc = 0; cc < enb_ctxt.cell_params.size(); ++cc) {
|
||||
const auto& dl_cc_res = sf_out.dl_cc_result[cc];
|
||||
const auto& ul_cc_res = sf_out.ul_cc_result[cc];
|
||||
for (const auto& ue_pair : enb_ctxt.ue_db) {
|
||||
|
|
@ -242,7 +242,7 @@ int test_ra(const sim_enb_ctxt_t& enb_ctxt, const sf_output_res_t& sf_out)
|
|||
}
|
||||
|
||||
// TEST: RAR allocation
|
||||
uint32_t rar_win_size = (*enb_ctxt.cell_params)[cc].prach_rar_window;
|
||||
uint32_t rar_win_size = enb_ctxt.cell_params[cc].cfg.prach_rar_window;
|
||||
srslte::tti_interval rar_window{ue.prach_tti_rx + 3, ue.prach_tti_rx + 3 + rar_win_size};
|
||||
srslte::tti_point tti_tx_dl = to_tx_dl(sf_out.tti_rx);
|
||||
|
||||
|
|
@ -365,7 +365,7 @@ bool is_in_measgap(srslte::tti_point tti, uint32_t period, uint32_t offset)
|
|||
|
||||
int test_meas_gaps(const sim_enb_ctxt_t& enb_ctxt, const sf_output_res_t& sf_out)
|
||||
{
|
||||
for (uint32_t cc = 0; cc < enb_ctxt.cell_params->size(); ++cc) {
|
||||
for (uint32_t cc = 0; cc < enb_ctxt.cell_params.size(); ++cc) {
|
||||
const auto& dl_cc_res = sf_out.dl_cc_result[cc];
|
||||
const auto& ul_cc_res = sf_out.ul_cc_result[cc];
|
||||
for (const auto& ue_pair : enb_ctxt.ue_db) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue