mirror of https://github.com/PentHertz/srsLTE.git
sched_nr: move DCI config for SIB to fill_dci_sib()
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@ -99,9 +99,6 @@ alloc_result bwp_slot_allocator::alloc_si(uint32_t aggr_idx,
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return alloc_result::invalid_coderate;
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}
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pdcch.dci.coreset0_bw = pdcch.dci_cfg.coreset0_bw;
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pdcch.dci.ctx.coreset_start_rb = cfg.cfg.pdcch.coreset[0].offset_rb;
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// Generate PDSCH
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bwp_pdcch_slot.dl.phy.pdsch.emplace_back();
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pdsch_t& pdsch = bwp_pdcch_slot.dl.phy.pdsch.back();
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@ -114,6 +114,8 @@ bool fill_dci_sib(prb_interval interv,
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dci.ctx.rnti_type = srsran_rnti_type_si;
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dci.ctx.rnti = SRSRAN_SIRNTI;
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dci.ctx.coreset_id = 0;
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dci.ctx.coreset_start_rb = bwp_cfg.cfg.pdcch.coreset[0].offset_rb;
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dci.coreset0_bw = srsran_coreset_get_bw(&bwp_cfg.cfg.pdcch.coreset[0]);
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dci.freq_domain_assigment =
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srsran_ra_nr_type1_riv(srsran_coreset_get_bw(&bwp_cfg.cfg.pdcch.coreset[0]), interv.start(), interv.length());
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dci.time_domain_assigment = 0;
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