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srsLTE
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377 Commits

Author SHA1 Message Date
Xavier Arteaga 89dcd6339f More LGTM fixes 2020-04-22 18:01:43 +02:00
Xavier Arteaga 60c4daccab Removed redundant code 2020-04-22 18:01:43 +02:00
Xavier Arteaga 77d5dedddc Fix LGTM warnings and recommendations 2020-04-22 18:01:43 +02:00
Xavier Arteaga 562590e595 Fix LGTM warnings 2020-04-22 18:01:43 +02:00
Xavier Arteaga e6792cf9b7 Refactored OFDM and added half CP window offset in UL Demodulator 2020-04-20 16:10:27 +02:00
Andre Puschmann e76e31e652 adding NB-IoT DL shared channel, UE DL object and PHY examples 2020-04-17 23:12:11 +02:00
Andre Puschmann dcb9004a71 zmq: refactor zmq argument parsing, allow zero indexing 
It allows to provide an index for tx_port, rx_port, tx_freq and rx_freq even
for the first (and possibly only) port. So for example a MIMO config would be this for example:

tx_port0=tcp://*:2001,tx_port1=tcp://*:2003,rx_port0=tcp://localhost:2000,rx_port1=tcp://localhost:2002
 2020-04-17 20:47:20 +02:00
luis_pereira87 653a1e0619 Added PSBCH Extended CP 2020-04-15 21:59:14 +02:00
Andre Puschmann e495c4d553 vector: add uint8 zero'ing function 2020-04-15 13:42:26 +02:00
Andre Puschmann 8f72d4c55e simd: fix compilation error under NEON 2020-04-15 13:42:26 +02:00
Xavier Arteaga 2bca321d4d Fix NEON 16 bit turbodecoder 2020-04-13 20:43:51 +02:00
Xavier Arteaga dc6128617b Fix SSE 16 bit turbodecoder 2020-04-13 20:43:51 +02:00
Xavier Arteaga a0fb150e58 Fix memory issues in PSCCH decoder 2020-04-13 20:39:15 +02:00
Xavier Arteaga 5b7493cab5 Added 256QAM modulation tables to scheduler 2020-04-10 17:48:53 +02:00
Xavier Arteaga 5e45e63519 Multiple fixes HARQ ACK/NACK feedback and CSI reporting for MIMO and CA 2020-04-10 15:58:25 +02:00
Xavier Arteaga 784bf81a1a Multiple fixes HARQ ACK/NACK feedback and CSI reporting for MIMO and CA 2020-04-10 15:58:25 +02:00
Xavier Arteaga cb6a8444df Added srsLTE helper for determining number of RI bits 2020-04-10 15:58:25 +02:00
Tiago Alves 47145c18b7 sidelink: refactor channel estimation 2020-04-10 14:58:18 +02:00
Xavier Arteaga 6d355ab61e SRSUE: Fix HO initial CFO 2020-04-02 13:52:23 +02:00
Xavier Arteaga cca3cccfbe Improved fading model generation 2020-03-26 08:23:07 +01:00
Xavier Arteaga a44a61d781 Fix HST channel emulator for keeping coherent phase between frames 2020-03-26 08:18:24 +01:00
Xavier Arteaga cd2f86687f Correction in AWGN generator 2020-03-24 12:16:28 +01:00
Xavier Arteaga 8e891b7038 Added AWGN channel to SRSUE and SRSENB 2020-03-24 12:16:28 +01:00
Xavier Arteaga c107b04f5a Implemented high performance AWGN generator 2020-03-24 12:16:28 +01:00
Xavier Arteaga b5be0b94b8 Added SIMD i32 add and and functions 2020-03-24 12:16:28 +01:00
Xavier Arteaga 8bf7acdeaf Added vector malloc for i32 and u32 2020-03-24 12:16:28 +01:00
Xavier Arteaga 2c93f6d20a Fix PUCCH DMRS correlation 2020-03-22 08:49:12 +01:00
Xavier Arteaga f3f03ad12d SRSUE PHY: Add extra debugging information to errors 2020-03-18 16:12:51 +01:00
Xavier Arteaga ada8772f57 Initial srenb TA compensation 2020-03-17 17:21:43 +01:00
Xavier Arteaga 0408d357a7 Minor fixes 2020-03-16 15:07:12 +01:00
Ismael Gomez 73447972d8
Fix issue with simultaneous CQI and ACK/NACK transmission in CA (#1067) 
* Fix memory corruption when phy calling mac scheduler and not yet initiated

* Do not drop CQI if collision with ACK/NACK and PUSCH

* Allocate CQI resources for SCell properly

* Use UE_PCELL_CC_IDX macro

* Protect ul_sched from being called if not yet started
 2020-03-16 13:10:21 +01:00
Xavier Arteaga e832769ae6 Updated copyright 2020-03-16 11:26:06 +01:00
yagoda 943d90bc48 consolidating different ringbuffer functionalities into one, adding unit tests for ringbuffer 2020-03-16 07:48:10 +01:00
Xavier Arteaga 5af89513eb use double precission for frequency in srsue and srsenb 2020-03-13 14:01:58 +01:00
Xavier Arteaga 834a081c09 Add EPRE measurement to PUSCH decoder 2020-03-13 14:01:58 +01:00
Xavier Arteaga 76408b195e Rename TX_DELAY and FDD_HARQ_DELAY_MS 2020-03-11 21:16:36 +01:00
Francisco Paisana fad897cb35 DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations 2020-03-10 22:06:07 +00:00
Francisco Paisana 639f473042 fixed unsigned signed comparison 2020-03-10 14:17:49 +01:00
Francisco Paisana 1e63fa41cf made ue_cc_idx int to set to -1 for rar and bc allocs 2020-03-10 14:17:49 +01:00
Francisco Paisana f3c3c52fcd added ue_cc_idx to dci allocation 2020-03-10 14:17:49 +01:00
Xavier Arteaga 002a68e183 SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold 2020-03-10 09:19:54 +01:00
Xavier Arteaga 64caa4321b Fix UL control decoding. Some minor aesthetic changes. 2020-03-10 09:19:54 +01:00
Xavier Arteaga 44a5ce172e Added vector srslte_vec_avg_power_sf 2020-03-10 09:19:54 +01:00
Ismael Gomez 4e12405fff
Remove radio_multi class and organize channels, ports and carrier buffers (#1019) 2020-03-06 15:26:48 +01:00
Xavier Arteaga a968fb02d3 Increase PUCCH correlatiion threasholds 2020-03-06 13:58:49 +01:00
Xavier Arteaga da701cd82b SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup. 2020-03-06 13:58:49 +01:00
Xavier Arteaga 47cbbcbd57 Improve PUSCH UCI decoder 2020-03-06 13:58:49 +01:00
Francisco Paisana a6320f93b8 remove remaining const_casts 2020-03-05 20:23:07 +00:00
Francisco Paisana ec1f1cc677 remove const_casts from scheduler. Fix ODR issue 2020-03-05 20:23:07 +00:00
Andre Puschmann e4b5fa122f add set_cell() call to PSCCH and allocate for max PRB in pscch_init() 2020-03-03 16:22:51 +01:00