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srsLTE
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5,287 Commits 3 Branches 23 Tags 67 MiB
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5287 Commits

Author SHA1 Message Date
Francisco Paisana d382c10948 fix crash for case args == nullptr 2020-01-31 19:08:56 +00:00
Francisco Paisana 1b958a60b5 casting .c_str() to mutable char* and changing the char* was causing all sort of weird format messages 2020-01-31 19:08:56 +00:00
Francisco Paisana 296af7e297 fix setting up nas log before all log configuration 2020-01-31 11:56:02 +00:00
Francisco Paisana c19d033dbc set SIB scheduling to debug mode 2020-01-29 17:38:46 +00:00
Francisco Paisana c8cd12ac53 updated the test logging utils 2020-01-29 17:15:35 +00:00
Francisco Paisana daf471be1f moved test of pdsch collisions for separate test file 2020-01-29 17:15:35 +00:00
Francisco Paisana c537d38650 separated sched tests based on output into a separate file. Added scheduler random tester to unit tests 2020-01-29 17:15:35 +00:00
Francisco Paisana f6ed99b71b created a generic crtp class for handling singletons. I am using that class for the logmap now 2020-01-29 14:20:43 +00:00
Francisco Paisana ea777d92e8 applied new logmap class to nas 2020-01-29 14:20:43 +00:00
Francisco Paisana 3e2de6dd3e new logmap class to store globally accessible logs 2020-01-29 14:20:43 +00:00
Francisco Paisana 07a9e889a4 added a singleton map to facilitate access to each layer logger 2020-01-29 14:20:43 +00:00
Xavier Arteaga c080cb3395 SRSUE: expose correct synch error parameter 2020-01-29 12:25:13 +01:00
Xavier Arteaga c0b611dd0d srsLTE: DL channel estimator compensates channel delay 2020-01-29 12:25:13 +01:00
Ismael Gomez 17f9ff326b Expose in-sync and out-of-sync constants to ue.conf 2020-01-29 11:46:55 +01:00
Ismael Gomez cc7dfefa1a
Fix logic for UL HARQ retx causing Msg3 adaptive retx to be identified as a new transmission 2020-01-28 21:33:10 +01:00
Francisco Paisana af0b80b0a7 fix test for prb==6 and accidental adaptive retx in UL 2020-01-28 17:15:23 +00:00
Francisco Paisana a9b8c3fd55 fix msg3 prb limit for prb==6. It has to collide with PUCCH 2020-01-28 17:15:23 +00:00
Francisco Paisana 39fff9ed68 fix potential bug with grouping of RARs with same RA-RNTI but different prach_tti. The scheduler might not clear the old tti on time before the grouping. 2020-01-28 17:15:23 +00:00
Francisco Paisana de195e9521 changed the RAR schedule to support the allocation of nof_grants lower than the current nof_grants in the queue with same ra-rnti 2020-01-28 17:15:23 +00:00
Francisco Paisana e9ca6e3d52 fix rar size 2020-01-28 17:15:23 +00:00
Francisco Paisana a74dcd947f changed rar/msg3 scheduling to accommodate multiple rars per TTI 2020-01-28 17:15:23 +00:00
Francisco Paisana dc782e514b change the naming from tti --> sf for scheduling operations specific to a subframe 2020-01-28 17:15:23 +00:00
Andre Puschmann 81b46723f6 adding NPDCCH 2020-01-28 17:46:54 +01:00
Andre Puschmann 073c57dc3d add NB-IoT DCI formats and move define to phy_common 2020-01-28 17:46:54 +01:00
Merlin Chlosta c2e95b1e2a Reject TAU to force UE to reconnect 2020-01-28 11:50:28 +00:00
Xavier Arteaga a6105a3020 SRSENB: made possible custom UL/DL frequencies for each carrier 2020-01-28 11:22:50 +01:00
Xavier Arteaga 604e61810e SRSENB: moved set tx/rx frequency to txrx class 2020-01-28 11:22:50 +01:00
Xavier Arteaga c5dcc5e95b SRSENB: moved backwards compatibility enb conf check 2020-01-28 11:22:50 +01:00
Xavier Arteaga c2b23d273b SRSENB: keep backwards compatibility of enb.conf 2020-01-28 11:22:50 +01:00
Xavier Arteaga 5dcb6b5960 SRSENB: Set default PRACH sequence root index in SIB2 2020-01-28 11:22:50 +01:00
Xavier Arteaga 31dffb785f SRSENB: fix segmentation fault 2020-01-28 11:22:50 +01:00
Xavier Arteaga 9a853d8692 SRSUE: fix compilation 2020-01-28 11:22:50 +01:00
Xavier Arteaga 922481659b SRSENB: minor corrections 2020-01-28 11:22:50 +01:00
Xavier Arteaga 9ee651d094 srsLTE: Added set vector zeros for float and cf 2020-01-28 11:22:50 +01:00
Xavier Arteaga b08c1f003e SRSENB: enabled multiple cells from rr.cfg 2020-01-28 11:22:50 +01:00
Andre Puschmann e5b1673b3b move PCAP into own compilation unit 
this removes inline keyword from PCAP functions and puts all functions
into own C file

before forced inlining caused an issue when compiling for ARM on Ubuntu 19.10 on the RPi4
using gcc version 9.2.1
 2020-01-24 13:15:45 +01:00
Francisco Paisana 883c2900c8 fix issue with future clear 2020-01-24 10:10:27 +00:00
Francisco Paisana 91d83fc20d different way to retrieve a proc future 2020-01-24 10:10:27 +00:00
Ismael Gomez 171e26ee68 Add checks more checks for UL grants 2020-01-24 10:40:39 +01:00
Xavier Arteaga dcb3bc0135 srsLTE: apply CLang Format in sch.c 2020-01-24 10:40:39 +01:00
Xavier Arteaga 905273b36a srsLTE: more memory corruption counter measures in ul_sch_encode 2020-01-24 10:40:39 +01:00
Xavier Arteaga 3b138b25c6 srsLTE: UL SCH Beta offset access fortification 2020-01-24 10:40:39 +01:00
Xavier Arteaga 8b6ba1aacf srsLTE: removed overlap bytes check in RLC AM 2020-01-24 10:36:41 +01:00
Xavier Arteaga 5872e763bf SRSLTE: RLC AM remove completely overlapped segments 2020-01-24 10:36:41 +01:00
Xavier Arteaga 39bec9aab1 SRSLTE: fix RLC reordering and segment overlaping 2020-01-24 10:36:41 +01:00
Xavier Arteaga d3537fc340 srsLTE: expanded RLC stress test with the addition of multiple PDU per TTI in reverse order 2020-01-24 10:36:41 +01:00
Francisco Paisana 5ae3afd2b8 created cbit_ref for unpacking const buffers 2020-01-23 12:22:19 +00:00
Francisco Paisana 58e555e86c update all asn1 files 2020-01-23 12:22:19 +00:00
Francisco Paisana 5468189cd9 fix some variables' naming (e.g. x2_ap -> x2ap, e_rab -> erab) 2020-01-21 00:58:19 +00:00
Francisco Paisana 2a83eee0ee fix security key setup 2020-01-21 00:58:19 +00:00