srsLTE

Commit Graph

Author	SHA1	Message	Date
Xavier Arteaga	3aec23f7d8	SRSENB: calculate TA from PUCCH messages	2020-08-27 09:31:05 +02:00
Xavier Arteaga	729986f259	srsLTE: Added PUCCH format 3 valid correlation	2020-07-15 07:34:14 +02:00
Xavier Arteaga	562590e595	Fix LGTM warnings	2020-04-22 18:01:43 +02:00
Ismael Gomez	73447972d8	Fix issue with simultaneous CQI and ACK/NACK transmission in CA (#1067 ) * Fix memory corruption when phy calling mac scheduler and not yet initiated * Do not drop CQI if collision with ACK/NACK and PUSCH * Allocate CQI resources for SCell properly * Use UE_PCELL_CC_IDX macro * Protect ul_sched from being called if not yet started	2020-03-16 13:10:21 +01:00
Xavier Arteaga	e832769ae6	Updated copyright	2020-03-16 11:26:06 +01:00
Xavier Arteaga	002a68e183	SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold	2020-03-10 09:19:54 +01:00
Xavier Arteaga	35f4e5d69a	Initial PUCCH 1B with channel selection	2020-02-13 10:29:00 +01:00
Ismael Gomez	1d83bb08e2	Changes in ACK procedure to support CA. Tested 1 cell in SISO/MIMO	2019-10-14 11:20:35 +02:00
Ismael Gomez	bfddc55148	RRC-PHY interface (#639 ) RRC-PHY interface refactor. Moved RRC-MAC interface to rrc_asn1_utils and created RRC-PHY interface also in rrc_asn1_utils. All ASN1 includes should be made from rrc_asn1_utils only keeping ue_interfaces clean of ASN1 Tested with different common and dedicated configurations (64QAM UL, 256QAM, CA, SRS enabled/disabled, etc)	2019-09-04 16:59:10 +02:00
Ismael Gomez	7780b1aba5	add tdd/ca support	2019-04-25 20:57:58 +02:00

10 Commits