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srsLTE
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6,000 Commits 3 Branches 23 Tags 67 MiB
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64 Commits

Author SHA1 Message Date
Xavier Arteaga e0e8405285 SRSUE: initial scell sync 
SRSUE: SCell Synch feedbacks delay

SRSUE: Implemented SCell Radio offset correction
 2020-06-18 09:51:51 +02:00
Xavier Arteaga f04cf2090a Integrates number of samples in radio buffer 
Fix minor issue

Radio: Fix minor bug and add unit test
 2020-06-16 11:00:51 +02:00
Xavier Arteaga de230826b9 Added string helper for removing spaces and parsing list 
Fix

Fix string parser
 2020-06-16 11:00:51 +02:00
Xavier Arteaga 89b24b54e5 Refactored radio class for acommodating multiple RF devices 2020-06-16 11:00:51 +02:00
Xavier Arteaga e605a6f367 UE PHY test disabled due to unstable behaviour 2020-05-12 15:56:23 +02:00
Xavier Arteaga 0d2b3eb55d Removed ue_phy_test log overload 2020-05-12 15:56:23 +02:00
Xavier Arteaga 2d8bd0692a SRSUE: fix and enable UE PHY test 2020-05-12 15:56:23 +02:00
Francisco Paisana 38f848ecdf fix type name deducing for clang 2020-04-27 22:19:08 +01:00
Xavier Arteaga 77d5dedddc Fix LGTM warnings and recommendations 2020-04-22 18:01:43 +02:00
Xavier Arteaga e6792cf9b7 Refactored OFDM and added half CP window offset in UL Demodulator 2020-04-20 16:10:27 +02:00
Xavier Arteaga 9a2b0b7cc7 Standard vector allocation uses vector library 2020-04-02 20:49:58 +02:00
Francisco Paisana d3f49d0e3c changed interface sync-stack to allow tti jumps > 1 2020-03-19 16:47:55 +00:00
Xavier Arteaga e832769ae6 Updated copyright 2020-03-16 11:26:06 +01:00
Ismael Gomez e8b8c9922e
Add RF per-channel frequency band constraints (#1026) 2020-03-12 23:06:09 +01:00
Xavier Arteaga 65711d06dc PRACH TA base default to 0 and apply clang-format 2020-03-11 16:58:00 +01:00
Xavier Arteaga e8f9bfc6ba Addition of PRACH TA correction 2020-03-11 16:25:56 +01:00
Ismael Gomez 4e12405fff
Remove radio_multi class and organize channels, ports and carrier buffers (#1019) 2020-03-06 15:26:48 +01:00
Andre Puschmann 664170fec6 pcap: add CC index when writing PCAP 2020-03-05 20:46:14 +01:00
Andre Puschmann a8bbe551ac move thread class into srslte namespace to avoid ambiguity between std::thread 2020-03-03 16:22:04 +01:00
Xavier Arteaga f8165383f6 Neighbour SCell measurement test waits for final measurement before exiting-xx 2020-02-18 21:26:20 +01:00
Xavier Arteaga 6672f6df0f Minor aesthetic changes in intra measure class and changed scell_search test arguments 2020-02-13 14:25:00 +01:00
Xavier Arteaga 344016ef0a Refactored and commented SRSUE's Intra measure component 2020-02-13 14:25:00 +01:00
Xavier Arteaga 8f6dd184be SRSUE: neighbour cell measurement test defined 2020-02-13 14:25:00 +01:00
Xavier Arteaga f8294fb9df SRSUE: RRC measurements refactor and more fixes 2020-02-03 12:51:46 +01:00
Ismael Gomez 52716f8716 Process HO complete in the background to avoid heap-after-use bug when PHY measurements are reported during a HO 
rrc_meas refactor. Need to split commit

Fix typo

Temporal commit

Apply rx_gain_offset to neighbour cell measurements

srsLTE: modify TESTASSERT Macro to follow codeline

SRSUE: prevent RRC from having serving cell in neighbour list

SRSUE: DL HARQ does not need Time Aligment Timer. UL is disabled using PUCCH resources release

SRSUE: extend intra-frequency to CA SCell

SRSUE: fix confusing/ambiguous code in the RRC measurements and fix concurrency issue

SRSUE: remove RRC measurement report triggers when measurements are modified or HO succesful

SRSUE: fix compilation issues and Reest SIB indexes

Fixes sync using incorrect cell configuration when search cell does not find a correct cell

Small refactor to remove measurement report triggers always after removing measurement

SRSUE: Removed SIC PSS from UE

SRSUE: fix inter-frequency reestablishment and added more traces

SRSUE: Fix compilation issue
 2020-02-03 12:51:46 +01:00
Andre Puschmann e24d33562a disabling ue_phy_test temporarily 2019-12-30 00:16:59 +01:00
Andre Puschmann e5609e299d fix UE PHY test compilation on 32 bit systems 2019-12-23 23:06:52 +01:00
Xavier Arteaga 36b2102de8 SRSUE: avoid testing ue_phy_test 2019-12-23 22:57:37 +01:00
Xavier Arteaga 11eafa8ab4 srsLTE: FFTW wisdom gets loaded and saved by default 2019-12-23 22:57:37 +01:00
Xavier Arteaga c92dce71b7 srsLTE: AGC only uses boundaries for requesting gain to Radio 2019-12-23 22:57:37 +01:00
Xavier Arteaga 089a5e21dc Label test that memcheck is excessively long 2019-12-19 13:01:05 +01:00
Xavier Arteaga ad46fc006f srsLTE: Fix thread memory leak. Moved test. Fix CLang warnings. 2019-12-19 13:01:05 +01:00
Xavier Arteaga 447ede327c srsLTE: removed unused argument 2019-12-19 13:01:05 +01:00
Xavier Arteaga 384c420c7c SRSUE: fix phy workers concurrency issue 2019-12-19 13:01:05 +01:00
Xavier Arteaga dc7ac0a8d6 SRSUE: Updated PHY test 2019-12-19 13:01:05 +01:00
Xavier Arteaga 6895bfa70a SRSUE initial PHY worker test 2019-12-19 13:01:05 +01:00
Pedro Alvarez c5979f59eb Clang format UE, eNB and lib (#850) 
* Clang-formated UE, eNB and lib.
* Fixed compiling errors from clang-format.
* Fix linking issues introduced by clang-format
* Fix poor formating in initializing arrays of arrays.
* Fix mistake in conflict resolution on rm_turbo.c
* Re-apply clang format to gtpc_ies.h
 2019-12-16 16:04:22 +01:00
Xavier Arteaga bcde542111 SRSUE: fix typo 2019-12-12 12:04:36 +01:00
Xavier Arteaga 8dd1c59e18 Added amplitude and power conversions to dB and viceversa 2019-12-02 09:47:22 +01:00
Xavier Arteaga 665f899a74 Fixed some coverity and Clang tidy warnings 2019-10-02 11:03:03 +02:00
Xavier Arteaga 3c25e2b16c SCell Search Test: Return success always if test is finished 2019-09-20 16:20:31 +02:00
Xavier Arteaga 9ee8cc0ad2 CRS SCell searcher: Fixed memory leaks 2019-09-20 16:20:31 +02:00
Xavier Arteaga 91a7bbf2b6 SCell search test: removed basic_string header 2019-09-20 16:20:31 +02:00
Xavier Arteaga 4c85b99ec5 SRSUE: Added intra frequency SCell search test 2019-09-20 16:20:31 +02:00
Xavier Arteaga 35f85c651c SRSUE: Added SCell synchronizer and measurements based on reference signals 2019-09-20 16:20:31 +02:00
Xavier Arteaga 8e17aba5d8 Improved SSS decoding and improved scell_search_test 2019-09-20 16:20:31 +02:00
Xavier Arteaga 368690ea6b SRSUE: Added intra frequency SCell search test 2019-09-20 16:20:31 +02:00
Ismael Gomez 7780b1aba5 add tdd/ca support 2019-04-25 20:57:58 +02:00
Ismael Gomez edd9cbf4dc Merge branch 'next' into sync_states 2018-04-10 09:35:21 +02:00
David Rupprecht 06d4559294 Change include path absolut to project dir 2018-04-01 18:08:24 +02:00