Xavier Arteaga
423475173d
Refactored magnitude and argument extraction from sf_worker
2019-10-21 16:17:37 +02:00
Xavier Arteaga
10480f62b3
SRSENB: Split sf_worker and cc_worker
2019-10-21 16:17:37 +02:00
Xavier Arteaga
baac179d95
Added vector complex sine generator
2019-04-30 15:08:39 +02:00
Xavier Arteaga
06a9d8eb6f
Added vector estimate frequency
2019-04-30 14:52:16 +02:00
Andre Puschmann
4b01a2e4a0
update copyright notice
2019-04-29 09:20:02 +02:00
Ismael Gomez
bc9d342959
New optimization on the PHY for both UE and eNodeB ( #251 )
...
* New parallel Turbodecoder implementation in SSE/AVX 16-bit and 8-bit
* Optimised UL Interleaver
* Include TB CRC calculation in FEC encoder
* New threading priorities
2018-09-04 17:51:35 +02:00
Ismael Gomez
e18ba937dc
Limit uplink signal normalization to avoid clipping
2018-06-27 16:29:40 +02:00
Xavier Arteaga
681b98ae50
Added vector CFO
2018-05-25 16:06:32 +02:00
Ismael Gomez
384e0f8649
Fixed UL interleaver (missing SIMD deinterleaver)
2018-04-17 19:16:55 +02:00
David Rupprecht
9d71bec7b6
Unified include guards
2018-03-31 19:04:04 +02:00
Andre Puschmann
57e0c01fc4
check max buffer length in hex print
2018-03-07 21:23:57 +01:00
Ismael Gomez
e16839d7a7
Merge branch 'next' into 16bit_avx_viterbi
2018-01-10 16:06:49 +01:00
yagoda
d749ee66f4
introducing 16 bit viterbi support
2018-01-08 17:05:23 +00:00
Xavier Arteaga
a01c5ea08f
Fixes #119 : channel estimation subframe averaging
2018-01-08 12:05:31 +01:00
Ismael Gomez
a3a1d268b7
Improved CFO estimation/correction by filtering central 6 PRB. Cleaned ue_sync/sync/pss objects. Used const attr in vector and other objects
2017-11-29 18:30:21 +01:00
yagoda
38903de07c
adding simd xor functionality
2017-11-27 11:10:50 +00:00
Ismael Gomez
dbae016b00
Removed unused vector functions
2017-10-02 18:16:03 +01:00
Xavier Arteaga
9e5f999666
Added more functions
2017-09-28 11:04:26 +02:00
Xavier Arteaga
c9f6bfccd4
Refactored vector library with SIMD independent architecture inline functions test-benchmark
2017-09-25 13:19:34 +02:00
Xavier Arteaga
0947173fc1
Merge branch 'next' into next_mimo
2017-08-29 17:30:40 +02:00
Ismael Gomez
616e18c570
fixed PUCCH correlation estimator
2017-08-24 15:16:13 +02:00
Xavier Arteaga
48d508aeba
Added srs_lte_cpy for aligned copy which improves a bit performance for aligned data
2017-08-17 10:19:19 +02:00
Andre Puschmann
d079d25b2c
rename srslte folder and src subfolder
2017-05-30 13:05:04 +02:00