srsLTE

Commit Graph

Author	SHA1	Message	Date
Xavier Arteaga	67c07dfb56	Moved UL/DL PUCCH procedures into pucch_proc	2020-02-13 10:29:00 +01:00
Xavier Arteaga	1f762844ee	Initial PUCCH format 3 decoder	2020-02-13 10:29:00 +01:00
Pedro Alvarez	c5979f59eb	Clang format UE, eNB and lib (#850 ) * Clang-formated UE, eNB and lib. * Fixed compiling errors from clang-format. * Fix linking issues introduced by clang-format * Fix poor formating in initializing arrays of arrays. * Fix mistake in conflict resolution on rm_turbo.c * Re-apply clang format to gtpc_ies.h	2019-12-16 16:04:22 +01:00
Ismael Gomez	1d83bb08e2	Changes in ACK procedure to support CA. Tested 1 cell in SISO/MIMO	2019-10-14 11:20:35 +02:00
Andre Puschmann	4b01a2e4a0	update copyright notice	2019-04-29 09:20:02 +02:00
Ismael Gomez	7780b1aba5	add tdd/ca support	2019-04-25 20:57:58 +02:00
David Rupprecht	9d71bec7b6	Unified include guards	2018-03-31 19:04:04 +02:00
Xavier Arteaga	9ffdb1e62d	Refactored PMI/CQI/RI reporting	2018-01-11 14:37:01 +01:00
Xavier Arteaga	e2a61af462	Added Aperiodic mode 3-1 in enb and some more optimizations	2017-11-16 14:48:03 +01:00
Xavier Arteaga	f9e428ef68	Optimised RI/PMI calculation call	2017-10-30 14:25:03 +01:00
Xavier Arteaga	6657892b80	Added UCI CQI decoder for variable number of bits	2017-10-16 17:33:30 +02:00
Ismael Gomez	3e712d6a57	Merge branch 'next_mimo' into next	2017-09-13 13:12:50 +02:00
Xavier Arteaga	0c31a5cfc1	Added periodic RI on PUCCH for TM3 and TM4	2017-09-08 16:24:34 +02:00
Xavier Arteaga	c04eadaa6b	PUSCH supports 2 ACK	2017-09-07 17:50:05 +02:00
Xavier Arteaga	6a668ef27f	Added PUSCH ACK decoder and test	2017-09-07 17:50:05 +02:00
Ismael Gomez	5341d79b8a	Fix memory alignment in PUCCH processing. Fixes #94	2017-09-05 10:54:48 +02:00
Andre Puschmann	d079d25b2c	rename srslte folder and src subfolder	2017-05-30 13:05:04 +02:00

17 Commits