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srsLTE
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30 Commits

Author SHA1 Message Date
Pedro Alvarez c5979f59eb Clang format UE, eNB and lib (#850) 
* Clang-formated UE, eNB and lib.
* Fixed compiling errors from clang-format.
* Fix linking issues introduced by clang-format
* Fix poor formating in initializing arrays of arrays.
* Fix mistake in conflict resolution on rm_turbo.c
* Re-apply clang format to gtpc_ies.h
 2019-12-16 16:04:22 +01:00
Xavier Arteaga 06a9d8eb6f Added vector estimate frequency 2019-04-30 14:52:16 +02:00
Andre Puschmann 4b01a2e4a0 update copyright notice 2019-04-29 09:20:02 +02:00
yagoda 69dc16c4c8 changes to fix arm compilation 2018-11-27 14:27:59 +01:00
Xavier Arteaga 8c3a0153b9 Added missing AVX512 intrinsics and flags. Fixes #291. 2018-11-21 18:09:09 +01:00
Andre Puschmann d981f129e0 Merge branch 'master' into next 2018-09-20 12:54:05 +02:00
IgnasJ 67c8bf1368 Fixes for srsLTE on ARM (#229) 
* Fix ARM NEON code compilation

Fix LV_HAVE_NEON defintion incorrecly used instead of HAVE_NEON in some places
Replace vqabsq_s32 with vabsq_f32 as vqabsq_s32 requires int type (fails to compile)
Fix missing NEON code path in mat.h in srslte_mat_2x2_mmse_csi_simd()

* Fix timestamp overflow issue on 32-bit systems with Soapy driver

'time_t secs' can be 32-bit on some systems. This causes calculation:
'secs * 1000000000;' to overflow.
 2018-09-19 17:34:59 +02:00
Ismael Gomez bc9d342959
New optimization on the PHY for both UE and eNodeB (#251) 
* New parallel Turbodecoder implementation in SSE/AVX 16-bit and 8-bit

* Optimised UL Interleaver

* Include TB CRC calculation in FEC encoder

* New threading priorities
 2018-09-04 17:51:35 +02:00
Xavier Arteaga f01f7b4945 Added Vector max abs SIMD function 2018-06-28 09:28:17 +02:00
Xavier Arteaga 681b98ae50 Added vector CFO 2018-05-25 16:06:32 +02:00
Xavier Arteaga 0bc3be7abb Added DL CSI decoding to TM2 and TM3 2018-04-20 11:27:39 +02:00
Andre Puschmann e7a268d79b fix SIMD compile issue on NEON 2018-04-04 12:20:32 +02:00
David Rupprecht 9d71bec7b6 Unified include guards 2018-03-31 19:04:04 +02:00
Xavier Arteaga ec901373d4 Correction ofo simd.h for AVX512 2018-03-01 14:01:36 +01:00
Xavier Arteaga 6fc9c96c58 Added CSI softbits weightening for Single antenna transmission 2018-02-28 12:07:31 +01:00
Xavier Arteaga c4247c7aca Fix coverity for complex 16bit 2018-01-31 10:44:52 +01:00
Ismael Gomez 821d5595c5 Fixed AVX compilation 2017-12-20 12:35:28 +01:00
Ismael Gomez a3a1d268b7 Improved CFO estimation/correction by filtering central 6 PRB. Cleaned ue_sync/sync/pss objects. Used const attr in vector and other objects 2017-11-29 18:30:21 +01:00
yagoda 38903de07c adding simd xor functionality 2017-11-27 11:10:50 +00:00
Xavier Arteaga 91e706d4d1 Fixes #107: srslte_simd_f_sqrt NaN solved if input is 0 2017-11-22 12:23:46 +01:00
yagoda 3292f9c269 simd.h tidy up & small fix for eMBMS 2017-10-19 16:38:58 +00:00
Xavier Arteaga 0504e7a51b Fixed test for abs value. Solved compilation Neon warnings and SSE errors 2017-10-18 12:49:43 +02:00
yagoda f4b9e7311a adding neon support to new vector structure 2017-10-17 15:51:27 +00:00
yagoda 2019ca31ef adding neon support for new kernel structure 2017-10-13 15:35:48 +01:00
Xavier Arteaga 1a5cf45dda Solved compilation error for SSE (Tested in Atom) 2017-10-09 16:30:32 +02:00
Xavier Arteaga 94a06867a3 Optimized SIMD includes and solved AVX512 bugs 2017-09-29 16:42:46 +02:00
Xavier Arteaga 9e5f999666 Added more functions 2017-09-28 11:04:26 +02:00
Xavier Arteaga c41ad5453c Solved bugs and compilation error in simd and vector_simd 2017-09-25 17:08:11 +02:00
Xavier Arteaga 1c3b5552be added c16 type and architecture independent inline SIMD calls 2017-09-25 13:15:59 +02:00
Xavier Arteaga d933f1b817 Renamed module algebra (it is now named mat) and moved usefl math SIMD macros to simd.h 2017-08-31 12:24:26 +02:00