mirror of https://github.com/PentHertz/srsLTE.git
194 lines
7.5 KiB
C
194 lines
7.5 KiB
C
/*
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* Generated by asn1c-0.9.22 (http://lionet.info/asn1c)
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* From ASN.1 module "EUTRA-RRC-Definitions"
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* found in "./asn1c/ASN1_files/EUTRA-RRC-Definitions.asn"
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* `asn1c -gen-PER -fcompound-names -fnative-types`
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*/
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#ifndef _DRX_Config_H_
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#define _DRX_Config_H_
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#include <asn_application.h>
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/* Including external dependencies */
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#include <NULL.h>
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#include <NativeEnumerated.h>
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#include <NativeInteger.h>
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#include <constr_CHOICE.h>
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#include <constr_SEQUENCE.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Dependencies */
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typedef enum DRX_Config_PR {
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DRX_Config_PR_NOTHING, /* No components present */
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DRX_Config_PR_release,
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DRX_Config_PR_setup
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} DRX_Config_PR;
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typedef enum DRX_Config__setup__onDurationTimer {
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DRX_Config__setup__onDurationTimer_psf1 = 0,
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DRX_Config__setup__onDurationTimer_psf2 = 1,
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DRX_Config__setup__onDurationTimer_psf3 = 2,
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DRX_Config__setup__onDurationTimer_psf4 = 3,
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DRX_Config__setup__onDurationTimer_psf5 = 4,
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DRX_Config__setup__onDurationTimer_psf6 = 5,
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DRX_Config__setup__onDurationTimer_psf8 = 6,
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DRX_Config__setup__onDurationTimer_psf10 = 7,
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DRX_Config__setup__onDurationTimer_psf20 = 8,
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DRX_Config__setup__onDurationTimer_psf30 = 9,
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DRX_Config__setup__onDurationTimer_psf40 = 10,
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DRX_Config__setup__onDurationTimer_psf50 = 11,
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DRX_Config__setup__onDurationTimer_psf60 = 12,
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DRX_Config__setup__onDurationTimer_psf80 = 13,
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DRX_Config__setup__onDurationTimer_psf100 = 14,
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DRX_Config__setup__onDurationTimer_psf200 = 15
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} e_DRX_Config__setup__onDurationTimer;
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typedef enum DRX_Config__setup__drx_InactivityTimer {
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DRX_Config__setup__drx_InactivityTimer_psf1 = 0,
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DRX_Config__setup__drx_InactivityTimer_psf2 = 1,
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DRX_Config__setup__drx_InactivityTimer_psf3 = 2,
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DRX_Config__setup__drx_InactivityTimer_psf4 = 3,
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DRX_Config__setup__drx_InactivityTimer_psf5 = 4,
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DRX_Config__setup__drx_InactivityTimer_psf6 = 5,
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DRX_Config__setup__drx_InactivityTimer_psf8 = 6,
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DRX_Config__setup__drx_InactivityTimer_psf10 = 7,
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DRX_Config__setup__drx_InactivityTimer_psf20 = 8,
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DRX_Config__setup__drx_InactivityTimer_psf30 = 9,
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DRX_Config__setup__drx_InactivityTimer_psf40 = 10,
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DRX_Config__setup__drx_InactivityTimer_psf50 = 11,
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DRX_Config__setup__drx_InactivityTimer_psf60 = 12,
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DRX_Config__setup__drx_InactivityTimer_psf80 = 13,
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DRX_Config__setup__drx_InactivityTimer_psf100 = 14,
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DRX_Config__setup__drx_InactivityTimer_psf200 = 15,
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DRX_Config__setup__drx_InactivityTimer_psf300 = 16,
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DRX_Config__setup__drx_InactivityTimer_psf500 = 17,
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DRX_Config__setup__drx_InactivityTimer_psf750 = 18,
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DRX_Config__setup__drx_InactivityTimer_psf1280 = 19,
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DRX_Config__setup__drx_InactivityTimer_psf1920 = 20,
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DRX_Config__setup__drx_InactivityTimer_psf2560 = 21,
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DRX_Config__setup__drx_InactivityTimer_psf0_v1020 = 22,
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DRX_Config__setup__drx_InactivityTimer_spare9 = 23,
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DRX_Config__setup__drx_InactivityTimer_spare8 = 24,
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DRX_Config__setup__drx_InactivityTimer_spare7 = 25,
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DRX_Config__setup__drx_InactivityTimer_spare6 = 26,
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DRX_Config__setup__drx_InactivityTimer_spare5 = 27,
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DRX_Config__setup__drx_InactivityTimer_spare4 = 28,
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DRX_Config__setup__drx_InactivityTimer_spare3 = 29,
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DRX_Config__setup__drx_InactivityTimer_spare2 = 30,
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DRX_Config__setup__drx_InactivityTimer_spare1 = 31
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} e_DRX_Config__setup__drx_InactivityTimer;
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typedef enum DRX_Config__setup__drx_RetransmissionTimer {
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DRX_Config__setup__drx_RetransmissionTimer_psf1 = 0,
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DRX_Config__setup__drx_RetransmissionTimer_psf2 = 1,
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DRX_Config__setup__drx_RetransmissionTimer_psf4 = 2,
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DRX_Config__setup__drx_RetransmissionTimer_psf6 = 3,
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DRX_Config__setup__drx_RetransmissionTimer_psf8 = 4,
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DRX_Config__setup__drx_RetransmissionTimer_psf16 = 5,
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DRX_Config__setup__drx_RetransmissionTimer_psf24 = 6,
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DRX_Config__setup__drx_RetransmissionTimer_psf33 = 7
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} e_DRX_Config__setup__drx_RetransmissionTimer;
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typedef enum DRX_Config__setup__longDRX_CycleStartOffset_PR {
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DRX_Config__setup__longDRX_CycleStartOffset_PR_NOTHING, /* No components present */
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf10,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf20,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf32,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf40,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf64,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf80,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf128,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf160,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf256,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf320,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf512,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf640,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf1024,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf1280,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf2048,
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DRX_Config__setup__longDRX_CycleStartOffset_PR_sf2560
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} DRX_Config__setup__longDRX_CycleStartOffset_PR;
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typedef enum DRX_Config__setup__shortDRX__shortDRX_Cycle {
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf2 = 0,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf5 = 1,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf8 = 2,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf10 = 3,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf16 = 4,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf20 = 5,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf32 = 6,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf40 = 7,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf64 = 8,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf80 = 9,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf128 = 10,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf160 = 11,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf256 = 12,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf320 = 13,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf512 = 14,
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DRX_Config__setup__shortDRX__shortDRX_Cycle_sf640 = 15
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} e_DRX_Config__setup__shortDRX__shortDRX_Cycle;
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/* DRX-Config */
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typedef struct DRX_Config {
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DRX_Config_PR present;
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union DRX_Config_u {
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NULL_t release;
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struct DRX_Config__setup {
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long onDurationTimer;
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long drx_InactivityTimer;
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long drx_RetransmissionTimer;
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struct DRX_Config__setup__longDRX_CycleStartOffset {
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DRX_Config__setup__longDRX_CycleStartOffset_PR present;
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union DRX_Config__setup__longDRX_CycleStartOffset_u {
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long sf10;
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long sf20;
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long sf32;
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long sf40;
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long sf64;
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long sf80;
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long sf128;
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long sf160;
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long sf256;
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long sf320;
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long sf512;
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long sf640;
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long sf1024;
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long sf1280;
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long sf2048;
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long sf2560;
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} choice;
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/* Context for parsing across buffer boundaries */
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asn_struct_ctx_t _asn_ctx;
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} longDRX_CycleStartOffset;
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struct DRX_Config__setup__shortDRX {
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long shortDRX_Cycle;
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long drxShortCycleTimer;
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/* Context for parsing across buffer boundaries */
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asn_struct_ctx_t _asn_ctx;
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} *shortDRX;
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/* Context for parsing across buffer boundaries */
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asn_struct_ctx_t _asn_ctx;
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} setup;
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} choice;
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/* Context for parsing across buffer boundaries */
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asn_struct_ctx_t _asn_ctx;
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} DRX_Config_t;
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/* Implementation */
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/* extern asn_TYPE_descriptor_t asn_DEF_onDurationTimer_4; // (Use -fall-defs-global to expose) */
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/* extern asn_TYPE_descriptor_t asn_DEF_drx_InactivityTimer_21; // (Use -fall-defs-global to expose) */
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/* extern asn_TYPE_descriptor_t asn_DEF_drx_RetransmissionTimer_54; // (Use -fall-defs-global to expose) */
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/* extern asn_TYPE_descriptor_t asn_DEF_shortDRX_Cycle_81; // (Use -fall-defs-global to expose) */
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extern asn_TYPE_descriptor_t asn_DEF_DRX_Config;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DRX_Config_H_ */
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#include <asn_internal.h>
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