mirror of https://github.com/PentHertz/srsLTE.git
264 lines
11 KiB
C++
264 lines
11 KiB
C++
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#include "sched_test_common.h"
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#include "srsenb/hdr/stack/mac/sched_grid.h"
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#include "srsran/common/common_lte.h"
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#include "srsran/common/test_common.h"
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using namespace srsenb;
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const uint32_t seed = std::chrono::system_clock::now().time_since_epoch().count();
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const uint32_t PCell_IDX = 0;
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uint32_t get_aggr_level(sched_ue& sched_ue, uint32_t enb_cc_idx, const std::vector<sched_cell_params_t>& cell_params)
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{
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srsran_dci_format_t dci_format = sched_ue.get_dci_format();
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uint32_t nof_dci_bits = srsran_dci_format_sizeof(&cell_params[enb_cc_idx].cfg.cell, nullptr, nullptr, dci_format);
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uint32_t aggr_level = sched_ue.get_aggr_level(enb_cc_idx, nof_dci_bits);
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return aggr_level;
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}
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int test_pdcch_one_ue()
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{
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using rand_uint = std::uniform_int_distribution<uint32_t>;
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const uint32_t ENB_CC_IDX = 0;
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// Params
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uint32_t nof_prb = srsran::lte_cell_nof_prbs[rand_uint{0, 5}(get_rand_gen())];
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uint16_t rnti = rand_uint{70, 120}(get_rand_gen());
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srsran::tti_point start_tti{rand_uint{0, 10240}(get_rand_gen())};
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uint32_t nof_ttis = 100;
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// Derived
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std::vector<sched_cell_params_t> cell_params(1);
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sched_interface::ue_cfg_t ue_cfg = generate_default_ue_cfg();
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sched_interface::cell_cfg_t cell_cfg = generate_default_cell_cfg(nof_prb);
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sched_interface::sched_args_t sched_args{};
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TESTASSERT(cell_params[ENB_CC_IDX].set_cfg(ENB_CC_IDX, cell_cfg, sched_args));
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sf_cch_allocator pdcch;
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sched_ue sched_ue{rnti, cell_params, ue_cfg};
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pdcch.init(cell_params[PCell_IDX]);
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TESTASSERT(pdcch.nof_allocs() == 0);
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uint32_t tti_counter = 0;
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for (; tti_counter < nof_ttis; ++tti_counter) {
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tti_point tti_rx = start_tti + tti_counter;
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pdcch.new_tti(tti_rx);
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TESTASSERT(pdcch.nof_cces() == cell_params[ENB_CC_IDX].nof_cce_table[0]);
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TESTASSERT(pdcch.get_cfi() == 1); // Start at CFI=1
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// Set DL CQI - it should affect aggregation level
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uint32_t dl_cqi = std::uniform_int_distribution<uint32_t>{1, 25}(srsenb::get_rand_gen());
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sched_ue.set_dl_cqi(to_tx_dl(tti_rx), ENB_CC_IDX, dl_cqi);
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uint32_t aggr_idx = get_aggr_level(sched_ue, PCell_IDX, cell_params);
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uint32_t max_nof_cce_locs =
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(*sched_ue.get_locations(ENB_CC_IDX, sf_cch_allocator::MAX_CFI, to_tx_dl(tti_rx).sf_idx()))[aggr_idx].size();
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// allocate DL user
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uint32_t prev_cfi = pdcch.get_cfi();
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const cce_cfi_position_table* dci_cce = sched_ue.get_locations(ENB_CC_IDX, prev_cfi, to_tx_dl(tti_rx).sf_idx());
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uint32_t prev_nof_cce_locs = (*dci_cce)[aggr_idx].size();
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_DATA, aggr_idx, &sched_ue, true));
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TESTASSERT(pdcch.nof_allocs() == 1);
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if (prev_nof_cce_locs == pdcch.nof_allocs() - 1) {
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// CFI must be increased
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TESTASSERT(pdcch.get_cfi() > prev_cfi);
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} else {
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// Previous CFI should be fine
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TESTASSERT(pdcch.get_cfi() == prev_cfi);
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}
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dci_cce = sched_ue.get_locations(ENB_CC_IDX, pdcch.get_cfi(), to_tx_dl(tti_rx).sf_idx());
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const cce_position_list& dci_locs = (*dci_cce)[aggr_idx];
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// TEST: Check the first alloc of the pdcch result (e.g. rnti, valid cce mask, etc.)
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sf_cch_allocator::alloc_result_t pdcch_result;
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pdcch_mask_t pdcch_mask;
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pdcch.get_allocs(&pdcch_result, &pdcch_mask, 0);
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TESTASSERT(pdcch_result.size() == 1);
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TESTASSERT(pdcch_result[0]->rnti == sched_ue.get_rnti());
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TESTASSERT(pdcch_result[0]->total_mask.size() == cell_params[ENB_CC_IDX].nof_cce_table[pdcch.get_cfi() - 1]);
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TESTASSERT(pdcch_result[0]->current_mask == pdcch_result[0]->total_mask);
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TESTASSERT(pdcch_result[0]->current_mask.count() == 1U << aggr_idx);
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TESTASSERT(std::count(dci_locs.begin(), dci_locs.end(), pdcch_result[0]->dci_pos.ncce) > 0);
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// allocate UL user
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if (max_nof_cce_locs == pdcch.nof_allocs()) {
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// no more space
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continue;
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}
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prev_nof_cce_locs = dci_locs.size();
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prev_cfi = pdcch.get_cfi();
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::UL_DATA, aggr_idx, &sched_ue, true));
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TESTASSERT(pdcch.nof_allocs() == 2);
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if (prev_nof_cce_locs == pdcch.nof_allocs() - 1) {
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// CFI must be increased
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TESTASSERT(pdcch.get_cfi() > prev_cfi);
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} else {
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// Previous CFI should be fine
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TESTASSERT(pdcch.get_cfi() == prev_cfi);
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}
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dci_cce = sched_ue.get_locations(ENB_CC_IDX, pdcch.get_cfi(), to_tx_dl(tti_rx).sf_idx());
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const cce_position_list& dci_locs2 = (*dci_cce)[aggr_idx];
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pdcch.get_allocs(&pdcch_result, &pdcch_mask, 0);
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TESTASSERT(pdcch_result.size() == pdcch.nof_allocs());
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TESTASSERT(pdcch_result[1]->rnti == sched_ue.get_rnti());
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TESTASSERT(pdcch_result[1]->total_mask.size() == cell_params[ENB_CC_IDX].nof_cce_table[pdcch.get_cfi() - 1]);
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TESTASSERT((pdcch_result[1]->current_mask & pdcch_result[0]->current_mask).none());
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TESTASSERT(pdcch_result[1]->current_mask.count() == 1U << aggr_idx);
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TESTASSERT(pdcch_result[1]->total_mask == (pdcch_result[0]->current_mask | pdcch_result[1]->current_mask));
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TESTASSERT(std::count(dci_locs2.begin(), dci_locs2.end(), pdcch_result[0]->dci_pos.ncce) > 0);
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srslog::fetch_basic_logger("TEST").info("PDCCH alloc result: %s", pdcch.result_to_string(true).c_str());
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}
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TESTASSERT(tti_counter == nof_ttis);
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return SRSRAN_SUCCESS;
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}
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int test_pdcch_ue_and_sibs()
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{
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// Params
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uint32_t nof_prb = 100;
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std::vector<sched_cell_params_t> cell_params(1);
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sched_interface::ue_cfg_t ue_cfg = generate_default_ue_cfg();
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sched_interface::cell_cfg_t cell_cfg = generate_default_cell_cfg(nof_prb);
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sched_interface::sched_args_t sched_args{};
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TESTASSERT(cell_params[0].set_cfg(0, cell_cfg, sched_args));
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sf_cch_allocator pdcch;
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sched_ue sched_ue{0x46, cell_params, ue_cfg};
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pdcch.init(cell_params[PCell_IDX]);
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TESTASSERT(pdcch.nof_allocs() == 0);
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tti_point tti_rx{std::uniform_int_distribution<uint32_t>(0, 9)(get_rand_gen())};
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pdcch.new_tti(tti_rx);
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TESTASSERT(pdcch.nof_cces() == cell_params[0].nof_cce_table[0]);
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TESTASSERT(pdcch.get_cfi() == 1); // Start at CFI=1
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TESTASSERT(pdcch.nof_allocs() == 0);
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_BC, 2));
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TESTASSERT(pdcch.nof_allocs() == 1);
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_RAR, 2));
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TESTASSERT(pdcch.nof_allocs() == 2);
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_DATA, 2, &sched_ue, false));
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TESTASSERT(pdcch.nof_allocs() == 3);
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// TEST: Ability to revert last allocation
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pdcch.rem_last_dci();
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TESTASSERT(pdcch.nof_allocs() == 2);
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// TEST: DCI positions
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uint32_t cfi = pdcch.get_cfi();
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sf_cch_allocator::alloc_result_t dci_result;
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pdcch_mask_t result_pdcch_mask;
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pdcch.get_allocs(&dci_result, &result_pdcch_mask);
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TESTASSERT(dci_result.size() == 2);
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const cce_position_list& bc_dci_locs = cell_params[0].common_locations[cfi - 1][2];
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TESTASSERT(bc_dci_locs[0] == dci_result[0]->dci_pos.ncce);
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const cce_position_list& rar_dci_locs = cell_params[0].rar_locations[to_tx_dl(tti_rx).sf_idx()][cfi - 1][2];
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TESTASSERT(std::any_of(rar_dci_locs.begin(), rar_dci_locs.end(), [&dci_result](uint32_t val) {
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return dci_result[1]->dci_pos.ncce == val;
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}));
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return SRSRAN_SUCCESS;
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}
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int test_6prbs()
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{
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std::vector<sched_cell_params_t> cell_params(1);
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sched_interface::ue_cfg_t ue_cfg = generate_default_ue_cfg();
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sched_interface::cell_cfg_t cell_cfg = generate_default_cell_cfg(6);
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sched_interface::sched_args_t sched_args{};
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TESTASSERT(cell_params[0].set_cfg(0, cell_cfg, sched_args));
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sf_cch_allocator pdcch;
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sched_ue sched_ue{0x46, cell_params, ue_cfg}, sched_ue2{0x47, cell_params, ue_cfg};
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sf_cch_allocator::alloc_result_t dci_result;
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pdcch_mask_t result_pdcch_mask;
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pdcch.init(cell_params[PCell_IDX]);
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TESTASSERT(pdcch.nof_allocs() == 0);
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uint32_t opt_cfi = 3;
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uint32_t bc_aggr_idx = 2, ue_aggr_idx = 1;
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// TEST: The first rnti will pick a DCI position of its 3 possible ones that avoids clash with SIB. The second rnti
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// wont find space
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tti_point tti_rx{0};
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pdcch.new_tti(tti_rx);
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const cce_position_list& bc_dci_locs = cell_params[0].common_locations[opt_cfi - 1][bc_aggr_idx];
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const cce_position_list& rnti_dci_locs =
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(*sched_ue.get_locations(0, opt_cfi, to_tx_dl(tti_rx).sf_idx()))[ue_aggr_idx];
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const cce_position_list& rnti2_dci_locs =
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(*sched_ue2.get_locations(0, opt_cfi, to_tx_dl(tti_rx).sf_idx()))[ue_aggr_idx];
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_BC, bc_aggr_idx));
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_DATA, ue_aggr_idx, &sched_ue, false));
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TESTASSERT(not pdcch.alloc_dci(alloc_type_t::DL_DATA, ue_aggr_idx, &sched_ue2, false));
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TESTASSERT(pdcch.nof_allocs() == 2);
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pdcch.get_allocs(&dci_result, &result_pdcch_mask);
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TESTASSERT(dci_result.size() == 2);
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TESTASSERT(dci_result[0]->dci_pos.ncce == bc_dci_locs[0]);
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TESTASSERT(dci_result[1]->dci_pos.ncce == rnti_dci_locs[2]);
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// TEST: Two RNTIs can be allocated if one doesnt use the PUCCH
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opt_cfi = 2;
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tti_rx = tti_point{1};
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pdcch.new_tti(tti_rx);
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const cce_position_list& rnti_dci_locs3 =
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(*sched_ue.get_locations(0, opt_cfi, to_tx_dl(tti_rx).sf_idx()))[ue_aggr_idx];
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const cce_position_list& rnti_dci_locs4 =
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(*sched_ue2.get_locations(0, opt_cfi, to_tx_dl(tti_rx).sf_idx()))[ue_aggr_idx];
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_DATA, ue_aggr_idx, &sched_ue, false));
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TESTASSERT(not pdcch.alloc_dci(alloc_type_t::DL_DATA, ue_aggr_idx, &sched_ue2, false));
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TESTASSERT(pdcch.alloc_dci(alloc_type_t::DL_DATA, ue_aggr_idx, &sched_ue2, true));
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TESTASSERT(pdcch.nof_allocs() == 2 and pdcch.get_cfi() == opt_cfi);
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pdcch.get_allocs(&dci_result, &result_pdcch_mask);
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TESTASSERT(dci_result.size() == 2);
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TESTASSERT(dci_result[0]->dci_pos.ncce == rnti_dci_locs3[0]);
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TESTASSERT(dci_result[1]->dci_pos.ncce == rnti_dci_locs4[0]);
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return SRSRAN_SUCCESS;
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}
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int main()
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{
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srsenb::set_randseed(seed);
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printf("This is the chosen seed: %u\n", seed);
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auto& test_log = srslog::fetch_basic_logger("TEST", false);
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test_log.set_level(srslog::basic_levels::info);
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// Start the log backend.
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srslog::init();
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TESTASSERT(test_pdcch_one_ue() == SRSRAN_SUCCESS);
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TESTASSERT(test_pdcch_ue_and_sibs() == SRSRAN_SUCCESS);
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TESTASSERT(test_6prbs() == SRSRAN_SUCCESS);
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srslog::flush();
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printf("Success\n");
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}
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