srsLTE/srsue
Xavier Arteaga 8dd1c59e18 Added amplitude and power conversions to dB and viceversa 2019-12-02 09:47:22 +01:00
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hdr SRSUE RRC: new PHY unknown sync state, cell select waits for PHY in-sync 2019-11-28 16:33:35 +01:00
src Added amplitude and power conversions to dB and viceversa 2019-12-02 09:47:22 +01:00
test Added amplitude and power conversions to dB and viceversa 2019-12-02 09:47:22 +01:00
CMakeLists.txt update copyright notice 2019-04-29 09:20:02 +02:00
ue.conf.example Do not change master clock rate if not necessary. Hint in ue/enb configs for low BW cells 2019-09-27 18:59:55 +02:00