From 00b08d9c31becd0f310ab77381ff3c7714da4048 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 11 Mar 2023 13:59:58 +0000 Subject: [PATCH] SDMMC cleanup, experimental SDIOv1 changes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16155 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- demos/STM32/RT-VFS-FATFS/.cproject | 34 + .../cfg/stm32f407zg_olimex/chconf.h | 840 ++++++++++++++++++ .../cfg/stm32f407zg_olimex/ffconf.h | 304 +++++++ .../cfg/stm32f407zg_olimex/halconf.h | 553 ++++++++++++ .../cfg/stm32f407zg_olimex/mcuconf.h | 347 ++++++++ .../cfg/stm32f407zg_olimex/portab.c | 56 ++ .../cfg/stm32f407zg_olimex/portab.h | 77 ++ .../cfg/stm32f407zg_olimex/vfsconf.h | 169 ++++ .../RT-VFS-FATFS/make/stm32f407zg_olimex.make | 199 +++++ os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c | 271 ++++-- os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.h | 79 +- os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c | 54 +- os/hal/ports/STM32/LLD/SDMMCv2/hal_sdc_lld.c | 30 +- readme.txt | 2 + 14 files changed, 2800 insertions(+), 215 deletions(-) create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/chconf.h create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/ffconf.h create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/halconf.h create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/mcuconf.h create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.c create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.h create mode 100644 demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/vfsconf.h create mode 100644 demos/STM32/RT-VFS-FATFS/make/stm32f407zg_olimex.make diff --git a/demos/STM32/RT-VFS-FATFS/.cproject b/demos/STM32/RT-VFS-FATFS/.cproject index 38dc1bf2a..728edac8d 100644 --- a/demos/STM32/RT-VFS-FATFS/.cproject +++ b/demos/STM32/RT-VFS-FATFS/.cproject @@ -171,6 +171,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/chconf.h b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/chconf.h new file mode 100644 index 000000000..b99bf1512 --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/chconf.h @@ -0,0 +1,840 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_7_0_ + +/*===========================================================================*/ +/** + * @name System settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Handling of instances. + * @note If enabled then threads assigned to various instances can + * interact each other using the same synchronization objects. + * If disabled then each OS instance is a separate world, no + * direct interactions are handled by the OS. + */ +#if !defined(CH_CFG_SMP_MODE) +#define CH_CFG_SMP_MODE FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** + * @brief Kernel hardening level. + * @details This option is the level of functional-safety checks enabled + * in the kerkel. The meaning is: + * - 0: No checks, maximum performance. + * - 1: Reasonable checks. + * - 2: All checks. + * . + */ +#if !defined(CH_CFG_HARDENING_LEVEL) +#define CH_CFG_HARDENING_LEVEL 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Time Stamps APIs. + * @details If enabled then the time stamps APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TIMESTAMP) +#define CH_CFG_USE_TIMESTAMP TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Memory checks APIs. + * @details If enabled then the memory checks APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCHECKS) +#define CH_CFG_USE_MEMCHECKS TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES TRUE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES TRUE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add system custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add system initialization code here.*/ \ +} + +/** + * @brief OS instance structure extension. + * @details User fields added to the end of the @p os_instance_t structure. + */ +#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ + /* Add OS instance custom fields here.*/ + +/** + * @brief OS instance initialization hook. + * + * @param[in] oip pointer to the @p os_instance_t structure + */ +#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ + /* Add OS instance initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + * + * @param[in] tp pointer to the @p thread_t structure + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @param[in] tp pointer to the @p thread_t structure + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + * + * @param[in] ntp thread being switched in + * @param[in] otp thread being switched out + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** + * @brief Runtime Faults Collection Unit hook. + * @details This hook is invoked each time new faults are collected and stored. + */ +#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ + /* Faults handling code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/ffconf.h b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/ffconf.h new file mode 100644 index 000000000..6a82ed27b --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/ffconf.h @@ -0,0 +1,304 @@ +/* CHIBIOS FIX */ +#include "ch.h" +#define FATFS_CHIBIOS_EXTENSIONS + +/*---------------------------------------------------------------------------/ +/ FatFs Functional Configurations +/---------------------------------------------------------------------------*/ + +#define FFCONF_DEF 86631 /* Revision ID */ + +/*---------------------------------------------------------------------------/ +/ Function Configurations +/---------------------------------------------------------------------------*/ + +#define FF_FS_READONLY 0 +/* This option switches read-only configuration. (0:Read/Write or 1:Read-only) +/ Read-only configuration removes writing API functions, f_write(), f_sync(), +/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree() +/ and optional writing functions as well. */ + + +#define FF_FS_MINIMIZE 0 +/* This option defines minimization level to remove some basic API functions. +/ +/ 0: Basic functions are fully enabled. +/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename() +/ are removed. +/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1. +/ 3: f_lseek() function is removed in addition to 2. */ + + +#define FF_USE_FIND 0 +/* This option switches filtered directory read functions, f_findfirst() and +/ f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */ + + +#define FF_USE_MKFS 0 +/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */ + + +#define FF_USE_FASTSEEK 0 +/* This option switches fast seek function. (0:Disable or 1:Enable) */ + + +#define FF_USE_EXPAND 0 +/* This option switches f_expand function. (0:Disable or 1:Enable) */ + + +#define FF_USE_CHMOD 0 +/* This option switches attribute manipulation functions, f_chmod() and f_utime(). +/ (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */ + + +#define FF_USE_LABEL 0 +/* This option switches volume label functions, f_getlabel() and f_setlabel(). +/ (0:Disable or 1:Enable) */ + + +#define FF_USE_FORWARD 0 +/* This option switches f_forward() function. (0:Disable or 1:Enable) */ + + +#define FF_USE_STRFUNC 0 +#define FF_PRINT_LLI 0 +#define FF_PRINT_FLOAT 0 +#define FF_STRF_ENCODE 0 +/* FF_USE_STRFUNC switches string functions, f_gets(), f_putc(), f_puts() and +/ f_printf(). +/ +/ 0: Disable. FF_PRINT_LLI, FF_PRINT_FLOAT and FF_STRF_ENCODE have no effect. +/ 1: Enable without LF-CRLF conversion. +/ 2: Enable with LF-CRLF conversion. +/ +/ FF_PRINT_LLI = 1 makes f_printf() support long long argument and FF_PRINT_FLOAT = 1/2 + makes f_printf() support floating point argument. These features want C99 or later. +/ When FF_LFN_UNICODE >= 1 with LFN enabled, string functions convert the character +/ encoding in it. FF_STRF_ENCODE selects assumption of character encoding ON THE FILE +/ to be read/written via those functions. +/ +/ 0: ANSI/OEM in current CP +/ 1: Unicode in UTF-16LE +/ 2: Unicode in UTF-16BE +/ 3: Unicode in UTF-8 +*/ + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/---------------------------------------------------------------------------*/ + +#define FF_CODE_PAGE 850 +/* This option specifies the OEM code page to be used on the target system. +/ Incorrect code page setting can cause a file open failure. +/ +/ 437 - U.S. +/ 720 - Arabic +/ 737 - Greek +/ 771 - KBL +/ 775 - Baltic +/ 850 - Latin 1 +/ 852 - Latin 2 +/ 855 - Cyrillic +/ 857 - Turkish +/ 860 - Portuguese +/ 861 - Icelandic +/ 862 - Hebrew +/ 863 - Canadian French +/ 864 - Arabic +/ 865 - Nordic +/ 866 - Russian +/ 869 - Greek 2 +/ 932 - Japanese (DBCS) +/ 936 - Simplified Chinese (DBCS) +/ 949 - Korean (DBCS) +/ 950 - Traditional Chinese (DBCS) +/ 0 - Include all code pages above and configured by f_setcp() +*/ + + +#define FF_USE_LFN 3 +#define FF_MAX_LFN 255 +/* The FF_USE_LFN switches the support for LFN (long file name). +/ +/ 0: Disable LFN. FF_MAX_LFN has no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ To enable the LFN, ffunicode.c needs to be added to the project. The LFN function +/ requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and +/ additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled. +/ The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can +/ be in range of 12 to 255. It is recommended to be set it 255 to fully support LFN +/ specification. +/ When use stack for the working buffer, take care on stack overflow. When use heap +/ memory for the working buffer, memory management functions, ff_memalloc() and +/ ff_memfree() exemplified in ffsystem.c, need to be added to the project. */ + + +#define FF_LFN_UNICODE 0 +/* This option switches the character encoding on the API when LFN is enabled. +/ +/ 0: ANSI/OEM in current CP (TCHAR = char) +/ 1: Unicode in UTF-16 (TCHAR = WCHAR) +/ 2: Unicode in UTF-8 (TCHAR = char) +/ 3: Unicode in UTF-32 (TCHAR = DWORD) +/ +/ Also behavior of string I/O functions will be affected by this option. +/ When LFN is not enabled, this option has no effect. */ + + +#define FF_LFN_BUF 255 +#define FF_SFN_BUF 12 +/* This set of options defines size of file name members in the FILINFO structure +/ which is used to read out directory items. These values should be suffcient for +/ the file names to read. The maximum possible length of the read file name depends +/ on character encoding. When LFN is not enabled, these options have no effect. */ + + +#define FF_FS_RPATH 0 +/* This option configures support for relative path. +/ +/ 0: Disable relative path and remove related functions. +/ 1: Enable relative path. f_chdir() and f_chdrive() are available. +/ 2: f_getcwd() function is available in addition to 1. +*/ + + +/*---------------------------------------------------------------------------/ +/ Drive/Volume Configurations +/---------------------------------------------------------------------------*/ + +#define FF_VOLUMES 1 +/* Number of volumes (logical drives) to be used. (1-10) */ + + +#define FF_STR_VOLUME_ID 0 +#define FF_VOLUME_STRS "RAM","NAND","CF","SD","SD2","USB","USB2","USB3" +/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings. +/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive +/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each +/ logical drives. Number of items must not be less than FF_VOLUMES. Valid +/ characters for the volume ID strings are A-Z, a-z and 0-9, however, they are +/ compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is +/ not defined, a user defined volume string table needs to be defined as: +/ +/ const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",... +*/ + + +#define FF_MULTI_PARTITION 0 +/* This option switches support for multiple volumes on the physical drive. +/ By default (0), each logical drive number is bound to the same physical drive +/ number and only an FAT volume found on the physical drive will be mounted. +/ When this function is enabled (1), each logical drive number can be bound to +/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk() +/ funciton will be available. */ + + +#define FF_MIN_SS 512 +#define FF_MAX_SS 512 +/* This set of options configures the range of sector size to be supported. (512, +/ 1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and +/ harddisk, but a larger value may be required for on-board flash memory and some +/ type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured +/ for variable sector size mode and disk_ioctl() function needs to implement +/ GET_SECTOR_SIZE command. */ + + +#define FF_LBA64 0 +/* This option switches support for 64-bit LBA. (0:Disable or 1:Enable) +/ To enable the 64-bit LBA, also exFAT needs to be enabled. (FF_FS_EXFAT == 1) */ + + +#define FF_MIN_GPT 0x10000000 +/* Minimum number of sectors to switch GPT as partitioning format in f_mkfs and +/ f_fdisk function. 0x100000000 max. This option has no effect when FF_LBA64 == 0. */ + + +#define FF_USE_TRIM 0 +/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable) +/ To enable Trim function, also CTRL_TRIM command should be implemented to the +/ disk_ioctl() function. */ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/---------------------------------------------------------------------------*/ + +#define FF_FS_TINY 0 +/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny) +/ At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes. +/ Instead of private sector buffer eliminated from the file object, common sector +/ buffer in the filesystem object (FATFS) is used for the file data transfer. */ + + +#define FF_FS_EXFAT 1 +/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable) +/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1) +/ Note that enabling exFAT discards ANSI C (C89) compatibility. */ + + +#define FF_FS_NORTC 0 +#define FF_NORTC_MON 1 +#define FF_NORTC_MDAY 1 +#define FF_NORTC_YEAR 2020 +/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have +/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable +/ the timestamp function. Every object modified by FatFs will have a fixed timestamp +/ defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time. +/ To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be +/ added to the project to read current time form real-time clock. FF_NORTC_MON, +/ FF_NORTC_MDAY and FF_NORTC_YEAR have no effect. +/ These options have no effect in read-only configuration (FF_FS_READONLY = 1). */ + + +#define FF_FS_NOFSINFO 0 +/* If you need to know correct free space on the FAT32 volume, set bit 0 of this +/ option, and f_getfree() function at first time after volume mount will force +/ a full FAT scan. Bit 1 controls the use of last allocated cluster number. +/ +/ bit0=0: Use free cluster count in the FSINFO if available. +/ bit0=1: Do not trust free cluster count in the FSINFO. +/ bit1=0: Use last allocated cluster number in the FSINFO if available. +/ bit1=1: Do not trust last allocated cluster number in the FSINFO. +*/ + + +#define FF_FS_LOCK 0 +/* The option FF_FS_LOCK switches file lock function to control duplicated file open +/ and illegal operation to open objects. This option must be 0 when FF_FS_READONLY +/ is 1. +/ +/ 0: Disable file lock function. To avoid volume corruption, application program +/ should avoid illegal open, remove and rename to the open objects. +/ >0: Enable file lock function. The value defines how many files/sub-directories +/ can be opened simultaneously under file lock control. Note that the file +/ lock control is independent of re-entrancy. */ + + +#define FF_FS_REENTRANT 0 +#define FF_FS_TIMEOUT TIME_MS2I(1000) +#define FF_SYNC_t semaphore_t* +/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs +/ module itself. Note that regardless of this option, file access to different +/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs() +/ and f_fdisk() function, are always not re-entrant. Only file/directory access +/ to the same volume is under control of this function. +/ +/ 0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect. +/ 1: Enable re-entrancy. Also user provided synchronization handlers, +/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj() +/ function, must be added to the project. Samples are available in +/ option/syscall.c. +/ +/ The FF_FS_TIMEOUT defines timeout period in unit of time tick. +/ The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*, +/ SemaphoreHandle_t and etc. A header file for O/S definitions needs to be +/ included somewhere in the scope of ff.h. */ + + + +/*--- End of configuration options ---*/ diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/halconf.h b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/halconf.h new file mode 100644 index 000000000..2a7df6829 --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/halconf.h @@ -0,0 +1,553 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_8_4_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Timeout before assuming a failure while waiting for card idle. + * @note Time is in milliseconds. + */ +#if !defined(MMC_IDLE_TIMEOUT_MS) || defined(__DOXYGEN__) +#define MMC_IDLE_TIMEOUT_MS 1000 +#endif + +/** + * @brief Mutual exclusion on the SPI bus. + */ +#if !defined(MMC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define MMC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SIO driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SIO_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Support for thread synchronization API. + */ +#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) +#define SIO_USE_SYNCHRONIZATION TRUE +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Inserts an assertion on function errors before returning. + */ +#if !defined(SPI_USE_ASSERT_ON_ERROR) || defined(__DOXYGEN__) +#define SPI_USE_ASSERT_ON_ERROR TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/mcuconf.h b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/mcuconf.h new file mode 100644 index 000000000..f9a63713a --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/mcuconf.h @@ -0,0 +1,347 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF +#define STM32F405_MCUCONF +#define STM32F415_MCUCONF +#define STM32F407_MCUCONF +#define STM32F417_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 12 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE +#define STM32_GPT_USE_TIM14 FALSE + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE + +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_WRITE_TIMEOUT_MS 1000 +#define STM32_SDC_READ_TIMEOUT_MS 1000 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_HOST_WAKEUP_DURATION 2 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.c b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.c new file mode 100644 index 000000000..a5db1cf25 --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.c @@ -0,0 +1,56 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file portab.c + * @brief Application portability module code. + * + * @addtogroup application_portability + * @{ + */ + +#include "hal.h" +#include "portab.h" + +/*===========================================================================*/ +/* Module local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported functions. */ +/*===========================================================================*/ + +void portab_setup(void) { + +} + +/** @} */ diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.h b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.h new file mode 100644 index 000000000..20d00c0ab --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/portab.h @@ -0,0 +1,77 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file portab.h + * @brief Application portability macros and structures. + * + * @addtogroup application_portability + * @{ + */ + +#ifndef PORTAB_H +#define PORTAB_H + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#define PORTAB_LINE_LED1 LINE_LED +//#define PORTAB_LINE_LED2 LINE_LED2 +#define PORTAB_LED_OFF PAL_LOW +#define PORTAB_LED_ON PAL_HIGH + +#define PORTAB_LINE_BUTTON LINE_BUTTON +#define PORTAB_BUTTON_PRESSED PAL_HIGH + +#define PORTAB_SD1 SD1 +#define PORTAB_SDCD1 SDCD1 + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void portab_setup(void); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Module inline functions. */ +/*===========================================================================*/ + +#endif /* PORTAB_H */ + +/** @} */ diff --git a/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/vfsconf.h b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/vfsconf.h new file mode 100644 index 000000000..34a1ca635 --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/cfg/stm32f407zg_olimex/vfsconf.h @@ -0,0 +1,169 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/vfsconf.h + * @brief VFS configuration header. + * + * @addtogroup VFS_CONF + * @{ + */ + +#ifndef VFSCONF_H +#define VFSCONF_H + +#define _CHIBIOS_VFS_CONF_ +#define _CHIBIOS_VFS_CONF_VER_1_0_ + +/*===========================================================================*/ +/** + * @name VFS general settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Maximum filename length. + */ +#if !defined(VFS_CFG_NAMELEN_MAX) || defined(__DOXYGEN__) +#define VFS_CFG_NAMELEN_MAX 15 +#endif + +/** + * @brief Maximum paths length. + */ +#if !defined(VFS_CFG_PATHLEN_MAX) || defined(__DOXYGEN__) +#define VFS_CFG_PATHLEN_MAX 1023 +#endif + +/** + * @brief Number of shared path buffers. + */ +#if !defined(VFS_CFG_PATHBUFS_NUM) || defined(__DOXYGEN__) +#define VFS_CFG_PATHBUFS_NUM 1 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name VFS drivers + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the VFS Overlay Driver. + */ +#if !defined(VFS_CFG_ENABLE_DRV_OVERLAY) || defined(__DOXYGEN__) +#define VFS_CFG_ENABLE_DRV_OVERLAY TRUE +#endif + +/** + * @brief Enables the VFS Streams Driver. + */ +#if !defined(VFS_CFG_ENABLE_DRV_STREAMS) || defined(__DOXYGEN__) +#define VFS_CFG_ENABLE_DRV_STREAMS TRUE +#endif + +/** + * @brief Enables the VFS FatFS Driver. + */ +#if !defined(VFS_CFG_ENABLE_DRV_FATFS) || defined(__DOXYGEN__) +#define VFS_CFG_ENABLE_DRV_FATFS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Overlay driver settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Maximum number of overlay directories. + */ +#if !defined(DRV_CFG_OVERLAY_DRV_MAX) || defined(__DOXYGEN__) +#define DRV_CFG_OVERLAY_DRV_MAX 2 +#endif + +/** + * @brief Number of directory nodes pre-allocated in the pool. + */ +#if !defined(DRV_CFG_OVERLAY_NODES_NUM) || defined(__DOXYGEN__) +#define DRV_CFG_OVERLAY_DIR_NODES_NUM 1 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Streams driver settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of directory nodes pre-allocated in the pool. + */ +#if !defined(DRV_CFG_STREAMS_DIR_NODES_NUM) || defined(__DOXYGEN__) +#define DRV_CFG_STREAMS_DIR_NODES_NUM 1 +#endif + +/** + * @brief Number of file nodes pre-allocated in the pool. + */ +#if !defined(DRV_CFG_STREAMS_FILE_NODES_NUM) || defined(__DOXYGEN__) +#define DRV_CFG_STREAMS_FILE_NODES_NUM 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name FatFS driver settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Maximum number of FatFS file systems mounted. + */ +#if !defined(DRV_CFG_FATFS_FS_NUM) || defined(__DOXYGEN__) +#define DRV_CFG_FATFS_FS_NUM 1 +#endif + +/** + * @brief Number of directory nodes pre-allocated in the pool. + */ +#if !defined(DRV_CFG_FATFS_DIR_NODES_NUM) || defined(__DOXYGEN__) +#define DRV_CFG_FATFS_DIR_NODES_NUM 1 +#endif + +/** + * @brief Number of file nodes pre-allocated in the pool. + */ +#if !defined(DRV_CFG_FATFS_FILE_NODES_NUM) || defined(__DOXYGEN__) +#define DRV_CFG_FATFS_FILE_NODES_NUM 2 +#endif + +/** @} */ + +#endif /* VFSCONF_H */ + +/** @} */ diff --git a/demos/STM32/RT-VFS-FATFS/make/stm32f407zg_olimex.make b/demos/STM32/RT-VFS-FATFS/make/stm32f407zg_olimex.make new file mode 100644 index 000000000..8d29241fc --- /dev/null +++ b/demos/STM32/RT-VFS-FATFS/make/stm32f407zg_olimex.make @@ -0,0 +1,199 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m4 + +# Imported source files and paths. +CHIBIOS := ../../.. +CONFDIR := ./cfg/stm32f407zg_olimex +BUILDDIR := ./build/stm32f407zg_olimex +DEPDIR := ./.dep/stm32f407zg_olimex + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Common files. +include $(CHIBIOS)/os/common/utils/utils.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_E407/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk +# VFS files (optional). +include $(CHIBIOS)/os/vfs/vfs.mk +include $(CHIBIOS)/os/vfs/vfs_syscalls.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +include $(CHIBIOS)/os/test/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk +include $(CHIBIOS)/os/various/fatfs_bindings/fatfs.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CONFDIR)/portab.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) ./cfg + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -DSHELL_CMD_FILES_ENABLED=1 + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +# +# Custom rules +############################################################################## diff --git a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c index be97134b9..cce0d700e 100644 --- a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c @@ -32,7 +32,34 @@ /* Driver local definitions. */ /*===========================================================================*/ -#define DMA_CHANNEL \ +/* + * The following definitions are missing from some implementations, fixing + * as zeroed masks. + */ +#if !defined(SDIO_STA_STBITERR) +#define SDIO_STA_STBITERR 0 +#endif + +#if !defined(SDIO_ICR_STBITERRC) +#define SDIO_ICR_STBITERRC 0 +#endif + +#if !defined(SDIO_ICR_CEATAENDC) +#define SDIO_ICR_CEATAENDC 0 +#endif + +#if !defined(SDIO_MASK_STBITERRIE) +#define SDIO_MASK_STBITERRIE 0 +#endif + +#define SDIO_ICR_ALL_FLAGS 0xFFFFFFFFU + +#define SDIO_STA_ERROR_MASK \ + (SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | \ + SDIO_STA_CTIMEOUT | SDIO_STA_DTIMEOUT | \ + SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR) + +#define SDIO_DMA_CHANNEL \ STM32_DMA_GETCHANNEL(STM32_SDC_SDIO_DMA_STREAM, \ STM32_SDC_SDIO_DMA_CHN) @@ -47,27 +74,66 @@ SDCDriver SDCD1; /* Driver local variables and types. */ /*===========================================================================*/ -#if STM32_SDC_SDIO_UNALIGNED_SUPPORT -/** - * @brief Buffer for temporary storage during unaligned transfers. - */ -static union { - uint32_t alignment; - uint8_t buf[MMCSD_BLOCK_SIZE]; -} u; -#endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */ - /** * @brief SDIO default configuration. */ static const SDCConfig sdc_default_cfg = { - SDC_MODE_4BIT + SDC_MODE_4BIT, + 0U }; /*===========================================================================*/ /* Driver local functions. */ /*===========================================================================*/ +/** + * @brief Calculates a clock divider for the specified frequency. + * @note The divider is calculated to not exceed the required frequency + * in case of non-integer division. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] f required frequency + * @return The CLKCR value. + */ +static uint32_t sdc_lld_clkdiv(SDCDriver *sdcp, uint32_t f) { + uint32_t div; + +#if defined(STM32_SDC_MAX_CLOCK) + /* Optional enforcement of an arbitrary frequency limit.*/ + if (f > STM32_SDC_MAX_CLOCK) { + f = STM32_SDC_MAX_CLOCK; + } +#endif + + div = sdcp->config->slowdown + ((48000000U + f - 1U) / f); + if (div == 1U) { + return SDIO_CLKCR_BYPASS; + } + + return div - 2U; +} + +/** + * @brief Calculates the value to be put in DTIMER for timeout. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] ms timeout in milliseconds + * @return The DTIMER value. + */ +__STATIC_FORCEINLINE uint32_t sdc_lld_get_timeout(SDCDriver *sdcp, + uint32_t ms) { + uint32_t div, clkcr; + + clkcr = sdcp->sdio->CLKCR; + if ((clkcr & SDIO_CLKCR_BYPASS) != 0U) { + div = 1U; + } + else { + div = (clkcr & SDIO_CLKCR_CLKDIV_Msk) + 2U; + } + return (((48000000U / (div * 2U)) / 1000U) * ms); +} + /** * @brief Prepares to handle read transaction. * @details Designed for read special registers from card. @@ -84,9 +150,9 @@ static const SDCConfig sdc_default_cfg = { */ static bool sdc_lld_prepare_read_bytes(SDCDriver *sdcp, uint8_t *buf, uint32_t bytes) { - osalDbgCheck(bytes < 0x1000000); + osalDbgCheck(bytes < 0x1000000U); - sdcp->sdio->DTIMER = STM32_SDC_READ_TIMEOUT; + sdcp->sdio->DTIMER = sdc_lld_get_timeout(sdcp, STM32_SDC_READ_TIMEOUT_MS); /* Checks for errors and waits for the card to be ready for reading.*/ if (_sdc_wait_for_transfer_state(sdcp)) @@ -99,7 +165,7 @@ static bool sdc_lld_prepare_read_bytes(SDCDriver *sdcp, dmaStreamEnable(sdcp->dma); /* Setting up data transfer.*/ - sdcp->sdio->ICR = STM32_SDIO_ICR_ALL_FLAGS; + sdcp->sdio->ICR = SDIO_ICR_ALL_FLAGS; sdcp->sdio->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE | SDIO_MASK_STBITERRIE | @@ -138,17 +204,19 @@ static bool sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk, if (!(sdcp->cardmode & SDC_MODE_HIGH_CAPACITY)) startblk *= MMCSD_BLOCK_SIZE; - if (n > 1) { + if (n > 1U) { /* Send read multiple blocks command to card.*/ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_MULTIPLE_BLOCK, - startblk, resp) || MMCSD_R1_ERROR(resp[0])) + startblk, resp) || MMCSD_R1_ERROR(resp[0])) { return HAL_FAILED; + } } else { /* Send read single block command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_SINGLE_BLOCK, - startblk, resp) || MMCSD_R1_ERROR(resp[0])) + startblk, resp) || MMCSD_R1_ERROR(resp[0])) { return HAL_FAILED; + } } return HAL_SUCCESS; @@ -176,17 +244,19 @@ static bool sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk, if (!(sdcp->cardmode & SDC_MODE_HIGH_CAPACITY)) startblk *= MMCSD_BLOCK_SIZE; - if (n > 1) { + if (n > 1U) { /* Write multiple blocks command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK, - startblk, resp) || MMCSD_R1_ERROR(resp[0])) + startblk, resp) || MMCSD_R1_ERROR(resp[0])) { return HAL_FAILED; + } } else { /* Write single block command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_BLOCK, - startblk, resp) || MMCSD_R1_ERROR(resp[0])) + startblk, resp) || MMCSD_R1_ERROR(resp[0])) { return HAL_FAILED; + } } return HAL_SUCCESS; @@ -209,36 +279,29 @@ static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, /* Note the mask is checked before going to sleep because the interrupt may have occurred before reaching the critical zone.*/ osalSysLock(); - if (sdcp->sdio->MASK != 0) + + if (sdcp->sdio->MASK != 0U) { osalThreadSuspendS(&sdcp->thread); - if ((sdcp->sdio->STA & SDIO_STA_DATAEND) == 0) { + } + + /* Stopping operations, waiting for transfer completion at DMA level, then + the stream is disabled and cleared.*/ + dmaWaitCompletion(sdcp->dma); + sdcp->sdio->MASK = 0U; + sdcp->sdio->DCTRL = 0U; + + if ((sdcp->sdio->STA & SDIO_STA_DATAEND) == 0U) { osalSysUnlock(); return HAL_FAILED; } -#if (defined(STM32F4XX) || defined(STM32F2XX)) - /* Wait until DMA channel enabled to be sure that all data transferred.*/ - while (sdcp->dma->stream->CR & STM32_DMA_CR_EN) - ; + /* Clearing status.*/ + sdcp->sdio->ICR = SDIO_ICR_ALL_FLAGS; - /* DMA event flags must be manually cleared.*/ - dmaStreamClearInterrupt(sdcp->dma); - - sdcp->sdio->ICR = STM32_SDIO_ICR_ALL_FLAGS; - sdcp->sdio->DCTRL = 0; osalSysUnlock(); -#else - /* Waits for transfer completion at DMA level, then the stream is - disabled and cleared.*/ - dmaWaitCompletion(sdcp->dma); - - sdcp->sdio->ICR = STM32_SDIO_ICR_ALL_FLAGS; - sdcp->sdio->DCTRL = 0; - osalSysUnlock(); -#endif /* Finalize transaction.*/ - if (n > 1) + if (n > 1U) return sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp); return HAL_SUCCESS; @@ -285,16 +348,19 @@ static void sdc_lld_collect_errors(SDCDriver *sdcp, uint32_t sta) { static void sdc_lld_error_cleanup(SDCDriver *sdcp, uint32_t n, uint32_t *resp) { - uint32_t sta = sdcp->sdio->STA; + uint32_t sta; - dmaStreamClearInterrupt(sdcp->dma); dmaStreamDisable(sdcp->dma); - sdcp->sdio->ICR = STM32_SDIO_ICR_ALL_FLAGS; - sdcp->sdio->MASK = 0; - sdcp->sdio->DCTRL = 0; + + /* Clearing status.*/ + sta = sdcp->sdio->STA; + sdcp->sdio->ICR = sta; + sdcp->sdio->DCTRL = 0U; sdc_lld_collect_errors(sdcp, sta); - if (n > 1) + + if (n > 1U) { sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp); + } } /*===========================================================================*/ @@ -306,8 +372,8 @@ static void sdc_lld_error_cleanup(SDCDriver *sdcp, #endif /** * @brief SDIO IRQ handler. - * @details It just wakes transaction thread. All error handling performs in - * that thread. + * @details It just wakes transaction thread, errors handling is performed in + * there. * * @isr */ @@ -319,7 +385,7 @@ OSAL_IRQ_HANDLER(STM32_SDIO_HANDLER) { /* Disables the source but the status flags are not reset because the read/write functions needs to check them.*/ - SDIO->MASK = 0; + SDIO->MASK = 0U; osalThreadResumeI(&SDCD1.thread, MSG_OK); @@ -360,7 +426,7 @@ void sdc_lld_start(SDCDriver *sdcp) { sdcp->config = &sdc_default_cfg; } - sdcp->dmamode = STM32_DMA_CR_CHSEL(DMA_CHANNEL) | + sdcp->dmamode = STM32_DMA_CR_CHSEL(SDIO_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_SDC_SDIO_DMA_PRIORITY) | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | @@ -372,6 +438,7 @@ void sdc_lld_start(SDCDriver *sdcp) { STM32_DMA_CR_MBURST_INCR4; #endif + /* If in stopped state then clocks are enabled and DMA initialized.*/ if (sdcp->state == BLK_STOP) { sdcp->dma = dmaStreamAllocI(STM32_SDC_SDIO_DMA_STREAM, STM32_SDC_SDIO_IRQ_PRIORITY, @@ -387,10 +454,11 @@ void sdc_lld_start(SDCDriver *sdcp) { } /* Configuration, card clock is initially stopped.*/ - sdcp->sdio->POWER = 0; - sdcp->sdio->CLKCR = 0; - sdcp->sdio->DCTRL = 0; - sdcp->sdio->DTIMER = 0; + sdcp->sdio->POWER = 0U; + sdcp->sdio->CLKCR = 0U; + sdcp->sdio->DCTRL = 0U; + sdcp->sdio->DTIMER = 0U; + sdcp->sdio->ICR = SDIO_ICR_ALL_FLAGS; } /** @@ -405,10 +473,10 @@ void sdc_lld_stop(SDCDriver *sdcp) { if (sdcp->state != BLK_STOP) { /* SDIO deactivation.*/ - sdcp->sdio->POWER = 0; - sdcp->sdio->CLKCR = 0; - sdcp->sdio->DCTRL = 0; - sdcp->sdio->DTIMER = 0; + sdcp->sdio->POWER = 0U; + sdcp->sdio->CLKCR = 0U; + sdcp->sdio->DCTRL = 0U; + sdcp->sdio->DTIMER = 0U; /* DMA stream released.*/ dmaStreamFreeI(sdcp->dma); @@ -429,7 +497,7 @@ void sdc_lld_stop(SDCDriver *sdcp) { void sdc_lld_start_clk(SDCDriver *sdcp) { /* Initial clock setting: 400kHz, 1bit mode.*/ - sdcp->sdio->CLKCR = STM32_SDIO_DIV_LS; + sdcp->sdio->CLKCR = sdc_lld_clkdiv(sdcp, 400000U); sdcp->sdio->POWER |= SDIO_POWER_PWRCTRL_0 | SDIO_POWER_PWRCTRL_1; sdcp->sdio->CLKCR |= SDIO_CLKCR_CLKEN; @@ -438,7 +506,7 @@ void sdc_lld_start_clk(SDCDriver *sdcp) { } /** - * @brief Sets the SDIO clock to data mode (25MHz or less). + * @brief Sets the SDIO clock to data mode (25/50 MHz or less). * * @param[in] sdcp pointer to the @p SDCDriver object * @param[in] clk the clock mode @@ -447,18 +515,26 @@ void sdc_lld_start_clk(SDCDriver *sdcp) { */ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { -#if STM32_SDC_SDIO_50MHZ if (SDC_CLK_50MHz == clk) { - sdcp->sdio->CLKCR = (sdcp->sdio->CLKCR & 0xFFFFFF00U) | STM32_SDIO_DIV_HS - | SDIO_CLKCR_BYPASS; - } - else - sdcp->sdio->CLKCR = (sdcp->sdio->CLKCR & 0xFFFFFF00U) | STM32_SDIO_DIV_HS; + sdcp->sdio->CLKCR = (sdcp->sdio->CLKCR & ~(SDIO_CLKCR_BYPASS_Msk | + SDIO_CLKCR_PWRSAV_Msk | + SDIO_CLKCR_CLKDIV_Msk)) | +#if STM32_SDC_SDIO_PWRSAV + sdc_lld_clkdiv(sdcp, 50000000U) | SDIO_CLKCR_PWRSAV; #else - (void)clk; - - sdcp->sdio->CLKCR = (sdcp->sdio->CLKCR & 0xFFFFFF00U) | STM32_SDIO_DIV_HS; + sdc_lld_clkdiv(sdcp, 50000000U); #endif + } + else { + sdcp->sdio->CLKCR = (sdcp->sdio->CLKCR & ~(SDIO_CLKCR_BYPASS_Msk | + SDIO_CLKCR_PWRSAV_Msk | + SDIO_CLKCR_CLKDIV_Msk)) | +#if STM32_SDC_SDIO_PWRSAV + sdc_lld_clkdiv(sdcp, 25000000U) | SDIO_CLKCR_PWRSAV; +#else + sdc_lld_clkdiv(sdcp, 25000000U); +#endif + } } /** @@ -470,12 +546,12 @@ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { */ void sdc_lld_stop_clk(SDCDriver *sdcp) { - sdcp->sdio->CLKCR = 0; - sdcp->sdio->POWER = 0; + sdcp->sdio->CLKCR = 0U; + sdcp->sdio->POWER = 0U; } /** - * @brief Switches the bus to 4 bits mode. + * @brief Switches the bus to 1, 4 or 8 bits mode. * * @param[in] sdcp pointer to the @p SDCDriver object * @param[in] mode bus mode @@ -511,8 +587,8 @@ void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) { sdcp->sdio->ARG = arg; sdcp->sdio->CMD = (uint32_t)cmd | SDIO_CMD_CPSMEN; - while ((sdcp->sdio->STA & SDIO_STA_CMDSENT) == 0) - ; + while ((sdcp->sdio->STA & SDIO_STA_CMDSENT) == 0U) { + } sdcp->sdio->ICR = SDIO_ICR_CMDSENTC; } @@ -538,11 +614,11 @@ bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdio->ARG = arg; sdcp->sdio->CMD = (uint32_t)cmd | SDIO_CMD_WAITRESP_0 | SDIO_CMD_CPSMEN; while (((sta = sdcp->sdio->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | - SDIO_STA_CCRCFAIL)) == 0) + SDIO_STA_CCRCFAIL)) == 0U) ; sdcp->sdio->ICR = sta & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL); - if ((sta & (SDIO_STA_CTIMEOUT)) != 0) { + if ((sta & (SDIO_STA_CTIMEOUT)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -571,10 +647,10 @@ bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdio->ARG = arg; sdcp->sdio->CMD = (uint32_t)cmd | SDIO_CMD_WAITRESP_0 | SDIO_CMD_CPSMEN; while (((sta = sdcp->sdio->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | - SDIO_STA_CCRCFAIL)) == 0) + SDIO_STA_CCRCFAIL)) == 0U) ; sdcp->sdio->ICR = sta & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL); - if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0) { + if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -606,11 +682,11 @@ bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdio->CMD = (uint32_t)cmd | SDIO_CMD_WAITRESP_0 | SDIO_CMD_WAITRESP_1 | SDIO_CMD_CPSMEN; while (((sta = sdcp->sdio->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | - SDIO_STA_CCRCFAIL)) == 0) + SDIO_STA_CCRCFAIL)) == 0U) ; sdcp->sdio->ICR = sta & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL); - if ((sta & (STM32_SDIO_STA_ERROR_MASK)) != 0) { + if ((sta & (SDIO_STA_ERROR_MASK)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -679,13 +755,13 @@ bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, osalDbgCheck(blocks < 0x1000000 / MMCSD_BLOCK_SIZE); - sdcp->sdio->DTIMER = STM32_SDC_READ_TIMEOUT; + sdcp->sdio->DTIMER = sdc_lld_get_timeout(sdcp, STM32_SDC_READ_TIMEOUT_MS); /* Checks for errors and waits for the card to be ready for reading.*/ if (_sdc_wait_for_transfer_state(sdcp)) return HAL_FAILED; - /* Prepares the DMA channel for writing.*/ + /* Prepares the DMA channel for reading.*/ dmaStreamSetMemory0(sdcp->dma, buf); dmaStreamSetTransactionSize(sdcp->dma, (blocks * MMCSD_BLOCK_SIZE) / sizeof (uint32_t)); @@ -693,7 +769,7 @@ bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, dmaStreamEnable(sdcp->dma); /* Setting up data transfer.*/ - sdcp->sdio->ICR = STM32_SDIO_ICR_ALL_FLAGS; + sdcp->sdio->ICR = SDIO_ICR_ALL_FLAGS; sdcp->sdio->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE | SDIO_MASK_STBITERRIE | @@ -741,7 +817,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, osalDbgCheck(blocks < 0x1000000 / MMCSD_BLOCK_SIZE); - sdcp->sdio->DTIMER = STM32_SDC_WRITE_TIMEOUT; + sdcp->sdio->DTIMER = sdc_lld_get_timeout(sdcp, STM32_SDC_WRITE_TIMEOUT_MS); /* Checks for errors and waits for the card to be ready for writing.*/ if (_sdc_wait_for_transfer_state(sdcp)) @@ -755,7 +831,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, dmaStreamEnable(sdcp->dma); /* Setting up data transfer.*/ - sdcp->sdio->ICR = STM32_SDIO_ICR_ALL_FLAGS; + sdcp->sdio->ICR = SDIO_ICR_ALL_FLAGS; sdcp->sdio->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE | SDIO_MASK_STBITERRIE | @@ -801,19 +877,20 @@ bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, uint8_t *buf, uint32_t blocks) { #if STM32_SDC_SDIO_UNALIGNED_SUPPORT - if (((unsigned)buf & 3) != 0) { + if (((unsigned)buf & 3U) != 0U) { uint32_t i; - for (i = 0; i < blocks; i++) { - if (sdc_lld_read_aligned(sdcp, startblk, u.buf, 1)) + for (i = 0U; i < blocks; i++) { + if (sdc_lld_read_aligned(sdcp, startblk, sdcp->buf, 1)) { return HAL_FAILED; - memcpy(buf, u.buf, MMCSD_BLOCK_SIZE); + } + memcpy(buf, sdcp->buf, MMCSD_BLOCK_SIZE); buf += MMCSD_BLOCK_SIZE; startblk++; } return HAL_SUCCESS; } #else /* !STM32_SDC_SDIO_UNALIGNED_SUPPORT */ - osalDbgAssert((((unsigned)buf & 3) == 0), "unaligned buffer"); + osalDbgAssert((((unsigned)buf & 3U) == 0U), "unaligned buffer"); #endif /* !STM32_SDC_SDIO_UNALIGNED_SUPPORT */ return sdc_lld_read_aligned(sdcp, startblk, buf, blocks); } @@ -836,19 +913,19 @@ bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, const uint8_t *buf, uint32_t blocks) { #if STM32_SDC_SDIO_UNALIGNED_SUPPORT - if (((unsigned)buf & 3) != 0) { + if (((unsigned)buf & 3U) != 0U) { uint32_t i; - for (i = 0; i < blocks; i++) { - memcpy(u.buf, buf, MMCSD_BLOCK_SIZE); + for (i = 0U; i < blocks; i++) { + memcpy(sdcp->buf, buf, MMCSD_BLOCK_SIZE); buf += MMCSD_BLOCK_SIZE; - if (sdc_lld_write_aligned(sdcp, startblk, u.buf, 1)) + if (sdc_lld_write_aligned(sdcp, startblk, sdcp->buf, 1)) return HAL_FAILED; startblk++; } return HAL_SUCCESS; } #else /* !STM32_SDC_SDIO_UNALIGNED_SUPPORT */ - osalDbgAssert((((unsigned)buf & 3) == 0), "unaligned buffer"); + osalDbgAssert((((unsigned)buf & 3U) == 0U), "unaligned buffer"); #endif /* !STM32_SDC_SDIO_UNALIGNED_SUPPORT */ return sdc_lld_write_aligned(sdcp, startblk, buf, blocks); } diff --git a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.h b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.h index f20beb4e4..96ae0a916 100644 --- a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.h +++ b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.h @@ -31,44 +31,6 @@ /* Driver constants. */ /*===========================================================================*/ -/* - * The following definitions are missing from some implementations, fixing - * as zeroed masks. - */ -#if !defined(SDIO_STA_STBITERR) -#define SDIO_STA_STBITERR 0 -#endif - -#if !defined(SDIO_ICR_STBITERRC) -#define SDIO_ICR_STBITERRC 0 -#endif - -#if !defined(SDIO_ICR_CEATAENDC) -#define SDIO_ICR_CEATAENDC 0 -#endif - -#if !defined(SDIO_MASK_STBITERRIE) -#define SDIO_MASK_STBITERRIE 0 -#endif - -/** - * @brief Value to clear all interrupts flag at once. - */ -#define STM32_SDIO_ICR_ALL_FLAGS (SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | \ - SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC | \ - SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | \ - SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | \ - SDIO_ICR_DATAENDC | SDIO_ICR_STBITERRC | \ - SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | \ - SDIO_ICR_CEATAENDC) - -/** - * @brief Mask of error flags in STA register. - */ -#define STM32_SDIO_STA_ERROR_MASK (SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | \ - SDIO_STA_CTIMEOUT | SDIO_STA_DTIMEOUT | \ - SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR) - /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -91,14 +53,6 @@ #define STM32_SDC_SDIO_IRQ_PRIORITY 9 #endif -/** - * @brief Enable clock bypass. - * @note Allow clock speed up to 50 Mhz. - */ -#if !defined(STM32_SDC_SDIO_50MHZ) || defined(__DOXYGEN__) -#define STM32_SDC_SDIO_50MHZ FALSE -#endif - /** * @brief Write timeout in milliseconds. */ @@ -113,6 +67,13 @@ #define STM32_SDC_READ_TIMEOUT_MS 1000 #endif +/** + * @brief Card clock power saving enable. + */ +#if !defined(STM32_SDC_SDIO_PWRSAV) || defined(__DOXYGEN__) +#define STM32_SDC_SDIO_PWRSAV FALSE +#endif + /** * @brief Card clock activation delay in milliseconds. */ @@ -179,9 +140,6 @@ #define STM32_SDIO_DIV_LS 118 #endif -/** - * @brief SDIO data timeouts in SDIO clock cycles. - */ #if (defined(STM32F4XX) || defined(STM32F2XX)) #if !STM32_CLOCK48_REQUIRED #error "SDIO requires STM32_CLOCK48_REQUIRED to be enabled" @@ -190,23 +148,6 @@ #if STM32_PLL48CLK != 48000000 #error "invalid STM32_PLL48CLK clock value" #endif - -#define STM32_SDC_WRITE_TIMEOUT \ - (((STM32_PLL48CLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ - STM32_SDC_WRITE_TIMEOUT_MS) -#define STM32_SDC_READ_TIMEOUT \ - (((STM32_PLL48CLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ - STM32_SDC_READ_TIMEOUT_MS) - -#else /* !(defined(STM32F4XX) || defined(STM32F2XX)) */ - -#define STM32_SDC_WRITE_TIMEOUT \ - (((STM32_HCLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ - STM32_SDC_WRITE_TIMEOUT_MS) -#define STM32_SDC_READ_TIMEOUT \ - (((STM32_HCLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ - STM32_SDC_READ_TIMEOUT_MS) - #endif /* !(defined(STM32F4XX) || defined(STM32F2XX)) */ /*===========================================================================*/ @@ -238,6 +179,12 @@ typedef struct { */ sdcbusmode_t bus_width; /* End of the mandatory fields.*/ + /** + * @brief Bus slowdown. + * @note This values is added to the prescaler register in order to + * arbitrarily reduce clock speed. + */ + uint32_t slowdown; } SDCConfig; /** diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c index 0b5ae78b3..345937b1a 100644 --- a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c @@ -32,33 +32,13 @@ /* Driver local definitions. */ /*===========================================================================*/ -#define SDMMC_ICR_ALL_FLAGS \ - (SDMMC_ICR_CCRCFAILC | SDMMC_ICR_DCRCFAILC | \ - SDMMC_ICR_CTIMEOUTC | SDMMC_ICR_DTIMEOUTC | \ - SDMMC_ICR_TXUNDERRC | SDMMC_ICR_RXOVERRC | \ - SDMMC_ICR_CMDRENDC | SDMMC_ICR_CMDSENTC | \ - SDMMC_ICR_DATAENDC | SDMMC_ICR_DBCKENDC | \ - SDMMC_ICR_SDIOITC) +#define SDMMC_ICR_ALL_FLAGS 0xFFFFFFFFU #define SDMMC_STA_ERROR_MASK \ (SDMMC_STA_CCRCFAIL | SDMMC_STA_DCRCFAIL | \ SDMMC_STA_CTIMEOUT | SDMMC_STA_DTIMEOUT | \ SDMMC_STA_TXUNDERR | SDMMC_STA_RXOVERR) -#define SDMMC1_WRITE_TIMEOUT \ - (((STM32_SDMMC1CLK / (SDMMC_CLKDIV_HS + 2)) / 1000) * \ - STM32_SDC_SDMMC_WRITE_TIMEOUT) -#define SDMMC1_READ_TIMEOUT \ - (((STM32_SDMMC1CLK / (SDMMC_CLKDIV_HS + 2)) / 1000) * \ - STM32_SDC_SDMMC_READ_TIMEOUT) - -#define SDMMC2_WRITE_TIMEOUT \ - (((STM32_SDMMC2CLK / (SDMMC_CLKDIV_HS + 2)) / 1000) * \ - STM32_SDC_SDMMC_WRITE_TIMEOUT) -#define SDMMC2_READ_TIMEOUT \ - (((STM32_SDMMC2CLK / (SDMMC_CLKDIV_HS + 2)) / 1000) * \ - STM32_SDC_SDMMC_READ_TIMEOUT) - #define SDMMC1_DMA_CHANNEL \ STM32_DMA_GETCHANNEL(STM32_SDC_SDMMC1_DMA_STREAM, \ STM32_SDC_SDMMC1_DMA_CHN) @@ -171,7 +151,7 @@ __STATIC_FORCEINLINE uint32_t sdc_lld_get_timeout(SDCDriver *sdcp, */ static bool sdc_lld_prepare_read_bytes(SDCDriver *sdcp, uint8_t *buf, uint32_t bytes) { - osalDbgCheck(bytes < 0x1000000); + osalDbgCheck(bytes < 0x1000000U); sdcp->sdmmc->DTIMER = sdc_lld_get_timeout(sdcp, STM32_SDC_SDMMC_READ_TIMEOUT); @@ -300,7 +280,7 @@ static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, may have occurred before reaching the critical zone.*/ osalSysLock(); - if (sdcp->sdmmc->MASK != 0) { + if (sdcp->sdmmc->MASK != 0U) { osalThreadSuspendS(&sdcp->thread); } @@ -310,7 +290,7 @@ static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, sdcp->sdmmc->MASK = 0U; sdcp->sdmmc->DCTRL = 0U; - if ((sdcp->sdmmc->STA & SDMMC_STA_DATAEND) == 0) { + if ((sdcp->sdmmc->STA & SDMMC_STA_DATAEND) == 0U) { osalSysUnlock(); return HAL_FAILED; } @@ -592,7 +572,7 @@ void sdc_lld_stop(SDCDriver *sdcp) { void sdc_lld_start_clk(SDCDriver *sdcp) { /* Initial clock setting: 400kHz, 1bit mode.*/ - sdcp->sdmmc->CLKCR = sdc_lld_clkdiv(sdcp, 400000); + sdcp->sdmmc->CLKCR = sdc_lld_clkdiv(sdcp, 400000U); sdcp->sdmmc->POWER |= SDMMC_POWER_PWRCTRL_0 | SDMMC_POWER_PWRCTRL_1; sdcp->sdmmc->CLKCR |= SDMMC_CLKCR_CLKEN; @@ -615,9 +595,9 @@ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { SDMMC_CLKCR_PWRSAV_Msk | SDMMC_CLKCR_CLKDIV_Msk)) | #if STM32_SDC_SDMMC_PWRSAV - sdc_lld_clkdiv(sdcp, 50000000) | SDMMC_CLKCR_PWRSAV; + sdc_lld_clkdiv(sdcp, 50000000U) | SDMMC_CLKCR_PWRSAV; #else - sdc_lld_clkdiv(sdcp, 50000000); + sdc_lld_clkdiv(sdcp, 50000000U); #endif } else { @@ -625,9 +605,9 @@ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { SDMMC_CLKCR_PWRSAV_Msk | SDMMC_CLKCR_CLKDIV_Msk)) | #if STM32_SDC_SDMMC_PWRSAV - sdc_lld_clkdiv(sdcp, 25000000) | SDMMC_CLKCR_PWRSAV; + sdc_lld_clkdiv(sdcp, 25000000U) | SDMMC_CLKCR_PWRSAV; #else - sdc_lld_clkdiv(sdcp, 25000000); + sdc_lld_clkdiv(sdcp, 25000000U); #endif } } @@ -682,8 +662,8 @@ void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) { sdcp->sdmmc->ARG = arg; sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_CPSMEN; - while ((sdcp->sdmmc->STA & SDMMC_STA_CMDSENT) == 0) - ; + while ((sdcp->sdmmc->STA & SDMMC_STA_CMDSENT) == 0U) { + } sdcp->sdmmc->ICR = SDMMC_ICR_CMDSENTC; } @@ -709,11 +689,11 @@ bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdmmc->ARG = arg; sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN; while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | - SDMMC_STA_CCRCFAIL)) == 0) + SDMMC_STA_CCRCFAIL)) == 0U) ; sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL); - if ((sta & (SDMMC_STA_CTIMEOUT)) != 0) { + if ((sta & (SDMMC_STA_CTIMEOUT)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -742,10 +722,10 @@ bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdmmc->ARG = arg; sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN; while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | - SDMMC_STA_CCRCFAIL)) == 0) + SDMMC_STA_CCRCFAIL)) == 0U) ; sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL); - if ((sta & (SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL)) != 0) { + if ((sta & (SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -777,11 +757,11 @@ bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_WAITRESP_1 | SDMMC_CMD_CPSMEN; while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | - SDMMC_STA_CCRCFAIL)) == 0) + SDMMC_STA_CCRCFAIL)) == 0U) ; sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL); - if ((sta & (SDMMC_STA_ERROR_MASK)) != 0) { + if ((sta & (SDMMC_STA_ERROR_MASK)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } diff --git a/os/hal/ports/STM32/LLD/SDMMCv2/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv2/hal_sdc_lld.c index 64a9cafca..a3128aec8 100644 --- a/os/hal/ports/STM32/LLD/SDMMCv2/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDMMCv2/hal_sdc_lld.c @@ -133,7 +133,7 @@ __STATIC_FORCEINLINE uint32_t sdc_lld_get_timeout(SDCDriver *sdcp, */ static bool sdc_lld_prepare_read_bytes(SDCDriver *sdcp, uint8_t *buf, uint32_t bytes) { - osalDbgCheck(bytes < 0x1000000); + osalDbgCheck(bytes < 0x1000000U); sdcp->sdmmc->DTIMER = sdc_lld_get_timeout(sdcp, STM32_SDC_SDMMC_READ_TIMEOUT); @@ -270,7 +270,7 @@ static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, sdcp->sdmmc->MASK = 0U; sdcp->sdmmc->DCTRL = 0U; - if ((sdcp->sdmmc->STA & SDMMC_STA_DATAEND) == 0) { + if ((sdcp->sdmmc->STA & SDMMC_STA_DATAEND) == 0U) { osalSysUnlock(); return HAL_FAILED; } @@ -459,7 +459,7 @@ void sdc_lld_stop(SDCDriver *sdcp) { void sdc_lld_start_clk(SDCDriver *sdcp) { /* Initial clock setting: 400kHz, 1bit mode.*/ - sdcp->sdmmc->CLKCR = sdc_lld_clkdiv(sdcp, 400000); + sdcp->sdmmc->CLKCR = sdc_lld_clkdiv(sdcp, 400000U); sdcp->sdmmc->POWER |= SDMMC_POWER_PWRCTRL_0 | SDMMC_POWER_PWRCTRL_1; /* TODO sdcp->sdmmc->CLKCR |= SDMMC_CLKCR_CLKEN;*/ @@ -481,18 +481,18 @@ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & ~(SDMMC_CLKCR_PWRSAV_Msk | SDMMC_CLKCR_CLKDIV_Msk)) | #if STM32_SDC_SDMMC_PWRSAV - sdc_lld_clkdiv(sdcp, 50000000) | SDMMC_CLKCR_PWRSAV; + sdc_lld_clkdiv(sdcp, 50000000U) | SDMMC_CLKCR_PWRSAV; #else - sdc_lld_clkdiv(sdcp, 50000000); + sdc_lld_clkdiv(sdcp, 50000000U); #endif } else { sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & ~(SDMMC_CLKCR_PWRSAV_Msk | SDMMC_CLKCR_CLKDIV_Msk)) | #if STM32_SDC_SDMMC_PWRSAV - sdc_lld_clkdiv(sdcp, 25000000) | SDMMC_CLKCR_PWRSAV; + sdc_lld_clkdiv(sdcp, 25000000U) | SDMMC_CLKCR_PWRSAV; #else - sdc_lld_clkdiv(sdcp, 25000000); + sdc_lld_clkdiv(sdcp, 25000000U); #endif } } @@ -547,8 +547,8 @@ void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) { sdcp->sdmmc->ARG = arg; sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_CPSMEN; - while ((sdcp->sdmmc->STA & SDMMC_STA_CMDSENT) == 0) - ; + while ((sdcp->sdmmc->STA & SDMMC_STA_CMDSENT) == 0U) { + } sdcp->sdmmc->ICR = SDMMC_ICR_CMDSENTC; } @@ -574,11 +574,11 @@ bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdmmc->ARG = arg; sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN; while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | - SDMMC_STA_CCRCFAIL)) == 0) + SDMMC_STA_CCRCFAIL)) == 0U) ; sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL); - if ((sta & (SDMMC_STA_CTIMEOUT)) != 0) { + if ((sta & (SDMMC_STA_CTIMEOUT)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -607,11 +607,11 @@ bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdmmc->ARG = arg; sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN; while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | - SDMMC_STA_CCRCFAIL)) == 0) + SDMMC_STA_CCRCFAIL)) == 0U) ; sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL); - if ((sta & (SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL)) != 0) { + if ((sta & (SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } @@ -643,11 +643,11 @@ bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, sdcp->sdmmc->CMD = (uint32_t)cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_WAITRESP_1 | SDMMC_CMD_CPSMEN; while (((sta = sdcp->sdmmc->STA) & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | - SDMMC_STA_CCRCFAIL)) == 0) + SDMMC_STA_CCRCFAIL)) == 0U) ; sdcp->sdmmc->ICR = sta & (SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT | SDMMC_STA_CCRCFAIL); - if ((sta & (SDMMC_STA_ERROR_MASK)) != 0) { + if ((sta & (SDMMC_STA_ERROR_MASK)) != 0U) { sdc_lld_collect_errors(sdcp, sta); return HAL_FAILED; } diff --git a/readme.txt b/readme.txt index 1a9adaea9..1c4815e46 100644 --- a/readme.txt +++ b/readme.txt @@ -74,6 +74,8 @@ ***************************************************************************** *** Next *** +- NEW: Reworked STM32 SDMMCv1 and SDMMCv2 drivers, better timeout and clock + handling, improved speed for aligned buffers. - NEW: Added a "waend" field to the thread structure in RT for debug convenience. - NEW: Added a para-virtualized HAL port for use in sandboxes.