git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7806 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio
parent
7611434ca9
commit
00f77cc4d7
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@ -120,6 +120,23 @@
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#define GPIOD_PIN14 14
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#define GPIOD_PIN15 15
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#define GPIOE_PIN0 0
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#define GPIOE_PIN1 1
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#define GPIOE_PIN2 2
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#define GPIOE_PIN3 3
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#define GPIOE_PIN4 4
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#define GPIOE_PIN5 5
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#define GPIOE_PIN6 6
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#define GPIOE_PIN7 7
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#define GPIOE_PIN8 8
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#define GPIOE_PIN9 9
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#define GPIOE_PIN10 10
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#define GPIOE_PIN11 11
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#define GPIOE_PIN12 12
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#define GPIOE_PIN13 13
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#define GPIOE_PIN14 14
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#define GPIOE_PIN15 15
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#define GPIOF_OSC_IN 0
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#define GPIOF_OSC_OUT 1
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#define GPIOF_PIN2 2
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@ -626,6 +643,123 @@
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PIN_AFIO_AF(GPIOD_PIN14, 0) | \
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PIN_AFIO_AF(GPIOD_PIN15, 0))
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/*
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* GPIOE setup:
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*
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* PF0 - PIN0 (input pullup).
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* PF1 - PIN1 (input pullup).
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* PF2 - PIN2 (input pullup).
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* PF3 - PIN3 (input pullup).
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* PF4 - PIN4 (input pullup).
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* PF5 - PIN5 (input pullup).
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* PF6 - PIN6 (input pullup).
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* PF7 - PIN7 (input pullup).
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* PF8 - PIN8 (input pullup).
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* PF9 - PIN9 (input pullup).
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* PF10 - PIN10 (input pullup).
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* PF11 - PIN11 (input pullup).
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* PF12 - PIN12 (input pullup).
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* PF13 - PIN13 (input pullup).
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* PF14 - PIN14 (input pullup).
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* PF15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
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PIN_MODE_INPUT(GPIOE_PIN1) | \
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PIN_MODE_INPUT(GPIOE_PIN2) | \
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PIN_MODE_INPUT(GPIOE_PIN3) | \
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PIN_MODE_INPUT(GPIOE_PIN4) | \
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PIN_MODE_INPUT(GPIOE_PIN5) | \
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PIN_MODE_INPUT(GPIOE_PIN6) | \
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PIN_MODE_INPUT(GPIOE_PIN7) | \
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PIN_MODE_INPUT(GPIOE_PIN8) | \
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PIN_MODE_INPUT(GPIOE_PIN9) | \
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PIN_MODE_INPUT(GPIOE_PIN10) | \
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PIN_MODE_INPUT(GPIOE_PIN11) | \
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PIN_MODE_INPUT(GPIOE_PIN12) | \
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PIN_MODE_INPUT(GPIOE_PIN13) | \
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PIN_MODE_INPUT(GPIOE_PIN14) | \
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PIN_MODE_INPUT(GPIOE_PIN15))
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#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
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#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_2M(GPIOE_PIN0) | \
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PIN_OSPEED_2M(GPIOE_PIN1) | \
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PIN_OSPEED_2M(GPIOE_PIN2) | \
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PIN_OSPEED_2M(GPIOE_PIN3) | \
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PIN_OSPEED_2M(GPIOE_PIN4) | \
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PIN_OSPEED_2M(GPIOE_PIN5) | \
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PIN_OSPEED_2M(GPIOE_PIN6) | \
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PIN_OSPEED_2M(GPIOE_PIN7) | \
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PIN_OSPEED_2M(GPIOE_PIN8) | \
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PIN_OSPEED_2M(GPIOE_PIN9) | \
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PIN_OSPEED_2M(GPIOE_PIN10) | \
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PIN_OSPEED_2M(GPIOE_PIN11) | \
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PIN_OSPEED_2M(GPIOE_PIN12) | \
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PIN_OSPEED_2M(GPIOE_PIN13) | \
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PIN_OSPEED_2M(GPIOE_PIN14) | \
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PIN_OSPEED_2M(GPIOE_PIN15))
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#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN15))
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#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
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PIN_ODR_HIGH(GPIOE_PIN1) | \
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PIN_ODR_HIGH(GPIOE_PIN2) | \
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PIN_ODR_HIGH(GPIOE_PIN3) | \
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PIN_ODR_HIGH(GPIOE_PIN4) | \
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PIN_ODR_HIGH(GPIOE_PIN5) | \
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PIN_ODR_HIGH(GPIOE_PIN6) | \
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PIN_ODR_HIGH(GPIOE_PIN7) | \
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PIN_ODR_HIGH(GPIOE_PIN8) | \
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PIN_ODR_HIGH(GPIOE_PIN9) | \
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PIN_ODR_HIGH(GPIOE_PIN10) | \
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PIN_ODR_HIGH(GPIOE_PIN11) | \
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PIN_ODR_HIGH(GPIOE_PIN12) | \
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PIN_ODR_HIGH(GPIOE_PIN13) | \
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PIN_ODR_HIGH(GPIOE_PIN14) | \
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PIN_ODR_HIGH(GPIOE_PIN15))
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#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
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PIN_AFIO_AF(GPIOE_PIN1, 0) | \
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PIN_AFIO_AF(GPIOE_PIN2, 0) | \
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PIN_AFIO_AF(GPIOE_PIN3, 0) | \
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PIN_AFIO_AF(GPIOE_PIN4, 0) | \
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PIN_AFIO_AF(GPIOE_PIN5, 0) | \
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PIN_AFIO_AF(GPIOE_PIN6, 0) | \
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PIN_AFIO_AF(GPIOE_PIN7, 0))
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#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
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PIN_AFIO_AF(GPIOE_PIN9, 0) | \
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PIN_AFIO_AF(GPIOE_PIN10, 0) | \
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PIN_AFIO_AF(GPIOE_PIN11, 0) | \
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PIN_AFIO_AF(GPIOE_PIN12, 0) | \
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PIN_AFIO_AF(GPIOE_PIN13, 0) | \
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PIN_AFIO_AF(GPIOE_PIN14, 0) | \
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PIN_AFIO_AF(GPIOE_PIN15, 0))
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/*
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* GPIOF setup:
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*
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@ -25,22 +25,6 @@
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#ifndef _STM32_REGISTRY_H_
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#define _STM32_REGISTRY_H_
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#if defined(STM32F051x8) || defined(STM32F058xx) || \
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defined(STM32F071xB) || defined(STM32F072xB) || \
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defined(STM32F078xx)
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#define STM32F0XX_MD
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#elif defined(STM32F031x6) || defined(STM32F038xx) || \
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defined(STM32F042x6) || defined(STM32F048xx)
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#define STM32F0XX_LD
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#elif defined(STM32F030x6) || defined(STM32F030x8)
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#define STM32F030
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#else
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#error "STM32F0xx device not specified"
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#endif
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#if !defined(STM32F0XX) || defined(__DOXYGEN__)
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#define STM32F0XX
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#endif
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@ -53,7 +37,11 @@
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* @name STM32F0xx capabilities
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* @{
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*/
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#if defined(STM32F0XX_MD) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* STM32F051x8, STM32F058xx. */
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/*===========================================================================*/
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#if defined(STM32F051x8) || defined(STM32F058xx) || \
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defined(__DOXYGEN__)
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/* ADC attributes.*/
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#define STM32_HAS_ADC1 TRUE
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#define STM32_HAS_UART5 FALSE
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#define STM32_HAS_USART6 FALSE
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/* USB attributes.*/
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#define STM32_HAS_USB FALSE
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#define STM32_HAS_OTG1 FALSE
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#define STM32_HAS_OTG2 FALSE
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/*===========================================================================*/
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/* STM32F071xB, STM32F072xB, STM32F078xx. */
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/*===========================================================================*/
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#elif defined(STM32F071xB) || defined(STM32F072xB) || \
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defined(STM32F078xx)
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/* ADC attributes.*/
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#define STM32_HAS_ADC1 TRUE
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#define STM32_HAS_ADC2 FALSE
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#define STM32_HAS_ADC3 FALSE
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#define STM32_HAS_ADC4 FALSE
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/* CAN attributes.*/
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#define STM32_HAS_CAN1 FALSE
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#define STM32_HAS_CAN2 FALSE
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/* DAC attributes.*/
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#define STM32_HAS_DAC TRUE
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/* DMA attributes.*/
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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/* EXTI attributes.*/
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#define STM32_EXTI_NUM_CHANNELS 28
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/* GPIO attributes.*/
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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#define STM32_HAS_GPIOD TRUE
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#define STM32_HAS_GPIOE TRUE
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#define STM32_HAS_GPIOF TRUE
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#define STM32_HAS_GPIOG FALSE
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#define STM32_HAS_GPIOH FALSE
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#define STM32_HAS_GPIOI FALSE
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#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
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RCC_AHBENR_GPIOBEN | \
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RCC_AHBENR_GPIOCEN | \
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RCC_AHBENR_GPIODEN | \
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RCC_AHBENR_GPIOEEN | \
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RCC_AHBENR_GPIOFEN)
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/* I2C attributes.*/
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#define STM32_HAS_I2C1 TRUE
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#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
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#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
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#define STM32_HAS_I2C2 TRUE
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#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
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#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
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#define STM32_HAS_I2C3 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
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#define STM32_RTC_NUM_ALARMS 1
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#define STM32_RTC_HAS_INTERRUPTS FALSE
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/* SDIO attributes.*/
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#define STM32_HAS_SDIO FALSE
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/* SPI attributes.*/
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#define STM32_HAS_SPI1 TRUE
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#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
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#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
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#define STM32_HAS_SPI2 TRUE
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#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
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#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
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#define STM32_HAS_SPI3 FALSE
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#define STM32_HAS_SPI4 FALSE
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#define STM32_HAS_SPI5 FALSE
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#define STM32_HAS_SPI6 FALSE
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/* TIM attributes.*/
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#define STM32_TIM_MAX_CHANNELS 4
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#define STM32_HAS_TIM1 TRUE
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#define STM32_TIM1_IS_32BITS FALSE
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#define STM32_TIM1_CHANNELS 4
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#define STM32_HAS_TIM2 TRUE
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#define STM32_TIM2_IS_32BITS TRUE
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#define STM32_TIM2_CHANNELS 4
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#define STM32_HAS_TIM3 TRUE
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#define STM32_TIM3_IS_32BITS FALSE
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#define STM32_TIM3_CHANNELS 4
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#define STM32_HAS_TIM6 TRUE
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#define STM32_TIM6_IS_32BITS FALSE
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#define STM32_TIM6_CHANNELS 0
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#define STM32_HAS_TIM14 TRUE
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#define STM32_TIM14_IS_32BITS FALSE
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#define STM32_TIM14_CHANNELS 1
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#define STM32_HAS_TIM15 TRUE
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#define STM32_TIM15_IS_32BITS FALSE
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#define STM32_TIM15_CHANNELS 2
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#define STM32_HAS_TIM16 TRUE
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#define STM32_TIM16_IS_32BITS FALSE
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#define STM32_TIM16_CHANNELS 2
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#define STM32_HAS_TIM17 TRUE
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#define STM32_TIM17_IS_32BITS FALSE
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#define STM32_TIM17_CHANNELS 2
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#define STM32_HAS_TIM4 FALSE
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#define STM32_HAS_TIM5 FALSE
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#define STM32_HAS_TIM7 FALSE
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#define STM32_HAS_TIM8 FALSE
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#define STM32_HAS_TIM9 FALSE
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#define STM32_HAS_TIM10 FALSE
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#define STM32_HAS_TIM11 FALSE
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#define STM32_HAS_TIM12 FALSE
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#define STM32_HAS_TIM13 FALSE
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#define STM32_HAS_TIM18 FALSE
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#define STM32_HAS_TIM19 FALSE
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/* USART attributes.*/
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#define STM32_HAS_USART1 TRUE
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#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
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#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
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#define STM32_HAS_USART2 TRUE
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#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
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#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART4 TRUE
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#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
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#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
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#define STM32_HAS_UART5 FALSE
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#define STM32_HAS_USART6 FALSE
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/* USB attributes.*/
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#if defined(STM32F072xB) || defined(STM32F078xx)
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#define STM32_HAS_USB TRUE
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@ -203,7 +343,149 @@
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#define STM32_HAS_OTG1 FALSE
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#define STM32_HAS_OTG2 FALSE
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#elif defined(STM32F0XX_LD)
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/*===========================================================================*/
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/* STM32F048xx. */
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/*===========================================================================*/
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#elif defined(STM32F048xx)
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/* ADC attributes.*/
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#define STM32_HAS_ADC1 TRUE
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#define STM32_HAS_ADC2 FALSE
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#define STM32_HAS_ADC3 FALSE
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#define STM32_HAS_ADC4 FALSE
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/* CAN attributes.*/
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#define STM32_HAS_CAN1 FALSE
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#define STM32_HAS_CAN2 FALSE
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/* DAC attributes.*/
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#define STM32_HAS_DAC FALSE
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/* DMA attributes.*/
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#define STM32_ADVANCED_DMA FALSE
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#define STM32_HAS_DMA1 TRUE
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#define STM32_HAS_DMA2 FALSE
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/* ETH attributes.*/
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#define STM32_HAS_ETH FALSE
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/* EXTI attributes.*/
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#define STM32_EXTI_NUM_CHANNELS 28
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/* GPIO attributes.*/
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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#define STM32_HAS_GPIOD FALSE
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#define STM32_HAS_GPIOE FALSE
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#define STM32_HAS_GPIOF TRUE
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#define STM32_HAS_GPIOG FALSE
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#define STM32_HAS_GPIOH FALSE
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#define STM32_HAS_GPIOI FALSE
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#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
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RCC_AHBENR_GPIOBEN | \
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RCC_AHBENR_GPIOCEN | \
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RCC_AHBENR_GPIOFEN)
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/* I2C attributes.*/
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#define STM32_HAS_I2C1 TRUE
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#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
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#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
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#define STM32_HAS_I2C2 FALSE
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#define STM32_HAS_I2C3 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
|
||||
#define STM32_RTC_NUM_ALARMS 1
|
||||
#define STM32_RTC_HAS_INTERRUPTS FALSE
|
||||
|
||||
/* SDIO attributes.*/
|
||||
#define STM32_HAS_SDIO FALSE
|
||||
|
||||
/* SPI attributes.*/
|
||||
#define STM32_HAS_SPI1 TRUE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
|
||||
#define STM32_HAS_SPI2 TRUE
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
|
||||
#define STM32_HAS_SPI3 FALSE
|
||||
#define STM32_HAS_SPI4 FALSE
|
||||
#define STM32_HAS_SPI5 FALSE
|
||||
#define STM32_HAS_SPI6 FALSE
|
||||
|
||||
/* TIM attributes.*/
|
||||
#define STM32_TIM_MAX_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM1 TRUE
|
||||
#define STM32_TIM1_IS_32BITS FALSE
|
||||
#define STM32_TIM1_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM2 TRUE
|
||||
#define STM32_TIM2_IS_32BITS TRUE
|
||||
#define STM32_TIM2_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM3 TRUE
|
||||
#define STM32_TIM3_IS_32BITS FALSE
|
||||
#define STM32_TIM3_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM14 TRUE
|
||||
#define STM32_TIM14_IS_32BITS FALSE
|
||||
#define STM32_TIM14_CHANNELS 1
|
||||
|
||||
#define STM32_HAS_TIM16 TRUE
|
||||
#define STM32_TIM16_IS_32BITS FALSE
|
||||
#define STM32_TIM16_CHANNELS 2
|
||||
|
||||
#define STM32_HAS_TIM17 TRUE
|
||||
#define STM32_TIM17_IS_32BITS FALSE
|
||||
#define STM32_TIM17_CHANNELS 2
|
||||
|
||||
#define STM32_HAS_TIM4 FALSE
|
||||
#define STM32_HAS_TIM5 FALSE
|
||||
#define STM32_HAS_TIM6 FALSE
|
||||
#define STM32_HAS_TIM7 FALSE
|
||||
#define STM32_HAS_TIM8 FALSE
|
||||
#define STM32_HAS_TIM9 FALSE
|
||||
#define STM32_HAS_TIM10 FALSE
|
||||
#define STM32_HAS_TIM11 FALSE
|
||||
#define STM32_HAS_TIM12 FALSE
|
||||
#define STM32_HAS_TIM13 FALSE
|
||||
#define STM32_HAS_TIM15 FALSE
|
||||
#define STM32_HAS_TIM18 FALSE
|
||||
#define STM32_HAS_TIM19 FALSE
|
||||
|
||||
/* USART attributes.*/
|
||||
#define STM32_HAS_USART1 TRUE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
|
||||
#define STM32_HAS_USART2 TRUE
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
|
||||
#define STM32_HAS_USART3 FALSE
|
||||
#define STM32_HAS_UART4 FALSE
|
||||
#define STM32_HAS_UART5 FALSE
|
||||
#define STM32_HAS_USART6 FALSE
|
||||
|
||||
/* USB attributes.*/
|
||||
#define STM32_HAS_USB TRUE
|
||||
#define STM32_USB_ACCESS_SCHEME_2x16 TRUE
|
||||
#define STM32_USB_PMA_SIZE 768
|
||||
#define STM32_USB_HAS_BCDR TRUE
|
||||
#define STM32_HAS_OTG1 FALSE
|
||||
#define STM32_HAS_OTG2 FALSE
|
||||
|
||||
/*===========================================================================*/
|
||||
/* STM32F031x6, STM32F038xx. */
|
||||
/*===========================================================================*/
|
||||
#elif defined(STM32F031x6) || defined(STM32F038xx)
|
||||
|
||||
/* ADC attributes.*/
|
||||
#define STM32_HAS_ADC1 TRUE
|
||||
|
|
@ -326,8 +608,7 @@
|
|||
#define STM32_HAS_USART6 FALSE
|
||||
|
||||
/* USB attributes.*/
|
||||
/* USB attributes.*/
|
||||
#if defined(STM32F042x6) || defined(STM32F048xx)
|
||||
#if defined(STM32F042x6)
|
||||
#define STM32_HAS_USB TRUE
|
||||
#define STM32_USB_ACCESS_SCHEME_2x16 TRUE
|
||||
#define STM32_USB_PMA_SIZE 768
|
||||
|
|
@ -338,7 +619,144 @@
|
|||
#define STM32_HAS_OTG1 FALSE
|
||||
#define STM32_HAS_OTG2 FALSE
|
||||
|
||||
#else /* STM32F030 */
|
||||
/*===========================================================================*/
|
||||
/* STM32F042x6. */
|
||||
/*===========================================================================*/
|
||||
#elif defined(STM32F042x6)
|
||||
|
||||
/* ADC attributes.*/
|
||||
#define STM32_HAS_ADC1 TRUE
|
||||
#define STM32_HAS_ADC2 FALSE
|
||||
#define STM32_HAS_ADC3 FALSE
|
||||
#define STM32_HAS_ADC4 FALSE
|
||||
|
||||
/* CAN attributes.*/
|
||||
#define STM32_HAS_CAN1 TRUE
|
||||
#define STM32_HAS_CAN2 FALSE
|
||||
|
||||
/* DAC attributes.*/
|
||||
#define STM32_HAS_DAC FALSE
|
||||
|
||||
/* DMA attributes.*/
|
||||
#define STM32_ADVANCED_DMA FALSE
|
||||
#define STM32_HAS_DMA1 TRUE
|
||||
#define STM32_HAS_DMA2 FALSE
|
||||
|
||||
/* ETH attributes.*/
|
||||
#define STM32_HAS_ETH FALSE
|
||||
|
||||
/* EXTI attributes.*/
|
||||
#define STM32_EXTI_NUM_CHANNELS 28
|
||||
|
||||
/* GPIO attributes.*/
|
||||
#define STM32_HAS_GPIOA TRUE
|
||||
#define STM32_HAS_GPIOB TRUE
|
||||
#define STM32_HAS_GPIOC TRUE
|
||||
#define STM32_HAS_GPIOD FALSE
|
||||
#define STM32_HAS_GPIOE FALSE
|
||||
#define STM32_HAS_GPIOF TRUE
|
||||
#define STM32_HAS_GPIOG FALSE
|
||||
#define STM32_HAS_GPIOH FALSE
|
||||
#define STM32_HAS_GPIOI FALSE
|
||||
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
|
||||
RCC_AHBENR_GPIOBEN | \
|
||||
RCC_AHBENR_GPIOCEN | \
|
||||
RCC_AHBENR_GPIOFEN)
|
||||
|
||||
/* I2C attributes.*/
|
||||
#define STM32_HAS_I2C1 TRUE
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
|
||||
#define STM32_HAS_I2C2 FALSE
|
||||
#define STM32_HAS_I2C3 FALSE
|
||||
|
||||
/* RTC attributes.*/
|
||||
#define STM32_HAS_RTC TRUE
|
||||
#define STM32_RTC_HAS_SUBSECONDS TRUE
|
||||
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
|
||||
#define STM32_RTC_NUM_ALARMS 1
|
||||
#define STM32_RTC_HAS_INTERRUPTS FALSE
|
||||
|
||||
/* SDIO attributes.*/
|
||||
#define STM32_HAS_SDIO FALSE
|
||||
|
||||
/* SPI attributes.*/
|
||||
#define STM32_HAS_SPI1 TRUE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
|
||||
#define STM32_HAS_SPI2 FALSE
|
||||
#define STM32_HAS_SPI3 FALSE
|
||||
#define STM32_HAS_SPI4 FALSE
|
||||
#define STM32_HAS_SPI5 FALSE
|
||||
#define STM32_HAS_SPI6 FALSE
|
||||
|
||||
/* TIM attributes.*/
|
||||
#define STM32_TIM_MAX_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM1 TRUE
|
||||
#define STM32_TIM1_IS_32BITS FALSE
|
||||
#define STM32_TIM1_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM2 TRUE
|
||||
#define STM32_TIM2_IS_32BITS TRUE
|
||||
#define STM32_TIM2_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM3 TRUE
|
||||
#define STM32_TIM3_IS_32BITS FALSE
|
||||
#define STM32_TIM3_CHANNELS 4
|
||||
|
||||
#define STM32_HAS_TIM14 TRUE
|
||||
#define STM32_TIM14_IS_32BITS FALSE
|
||||
#define STM32_TIM14_CHANNELS 1
|
||||
|
||||
#define STM32_HAS_TIM16 TRUE
|
||||
#define STM32_TIM16_IS_32BITS FALSE
|
||||
#define STM32_TIM16_CHANNELS 2
|
||||
|
||||
#define STM32_HAS_TIM17 TRUE
|
||||
#define STM32_TIM17_IS_32BITS FALSE
|
||||
#define STM32_TIM17_CHANNELS 2
|
||||
|
||||
#define STM32_HAS_TIM4 FALSE
|
||||
#define STM32_HAS_TIM5 FALSE
|
||||
#define STM32_HAS_TIM6 FALSE
|
||||
#define STM32_HAS_TIM7 FALSE
|
||||
#define STM32_HAS_TIM8 FALSE
|
||||
#define STM32_HAS_TIM9 FALSE
|
||||
#define STM32_HAS_TIM10 FALSE
|
||||
#define STM32_HAS_TIM11 FALSE
|
||||
#define STM32_HAS_TIM12 FALSE
|
||||
#define STM32_HAS_TIM13 FALSE
|
||||
#define STM32_HAS_TIM15 FALSE
|
||||
#define STM32_HAS_TIM18 FALSE
|
||||
#define STM32_HAS_TIM19 FALSE
|
||||
|
||||
/* USART attributes.*/
|
||||
#define STM32_HAS_USART1 TRUE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
|
||||
#define STM32_HAS_USART2 FALSE
|
||||
#define STM32_HAS_USART3 FALSE
|
||||
#define STM32_HAS_UART4 FALSE
|
||||
#define STM32_HAS_UART5 FALSE
|
||||
#define STM32_HAS_USART6 FALSE
|
||||
|
||||
/* USB attributes.*/
|
||||
#define STM32_HAS_USB TRUE
|
||||
#define STM32_USB_ACCESS_SCHEME_2x16 TRUE
|
||||
#define STM32_USB_PMA_SIZE 768
|
||||
#define STM32_USB_HAS_BCDR TRUE
|
||||
|
||||
#define STM32_HAS_OTG1 FALSE
|
||||
#define STM32_HAS_OTG2 FALSE
|
||||
|
||||
/*===========================================================================*/
|
||||
/* STM32F030x6, STM32F030x8. */
|
||||
/*===========================================================================*/
|
||||
#elif defined(STM32F030x6) || defined(STM32F030x8)
|
||||
|
||||
/* ADC attributes.*/
|
||||
#define STM32_HAS_ADC1 TRUE
|
||||
|
|
@ -468,17 +886,22 @@
|
|||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
|
||||
#define STM32_HAS_USART3 FALSE
|
||||
#define STM32_HAS_UART4 FALSE
|
||||
#define STM32_HAS_UART5 FALSE
|
||||
#define STM32_HAS_USART6 FALSE
|
||||
#define STM32_HAS_USART3 TRUE
|
||||
|
||||
#define STM32_HAS_UART4 TRUE
|
||||
|
||||
#define STM32_HAS_UART5 TRUE
|
||||
|
||||
#define STM32_HAS_USART6 TRUE
|
||||
|
||||
/* USB attributes.*/
|
||||
#define STM32_HAS_USB FALSE
|
||||
#define STM32_HAS_OTG1 FALSE
|
||||
#define STM32_HAS_OTG2 FALSE
|
||||
|
||||
#endif /* STM32F030 */
|
||||
#else
|
||||
#error "STM32F0xx device not specified"
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue