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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2596 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2011-01-06 12:18:51 +00:00
parent 3d8343e464
commit 0116b4d06b
12 changed files with 2558 additions and 72 deletions
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2
boards/EA_LPCXPRESSO_BB_1343/board.c
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@ -52,7 +52,7 @@ void boardInit(void) {
/*
* Extra, board-specific, initializations.
* NOTE: PIO1_2 is associated also to the JTAG, if you need to use JTAG
* you must comment that line first.
* you must comment that line first.
*/
LPC_IOCON->PIO0_7 = 0xC0; /* Disables pull-up on LED2 output. */
LPC_IOCON->JTAG_nTRST_PIO1_2 = 0xC1; /* Disables pull-up on LED3B output

2116
demos/ARMCM3-LPC1343-GCC/iar/ch.ewp Normal file
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File diff suppressed because it is too large Load Diff

10
demos/ARMCM3-LPC1343-GCC/iar/ch.eww Normal file
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@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\ch.ewp</path>
</project>
<batchBuild/>
</workspace>

37
demos/ARMCM3-LPC1343-GCC/iar/ch.icf Normal file
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@ -0,0 +1,37 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00007FFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x10001FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x100;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
/* Size of the IRQ Stack (Main Stack).*/
define symbol __ICFEDIT_size_irqstack__ = 0x100;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block SYSHEAP with alignment = 8, size = 0 { };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
place in ROM_region { readonly };
place in RAM_region { block IRQSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};
define exported symbol __heap_end__ = end(RAM_region) + 1;

3
demos/ARMCM3-LPC1343-GCC/main.c
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@ -57,7 +57,6 @@ static msg_t Thread1(void *arg) {
palSetPad(GPIO0, GPIO0_LED2);
chThdSleepMilliseconds(500);
}
return 0;
}
/*
@ -88,7 +87,6 @@ static msg_t Thread2(void *arg) {
palSetPort(GPIO1, PAL_PORT_BIT(GPIO1_LED3G));
chThdSleepMilliseconds(250);
}
return 0;
}
/*
@ -137,5 +135,4 @@ int main(void) {
chThdSleepMilliseconds(500);
i = (i + 1) & 15;
}
return 0;
}

2
os/hal/platforms/LPC13xx/hal_lld.c
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@ -29,7 +29,7 @@
#include "hal.h"
/**
* @brief Register missing in NXP header file.
* @brief Register missing in NXP header file.
*/
#define FLASHCFG (*((volatile uint32_t *)0x4003C010))

10
os/hal/platforms/LPC13xx/hal_lld.h
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@ -101,7 +101,7 @@
/*===========================================================================*/
/**
* @brief Calculated SYSOSCCTRL setting.
* @brief Calculated SYSOSCCTRL setting.
*/
#if (SYSOSCCLK < 18000000) || defined(__DOXYGEN__)
#define LPC13xx_SYSOSCCTRL 0
@ -110,7 +110,7 @@
#endif
/**
* @brief PLL input clock frequency.
* @brief PLL input clock frequency.
*/
#if (LPC13xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC) || defined(__DOXYGEN__)
#define LPC13xx_SYSPLLCLKIN SYSOSCCLK
@ -131,7 +131,7 @@
#endif
/**
* @brief PSEL mask in SYSPLLCTRL register.
* @brief PSEL mask in SYSPLLCTRL register.
*/
#if (LPC13xx_SYSPLL_DIV == 2) || defined(__DOXYGEN__)
#define LPC13xx_SYSPLLCTRL_PSEL (0 << 5)
@ -146,7 +146,7 @@
#endif
/**
* @brief CCP frequency.
* @brief CCP frequency.
*/
#define LPC13xx_SYSPLLCCO (LPC13xx_SYSPLLCLKIN * LPC13xx_SYSPLL_MUL * \
LPC13xx_SYSPLL_DIV)
@ -181,7 +181,7 @@
#endif
/**
* @brief Flash wait states.
* @brief Flash wait states.
*/
#if (LPC13xx_SYSCLK <= 20000000) || defined(__DOXYGEN__)
#define LPC13xx_FLASHCFG_FLASHTIM 0

28
os/hal/platforms/LPC13xx/spi_lld.c
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@ -59,10 +59,16 @@ static void ssp_fifo_preload(SPIDriver *spip) {
while(((ssp->SR & SR_TNF) != 0) && (n > 0)) {
if (spip->spd_txptr != NULL) {
if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT)
ssp->DR = *(uint16_t *)spip->spd_txptr++;
else
ssp->DR = *(uint8_t *)spip->spd_txptr++;
if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) {
const uint16_t *p = spip->spd_txptr;
ssp->DR = *p++;
spip->spd_txptr = p;
}
else {
const uint8_t *p = spip->spd_txptr;
ssp->DR = *p++;
spip->spd_txptr = p;
}
}
else
ssp->DR = 0xFFFFFFFF;
@ -87,10 +93,16 @@ static void spi_serve_interrupt(SPIDriver *spip) {
ssp->ICR = ICR_RT | ICR_ROR;
while ((ssp->SR & SR_RNE) != 0) {
if (spip->spd_rxptr != NULL) {
if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT)
*(uint16_t *)spip->spd_rxptr++ = ssp->DR;
else
*(uint8_t *)spip->spd_rxptr++ = ssp->DR;
if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) {
uint16_t *p = spip->spd_rxptr;
*p++ = ssp->DR;
spip->spd_rxptr = p;
}
else {
uint8_t *p = spip->spd_rxptr;
*p++ = ssp->DR;
spip->spd_rxptr = p;
}
}
else
(void)ssp->DR;

6
os/hal/platforms/LPC13xx/spi_lld.h
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@ -35,7 +35,7 @@
/*===========================================================================*/
/**
* @brief Hardware FIFO depth.
* @brief Hardware FIFO depth.
*/
#define LPC13xx_SSP_FIFO_DEPTH 8
@ -140,7 +140,7 @@
#endif
/**
* @brief SCK0 signal selector.
* @brief SCK0 signal selector.
*/
#if !defined(LPC13xx_SPI_SCK0_SELECTOR) || defined(__DOXYGEN__)
#define LPC13xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11
@ -251,7 +251,7 @@ struct SPIDriver {
*/
LPC_SSP_TypeDef *spd_ssp;
/**
* @brief Number of bytes yet to be received.
* @brief Number of bytes yet to be received.
*/
uint32_t spd_rxcnt;
/**

56
os/ports/IAR/ARMCMx/LPC13xx/cmparams.h Normal file
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@ -0,0 +1,56 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file IAR/ARMCMx/LPC13xx/cmparams.h
* @brief ARM Cortex-M3 parameters for the LPC13xx.
*
* @defgroup IAR_ARMCMx_LPC13xx LPC13xx Specific Parameters
* @ingroup IAR_ARMCMx_SPECIFIC
* @details This file contains the Cortex-M3 specific parameters for the
* LPC13xx platform.
* @{
*/
#ifndef _CMPARAMS_H_
#define _CMPARAMS_H_
/**
* @brief Cortex core model.
*/
#define CORTEX_MODEL CORTEX_M3
/**
* @brief Systick unit presence.
*/
#define CORTEX_HAS_ST TRUE
/**
* @brief Memory Protection unit presence.
*/
#define CORTEX_HAS_MPU FALSE
/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 3
#endif /* _CMPARAMS_H_ */
/** @} */

309
os/ports/IAR/ARMCMx/LPC13xx/vectors.s Normal file
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@ -0,0 +1,309 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#if !defined(STM32F10X_LD) && !defined(STM32F10X_LD_VL) && \
!defined(STM32F10X_MD) && !defined(STM32F10X_MD_VL) && \
!defined(STM32F10X_HD) && !defined(STM32F10X_XL) && \
!defined(STM32F10X_CL)
#define _FROM_ASM_
#include "board.h"
#endif
MODULE ?vectors
AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
PRESERVE8
SECTION IRQSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
PUBLIC __vector_table
DATA
__vector_table:
DCD SFE(IRQSTACK)
DCD __iar_program_start
DCD NMIVector
DCD HardFaultVector
DCD MemManageVector
DCD BusFaultVector
DCD UsageFaultVector
DCD Vector1C
DCD Vector20
DCD Vector24
DCD Vector28
DCD SVCallVector
DCD DebugMonitorVector
DCD Vector34
DCD PendSVVector
DCD SysTickVector
DCD Vector40
DCD Vector44
DCD Vector48
DCD Vector4C
DCD Vector50
DCD Vector54
DCD Vector58
DCD Vector5C
DCD Vector60
DCD Vector64
DCD Vector68
DCD Vector6C
DCD Vector70
DCD Vector74
DCD Vector78
DCD Vector7C
DCD Vector80
DCD Vector84
DCD Vector88
DCD Vector8C
DCD Vector90
DCD Vector94
DCD Vector98
DCD Vector9C
DCD VectorA0
DCD VectorA4
DCD VectorA8
DCD VectorAC
DCD VectorB0
DCD VectorB4
DCD VectorB8
DCD VectorBC
DCD VectorC0
DCD VectorC4
DCD VectorC8
DCD VectorCC
DCD VectorD0
DCD VectorD4
DCD VectorD8
DCD VectorDC
DCD VectorE0
DCD VectorE4
DCD VectorE8
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
defined(STM32F10X_XL) || defined(STM32F10X_CL)
DCD VectorEC
DCD VectorF0
DCD VectorF4
#endif
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
DCD VectorF8
DCD VectorFC
DCD Vector100
DCD Vector104
DCD Vector108
DCD Vector10C
DCD Vector110
DCD Vector114
DCD Vector118
DCD Vector11C
DCD Vector120
DCD Vector124
DCD Vector128
DCD Vector12C
#endif
#if defined(STM32F10X_CL)
DCD Vector130
DCD Vector134
DCD Vector138
DCD Vector13C
DCD Vector140
DCD Vector144
DCD Vector148
DCD Vector14C
#endif
/*
* Default interrupt handlers.
*/
PUBWEAK NMIVector
PUBWEAK HardFaultVector
PUBWEAK MemManageVector
PUBWEAK BusFaultVector
PUBWEAK UsageFaultVector
PUBWEAK Vector1C
PUBWEAK Vector20
PUBWEAK Vector24
PUBWEAK Vector28
PUBWEAK SVCallVector
PUBWEAK DebugMonitorVector
PUBWEAK Vector34
PUBWEAK PendSVVector
PUBWEAK SysTickVector
PUBWEAK Vector40
PUBWEAK Vector44
PUBWEAK Vector48
PUBWEAK Vector4C
PUBWEAK Vector50
PUBWEAK Vector54
PUBWEAK Vector58
PUBWEAK Vector5C
PUBWEAK Vector60
PUBWEAK Vector64
PUBWEAK Vector68
PUBWEAK Vector6C
PUBWEAK Vector70
PUBWEAK Vector74
PUBWEAK Vector78
PUBWEAK Vector7C
PUBWEAK Vector80
PUBWEAK Vector84
PUBWEAK Vector88
PUBWEAK Vector8C
PUBWEAK Vector90
PUBWEAK Vector94
PUBWEAK Vector98
PUBWEAK Vector9C
PUBWEAK VectorA0
PUBWEAK VectorA4
PUBWEAK VectorA8
PUBWEAK VectorAC
PUBWEAK VectorB0
PUBWEAK VectorB4
PUBWEAK VectorB8
PUBWEAK VectorBC
PUBWEAK VectorC0
PUBWEAK VectorC4
PUBWEAK VectorC8
PUBWEAK VectorCC
PUBWEAK VectorD0
PUBWEAK VectorD4
PUBWEAK VectorD8
PUBWEAK VectorDC
PUBWEAK VectorE0
PUBWEAK VectorE4
PUBWEAK VectorE8
PUBWEAK VectorEC
PUBWEAK VectorF0
PUBWEAK VectorF4
PUBWEAK VectorF8
PUBWEAK VectorFC
PUBWEAK Vector100
PUBWEAK Vector104
PUBWEAK Vector108
PUBWEAK Vector10C
PUBWEAK Vector110
PUBWEAK Vector114
PUBWEAK Vector118
PUBWEAK Vector11C
PUBWEAK Vector120
PUBWEAK Vector124
PUBWEAK Vector128
PUBWEAK Vector12C
PUBWEAK Vector130
PUBWEAK Vector134
PUBWEAK Vector138
PUBWEAK Vector13C
PUBWEAK Vector140
PUBWEAK Vector144
PUBWEAK Vector148
PUBWEAK Vector14C
PUBLIC _unhandled_exception
SECTION .text:CODE:REORDER(1)
THUMB
NMIVector
HardFaultVector
MemManageVector
BusFaultVector
UsageFaultVector
Vector1C
Vector20
Vector24
Vector28
SVCallVector
DebugMonitorVector
Vector34
PendSVVector
SysTickVector
Vector40
Vector44
Vector48
Vector4C
Vector50
Vector54
Vector58
Vector5C
Vector60
Vector64
Vector68
Vector6C
Vector70
Vector74
Vector78
Vector7C
Vector80
Vector84
Vector88
Vector8C
Vector90
Vector94
Vector98
Vector9C
VectorA0
VectorA4
VectorA8
VectorAC
VectorB0
VectorB4
VectorB8
VectorBC
VectorC0
VectorC4
VectorC8
VectorCC
VectorD0
VectorD4
VectorD8
VectorDC
VectorE0
VectorE4
VectorE8
VectorEC
VectorF0
VectorF4
VectorF8
VectorFC
Vector100
Vector104
Vector108
Vector10C
Vector110
Vector114
Vector118
Vector11C
Vector120
Vector124
Vector128
Vector12C
Vector130
Vector134
Vector138
Vector13C
Vector140
Vector144
Vector148
Vector14C
_unhandled_exception
b _unhandled_exception
END

51
os/ports/IAR/ARMCMx/STM32/vectors.s
View File

@ -17,14 +17,6 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#if !defined(STM32F10X_LD) && !defined(STM32F10X_LD_VL) && \
!defined(STM32F10X_MD) && !defined(STM32F10X_MD_VL) && \
!defined(STM32F10X_HD) && !defined(STM32F10X_XL) && \
!defined(STM32F10X_CL)
#define _FROM_ASM_
#include "board.h"
#endif
MODULE ?vectors
AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
@ -98,13 +90,9 @@ __vector_table:
DCD VectorE0
DCD VectorE4
DCD VectorE8
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
defined(STM32F10X_XL) || defined(STM32F10X_CL)
DCD VectorEC
DCD VectorF0
DCD VectorF4
#endif
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
DCD VectorF8
DCD VectorFC
DCD Vector100
@ -115,21 +103,6 @@ __vector_table:
DCD Vector114
DCD Vector118
DCD Vector11C
DCD Vector120
DCD Vector124
DCD Vector128
DCD Vector12C
#endif
#if defined(STM32F10X_CL)
DCD Vector130
DCD Vector134
DCD Vector138
DCD Vector13C
DCD Vector140
DCD Vector144
DCD Vector148
DCD Vector14C
#endif
/*
* Default interrupt handlers.
@ -204,18 +177,6 @@ __vector_table:
PUBWEAK Vector114
PUBWEAK Vector118
PUBWEAK Vector11C
PUBWEAK Vector120
PUBWEAK Vector124
PUBWEAK Vector128
PUBWEAK Vector12C
PUBWEAK Vector130
PUBWEAK Vector134
PUBWEAK Vector138
PUBWEAK Vector13C
PUBWEAK Vector140
PUBWEAK Vector144
PUBWEAK Vector148
PUBWEAK Vector14C
PUBLIC _unhandled_exception
SECTION .text:CODE:REORDER(1)
@ -291,18 +252,6 @@ Vector110
Vector114
Vector118
Vector11C
Vector120
Vector124
Vector128
Vector12C
Vector130
Vector134
Vector138
Vector13C
Vector140
Vector144
Vector148
Vector14C
_unhandled_exception
b _unhandled_exception