git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@629 35acf78f-673a-0410-8e92-d51de3d6d3f4
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gdisirio
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@ -445,8 +445,8 @@
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* @{
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* Non portable code.
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* @ingroup Kernel
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* @file templates/chcore.c Non portable code.
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* @file templates/chcore.h Non portable macros and structures.
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* @file src/templates/chcore.c Non portable code template file.
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* @file src/templates/chcore.h Non portable macros and structures template file.
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*/
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/** @} */
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@ -17,6 +17,11 @@
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @addtogroup ARM7_CORE
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* @{
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*/
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#ifndef _CHTYPES_H_
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#define _CHTYPES_H_
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@ -29,16 +34,16 @@
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#include <stdint.h>
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#endif
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typedef int32_t bool_t;
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typedef uint8_t tmode_t;
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typedef uint8_t tstate_t;
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typedef uint16_t tid_t;
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typedef uint32_t tprio_t;
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typedef int32_t msg_t;
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typedef int32_t eventid_t;
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typedef uint32_t eventmask_t;
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typedef uint32_t systime_t;
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typedef int32_t cnt_t;
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typedef int32_t bool_t; /**< Fast boolean type. */
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typedef uint8_t tmode_t; /**< Thread flags. */
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typedef uint8_t tstate_t; /**< Thread state. */
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typedef uint16_t tid_t; /**< Thread sequential Id. */
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typedef uint32_t tprio_t; /**< Thread priority. */
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typedef int32_t msg_t; /**< Inter-thread message. */
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typedef int32_t eventid_t; /**< Event Id. */
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typedef uint32_t eventmask_t; /**< Events mask. */
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typedef uint32_t systime_t; /**< System time. */
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typedef int32_t cnt_t; /**< Resources counter. */
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#define INLINE inline
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#define PACK_STRUCT_STRUCT __attribute__((packed))
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@ -46,3 +51,5 @@ typedef int32_t cnt_t;
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#define PACK_STRUCT_END
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#endif /* _CHTYPES_H_ */
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/** @} */
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@ -1,7 +1,10 @@
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/**
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* @defgroup ARM7 ARM7TDMI
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* @{
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* @section ARM7_NOTES The ARM7 port notes
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* @details The ARM7 architecture is quite complex for a microcontroller and
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* some explanations are required about the port choices.
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*
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* @section ARM7_NOTES The ARM7 modes
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* The ARM7 port supports three modes:
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* - Pure ARM mode, this is the preferred mode for code speed. The code size
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* is larger however. This mode is enabled when all the modules are compiled
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@ -14,6 +17,42 @@
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* usually the slowest mode and the code size is not as good as in pure
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* THUMB mode.
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*
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* @section ARM7_STATES Mapping of the System States in the ARM7 port
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* The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM7
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* port:
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* - <b>Initialization</b>. This state is represented by the startup code and
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* the initialization code before @p chSysInit() is executed. It has not a
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* special hardware state associated, usually the CPU goes through several
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* hardware states during the startup phase.
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* - <b>Normal</b>. This is the state the system has after executing
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* @p chSysInit(). In this state the ARM7TDMI has both the interrupt sources
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* (IRQ and FIQ) enabled and is running in ARM System Mode.
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* - <b>Suspended</b>. In this state the IRQ sources are disabled but the FIQ
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* sources are served, the core is running in ARM System Mode.
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* - <b>Disabled</b>. Both the IRQ and FIQ sources are disabled, the core is
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* running in ARM System Mode.
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* - <b>Sleep</b>. The ARM7 code does not have any built-in low power mode but
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* there are clock stop modes implemented in custom ways by the various
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* silicon vendors. This state is implemented in each microcontroller support
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* code in a different way, the core is running (or freezed...) in ARM
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* System Mode.
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* - <b>S-Locked</b>. IRQ sources disabled, core running in ARM System Mode.
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* - <b>I-Locked</b>. IRQ sources disabled, core running in ARM IRQ Mode. Note
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* that this state is not different from the SRI state in this port, the
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* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
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* order to formally change state because this may change).
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* - <b>Serving Regular Interrupt</b>. IRQ sources disabled, core running in
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* ARM IRQ Mode. See also the I-Locked state.
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* - <b>Serving Fast Interrupt</b>. IRQ and FIQ sources disabled, core running
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* in ARM FIQ Mode.
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* - <b>Serving Non-Maskable Interrupt</b>. There are no asynchronous NMI
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* sources in ARM7 architecture but synchronous SVC, ABT and UND exception
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* handlers can be seen as belonging to this category.
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* - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
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* and FIQ sources. The ARM state is whatever the processor was running when
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* @p chSysHalt() was invoked.
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*
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* @section ARM7_NOTES The ARM7 port notes
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* The ARM7 port makes some assumptions on the application code organization:
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* - The @p main() function is invoked in system mode.
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* - Each thread has a private user/system stack, the system has a single
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* make sure your code saves them or does not use them (this happens
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* because in the ARM7 port all the OS interrupt handler functions are declared
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* naked).<br>
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* Function-trashed registers (R0-R3,R12,LR,SR) are saved/restored by the
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* Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the
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* system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().<br>
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* The easiest way to ensure this is to just invoke a function from within
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* the interrupt handler, the function code will save all the required
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* The easiest way to ensure this is to just invoke a normal function from
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* within the interrupt handler, the function code will save all the required
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* registers.<br>
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* Example:
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* @code
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* @ingroup ARM7
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*/
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/** @} */
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/**
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* @defgroup ARM7_CORE ARM7 Core Implementation
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* @{
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* @brief ARM7 specific port code, structures and macros.
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*
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* @ingroup ARM7
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* @file ports/ARM7/chcore.h Port related structures and macros.
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* @file ports/ARM7/chtypes.h Port types.
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*/
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/** @} */
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* that this is not related to the compiler optimization options.*/
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#define CH_OPTIMIZE_SPEED
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/** Configuration option: If enabled then the used of nested @p chSysLock() /
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/** Configuration option: If enabled then the use of nested @p chSysLock() /
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* @p chSysUnlock() operations is allowed.<br>
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* For performance and code size reasons the recommended setting is leave
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* For performance and code size reasons the recommended setting is to leave
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* this option disabled.<br>
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* You can use this option if you need to merge ChibiOS/RT with external
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* libraries that require nested lock/unlock operations.
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