From 033c92c92d30affb6f07420638701b9cc9aa9beb Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 20 Sep 2020 09:35:14 +0000 Subject: [PATCH] Fixed bug #1124. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_20.3.x@13862 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/STM32F4xx/stm32_registry.h | 40 ++++++++++++------- readme.txt | 1 + 2 files changed, 26 insertions(+), 15 deletions(-) diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h index be1d86f1b..5072ce744 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h @@ -291,7 +291,8 @@ /* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE -#define STM32_SPI1_SUPPORTS_I2S FALSE +#define STM32_SPI1_SUPPORTS_I2S TRUE +#define STM32_SPI1_I2S_FULLDUPLEX TRUE #define STM32_SPI1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 2)) #define STM32_SPI1_RX_DMA_CHN 0x00000303 @@ -665,7 +666,8 @@ /* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE -#define STM32_SPI1_SUPPORTS_I2S FALSE +#define STM32_SPI1_SUPPORTS_I2S TRUE +#define STM32_SPI1_I2S_FULLDUPLEX FALSE #define STM32_SPI1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 2)) #define STM32_SPI1_RX_DMA_CHN 0x00000303 @@ -675,7 +677,7 @@ #define STM32_HAS_SPI2 TRUE #define STM32_SPI2_SUPPORTS_I2S TRUE -#define STM32_SPI2_I2S_FULLDUPLEX TRUE +#define STM32_SPI2_I2S_FULLDUPLEX FALSE #define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) #define STM32_SPI2_RX_DMA_CHN 0x00000000 #define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4) @@ -683,7 +685,7 @@ #define STM32_HAS_SPI3 TRUE #define STM32_SPI3_SUPPORTS_I2S TRUE -#define STM32_SPI3_I2S_FULLDUPLEX TRUE +#define STM32_SPI3_I2S_FULLDUPLEX FALSE #define STM32_SPI3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 0) |\ STM32_DMA_STREAM_ID_MSK(1, 2)) #define STM32_SPI3_RX_DMA_CHN 0x00000000 @@ -1389,7 +1391,7 @@ /* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE #define STM32_SPI1_SUPPORTS_I2S TRUE -#define STM32_SPI1_I2S_FULLDUPLEX FALSE +#define STM32_SPI1_I2S_FULLDUPLEX TRUE #define STM32_SPI1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 2)) #define STM32_SPI1_RX_DMA_CHN 0x00000303 @@ -1418,7 +1420,7 @@ #define STM32_HAS_SPI4 TRUE #define STM32_SPI4_SUPPORTS_I2S TRUE -#define STM32_SPI4_I2S_FULLDUPLEX FALSE +#define STM32_SPI4_I2S_FULLDUPLEX TRUE #define STM32_SPI4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 3) |\ STM32_DMA_STREAM_ID_MSK(2, 4)) @@ -1429,7 +1431,7 @@ #define STM32_HAS_SPI5 TRUE #define STM32_SPI5_SUPPORTS_I2S TRUE -#define STM32_SPI5_I2S_FULLDUPLEX FALSE +#define STM32_SPI5_I2S_FULLDUPLEX TRUE #define STM32_SPI5_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3) |\ STM32_DMA_STREAM_ID_MSK(2, 5)) #define STM32_SPI5_RX_DMA_CHN 0x00702000 @@ -1761,7 +1763,8 @@ /* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE -#define STM32_SPI1_SUPPORTS_I2S FALSE +#define STM32_SPI1_SUPPORTS_I2S TRUE +#define STM32_SPI1_I2S_FULLDUPLEX TRUE #define STM32_SPI1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 2)) #define STM32_SPI1_RX_DMA_CHN 0x00000303 @@ -1788,7 +1791,8 @@ #define STM32_SPI3_TX_DMA_CHN 0x00000000 #define STM32_HAS_SPI4 TRUE -#define STM32_SPI4_SUPPORTS_I2S FALSE +#define STM32_SPI4_SUPPORTS_I2S TRUE +#define STM32_SPI4_I2S_FULLDUPLEX TRUE #define STM32_SPI4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 3) |\ STM32_DMA_STREAM_ID_MSK(2, 4)) @@ -1798,7 +1802,8 @@ #define STM32_SPI4_TX_DMA_CHN 0x00050040 #define STM32_HAS_SPI5 TRUE -#define STM32_SPI5_SUPPORTS_I2S FALSE +#define STM32_SPI5_SUPPORTS_I2S TRUE +#define STM32_SPI5_I2S_FULLDUPLEX TRUE #define STM32_SPI5_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3) |\ STM32_DMA_STREAM_ID_MSK(2, 5)) #define STM32_SPI5_RX_DMA_CHN 0x00702000 @@ -2087,7 +2092,8 @@ /* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE -#define STM32_SPI1_SUPPORTS_I2S FALSE +#define STM32_SPI1_SUPPORTS_I2S TRUE +#define STM32_SPI1_I2S_FULLDUPLEX TRUE #define STM32_SPI1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 2)) #define STM32_SPI1_RX_DMA_CHN 0x00000303 @@ -2114,7 +2120,8 @@ #define STM32_SPI3_TX_DMA_CHN 0x00000000 #define STM32_HAS_SPI4 TRUE -#define STM32_SPI4_SUPPORTS_I2S FALSE +#define STM32_SPI4_SUPPORTS_I2S TRUE +#define STM32_SPI4_I2S_FULLDUPLEX TRUE #define STM32_SPI4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 3)) #define STM32_SPI4_RX_DMA_CHN 0x00005004 @@ -2123,7 +2130,8 @@ #define STM32_SPI4_TX_DMA_CHN 0x00050040 #define STM32_HAS_SPI5 TRUE -#define STM32_SPI5_SUPPORTS_I2S FALSE +#define STM32_SPI5_SUPPORTS_I2S TRUE +#define STM32_SPI5_I2S_FULLDUPLEX TRUE #define STM32_SPI5_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3) |\ STM32_DMA_STREAM_ID_MSK(2, 5)) #define STM32_SPI5_RX_DMA_CHN 0x00702000 @@ -2372,7 +2380,7 @@ #define STM32_HAS_I2C3 FALSE -#define STM32_HAS_I2C4 FALSE +#define STM32_HAS_I2C4 TRUE #define STM32_I2C4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 0)) |\ STM32_DMA_STREAM_ID_MSK(1, 3)) #define STM32_I2C4_RX_DMA_CHN 0x00002007 @@ -2388,7 +2396,8 @@ /* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE -#define STM32_SPI1_SUPPORTS_I2S FALSE +#define STM32_SPI1_SUPPORTS_I2S TRUE +#define STM32_SPI1_I2S_FULLDUPLEX TRUE #define STM32_SPI1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\ STM32_DMA_STREAM_ID_MSK(2, 2)) #define STM32_SPI1_RX_DMA_CHN 0x00000303 @@ -2406,6 +2415,7 @@ #define STM32_HAS_SPI5 TRUE #define STM32_SPI5_SUPPORTS_I2S TRUE +#define STM32_SPI5_I2S_FULLDUPLEX TRUE #define STM32_SPI5_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3) |\ STM32_DMA_STREAM_ID_MSK(2, 5)) #define STM32_SPI5_RX_DMA_CHN 0x00702000 diff --git a/readme.txt b/readme.txt index e71945a85..65f6dadca 100644 --- a/readme.txt +++ b/readme.txt @@ -74,6 +74,7 @@ ***************************************************************************** *** 20.3.3 *** +- FIX: Fixed I2S-related problems in STM32F4xx registry (bug #1124). - FIX: Fixed incorrect STM32 iWDG initialization in windowed mode (bug #1122). - FIX: Fixed ignored HSIDIV setting on STM32G0xx (bug #1121)