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/**
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/**
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* @page article_jitter Minimizing Jitter
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* @page article_jitter Response Time and Jitter
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* @{
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* @{
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* Response time jitter is one of the more sneaky source of problems when
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* Response time jitter is one of the most sneaky source of problems when
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* designing a real time system. When using a RTOS like ChibiOS/RT one must
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* designing a real time system. When using a RTOS like ChibiOS/RT one must
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* be aware of what Jitter is and how it can affect the performance of the
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* be aware of what Jitter is and how it can affect the performance of the
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* system.<br>
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* system.<br>
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* A good place to start is this
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* A good place to start is this
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* <a href="http://en.wikipedia.org/wiki/Jitter">Wikipedia article</a>.
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* <a href="http://en.wikipedia.org/wiki/Jitter">Wikipedia article</a>.
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* <h2>Jitter sources under ChibiOS/RT</h2>
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*
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* <h2>Jitter Sources</h2>
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* Under ChibiOS/RT (or any other similar RTOS) there are several jitter
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* Under ChibiOS/RT (or any other similar RTOS) there are several jitter
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* possible sources:
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* possible sources:
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* -# Hardware interrupt latency.
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* -# Hardware interrupts latency.
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* -# Interrupt service time.
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* -# Interrupts service time and priority.
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* -# Kernel lock zones.
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* -# Kernel lock zones.
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* -# Higher priority threads activity.
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* -# Higher priority threads activity.
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*
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*
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* For each of the previously described jitter source there are possible
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* For each of the previously described jitter source there are possible
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* mitigation actions.
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* mitigation actions.
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*
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*
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* <h3>Hardware interrupt latency</h3>
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* <h3>Hardware interrupts latency</h3>
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* This parameter is pretty much fixed and a characteristic of the system.
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* This parameter is pretty much fixed and a characteristic of the system.
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* Possible actions include higher clock speeds or switch to an hardware
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* Possible actions include higher clock speeds or switch to an hardware
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* architecture more efficient at interrupt handling, as example, the
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* architecture more efficient at interrupt handling, as example, the
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* ARM Cortex-M3 core present in the STM32 family is very efficient at
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* ARM Cortex-M3 core present in the STM32 family is very efficient at that.
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* interrupt handling.
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*
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*
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* <h3>Interrupt service time</h3>
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* <h3>Interrupts service time and priority</h3>
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* This is the execution time of interrupt handlers, this time includes:
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* This is the execution time of interrupt handlers, this time includes:
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* - Fixed handler overhead, as example registers stacking/unstacking.
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* - Fixed handler overhead, as example registers stacking/unstacking.
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* - Interrupt specific service time, as example, in a serial driver, this is
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* - Interrupt specific service time, as example, in a serial driver, this is
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