diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h b/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h
index 46b8fa64e..aea5c25c2 100644
--- a/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h
+++ b/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,7 +48,8 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV1
 #define STM32_PPRE2                         STM32_PPRE2_DIV1
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV2
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/demos/ARMCM3-STM32F103-FATFS/mcuconf.h b/demos/ARMCM3-STM32F103-FATFS/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/demos/ARMCM3-STM32F103-FATFS/mcuconf.h
+++ b/demos/ARMCM3-STM32F103-FATFS/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/demos/ARMCM3-STM32F103-G++/mcuconf.h b/demos/ARMCM3-STM32F103-G++/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/demos/ARMCM3-STM32F103-G++/mcuconf.h
+++ b/demos/ARMCM3-STM32F103-G++/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/demos/ARMCM3-STM32F103/mcuconf.h b/demos/ARMCM3-STM32F103/mcuconf.h
index 4f4b30d91..af94c6b27 100644
--- a/demos/ARMCM3-STM32F103/mcuconf.h
+++ b/demos/ARMCM3-STM32F103/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h b/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h
index 8fbc1d918..89333b942 100644
--- a/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h
+++ b/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/docs/reports/STM32F103-72-GCC.txt b/docs/reports/STM32F103-72-GCC.txt
index a05536913..c33f1f5f9 100644
--- a/docs/reports/STM32F103-72-GCC.txt
+++ b/docs/reports/STM32F103-72-GCC.txt
@@ -6,7 +6,7 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 *** ChibiOS/RT test suite
 ***
 *** Kernel:       2.3.5unstable
-*** Compiled:     Dec 28 2011 - 22:49:26
+*** Compiled:     Jan  8 2012 - 12:25:16
 *** Compiler:     GCC 4.6.2
 *** Architecture: ARMv7-M
 *** Core Variant: Cortex-M3
diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c
index 4572b7ea3..7e68883ab 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.c
+++ b/os/hal/platforms/STM32F1xx/hal_lld.c
@@ -93,10 +93,11 @@ void hal_lld_init(void) {
     defined(STM32F10X_HD) || defined(STM32F10X_XL) ||                       \
     defined(__DOXYGEN__)
 /*
- * Clocks initialization for the LD, MD and HD sub-families.
+ * Clocks initialization for all sub-families except CL.
  */
 void stm32_clock_init(void) {
 
+#if !STM32_NO_INIT
   /* HSI setup, it enforces the reset situation in order to handle possible
      problems with JTAG probes and re-initializations.*/
   RCC->CR |= RCC_CR_HSION;                  /* Make sure HSI is ON.         */
@@ -105,46 +106,55 @@ void stm32_clock_init(void) {
   RCC->CR &= RCC_CR_HSITRIM | RCC_CR_HSION; /* CR Reset value.              */
   RCC->CFGR = 0;                            /* CFGR reset value.            */
   while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
-    ;                                       /* Wait until HSI is the source.*/
+    ;                                       /* Waits until HSI is selected. */
 
-  /* HSE setup, it is only performed if the HSE clock is selected as source
-     of the system clock (directly or through the PLL).*/
-#if (STM32_SW == STM32_SW_HSE) ||                                           \
-    ((STM32_SW == STM32_SW_PLL) && (STM32_PLLSRC == STM32_PLLSRC_HSE))
+#if STM32_HSE_ENABLED
+  /* HSE activation.*/
   RCC->CR |= RCC_CR_HSEON;
   while (!(RCC->CR & RCC_CR_HSERDY))
-    ;                           /* Waits until HSE is stable.               */
+    ;                                       /* Waits until HSE is stable.   */
 #endif
 
-  /* PLL setup, it is only performed if the PLL is the selected source of
-     the system clock else it is left disabled.*/
-#if STM32_SW == STM32_SW_PLL
+#if STM32_LSI_ENABLED
+  /* LSI activation.*/
+  RCC->CSR |= RCC_CSR_LSION;
+  while ((RCC->CSR & RCC_CSR_LSIRDY) == 0)
+    ;                                       /* Waits until LSI is stable.   */
+#endif
+
+#if STM32_LSE_ENABLED
+  /* LSE activation, have to unlock the register.*/
+  PWR->CR |= PWR_CR_DBP;
+  RCC->BDCR |= RCC_BDCR_LSEON;
+  while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
+    ;                                       /* Waits until LSE is stable.   */
+  PWR->CR &= ~PWR_CR_DBP;
+#endif
+
+#if STM32_ACTIVATE_PLL
+  /* PLL activation.*/
   RCC->CFGR |= STM32_PLLMUL | STM32_PLLXTPRE | STM32_PLLSRC;
   RCC->CR   |= RCC_CR_PLLON;
   while (!(RCC->CR & RCC_CR_PLLRDY))
-    ;                           /* Waits until PLL is stable.               */
+    ;                                       /* Waits until PLL is stable.   */
 #endif
 
   /* Clock settings.*/
-#if STM32_HAS_USB
-  RCC->CFGR = STM32_MCO    | STM32_USBPRE | STM32_PLLMUL | STM32_PLLXTPRE |
+  RCC->CFGR = STM32_MCOSEL | STM32_USBPRE | STM32_PLLMUL | STM32_PLLXTPRE |
               STM32_PLLSRC | STM32_ADCPRE | STM32_PPRE2  | STM32_PPRE1    |
               STM32_HPRE;
-#else
-  RCC->CFGR = STM32_MCO    |                STM32_PLLMUL | STM32_PLLXTPRE |
-              STM32_PLLSRC | STM32_ADCPRE | STM32_PPRE2  | STM32_PPRE1    |
-              STM32_HPRE;
-#endif
 
   /* Flash setup and final clock selection.   */
-  FLASH->ACR = STM32_FLASHBITS; /* Flash wait states depending on clock.    */
+  FLASH->ACR = STM32_FLASHBITS;
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)
-  RCC->CFGR |= STM32_SW;        /* Switches on the selected clock source.   */
+  /* Switches clock source.*/
+  RCC->CFGR |= STM32_SW;
   while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2))
-    ;
+    ;                                       /* Waits selection complete.    */
 #endif
+#endif /* STM32_NO_INIT */
 }
 
 #elif defined(STM32F10X_CL)
diff --git a/os/hal/platforms/STM32F1xx/hal_lld.h b/os/hal/platforms/STM32F1xx/hal_lld.h
index 0d8e0b8b3..ad6f117c8 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld.h
@@ -49,6 +49,14 @@
 /* Driver constants.                                                         */
 /*===========================================================================*/
 
+/**
+ * @name    Internal clock sources
+ * @{
+ */
+#define STM32_HSICLK            8000000     /**< High speed internal clock. */
+#define STM32_LSICLK            40000       /**< Low speed internal clock.  */
+/** @} */
+
 /**
  * @name    PWR_CR register bits definitions
  * @{
@@ -68,6 +76,17 @@
 /* Driver pre-compile time settings.                                         */
 /*===========================================================================*/
 
+/**
+ * @name    Configuration options
+ * @{
+ */
+/**
+ * @brief   Disables the PWR/RCC initialization in the HAL.
+ */
+#if !defined(STM32_NO_INIT) || defined(__DOXYGEN__)
+#define STM32_NO_INIT               FALSE
+#endif
+
 /**
  * @brief   Enables or disables the programmable voltage detector.
  */
@@ -82,6 +101,35 @@
 #define STM32_PLS                   STM32_PLS_LEV0
 #endif
 
+/**
+ * @brief   Enables or disables the HSI clock source.
+ */
+#if !defined(STM32_HSI_ENABLED) || defined(__DOXYGEN__)
+#define STM32_HSI_ENABLED           TRUE
+#endif
+
+/**
+ * @brief   Enables or disables the LSI clock source.
+ */
+#if !defined(STM32_LSI_ENABLED) || defined(__DOXYGEN__)
+#define STM32_LSI_ENABLED           FALSE
+#endif
+
+/**
+ * @brief   Enables or disables the HSE clock source.
+ */
+#if !defined(STM32_HSE_ENABLED) || defined(__DOXYGEN__)
+#define STM32_HSE_ENABLED           TRUE
+#endif
+
+/**
+ * @brief   Enables or disables the LSE clock source.
+ */
+#if !defined(STM32_LSE_ENABLED) || defined(__DOXYGEN__)
+#define STM32_LSE_ENABLED           FALSE
+#endif
+/** @} */
+
 /*===========================================================================*/
 /* Derived constants and error checks.                                       */
 /*===========================================================================*/
@@ -160,13 +208,13 @@ typedef uint32_t halrtcnt_t;
 /**
  * @brief   Realtime counter frequency.
  * @note    The DWT_CYCCNT register is incremented directly by the system
- *          clock so this function returns STM32_SYSCLK.
+ *          clock so this function returns STM32_HCLK.
  *
  * @return              The realtime counter frequency of type halclock_t.
  *
  * @notapi
  */
-#define hal_lld_get_counter_frequency()     STM32_SYSCLK
+#define hal_lld_get_counter_frequency()     STM32_HCLK
 
 /*===========================================================================*/
 /* External declarations.                                                    */
diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f103.h b/os/hal/platforms/STM32F1xx/hal_lld_f103.h
index 398167ca8..3ed1db83b 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld_f103.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld_f103.h
@@ -65,11 +65,68 @@
 /** @} */
 
 /**
- * @name    Internal clock sources
+ * @name    Absolute Maximum Ratings
  * @{
  */
-#define STM32_HSICLK            8000000     /**< High speed internal clock. */
-#define STM32_LSICLK            40000       /**< Low speed internal clock.  */
+/**
+ * @brief   Maximum system clock frequency.
+ */
+#define STM32_SYSCLK_MAX        72000000
+
+/**
+ * @brief   Maximum HSE clock frequency.
+ */
+#define STM32_HSECLK_MAX        25000000
+
+/**
+ * @brief   Minimum HSE clock frequency.
+ */
+#define STM32_HSECLK_MIN        1000000
+
+/**
+ * @brief   Maximum LSE clock frequency.
+ */
+#define STM32_LSECLK_MAX        1000000
+
+/**
+ * @brief   Minimum LSE clock frequency.
+ */
+#define STM32_LSECLK_MIN        32768
+
+/**
+ * @brief   Maximum PLLs input clock frequency.
+ */
+#define STM32_PLLIN_MAX         25000000
+
+/**
+ * @brief   Maximum PLLs input clock frequency.
+ */
+#define STM32_PLLIN_MIN         1000000
+
+/**
+ * @brief   Maximum PLL output clock frequency.
+ */
+#define STM32_PLLOUT_MAX        72000000
+
+/**
+ * @brief   Maximum PLL output clock frequency.
+ */
+#define STM32_PLLOUT_MIN        16000000
+
+/**
+ * @brief   Maximum APB1 clock frequency.
+ */
+#define STM32_PCLK1_MAX         36000000
+
+/**
+ * @brief   Maximum APB2 clock frequency.
+ */
+#define STM32_PCLK2_MAX         72000000
+
+/**
+ * @brief   Maximum ADC clock frequency.
+ */
+#define STM32_ADCCLK_MAX        14000000
 /** @} */
 
 /**
@@ -116,16 +173,16 @@
 #define STM32_USBPRE_DIV1P5     (0 << 22)   /**< PLLOUT divided by 1.5.     */
 #define STM32_USBPRE_DIV1       (1 << 22)   /**< PLLOUT divided by 1.       */
 
-#define STM32_MCO_NOCLOCK       (0 << 24)   /**< No clock on MCO pin.       */
-#define STM32_MCO_SYSCLK        (4 << 24)   /**< SYSCLK on MCO pin.         */
-#define STM32_MCO_HSI           (5 << 24)   /**< HSI clock on MCO pin.      */
-#define STM32_MCO_HSE           (6 << 24)   /**< HSE clock on MCO pin.      */
-#define STM32_MCO_PLLDIV2       (7 << 24)   /**< PLL/2 clock on MCO pin.    */
+#define STM32_MCOSEL_NOCLOCK    (0 << 24)   /**< No clock on MCO pin.       */
+#define STM32_MCOSEL_SYSCLK     (4 << 24)   /**< SYSCLK on MCO pin.         */
+#define STM32_MCOSEL_HSI        (5 << 24)   /**< HSI clock on MCO pin.      */
+#define STM32_MCOSEL_HSE        (6 << 24)   /**< HSE clock on MCO pin.      */
+#define STM32_MCOSEL_PLLDIV2    (7 << 24)   /**< PLL/2 clock on MCO pin.    */
 
-#define STM32_RTC_NOCLOCK       (0 << 8)    /**< No clock.                  */
-#define STM32_RTC_LSE           (1 << 8)    /**< LSE used as RTC clock.     */
-#define STM32_RTC_LSI           (2 << 8)    /**< LSI used as RTC clock.     */
-#define STM32_RTC_HSE           (3 << 8)    /**< HSE divided by 128 used as
+#define STM32_RTCSEL_NOCLOCK    (0 << 8)    /**< No clock.                  */
+#define STM32_RTCSEL_LSE        (1 << 8)    /**< LSE used as RTC clock.     */
+#define STM32_RTCSEL_LSI        (2 << 8)    /**< LSI used as RTC clock.     */
+#define STM32_RTCSEL_HSEDIV     (3 << 8)    /**< HSE divided by 128 used as
                                                  RTC clock.                 */
 /** @} */
 
@@ -193,7 +250,7 @@
 
 /* RTC attributes.*/
 #define STM32_HAS_RTC           TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
+#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
 
 /* SDIO attributes.*/
 #define STM32_HAS_SDIO          FALSE
@@ -340,7 +397,7 @@
 
 /* RTC attributes.*/
 #define STM32_HAS_RTC           TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
+#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
 
 /* SDIO attributes.*/
 #define STM32_HAS_SDIO          FALSE
@@ -487,7 +544,7 @@
 
 /* RTC attributes.*/
 #define STM32_HAS_RTC           TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
+#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
 
 /* SDIO attributes.*/
 #define STM32_HAS_SDIO          TRUE
@@ -634,7 +691,7 @@
 
 /* RTC attributes.*/
 #define STM32_HAS_RTC           TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
+#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
 
 /* SDIO attributes.*/
 #define STM32_HAS_SDIO          TRUE
@@ -877,6 +934,13 @@
 #define STM32_ADCPRE                STM32_ADCPRE_DIV4
 #endif
 
+/**
+ * @brief   USB clock setting.
+ */
+#if !defined(STM32_USB_CLOCK_REQUIRED) || defined(__DOXYGEN__)
+#define STM32_USB_CLOCK_REQUIRED    TRUE
+#endif
+
 /**
  * @brief   USB prescaler initialization.
  */
@@ -887,15 +951,15 @@
 /**
  * @brief   MCO pin setting.
  */
-#if !defined(STM32_MCO) || defined(__DOXYGEN__)
-#define STM32_MCO                   STM32_MCO_NOCLOCK
+#if !defined(STM32_MCOSEL) || defined(__DOXYGEN__)
+#define STM32_MCOSEL                STM32_MCOSEL_NOCLOCK
 #endif
 
 /**
  * @brief   Clock source selecting. LSI by default.
  */
-#if !defined(STM32_RTC) || defined(__DOXYGEN__)
-#define STM32_RTC                   STM32_RTC_LSI
+#if !defined(STM32_RTCSEL) || defined(__DOXYGEN__)
+#define STM32_RTCSEL                STM32_RTCSEL_LSI
 #endif
 /** @} */
 
@@ -903,6 +967,105 @@
 /* Derived constants and error checks.                                       */
 /*===========================================================================*/
 
+/*
+ * HSI related checks.
+ */
+#if STM32_HSI_ENABLED
+#else /* !STM32_HSI_ENABLED */
+
+#if STM32_SW == STM32_SW_HSI
+#error "HSI not enabled, required by STM32_SW"
+#endif
+
+#if (STM32_SW == STM32_SW_PLL) && (STM32_PLLSRC == STM32_PLLSRC_HSI)
+#error "HSI not enabled, required by STM32_SW and STM32_PLLSRC"
+#endif
+
+#if (STM32_MCOSEL == STM32_MCOSEL_HSI) ||                                         \
+    ((STM32_MCOSEL == STM32_MCOSEL_PLLDIV2) && (STM32_PLLSRC == STM32_PLLSRC_HSI))
+#error "HSI not enabled, required by STM32_MCOSEL"
+#endif
+
+#endif /* !STM32_HSI_ENABLED */
+
+/*
+ * HSE related checks.
+ */
+#if STM32_HSE_ENABLED
+
+#if STM32_HSECLK == 0
+#error "HSE frequency not defined"
+#elif (STM32_HSECLK < STM32_HSECLK_MIN) || (STM32_HSECLK > STM32_HSECLK_MAX)
+#error "STM32_HSECLK outside acceptable range (STM32_HSECLK_MIN...STM32_HSECLK_MAX)"
+#endif
+
+#else /* !STM32_HSE_ENABLED */
+
+#if STM32_SW == STM32_SW_HSE
+#error "HSE not enabled, required by STM32_SW"
+#endif
+
+#if (STM32_SW == STM32_SW_PLL) && (STM32_PLLSRC == STM32_PLLSRC_HSE)
+#error "HSE not enabled, required by STM32_SW and STM32_PLLSRC"
+#endif
+
+#if (STM32_MCOSEL == STM32_MCOSEL_HSE) ||                                   \
+    ((STM32_MCOSEL == STM32_MCOSEL_PLLDIV2) && (STM32_PLLSRC == STM32_PLLSRC_HSE))
+#error "HSE not enabled, required by STM32_MCOSEL"
+#endif
+
+#if STM32_RTCSEL == STM32_RTCSEL_HSEDIV
+#error "HSE not enabled, required by STM32_RTCSELSEL"
+#endif
+
+#endif /* !STM32_HSE_ENABLED */
+
+/*
+ * LSI related checks.
+ */
+#if STM32_LSI_ENABLED
+#else /* !STM32_LSI_ENABLED */
+
+#if STM32_RTCSEL == STM32_RTCSEL_LSI
+#error "LSI not enabled, required by STM32_RTCSEL"
+#endif
+
+#endif /* !STM32_LSI_ENABLED */
+
+/*
+ * LSE related checks.
+ */
+#if STM32_LSE_ENABLED
+
+#if (STM32_LSECLK == 0)
+#error "LSE frequency not defined"
+#endif
+
+#if (STM32_LSECLK < STM32_LSECLK_MIN) || (STM32_LSECLK > STM32_LSECLK_MAX)
+#error "STM32_LSECLK outside acceptable range (STM32_LSECLK_MIN...STM32_LSECLK_MAX)"
+#endif
+
+#else /* !STM32_LSE_ENABLED */
+
+#if STM32_RTCSEL == STM32_RTCSEL_LSE
+#error "LSE not enabled, required by STM32_RTCSEL"
+#endif
+
+#endif /* !STM32_LSE_ENABLED */
+
+/* PLL activation conditions.*/
+#if STM32_USB_CLOCK_REQUIRED ||                                             \
+    (STM32_SW == STM32_SW_PLL) ||                                           \
+    (STM32_MCOSEL == STM32_MCOSEL_PLLDIV2) ||                               \
+    defined(__DOXYGEN__)
+/**
+ * @brief   PLL activation flag.
+ */
+#define STM32_ACTIVATE_PLL          TRUE
+#else
+#define STM32_ACTIVATE_PLL          FALSE
+#endif
+
 /* HSE prescaler setting check.*/
 #if (STM32_PLLXTPRE != STM32_PLLXTPRE_DIV1) &&                              \
     (STM32_PLLXTPRE != STM32_PLLXTPRE_DIV2)
@@ -935,8 +1098,8 @@
 #endif
 
 /* PLL input frequency range check.*/
-#if (STM32_PLLCLKIN < 3000000) || (STM32_PLLCLKIN > 12000000)
-#error "STM32_PLLCLKIN outside acceptable range (3...12MHz)"
+#if (STM32_PLLCLKIN < STM32_PLLIN_MIN) || (STM32_PLLCLKIN > STM32_PLLIN_MAX)
+#error "STM32_PLLCLKIN outside acceptable range (STM32_PLLIN_MIN...STM32_PLLIN_MAX)"
 #endif
 
 /**
@@ -945,8 +1108,8 @@
 #define STM32_PLLCLKOUT             (STM32_PLLCLKIN * STM32_PLLMUL_VALUE)
 
 /* PLL output frequency range check.*/
-#if (STM32_PLLCLKOUT < 16000000) || (STM32_PLLCLKOUT > 72000000)
-#error "STM32_PLLCLKOUT outside acceptable range (16...72MHz)"
+#if (STM32_PLLCLKOUT < STM32_PLLOUT_MIN) || (STM32_PLLCLKOUT > STM32_PLLOUT_MAX)
+#error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
 #endif
 
 /**
@@ -963,8 +1126,8 @@
 #endif
 
 /* Check on the system clock.*/
-#if STM32_SYSCLK > 72000000
-#error "STM32_SYSCLK above maximum rated frequency (72MHz)"
+#if STM32_SYSCLK > STM32_SYSCLK_MAX
+#error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
 #endif
 
 /**
@@ -993,8 +1156,8 @@
 #endif
 
 /* AHB frequency check.*/
-#if STM32_HCLK > 72000000
-#error "STM32_HCLK exceeding maximum frequency (72MHz)"
+#if STM32_HCLK > STM32_SYSCLK_MAX
+#error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
 #endif
 
 /**
@@ -1015,8 +1178,8 @@
 #endif
 
 /* APB1 frequency check.*/
-#if STM32_PCLK2 > 36000000
-#error "STM32_PCLK1 exceeding maximum frequency (36MHz)"
+#if STM32_PCLK1 > STM32_PCLK1_MAX
+#error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
 #endif
 
 /**
@@ -1037,8 +1200,8 @@
 #endif
 
 /* APB2 frequency check.*/
-#if STM32_PCLK2 > 72000000
-#error "STM32_PCLK2 exceeding maximum frequency (72MHz)"
+#if STM32_PCLK2 > STM32_PCLK2_MAX
+#error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
 #endif
 
 /**
@@ -1057,8 +1220,8 @@
 #endif
 
 /* ADC frequency check.*/
-#if STM32_ADCCLK > 14000000
-#error "STM32_ADCCLK exceeding maximum frequency (14MHz)"
+#if STM32_ADCCLK > STM32_ADCCLK_MAX
+#error "STM32_ADCCLK exceeding maximum frequency (STM32_ADCCLK_MAX)"
 #endif
 
 /**
diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/testhal/STM32F1xx/ADC/mcuconf.h
+++ b/testhal/STM32F1xx/ADC/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/testhal/STM32F1xx/CAN/mcuconf.h
+++ b/testhal/STM32F1xx/CAN/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h
index 4f4b30d91..af94c6b27 100644
--- a/testhal/STM32F1xx/EXT/mcuconf.h
+++ b/testhal/STM32F1xx/EXT/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
index 06882a795..a9e5e64f0 100644
--- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
+++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
@@ -35,16 +35,23 @@
 /*
  * HAL driver system settings.
  */
-#define STM32_SW                            STM32_SW_HSI
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
 #define STM32_PLLMUL_VALUE                  9
 #define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV1
-#define STM32_PPRE2                         STM32_PPRE2_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV2
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h
index 9d9300daf..ca00b20d6 100644
--- a/testhal/STM32F1xx/GPT/mcuconf.h
+++ b/testhal/STM32F1xx/GPT/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h
index c31eef7a2..d449b1d0e 100644
--- a/testhal/STM32F1xx/I2C/mcuconf.h
+++ b/testhal/STM32F1xx/I2C/mcuconf.h
@@ -34,6 +34,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -42,7 +47,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h
index ea55a44f8..9841a6985 100644
--- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h
index 2890f7d5e..984ad7cd8 100644
--- a/testhal/STM32F1xx/MAC/mcuconf.h
+++ b/testhal/STM32F1xx/MAC/mcuconf.h
@@ -35,23 +35,23 @@
 /*
  * HAL driver system settings.
  */
-#define STM32_ACTIVATE_PLL1                 TRUE
-#define STM32_ACTIVATE_PLL2                 TRUE
-#define STM32_ACTIVATE_PLL3                 TRUE
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_PREDIV1
-#define STM32_PREDIV1SRC                    STM32_PREDIV1SRC_PLL2
-#define STM32_PREDIV1_VALUE                 5
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
 #define STM32_PLLMUL_VALUE                  9
-#define STM32_PREDIV2_VALUE                 5
-#define STM32_PLL2MUL_VALUE                 8
-#define STM32_PLL3MUL_VALUE                 10
 #define STM32_HPRE                          STM32_HPRE_DIV1
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_OTGFSPRE                      STM32_OTGFSPRE_DIV3
-#define STM32_MCO                           STM32_MCO_PLL3
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h
index 51d1e12ab..af94c6b27 100644
--- a/testhal/STM32F1xx/PVD/mcuconf.h
+++ b/testhal/STM32F1xx/PVD/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,10 +48,12 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
-#define STM32_PVD_ENABLE                    TRUE
-#define STM32_PLS                           STM32_PLS_LEV7
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
 
 /*
  * ADC driver system settings.
diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h
index 054b3bc03..1a38f9876 100644
--- a/testhal/STM32F1xx/RTC/mcuconf.h
+++ b/testhal/STM32F1xx/RTC/mcuconf.h
@@ -34,6 +34,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -42,8 +47,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_MCO                           STM32_MCO_NOCLOCK
-#define STM32_RTC                           STM32_RTC_LSE
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h
index 4acb6f58d..e25d3a8cb 100644
--- a/testhal/STM32F1xx/SDC/mcuconf.h
+++ b/testhal/STM32F1xx/SDC/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/testhal/STM32F1xx/SPI/mcuconf.h
+++ b/testhal/STM32F1xx/SPI/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h
index 27278f054..9b69c18cb 100644
--- a/testhal/STM32F1xx/UART/mcuconf.h
+++ b/testhal/STM32F1xx/UART/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/testhal/STM32F1xx/USB_CDC/mcuconf.h
+++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0
 
diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h
index 87f445909..c94d3a2a5 100644
--- a/testhal/STM32F1xx/USB_MSC/mcuconf.h
+++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h
@@ -35,6 +35,11 @@
 /*
  * HAL driver system settings.
  */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
 #define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
@@ -43,8 +48,10 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCO                           STM32_MCO_NOCLOCK
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE
 #define STM32_PLS                           STM32_PLS_LEV0