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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4656 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-09-14 12:57:19 +00:00
parent f4b7338558
commit 061c832850
9 changed files with 1611 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
demos/PPC-SPC563-GCC/Makefile
View File

@ -18,7 +18,7 @@ ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti USE_CPPOPT = -fno-rtti
endif endif
# Enable this if you want the linker to remove unused code and data # Enable this if you want the linker to remove unused code and data.
ifeq ($(USE_LINK_GC),) ifeq ($(USE_LINK_GC),)
USE_LINK_GC = no USE_LINK_GC = no
endif endif

219
os/ports/GCC/PPC/SPC560Pxx/ivor.s Normal file
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@ -0,0 +1,219 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file SPC560Pxx/ivor.s
* @brief SPC560Pxx IVORx handlers.
*
* @addtogroup PPC_CORE
* @{
*/
/*
* Imports the PPC configuration headers.
*/
#define _FROM_ASM_
#include "chconf.h"
#include "chcore.h"
#if !defined(__DOXYGEN__)
/*
* INTC registers address.
*/
.equ INTC_IACKR, 0xfff48010
.equ INTC_EOIR, 0xfff48018
.section .handlers, "ax"
/*
* IVOR10 handler (Book-E decrementer).
*/
.align 4
.globl IVOR10
IVOR10:
/* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */
mfSRR1 %r0
stw %r0, 12(%sp) /* Saves MSR. */
mfCR %r0
stw %r0, 16(%sp) /* Saves CR. */
mfLR %r0
stw %r0, 20(%sp) /* Saves LR. */
mfCTR %r0
stw %r0, 24(%sp) /* Saves CTR. */
mfXER %r0
stw %r0, 28(%sp) /* Saves XER. */
stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
stw %r4, 40(%sp)
stw %r5, 44(%sp)
stw %r6, 48(%sp)
stw %r7, 52(%sp)
stw %r8, 56(%sp)
stw %r9, 60(%sp)
stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Reset DIE bit in TSR register.*/
lis %r3, 0x0800 /* DIS bit mask. */
mtspr 336, %r3 /* TSR register. */
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_enter_isr
bl dbg_check_lock_from_isr
#endif
bl chSysTimerHandlerI
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock_from_isr
bl dbg_check_leave_isr
#endif
/* System tick handler invocation.*/
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0
beq cr0, .ctxrestore
bl chSchDoReschedule
b .ctxrestore
/*
* IVOR4 handler (Book-E external interrupt).
*/
.align 4
.globl IVOR4
IVOR4:
/* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */
mfSRR1 %r0
stw %r0, 12(%sp) /* Saves MSR. */
mfCR %r0
stw %r0, 16(%sp) /* Saves CR. */
mfLR %r0
stw %r0, 20(%sp) /* Saves LR. */
mfCTR %r0
stw %r0, 24(%sp) /* Saves CTR. */
mfXER %r0
stw %r0, 28(%sp) /* Saves XER. */
stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
stw %r4, 40(%sp)
stw %r5, 44(%sp)
stw %r6, 48(%sp)
stw %r7, 52(%sp)
stw %r8, 56(%sp)
stw %r9, 60(%sp)
stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Software vector address from the INTC register.*/
lis %r3, INTC_IACKR@h
ori %r3, %r3, INTC_IACKR@l /* IACKR register address. */
lwz %r3, 0(%r3) /* IACKR register value. */
lwz %r3, 0(%r3)
mtCTR %r3 /* Software handler address. */
#if PPC_USE_IRQ_PREEMPTION
/* Allows preemption while executing the software handler.*/
wrteei 1
#endif
/* Exectes the software handler.*/
bctrl
#if PPC_USE_IRQ_PREEMPTION
/* Prevents preemption again.*/
wrteei 0
#endif
/* Informs the INTC that the interrupt has been served.*/
mbar 0
lis %r3, INTC_EOIR@h
ori %r3, %r3, INTC_EOIR@l
stw %r3, 0(%r3) /* Writing any value should do. */
/* Verifies if a reschedule is required.*/
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0
beq cr0, .ctxrestore
bl chSchDoReschedule
/* Context restore.*/
.ctxrestore:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
lwz %r4, 40(%sp)
lwz %r5, 44(%sp)
lwz %r6, 48(%sp)
lwz %r7, 52(%sp)
lwz %r8, 56(%sp)
lwz %r9, 60(%sp)
lwz %r10, 64(%sp)
lwz %r11, 68(%sp)
lwz %r12, 72(%sp)
lwz %r0, 8(%sp)
mtSRR0 %r0 /* Restores PC. */
lwz %r0, 12(%sp)
mtSRR1 %r0 /* Restores MSR. */
lwz %r0, 16(%sp)
mtCR %r0 /* Restores CR. */
lwz %r0, 20(%sp)
mtLR %r0 /* Restores LR. */
lwz %r0, 24(%sp)
mtCTR %r0 /* Restores CTR. */
lwz %r0, 28(%sp)
mtXER %r0 /* Restores XER. */
lwz %r0, 32(%sp) /* Restores GPR0. */
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
addi %sp, %sp, 80 /* Back to the previous frame. */
rfi
#endif /* !defined(__DOXYGEN__) */
/** @} */

173
os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld Normal file
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@ -0,0 +1,173 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* SPC560P44 memory setup.
*/
__irq_stack_size__ = 0x0000; /* Not yet used.*/
__process_stack_size__ = 0x0800;
MEMORY
{
flash : org = 0x00000000, len = 512k
dataflash : org = 0x00800000, len = 64k
ram : org = 0x40000000, len = 40k
}
/*
* Derived constants.
*/
__flash_size__ = LENGTH(flash);
__flash_start__ = ORIGIN(flash);
__flash_end__ = ORIGIN(flash) + LENGTH(flash);
__ram_size__ = LENGTH(ram);
__ram_start__ = ORIGIN(ram);
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
SECTIONS
{
. = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
__ivpr_base__ = .;
KEEP(*(.bam))
KEEP(*(.crt0))
KEEP(*(.handlers))
. = ALIGN(0x800);
KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
} > flash
destructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
} > flash
.text_vle : ALIGN(16) SUBALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
.text : ALIGN(16) SUBALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
.rodata : ALIGN(16) SUBALIGN(16)
{
*(.glue_7t)
*(.glue_7)
*(.gcc*)
*(.rodata)
*(.rodata.*)
*(.rodata1)
} > flash
.sdata2 : ALIGN(16) SUBALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
} > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
} > flash
.romdata : ALIGN(16) SUBALIGN(16)
{
__romdata_start__ = .;
} > flash
.stacks :
{
. = ALIGN(8);
__irq_stack_base__ = .;
. += __irq_stack_size__;
. = ALIGN(8);
__irq_stack_end__ = .;
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
. += __process_stack_size__;
. = ALIGN(8);
__process_stack_end__ = .;
__main_thread_stack_end__ = .;
} > ram
.data : AT(__romdata_start__)
{
. = ALIGN(4);
__data_start__ = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__sdata_start__ = . + 0x8000;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__data_end__ = .;
} > ram
.sbss :
{
__bss_start__ = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
} > ram
.bss :
{
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
__bss_end__ = .;
} > ram
__heap_base__ = __bss_end__;
__heap_end__ = __ram_end__;
}

11
os/ports/GCC/PPC/SPC560Pxx/port.mk Normal file
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@ -0,0 +1,11 @@
# List of the ChibiOS/RT SPC563Mxx port files.
PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/vectors.s \
${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ivor.s \
${CHIBIOS}/os/ports/GCC/PPC/crt0.s
PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx
PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ld

57
os/ports/GCC/PPC/SPC560Pxx/ppcparams.h Normal file
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@ -0,0 +1,57 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file SPC560Pxx/ppcparams.h
* @brief PowerPC parameters for the SPC560Pxx.
*
* @defgroup PPC_SPC560Pxx SPC560Pxx/MPC560x Specific Parameters
* @ingroup PPC_SPECIFIC
* @details This file contains the PowerPC specific parameters for the
* SPC560Pxx/MPC560x platform.
* @{
*/
#ifndef _PPCPARAMS_H_
#define _PPCPARAMS_H_
/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z0
/**
* @brief Book E instruction set support.
*/
#define PPC_SUPPORTS_BOOKE FALSE
/**
* @brief VLE instruction set support.
*/
#define PPC_SUPPORTS_VLE TRUE
/**
* @brief Supports VLS Load/Store Multiple Volatile instructions.
*/
#define PPC_SUPPORTS_VLE_MULTI TRUE
#endif /* _PPCPARAMS_H_ */
/** @} */

1109
os/ports/GCC/PPC/SPC560Pxx/vectors.s Normal file
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File diff suppressed because it is too large Load Diff

20
os/ports/GCC/PPC/SPC563Mxx/ivor.s
View File

@ -20,7 +20,7 @@
/** /**
* @file SPC563Mxx/ivor.s * @file SPC563Mxx/ivor.s
* @brief PowerPC IVORx handlers. * @brief SPC563Mxx IVORx handlers.
* *
* @addtogroup PPC_CORE * @addtogroup PPC_CORE
* @{ * @{
@ -50,6 +50,11 @@
IVOR10: IVOR10:
/* Creation of the external stack frame (extctx structure).*/ /* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/ stwu %sp, -80(%sp) /* Size of the extctx structure.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */ stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0 mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */ stw %r0, 8(%sp) /* Saves PC. */
@ -73,6 +78,7 @@ IVOR10:
stw %r10, 64(%sp) stw %r10, 64(%sp)
stw %r11, 68(%sp) stw %r11, 68(%sp)
stw %r12, 72(%sp) stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Reset DIE bit in TSR register.*/ /* Reset DIE bit in TSR register.*/
lis %r3, 0x0800 /* DIS bit mask. */ lis %r3, 0x0800 /* DIS bit mask. */
@ -106,6 +112,11 @@ IVOR10:
IVOR4: IVOR4:
/* Creation of the external stack frame (extctx structure).*/ /* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/ stwu %sp, -80(%sp) /* Size of the extctx structure.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */ stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0 mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */ stw %r0, 8(%sp) /* Saves PC. */
@ -129,6 +140,7 @@ IVOR4:
stw %r10, 64(%sp) stw %r10, 64(%sp)
stw %r11, 68(%sp) stw %r11, 68(%sp)
stw %r12, 72(%sp) stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Software vector address from the INTC register.*/ /* Software vector address from the INTC register.*/
lis %r3, INTC_IACKR@h lis %r3, INTC_IACKR@h
@ -170,6 +182,11 @@ IVOR4:
#if CH_DBG_SYSTEM_STATE_CHECK #if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock bl dbg_check_unlock
#endif #endif
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */ lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
lwz %r4, 40(%sp) lwz %r4, 40(%sp)
lwz %r5, 44(%sp) lwz %r5, 44(%sp)
@ -193,6 +210,7 @@ IVOR4:
lwz %r0, 28(%sp) lwz %r0, 28(%sp)
mtXER %r0 /* Restores XER. */ mtXER %r0 /* Restores XER. */
lwz %r0, 32(%sp) /* Restores GPR0. */ lwz %r0, 32(%sp) /* Restores GPR0. */
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
addi %sp, %sp, 80 /* Back to the previous frame. */ addi %sp, %sp, 80 /* Back to the previous frame. */
rfi rfi

20
os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld
View File

@ -21,9 +21,8 @@
/* /*
* SPC563M64 memory setup. * SPC563M64 memory setup.
*/ */
__irq_stack_size__ = 0x0400; __irq_stack_size__ = 0x0000; /* Not yet used.*/
__process_stack_size__ = 0x0800; __process_stack_size__ = 0x0800;
__stacks_total_size__ = __irq_stack_size__ + __process_stack_size__;
MEMORY MEMORY
{ {
@ -121,6 +120,21 @@ SECTIONS
__romdata_start__ = .; __romdata_start__ = .;
} > flash } > flash
.stacks :
{
. = ALIGN(8);
__irq_stack_base__ = .;
. += __irq_stack_size__;
. = ALIGN(8);
__irq_stack_end__ = .;
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
. += __process_stack_size__;
. = ALIGN(8);
__process_stack_end__ = .;
__main_thread_stack_end__ = .;
} > ram
.data : AT(__romdata_start__) .data : AT(__romdata_start__)
{ {
. = ALIGN(4); . = ALIGN(4);
@ -154,5 +168,5 @@ SECTIONS
} > ram } > ram
__heap_base__ = __bss_end__; __heap_base__ = __bss_end__;
__heap_end__ = __ram_end__ - __stacks_total_size__; __heap_end__ = __ram_end__;
} }

5
os/ports/GCC/PPC/SPC563Mxx/ppcparams.h
View File

@ -47,6 +47,11 @@
*/ */
#define PPC_SUPPORTS_VLE TRUE #define PPC_SUPPORTS_VLE TRUE
/**
* @brief Supports VLS Load/Store Multiple Volatile instructions.
*/
#define PPC_SUPPORTS_VLE_MULTI TRUE
#endif /* _PPCPARAMS_H_ */ #endif /* _PPCPARAMS_H_ */
/** @} */ /** @} */